* [PATCH] gdbstub: Update x86 control register bits
@ 2026-03-27 14:34 Mathias Krause
2026-03-27 16:06 ` Alex Bennée
2026-03-27 17:52 ` Paolo Bonzini
0 siblings, 2 replies; 6+ messages in thread
From: Mathias Krause @ 2026-03-27 14:34 UTC (permalink / raw)
To: Alex Bennée, qemu-devel; +Cc: Philippe Mathieu-Daudé, Mathias Krause
The control register bits haven't been updated in a few years, making
them lack behind features QEMU ganied in these years.
Update them to the current version of the SDM and sort the 32bit version
to be in line with all the other definitions (descending order).
This should remove confusion when debugging, for example, CET-enabled
guests:
- before the change:
(gdb) info registers cr4
cr4 0x8000f0 [ PGE MCE PAE PSE ]
- after the change:
(gdb) info registers cr4
cr4 0x8000f0 [ CET PGE MCE PAE PSE ]
Signed-off-by: Mathias Krause <minipli@grsecurity.net>
---
gdbstub/gdb-xml/i386-32bit.xml | 47 +++++++++++++++++++---------------
gdbstub/gdb-xml/i386-64bit.xml | 7 +++++
2 files changed, 34 insertions(+), 20 deletions(-)
diff --git a/gdbstub/gdb-xml/i386-32bit.xml b/gdbstub/gdb-xml/i386-32bit.xml
index 7a66a02b67e3..1dec40e1d2c1 100644
--- a/gdbstub/gdb-xml/i386-32bit.xml
+++ b/gdbstub/gdb-xml/i386-32bit.xml
@@ -87,27 +87,34 @@
</flags>
<flags id="i386_cr4" size="4">
- <field name="VME" start="0" end="0"/>
- <field name="PVI" start="1" end="1"/>
- <field name="TSD" start="2" end="2"/>
- <field name="DE" start="3" end="3"/>
- <field name="PSE" start="4" end="4"/>
- <field name="PAE" start="5" end="5"/>
- <field name="MCE" start="6" end="6"/>
- <field name="PGE" start="7" end="7"/>
- <field name="PCE" start="8" end="8"/>
- <field name="OSFXSR" start="9" end="9"/>
- <field name="OSXMMEXCPT" start="10" end="10"/>
- <field name="UMIP" start="11" end="11"/>
- <field name="LA57" start="12" end="12"/>
- <field name="VMXE" start="13" end="13"/>
- <field name="SMXE" start="14" end="14"/>
- <field name="FSGSBASE" start="16" end="16"/>
- <field name="PCIDE" start="17" end="17"/>
- <field name="OSXSAVE" start="18" end="18"/>
- <field name="SMEP" start="20" end="20"/>
+ <field name="LAM_SUP" start="28" end="28"/>
+ <field name="LASS" start="27" end="27"/>
+ <field name="UINTR" start="25" end="25"/>
+ <field name="PKS" start="24" end="24"/>
+ <field name="CET" start="23" end="23"/>
+ <field name="PKE" start="22" end="22"/>
+ <field name="PKE" start="22" end="22"/>
<field name="SMAP" start="21" end="21"/>
- <field name="PKE" start="22" end="22"/>
+ <field name="SMEP" start="20" end="20"/>
+ <field name="KL" start="19" end="19"/>
+ <field name="OSXSAVE" start="18" end="18"/>
+ <field name="PCIDE" start="17" end="17"/>
+ <field name="FSGSBASE" start="16" end="16"/>
+ <field name="SMXE" start="14" end="14"/>
+ <field name="VMXE" start="13" end="13"/>
+ <field name="LA57" start="12" end="12"/>
+ <field name="UMIP" start="11" end="11"/>
+ <field name="OSXMMEXCPT" start="10" end="10"/>
+ <field name="OSFXSR" start="9" end="9"/>
+ <field name="PCE" start="8" end="8"/>
+ <field name="PGE" start="7" end="7"/>
+ <field name="MCE" start="6" end="6"/>
+ <field name="PAE" start="5" end="5"/>
+ <field name="PSE" start="4" end="4"/>
+ <field name="DE" start="3" end="3"/>
+ <field name="TSD" start="2" end="2"/>
+ <field name="PVI" start="1" end="1"/>
+ <field name="VME" start="0" end="0"/>
</flags>
<flags id="i386_efer" size="4">
diff --git a/gdbstub/gdb-xml/i386-64bit.xml b/gdbstub/gdb-xml/i386-64bit.xml
index 6d889692114d..9ac9164e6a99 100644
--- a/gdbstub/gdb-xml/i386-64bit.xml
+++ b/gdbstub/gdb-xml/i386-64bit.xml
@@ -102,9 +102,16 @@
</flags>
<flags id="x64_cr4" size="8">
+ <field name="FRED" start="32" end="32"/>
+ <field name="LAM_SUP" start="28" end="28"/>
+ <field name="LASS" start="27" end="27"/>
+ <field name="UINTR" start="25" end="25"/>
+ <field name="PKS" start="24" end="24"/>
+ <field name="CET" start="23" end="23"/>
<field name="PKE" start="22" end="22"/>
<field name="SMAP" start="21" end="21"/>
<field name="SMEP" start="20" end="20"/>
+ <field name="KL" start="19" end="19"/>
<field name="OSXSAVE" start="18" end="18"/>
<field name="PCIDE" start="17" end="17"/>
<field name="FSGSBASE" start="16" end="16"/>
--
2.53.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] gdbstub: Update x86 control register bits
2026-03-27 14:34 [PATCH] gdbstub: Update x86 control register bits Mathias Krause
@ 2026-03-27 16:06 ` Alex Bennée
2026-03-27 16:18 ` Mathias Krause
2026-03-27 17:52 ` Paolo Bonzini
1 sibling, 1 reply; 6+ messages in thread
From: Alex Bennée @ 2026-03-27 16:06 UTC (permalink / raw)
To: Mathias Krause; +Cc: qemu-devel, Philippe Mathieu-Daudé
Mathias Krause <minipli@grsecurity.net> writes:
> The control register bits haven't been updated in a few years, making
> them lack behind features QEMU ganied in these years.
>
> Update them to the current version of the SDM and sort the 32bit version
> to be in line with all the other definitions (descending order).
Do these changes come from the gdb upstream (which is where all the XML
originally comes from).
>
> This should remove confusion when debugging, for example, CET-enabled
> guests:
>
> - before the change:
> (gdb) info registers cr4
> cr4 0x8000f0 [ PGE MCE PAE PSE ]
>
> - after the change:
> (gdb) info registers cr4
> cr4 0x8000f0 [ CET PGE MCE PAE PSE ]
>
> Signed-off-by: Mathias Krause <minipli@grsecurity.net>
> ---
> gdbstub/gdb-xml/i386-32bit.xml | 47 +++++++++++++++++++---------------
> gdbstub/gdb-xml/i386-64bit.xml | 7 +++++
> 2 files changed, 34 insertions(+), 20 deletions(-)
>
> diff --git a/gdbstub/gdb-xml/i386-32bit.xml b/gdbstub/gdb-xml/i386-32bit.xml
> index 7a66a02b67e3..1dec40e1d2c1 100644
> --- a/gdbstub/gdb-xml/i386-32bit.xml
> +++ b/gdbstub/gdb-xml/i386-32bit.xml
> @@ -87,27 +87,34 @@
> </flags>
>
> <flags id="i386_cr4" size="4">
> - <field name="VME" start="0" end="0"/>
> - <field name="PVI" start="1" end="1"/>
> - <field name="TSD" start="2" end="2"/>
> - <field name="DE" start="3" end="3"/>
> - <field name="PSE" start="4" end="4"/>
> - <field name="PAE" start="5" end="5"/>
> - <field name="MCE" start="6" end="6"/>
> - <field name="PGE" start="7" end="7"/>
> - <field name="PCE" start="8" end="8"/>
> - <field name="OSFXSR" start="9" end="9"/>
> - <field name="OSXMMEXCPT" start="10" end="10"/>
> - <field name="UMIP" start="11" end="11"/>
> - <field name="LA57" start="12" end="12"/>
> - <field name="VMXE" start="13" end="13"/>
> - <field name="SMXE" start="14" end="14"/>
> - <field name="FSGSBASE" start="16" end="16"/>
> - <field name="PCIDE" start="17" end="17"/>
> - <field name="OSXSAVE" start="18" end="18"/>
> - <field name="SMEP" start="20" end="20"/>
> + <field name="LAM_SUP" start="28" end="28"/>
> + <field name="LASS" start="27" end="27"/>
> + <field name="UINTR" start="25" end="25"/>
> + <field name="PKS" start="24" end="24"/>
> + <field name="CET" start="23" end="23"/>
> + <field name="PKE" start="22" end="22"/>
> + <field name="PKE" start="22" end="22"/>
> <field name="SMAP" start="21" end="21"/>
> - <field name="PKE" start="22" end="22"/>
> + <field name="SMEP" start="20" end="20"/>
> + <field name="KL" start="19" end="19"/>
> + <field name="OSXSAVE" start="18" end="18"/>
> + <field name="PCIDE" start="17" end="17"/>
> + <field name="FSGSBASE" start="16" end="16"/>
> + <field name="SMXE" start="14" end="14"/>
> + <field name="VMXE" start="13" end="13"/>
> + <field name="LA57" start="12" end="12"/>
> + <field name="UMIP" start="11" end="11"/>
> + <field name="OSXMMEXCPT" start="10" end="10"/>
> + <field name="OSFXSR" start="9" end="9"/>
> + <field name="PCE" start="8" end="8"/>
> + <field name="PGE" start="7" end="7"/>
> + <field name="MCE" start="6" end="6"/>
> + <field name="PAE" start="5" end="5"/>
> + <field name="PSE" start="4" end="4"/>
> + <field name="DE" start="3" end="3"/>
> + <field name="TSD" start="2" end="2"/>
> + <field name="PVI" start="1" end="1"/>
> + <field name="VME" start="0" end="0"/>
> </flags>
>
> <flags id="i386_efer" size="4">
> diff --git a/gdbstub/gdb-xml/i386-64bit.xml b/gdbstub/gdb-xml/i386-64bit.xml
> index 6d889692114d..9ac9164e6a99 100644
> --- a/gdbstub/gdb-xml/i386-64bit.xml
> +++ b/gdbstub/gdb-xml/i386-64bit.xml
> @@ -102,9 +102,16 @@
> </flags>
>
> <flags id="x64_cr4" size="8">
> + <field name="FRED" start="32" end="32"/>
> + <field name="LAM_SUP" start="28" end="28"/>
> + <field name="LASS" start="27" end="27"/>
> + <field name="UINTR" start="25" end="25"/>
> + <field name="PKS" start="24" end="24"/>
> + <field name="CET" start="23" end="23"/>
> <field name="PKE" start="22" end="22"/>
> <field name="SMAP" start="21" end="21"/>
> <field name="SMEP" start="20" end="20"/>
> + <field name="KL" start="19" end="19"/>
> <field name="OSXSAVE" start="18" end="18"/>
> <field name="PCIDE" start="17" end="17"/>
> <field name="FSGSBASE" start="16" end="16"/>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] gdbstub: Update x86 control register bits
2026-03-27 16:06 ` Alex Bennée
@ 2026-03-27 16:18 ` Mathias Krause
0 siblings, 0 replies; 6+ messages in thread
From: Mathias Krause @ 2026-03-27 16:18 UTC (permalink / raw)
To: Alex Bennée; +Cc: qemu-devel, Philippe Mathieu-Daudé
On 27.03.26 17:06, Alex Bennée wrote:
> Mathias Krause <minipli@grsecurity.net> writes:
>
>> The control register bits haven't been updated in a few years, making
>> them lack behind features QEMU ganied in these years.
>>
>> Update them to the current version of the SDM and sort the 32bit version
>> to be in line with all the other definitions (descending order).
>
> Do these changes come from the gdb upstream (which is where all the XML
> originally comes from).
The upstream version has no control register coverage, that's QEMU
specific and came with 7b0f97bade8a ("gdbstub: Fix i386/x86_64 machine
description and add control registers").
Thanks,
Mathias
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] gdbstub: Update x86 control register bits
2026-03-27 14:34 [PATCH] gdbstub: Update x86 control register bits Mathias Krause
2026-03-27 16:06 ` Alex Bennée
@ 2026-03-27 17:52 ` Paolo Bonzini
2026-04-22 8:52 ` Mathias Krause
1 sibling, 1 reply; 6+ messages in thread
From: Paolo Bonzini @ 2026-03-27 17:52 UTC (permalink / raw)
To: Mathias Krause; +Cc: Alex Bennée, qemu-devel, Philippe Mathieu-Daudé
Queued, thanks.
Paolo
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] gdbstub: Update x86 control register bits
2026-03-27 17:52 ` Paolo Bonzini
@ 2026-04-22 8:52 ` Mathias Krause
2026-05-22 7:17 ` Mathias Krause
0 siblings, 1 reply; 6+ messages in thread
From: Mathias Krause @ 2026-04-22 8:52 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: Alex Bennée, qemu-devel, Philippe Mathieu-Daudé
On 27.03.26 18:52, Paolo Bonzini wrote:
> Queued, thanks.
Ping! Is that queue visible somewhere on the Interwebs?
Should the patch be backported to 11.x to avoid the confusion related to
CR4.CET I had?
Thanks,
Mathias
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] gdbstub: Update x86 control register bits
2026-04-22 8:52 ` Mathias Krause
@ 2026-05-22 7:17 ` Mathias Krause
0 siblings, 0 replies; 6+ messages in thread
From: Mathias Krause @ 2026-05-22 7:17 UTC (permalink / raw)
To: Alex Bennée; +Cc: Paolo Bonzini, qemu-devel, Philippe Mathieu-Daudé
On 22.04.26 10:52, Mathias Krause wrote:
> On 27.03.26 18:52, Paolo Bonzini wrote:
>> Queued, thanks.
>
> Ping! Is that queue visible somewhere on the Interwebs?
Alex, can you please pick up this patch and route it via the gdbstub
tree? Paolo said, he queued it but it never appeared in QEMU upstream
nor in his tree at https://gitlab.com/bonzini/qemu.git. He doesn't
respond to requests either.
>
> Should the patch be backported to 11.x to avoid the confusion related to
> CR4.CET I had?
That would still be relevant, imho. Dunno how to handle that.
Thanks,
Mathias
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2026-05-22 7:18 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2026-03-27 14:34 [PATCH] gdbstub: Update x86 control register bits Mathias Krause
2026-03-27 16:06 ` Alex Bennée
2026-03-27 16:18 ` Mathias Krause
2026-03-27 17:52 ` Paolo Bonzini
2026-04-22 8:52 ` Mathias Krause
2026-05-22 7:17 ` Mathias Krause
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