From: Thomas Gleixner <tglx@linutronix.de>
To: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Anup Patel <anup@brainfault.org>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Sunil V L <sunilvl@ventanamicro.com>,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
Ryo Takakura <takakura@valinux.co.jp>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, sophgo@lists.linux.dev,
Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Subject: Re: [PATCH v3 1/7] riscv: helper to parse hart index
Date: Fri, 20 Jun 2025 21:31:27 +0200 [thread overview]
Message-ID: <87v7oqp5v4.ffs@tglx> (raw)
In-Reply-To: <20250612143911.3224046-2-vladimir.kondratiev@mobileye.com>
On Thu, Jun 12 2025 at 17:39, Vladimir Kondratiev wrote:
> ---
> arch/riscv/include/asm/irq.h | 2 ++
> arch/riscv/kernel/irq.c | 34 ++++++++++++++++++++++++++++++++++
> 2 files changed, 36 insertions(+)
Can the RISCV folks please ack/review this one so this pile can go
through the irqchip tree?
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@linutronix.de>
To: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Anup Patel <anup@brainfault.org>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Sunil V L <sunilvl@ventanamicro.com>,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
Ryo Takakura <takakura@valinux.co.jp>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, sophgo@lists.linux.dev,
Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Subject: Re: [PATCH v3 1/7] riscv: helper to parse hart index
Date: Fri, 20 Jun 2025 21:31:27 +0200 [thread overview]
Message-ID: <87v7oqp5v4.ffs@tglx> (raw)
In-Reply-To: <20250612143911.3224046-2-vladimir.kondratiev@mobileye.com>
On Thu, Jun 12 2025 at 17:39, Vladimir Kondratiev wrote:
> ---
> arch/riscv/include/asm/irq.h | 2 ++
> arch/riscv/kernel/irq.c | 34 ++++++++++++++++++++++++++++++++++
> 2 files changed, 36 insertions(+)
Can the RISCV folks please ack/review this one so this pile can go
through the irqchip tree?
next prev parent reply other threads:[~2025-06-20 19:49 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-09 13:47 [PATCH v1 0/7] Risc-V ACLINT IPI controller Vladimir Kondratiev
2025-06-09 13:47 ` Vladimir Kondratiev
2025-06-09 13:47 ` [PATCH v1 1/7] riscv: helper to parse hart index Vladimir Kondratiev
2025-06-09 13:47 ` Vladimir Kondratiev
2025-06-23 12:53 ` Alexandre Ghiti
2025-06-23 12:53 ` Alexandre Ghiti
2025-06-09 13:47 ` [PATCH v1 2/7] irqchip: riscv aplic: use riscv_get_hart_index() Vladimir Kondratiev
2025-06-09 13:47 ` Vladimir Kondratiev
2025-06-12 12:50 ` Thomas Gleixner
2025-06-12 12:50 ` Thomas Gleixner
2025-06-09 13:47 ` [PATCH v1 3/7] dt-bindings: interrupt-controller: add generic Risc-v aclint-sswi Vladimir Kondratiev
2025-06-09 13:47 ` Vladimir Kondratiev
2025-06-09 16:01 ` Conor Dooley
2025-06-09 16:01 ` Conor Dooley
2025-06-10 9:55 ` Vladimir Kondratiev
2025-06-10 9:55 ` Vladimir Kondratiev
2025-06-09 13:47 ` [PATCH v1 4/7] irqchip: introduce generic Risc-V aclint-sswi Vladimir Kondratiev
2025-06-09 13:47 ` Vladimir Kondratiev
2025-06-09 13:47 ` [PATCH v1 5/7] irqchip: aslint-sswi: resolve hart index Vladimir Kondratiev
2025-06-09 13:47 ` Vladimir Kondratiev
2025-06-09 13:47 ` [PATCH v1 6/7] irqchip: aclint-sswi: reduce data scope Vladimir Kondratiev
2025-06-09 13:47 ` Vladimir Kondratiev
2025-06-09 13:47 ` [PATCH v1 7/7] irqchip: aclint-sswi: remove extra includes Vladimir Kondratiev
2025-06-09 13:47 ` Vladimir Kondratiev
2025-06-10 10:05 ` [PATCH v2 0/7] MIPS P8700 variant of the ACLINT IPI controller Vladimir Kondratiev
2025-06-10 10:05 ` Vladimir Kondratiev
2025-06-10 10:05 ` [PATCH v2 1/7] riscv: helper to parse hart index Vladimir Kondratiev
2025-06-10 10:05 ` Vladimir Kondratiev
2025-06-10 10:05 ` [PATCH v2 2/7] irqchip: riscv aplic: use riscv_get_hart_index() Vladimir Kondratiev
2025-06-10 10:05 ` Vladimir Kondratiev
2025-06-10 10:05 ` [PATCH v2 3/7] dt-bindings: interrupt-controller: add MIPS P8700 aclint-sswi Vladimir Kondratiev
2025-06-10 10:05 ` Vladimir Kondratiev
2025-06-10 10:05 ` [PATCH v2 4/7] irqchip: MIPS P800 variant of aclint-sswi Vladimir Kondratiev
2025-06-10 10:05 ` Vladimir Kondratiev
2025-06-10 10:09 ` Inochi Amaoto
2025-06-10 10:09 ` Inochi Amaoto
2025-06-10 10:46 ` Vladimir Kondratiev
2025-06-10 10:46 ` Vladimir Kondratiev
2025-06-10 10:53 ` Inochi Amaoto
2025-06-10 10:53 ` Inochi Amaoto
2025-06-10 11:09 ` Vladimir Kondratiev
2025-06-10 11:09 ` Vladimir Kondratiev
2025-06-10 11:20 ` Inochi Amaoto
2025-06-10 11:20 ` Inochi Amaoto
2025-06-12 13:03 ` Thomas Gleixner
2025-06-12 13:03 ` Thomas Gleixner
2025-06-12 14:38 ` Vladimir Kondratiev
2025-06-12 14:38 ` Vladimir Kondratiev
2025-06-10 10:05 ` [PATCH v2 5/7] irqchip: aslint-sswi: resolve hart index Vladimir Kondratiev
2025-06-10 10:05 ` Vladimir Kondratiev
2025-06-10 10:05 ` [PATCH v2 6/7] irqchip: aclint-sswi: reduce data scope Vladimir Kondratiev
2025-06-10 10:05 ` Vladimir Kondratiev
2025-06-10 10:05 ` [PATCH v2 7/7] irqchip: aclint-sswi: remove extra includes Vladimir Kondratiev
2025-06-10 10:05 ` Vladimir Kondratiev
2025-06-12 14:39 ` [PATCH v3 0/7] MIPS P8700 variant of the ACLINT IPI controller Vladimir Kondratiev
2025-06-12 14:39 ` Vladimir Kondratiev
2025-06-12 14:39 ` [PATCH v3 1/7] riscv: helper to parse hart index Vladimir Kondratiev
2025-06-12 14:39 ` Vladimir Kondratiev
2025-06-20 19:31 ` Thomas Gleixner [this message]
2025-06-20 19:31 ` Thomas Gleixner
2025-06-26 14:13 ` [tip: irq/drivers] riscv: Helper " tip-bot2 for Vladimir Kondratiev
2025-06-12 14:39 ` [PATCH v3 2/7] irqchip/riscv-aplic: use riscv_get_hart_index() Vladimir Kondratiev
2025-06-12 14:39 ` Vladimir Kondratiev
2025-06-26 14:13 ` [tip: irq/drivers] irqchip/riscv-aplic: Use riscv_get_hart_index() tip-bot2 for Vladimir Kondratiev
2025-06-12 14:39 ` [PATCH v3 3/7] dt-bindings: interrupt-controller: add MIPS P8700 aclint-sswi Vladimir Kondratiev
2025-06-12 14:39 ` Vladimir Kondratiev
2025-06-12 15:35 ` Conor Dooley
2025-06-12 15:35 ` Conor Dooley
2025-06-26 14:13 ` [tip: irq/drivers] dt-bindings: interrupt-controller: Add " tip-bot2 for Vladimir Kondratiev
2025-06-12 14:39 ` [PATCH v3 4/7] irqchip: MIPS P800 variant of aclint-sswi Vladimir Kondratiev
2025-06-12 14:39 ` Vladimir Kondratiev
2025-06-26 14:13 ` [tip: irq/drivers] irqchip/thead-c900-aclint-sswi: Generalize aclint-sswi driver and add MIPS P800 support tip-bot2 for Vladimir Kondratiev
2025-06-12 14:39 ` [PATCH v3 5/7] irqchip/aslint-sswi: resolve hart index Vladimir Kondratiev
2025-06-12 14:39 ` Vladimir Kondratiev
2025-06-26 14:13 ` [tip: irq/drivers] irqchip/aslint-sswi: Resolve " tip-bot2 for Vladimir Kondratiev
2025-06-12 14:39 ` [PATCH v3 6/7] irqchip/aclint-sswi: reduce data scope Vladimir Kondratiev
2025-06-12 14:39 ` Vladimir Kondratiev
2025-06-26 14:13 ` [tip: irq/drivers] irqchip/aclint-sswi: Reduce " tip-bot2 for Vladimir Kondratiev
2025-06-12 14:39 ` [PATCH v3 7/7] irqchip/aclint-sswi: remove extra includes Vladimir Kondratiev
2025-06-12 14:39 ` Vladimir Kondratiev
2025-06-26 14:13 ` [tip: irq/drivers] irqchip/aclint-sswi: Remove unneeded includes tip-bot2 for Vladimir Kondratiev
2025-06-26 13:48 ` [PATCH v3 0/7] MIPS P8700 variant of the ACLINT IPI controller Thomas Gleixner
2025-06-26 13:48 ` Thomas Gleixner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87v7oqp5v4.ffs@tglx \
--to=tglx@linutronix.de \
--cc=alex@ghiti.fr \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=inochiama@gmail.com \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=rafael.j.wysocki@intel.com \
--cc=robh@kernel.org \
--cc=sophgo@lists.linux.dev \
--cc=sunilvl@ventanamicro.com \
--cc=takakura@valinux.co.jp \
--cc=unicorn_wang@outlook.com \
--cc=vladimir.kondratiev@mobileye.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.