All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 00/18] drm/i915: PLL refactoring
Date: Mon, 15 Apr 2024 17:26:51 +0300	[thread overview]
Message-ID: <87v84i1z2s.fsf@intel.com> (raw)
In-Reply-To: <20240412182703.19916-1-ville.syrjala@linux.intel.com>

On Fri, 12 Apr 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> A bunch of refactoring around PLLs. Main feature is 
> the unionization of dpll_hw_state. The eventual goal
> is to unify the approach for PLLs across all platforms
> instead of the current "shared PLLs are somehow
> different than other PLLs" approach.

The entire series is

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


>
> Ville Syrjälä (18):
>   drm/i915: Replace hand rolled PLL state dump with
>     intel_dpll_dump_hw_state()
>   drm/i915: Use printer for the rest of PLL debugfs dump
>   drm/i915: Rename PLL hw_state variables/arguments
>   drm/i915: Introduce some local PLL state variables
>   drm/i915: Extract ilk_fb_cb_factor()
>   drm/i915: Extract ilk_dpll_compute_fp()
>   drm/i915: Extract i9xx_dpll_get_hw_state()
>   drm/i915: Pass the PLL hw_state to pll->enable()
>   drm/i915: Extract i965_dpll_md()
>   drm/i915: Extract {i9xx,i8xx,ilk}_dpll()
>   drm/i915: Inline {i9xx,ilk}_update_pll_dividers()
>   drm/i915: Modernize i9xx_pll_refclk()
>   drm/i915: Drop pointless 'crtc' argument from *_crtc_clock_get()
>   drm/i915: s/pipe_config/crtc_state/ in legacy PLL code
>   drm/i915: Add local DPLL 'hw_state' variables
>   drm/i915: Carve up struct intel_dpll_hw_state
>   drm/i915: Unionize dpll_hw_state
>   drm/i915: Suck snps/cx0 PLL states into dpll_hw_state
>
>  drivers/gpu/drm/i915/display/intel_cx0_phy.c  |  20 +-
>  drivers/gpu/drm/i915/display/intel_ddi.c      |   8 +-
>  drivers/gpu/drm/i915/display/intel_display.c  |  30 +-
>  .../drm/i915/display/intel_display_debugfs.c  |  39 +-
>  .../drm/i915/display/intel_display_types.h    |  43 +-
>  drivers/gpu/drm/i915/display/intel_dpll.c     | 338 +++++++-----
>  drivers/gpu/drm/i915/display/intel_dpll.h     |  12 +-
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 489 ++++++++++--------
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  80 ++-
>  .../gpu/drm/i915/display/intel_pch_display.c  |   4 +-
>  drivers/gpu/drm/i915/display/intel_snps_phy.c |   6 +-
>  11 files changed, 581 insertions(+), 488 deletions(-)

-- 
Jani Nikula, Intel

  parent reply	other threads:[~2024-04-15 14:27 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-12 18:26 [PATCH 00/18] drm/i915: PLL refactoring Ville Syrjala
2024-04-12 18:26 ` [PATCH 01/18] drm/i915: Replace hand rolled PLL state dump with intel_dpll_dump_hw_state() Ville Syrjala
2024-04-12 18:26 ` [PATCH 02/18] drm/i915: Use printer for the rest of PLL debugfs dump Ville Syrjala
2024-04-12 18:26 ` [PATCH 03/18] drm/i915: Rename PLL hw_state variables/arguments Ville Syrjala
2024-04-12 18:26 ` [PATCH 04/18] drm/i915: Introduce some local PLL state variables Ville Syrjala
2024-04-12 18:26 ` [PATCH 05/18] drm/i915: Extract ilk_fb_cb_factor() Ville Syrjala
2024-04-12 18:26 ` [PATCH 06/18] drm/i915: Extract ilk_dpll_compute_fp() Ville Syrjala
2024-04-12 18:26 ` [PATCH 07/18] drm/i915: Extract i9xx_dpll_get_hw_state() Ville Syrjala
2024-04-12 18:26 ` [PATCH 08/18] drm/i915: Pass the PLL hw_state to pll->enable() Ville Syrjala
2024-04-12 18:26 ` [PATCH 09/18] drm/i915: Extract i965_dpll_md() Ville Syrjala
2024-04-12 18:26 ` [PATCH 10/18] drm/i915: Extract {i9xx,i8xx,ilk}_dpll() Ville Syrjala
2024-04-15 14:06   ` Jani Nikula
2024-04-12 18:26 ` [PATCH 11/18] drm/i915: Inline {i9xx,ilk}_update_pll_dividers() Ville Syrjala
2024-04-12 18:26 ` [PATCH 12/18] drm/i915: Modernize i9xx_pll_refclk() Ville Syrjala
2024-04-12 18:26 ` [PATCH 13/18] drm/i915: Drop pointless 'crtc' argument from *_crtc_clock_get() Ville Syrjala
2024-04-12 18:26 ` [PATCH 14/18] drm/i915: s/pipe_config/crtc_state/ in legacy PLL code Ville Syrjala
2024-04-12 18:27 ` [PATCH 15/18] drm/i915: Add local DPLL 'hw_state' variables Ville Syrjala
2024-04-12 18:27 ` [PATCH 16/18] drm/i915: Carve up struct intel_dpll_hw_state Ville Syrjala
2024-04-12 18:27 ` [PATCH 17/18] drm/i915: Unionize dpll_hw_state Ville Syrjala
2024-04-12 18:27 ` [PATCH 18/18] drm/i915: Suck snps/cx0 PLL states into dpll_hw_state Ville Syrjala
2024-04-15 14:26   ` Jani Nikula
2024-04-15 14:26 ` Jani Nikula [this message]
2024-04-15 14:54 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: PLL refactoring Patchwork
2024-04-15 14:54 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-04-15 15:01 ` ✓ Fi.CI.BAT: success " Patchwork
2024-04-15 19:06 ` ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87v84i1z2s.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.