From: "Alex Bennée" <alex.bennee@linaro.org>
To: "Matheus K. Ferst" <matheus.ferst@eldorado.org.br>
Cc: qemu-devel@nongnu.org, fam@euphon.net,
Peter Maydell <peter.maydell@linaro.org>,
berrange@redhat.com, David Hildenbrand <david@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
f4bug@amsat.org, Eduardo Habkost <eduardo@habkost.net>,
"open list:S390 TCG CPUs" <qemu-s390x@nongnu.org>,
qemu-arm@nongnu.org, stefanha@redhat.com, crosa@redhat.com,
pbonzini@redhat.com, aurelien@aurel32.net
Subject: Re: [PATCH v1 11/11] tests/tcg: add vectorised sha512 versions
Date: Mon, 14 Feb 2022 15:14:30 +0000 [thread overview]
Message-ID: <87v8xhcwdf.fsf@linaro.org> (raw)
In-Reply-To: <f8164a77-80d1-86fa-7fc9-6089d6b4f34b@eldorado.org.br>
"Matheus K. Ferst" <matheus.ferst@eldorado.org.br> writes:
> On 11/02/2022 13:03, Alex Bennée wrote:
>> This builds vectorised versions of sha512 to exercise the vector code:
>> - aarch64 (AdvSimd)
>> - i386 (SSE)
>> - s390x (MVX)
>> - ppc64 (vector)
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> Message-Id: <20220202191242.652607-5-alex.bennee@linaro.org>
>> ---
>> v2
>> - use -msse4.1 -O3 instead of -pentium4 for i386 build
>> ---
>> tests/tcg/multiarch/sha512.c | 2 +-
>> tests/tcg/aarch64/Makefile.target | 7 +++++++
>> tests/tcg/arm/Makefile.target | 8 ++++++++
>> tests/tcg/i386/Makefile.target | 6 ++++++
>> tests/tcg/ppc64le/Makefile.target | 5 ++++-
>> tests/tcg/s390x/Makefile.target | 9 +++++++++
>> tests/tcg/x86_64/Makefile.target | 7 +++++++
>> 7 files changed, 42 insertions(+), 2 deletions(-)
>>
>
> <snip>
>
>> diff --git a/tests/tcg/ppc64le/Makefile.target b/tests/tcg/ppc64le/Makefile.target
>> index 480ff0898d..4f1d03dfcf 100644
>> --- a/tests/tcg/ppc64le/Makefile.target
>> +++ b/tests/tcg/ppc64le/Makefile.target
>> @@ -5,10 +5,13 @@
>> VPATH += $(SRC_PATH)/tests/tcg/ppc64le
>> ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER8_VECTOR),)
>> -PPC64LE_TESTS=bcdsub non_signalling_xscv
>> +PPC64LE_TESTS=bcdsub non_signalling_xscv sha512-vector
>> endif
>> $(PPC64LE_TESTS): CFLAGS += -mpower8-vector
>>
>
> Since this test does not target a specific instruction, maybe it
> should use -mvsx/-maltivec to allow the compiler to use newer
> instructions.
I wasn't sure which vector instructions are supported by the TCG front
ends so if the above flags won't trip up the TCG I can add them to the
cflags.
>
>> +sha512-vector: sha512.c
>> + $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
>> +
>
> Can we have this test for big-endian too?
We have tests/tcg/ppc64 so sure...
>
> Thanks,
> Matheus K. Ferst
> Instituto de Pesquisas ELDORADO <http://www.eldorado.org.br/>
> Analista de Software
> Aviso Legal - Disclaimer <https://www.eldorado.org.br/disclaimer.html>
--
Alex Bennée
WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: "Matheus K. Ferst" <matheus.ferst@eldorado.org.br>
Cc: fam@euphon.net, Peter Maydell <peter.maydell@linaro.org>,
berrange@redhat.com, David Hildenbrand <david@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org, f4bug@amsat.org,
Eduardo Habkost <eduardo@habkost.net>,
"open list:S390 TCG CPUs" <qemu-s390x@nongnu.org>,
qemu-arm@nongnu.org, stefanha@redhat.com, crosa@redhat.com,
pbonzini@redhat.com, aurelien@aurel32.net
Subject: Re: [PATCH v1 11/11] tests/tcg: add vectorised sha512 versions
Date: Mon, 14 Feb 2022 15:14:30 +0000 [thread overview]
Message-ID: <87v8xhcwdf.fsf@linaro.org> (raw)
In-Reply-To: <f8164a77-80d1-86fa-7fc9-6089d6b4f34b@eldorado.org.br>
"Matheus K. Ferst" <matheus.ferst@eldorado.org.br> writes:
> On 11/02/2022 13:03, Alex Bennée wrote:
>> This builds vectorised versions of sha512 to exercise the vector code:
>> - aarch64 (AdvSimd)
>> - i386 (SSE)
>> - s390x (MVX)
>> - ppc64 (vector)
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> Message-Id: <20220202191242.652607-5-alex.bennee@linaro.org>
>> ---
>> v2
>> - use -msse4.1 -O3 instead of -pentium4 for i386 build
>> ---
>> tests/tcg/multiarch/sha512.c | 2 +-
>> tests/tcg/aarch64/Makefile.target | 7 +++++++
>> tests/tcg/arm/Makefile.target | 8 ++++++++
>> tests/tcg/i386/Makefile.target | 6 ++++++
>> tests/tcg/ppc64le/Makefile.target | 5 ++++-
>> tests/tcg/s390x/Makefile.target | 9 +++++++++
>> tests/tcg/x86_64/Makefile.target | 7 +++++++
>> 7 files changed, 42 insertions(+), 2 deletions(-)
>>
>
> <snip>
>
>> diff --git a/tests/tcg/ppc64le/Makefile.target b/tests/tcg/ppc64le/Makefile.target
>> index 480ff0898d..4f1d03dfcf 100644
>> --- a/tests/tcg/ppc64le/Makefile.target
>> +++ b/tests/tcg/ppc64le/Makefile.target
>> @@ -5,10 +5,13 @@
>> VPATH += $(SRC_PATH)/tests/tcg/ppc64le
>> ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER8_VECTOR),)
>> -PPC64LE_TESTS=bcdsub non_signalling_xscv
>> +PPC64LE_TESTS=bcdsub non_signalling_xscv sha512-vector
>> endif
>> $(PPC64LE_TESTS): CFLAGS += -mpower8-vector
>>
>
> Since this test does not target a specific instruction, maybe it
> should use -mvsx/-maltivec to allow the compiler to use newer
> instructions.
I wasn't sure which vector instructions are supported by the TCG front
ends so if the above flags won't trip up the TCG I can add them to the
cflags.
>
>> +sha512-vector: sha512.c
>> + $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
>> +
>
> Can we have this test for big-endian too?
We have tests/tcg/ppc64 so sure...
>
> Thanks,
> Matheus K. Ferst
> Instituto de Pesquisas ELDORADO <http://www.eldorado.org.br/>
> Analista de Software
> Aviso Legal - Disclaimer <https://www.eldorado.org.br/disclaimer.html>
--
Alex Bennée
next prev parent reply other threads:[~2022-02-14 15:15 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-11 16:02 [PATCH v1 00/11] testing/next (docker, lcitool, ci, tcg) Alex Bennée
2022-02-11 16:02 ` Alex Bennée
2022-02-11 16:02 ` [PATCH v1 01/11] tests/docker: restore TESTS/IMAGES filtering Alex Bennée
2022-02-11 16:02 ` Alex Bennée
2022-02-11 16:03 ` [PATCH v1 02/11] tests/docker: add NOUSER for alpine image Alex Bennée
2022-02-11 16:03 ` Alex Bennée
2022-02-11 16:23 ` Daniel P. Berrangé
2022-02-11 16:23 ` Daniel P. Berrangé
2022-02-11 17:51 ` Alex Bennée
2022-02-11 17:51 ` Alex Bennée
2022-02-11 18:08 ` Daniel P. Berrangé
2022-02-11 18:08 ` Daniel P. Berrangé
2022-02-11 16:03 ` [PATCH v1 03/11] tests/lcitool: update to latest version Alex Bennée
2022-02-11 16:03 ` Alex Bennée
2022-02-11 16:03 ` [PATCH v1 04/11] tests/docker: update debian-arm64-cross with lci-tool Alex Bennée
2022-02-11 16:03 ` Alex Bennée
2022-02-11 21:08 ` Richard Henderson
2022-02-11 16:03 ` [PATCH v1 05/11] tests/docker: introduce debian-riscv64-test-cross Alex Bennée
2022-02-11 16:03 ` Alex Bennée
2022-02-11 21:09 ` Richard Henderson
2022-02-11 16:03 ` [PATCH v1 06/11] scripts/ci: add build env rules for aarch32 on aarch64 Alex Bennée
2022-02-11 16:03 ` Alex Bennée
2022-02-11 16:03 ` [PATCH v1 07/11] scripts/ci: allow for a secondary runner Alex Bennée
2022-02-11 16:03 ` Alex Bennée
2022-02-11 16:03 ` [PATCH v1 08/11] gitlab: add a new aarch32 custom runner definition Alex Bennée
2022-02-11 16:03 ` Alex Bennée
2022-02-11 16:03 ` [PATCH v1 09/11] tests/tcg: build sha1-vector with O3 and compare Alex Bennée
2022-02-11 16:03 ` Alex Bennée
2022-02-11 21:50 ` Richard Henderson
2022-02-11 16:03 ` [PATCH v1 10/11] tests/tcg: add sha512 test Alex Bennée
2022-02-11 16:03 ` Alex Bennée
2022-02-11 16:03 ` [PATCH v1 11/11] tests/tcg: add vectorised sha512 versions Alex Bennée
2022-02-11 16:03 ` Alex Bennée
2022-02-14 14:17 ` Matheus K. Ferst
2022-02-14 15:14 ` Alex Bennée [this message]
2022-02-14 15:14 ` Alex Bennée
2022-02-17 12:46 ` Matheus K. Ferst
2022-02-17 12:46 ` Matheus K. Ferst
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