[Intel-gfx] [PULL] drm-intel-next

[Jani Nikula <jani.nikula@intel.com>]

Hi Dave & Daniel -

drm-intel-next-2021-03-16:
Highlights:
- Alderlake S enabling, via topic branch (Aditya, Anusha, Caz, José, Lucas, Matt, Tejas)
- Refactor display code to shrink intel_display.c etc. (Dave)
- Support more gen 9 and Tigerlake PCH combinations (Lyude, Tejas)
- Add eDP MSO support (Jani)

Display:
- Refactor to support multiple PSR instances (Gwan-gyeong)
- Link training debug logging updates (Sean)
- Updates to eDP fixed mode handling (Jani)
- Disable PSR2 on JSL/EHL (Edmund)
- Support DDR5 and LPDDR5 for bandwidth computation (Clint, José)
- Update VBT DP max link rate table (Shawn)
- Disable the QSES check for HDCP2.2 over MST (Juston)
- PSR updates, refactoring, selective fetch (José, Gwan-gyeong)
- Display init sequence refactoring (Lucas)
- Limit LSPCON to gen 9 and 10 platforms (Ankit)
- Fix DDI lane polarity per VBT info (Uma)
- Fix HDMI vswing programming location in mode set (Ville)
- Various display improvements and refactorings and cleanups (Ville)
- Clean up DDI clock routing and readout (Ville)
- Workaround async flip + VT-d corruption on HSW/BDW (Ville)
- SAGV watermark fixes and cleanups (Ville)
- Silence pipe tracepoint WARNs (Ville)

Other:
- Remove require_force_probe protection from RKL, may need to be revisited (Tejas)
- Detect loss of MMIO access (Matt)
- GVT display improvements
- drm/i915: Disable runtime power management during shutdown (Imre)
- Perf/OA updates (Umesh)
- Remove references to struct drm_device.pdev, via topic branch (Thomas)
- Backmerge (Jani)

BR,
Jani.

The following changes since commit a38fd8748464831584a19438cbb3082b5a2dab15:

  Linux 5.12-rc2 (2021-03-05 17:33:41 -0800)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2021-03-16

for you to fetch changes up to 2b25fb31a38d4fe8e745754036052ef8b16fe712:

  Merge tag 'gvt-next-2021-03-16' of https://github.com/intel/gvt-linux into drm-intel-next (2021-03-16 13:42:33 +0200)

----------------------------------------------------------------
Highlights:
- Alderlake S enabling, via topic branch (Aditya, Anusha, Caz, José, Lucas, Matt, Tejas)
- Refactor display code to shrink intel_display.c etc. (Dave)
- Support more gen 9 and Tigerlake PCH combinations (Lyude, Tejas)
- Add eDP MSO support (Jani)

Display:
- Refactor to support multiple PSR instances (Gwan-gyeong)
- Link training debug logging updates (Sean)
- Updates to eDP fixed mode handling (Jani)
- Disable PSR2 on JSL/EHL (Edmund)
- Support DDR5 and LPDDR5 for bandwidth computation (Clint, José)
- Update VBT DP max link rate table (Shawn)
- Disable the QSES check for HDCP2.2 over MST (Juston)
- PSR updates, refactoring, selective fetch (José, Gwan-gyeong)
- Display init sequence refactoring (Lucas)
- Limit LSPCON to gen 9 and 10 platforms (Ankit)
- Fix DDI lane polarity per VBT info (Uma)
- Fix HDMI vswing programming location in mode set (Ville)
- Various display improvements and refactorings and cleanups (Ville)
- Clean up DDI clock routing and readout (Ville)
- Workaround async flip + VT-d corruption on HSW/BDW (Ville)
- SAGV watermark fixes and cleanups (Ville)
- Silence pipe tracepoint WARNs (Ville)

Other:
- Remove require_force_probe protection from RKL, may need to be revisited (Tejas)
- Detect loss of MMIO access (Matt)
- GVT display improvements
- drm/i915: Disable runtime power management during shutdown (Imre)
- Perf/OA updates (Umesh)
- Remove references to struct drm_device.pdev, via topic branch (Thomas)
- Backmerge (Jani)

----------------------------------------------------------------
Aditya Swarup (8):
      drm/i915/tgl: Use TGL stepping info for applying WAs
      drm/i915/adl_s: Configure DPLL for ADL-S
      drm/i915/adl_s: Configure Port clock registers for ADL-S
      drm/i915/adl_s: Initialize display for ADL-S
      drm/i915/adl_s: Add adl-s ddc pin mapping
      drm/i915/adl_s: Add vbt port and aux channel settings for adls
      drm/i915/adl_s: Add display WAs for ADL-S
      drm/i915/adl_s: Add GT and CTX WAs for ADL-S

Ankit Nautiyal (1):
      drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10

Anshuman Gupta (1):
      drm/i915/debugfs: HDCP capability enc NULL check

Anusha Srivatsa (4):
      drm/i915/adl_s: Add PCH support
      drm/i915/adl_s: Add Interrupt Support
      drm/i915/adl_s: Add PHYs for Alderlake S
      drm/i915/adl_s: Load DMC

Bhaskar Chowdhury (1):
      drm/i915/gvt: Fixed couple of spellings in the file gtt.c

Caz Yokoyama (2):
      drm/i915/adl_s: Add ADL-S platform info and PCI ids
      x86/gpu: Add Alderlake-S stolen memory support

Clint Taylor (1):
      drm/i915/display: support ddr5 mem types

Colin Ian King (1):
      drm/i915/display: fix spelling mistake "Couldnt" -> "Couldn't"

Colin Xu (2):
      drm/i915/gvt: Get accurate vGPU virtual display refresh rate from vreg
      drm/i915/gvt: Refactor GVT vblank emulator for vGPU virtual display

Dave Airlie (9):
      drm/i915: refactor ddi translations into a separate file (v2)
      drm/i915: migrate hsw fdi code to new file.
      drm/i915: migrate skl planes code new file (v5)
      drm/i915: move pipe update code into crtc. (v2)
      drm/i915: split fb scalable checks into g4x and skl versions
      drm/i915: move is_ccs_modifier to an inline
      drm/i915: migrate pll enable/disable code to intel_dpll.[ch]
      drm/i915: migrate i9xx plane get config
      drm/i915: refactor skylake scaler code into new file.

Edmund Dea (1):
      drm/i915/display: Remove PSR2 on JSL and EHL

Gwan-gyeong Mun (3):
      drm/i915/display: Support PSR Multiple Instances
      drm/i915/display: Support Multiple Transcoders' PSR status on debugfs
      drm/i915/display: Do not allow DC3CO if PSR SF is enabled

Imre Deak (3):
      drm/i915: Disable runtime power management during shutdown
      drm/i915/tgl+: Make sure TypeC FIA is powered up when initializing it
      drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names

Jani Nikula (14):
      drm/i915/bios: tidy up child device debug logging
      Merge tag 'topic/adl-s-enabling-2021-02-01-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-intel-next
      Merge tag 'topic/drm-device-pdev-2021-02-02' of git://anongit.freedesktop.org/drm/drm-intel into drm-intel-next
      drm/dp: add MSO related DPCD registers
      drm/i915/edp: reject modes with dimensions other than fixed mode
      drm/i915/edp: always add fixed mode to probed modes in ->get_modes()
      drm/i915/edp: read sink MSO configuration for eDP 1.4+
      drm/i915/reg: add stream splitter configuration definitions
      drm/i915/mso: add splitter state readout for platforms that support it
      drm/i915/mso: add splitter state check
      drm/i915/edp: modify fixed and downclock modes for MSO
      drm/i915/edp: enable eDP MSO during link training
      Merge drm/drm-next into drm-intel-next
      Merge tag 'gvt-next-2021-03-16' of https://github.com/intel/gvt-linux into drm-intel-next

José Roberto de Souza (9):
      drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION
      drm/i915: Make psr_safest_params and enable_psr2_sel_fetch parameters read only
      drm/i915/display: Add DDR5 and LPDDR5 BW buddy page entries
      drm/i915: Remove dead code from skl_pipe_wm_get_hw_state()
      drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time
      drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
      drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl()
      drm/i915/display: Remove some redundancy around CAN_PSR()
      drm/i915/display: Set source_support even if panel do not support PSR

Juston Li (1):
      drm/i915/hdcp: disable the QSES check for HDCP2.2 over MST

Lee Shawn C (1):
      drm/i915/vbt: update DP max link rate table

Lucas De Marchi (6):
      drm/i915/adl_s: Add power wells
      drm/i915/display: fix comment on skl straps
      drm/i915: stop registering if drm_dev_register() fails
      drm/i915: group display-related register calls
      drm/i915/display: move register functions to display/
      drm/i915: move intel_init_audio_hooks inside display

Lyude Paul (5):
      drm/i915/gen9_bc: Recognize TGP PCH + CML combos
      drm/i915/gen9_bc: Introduce TGP PCH DDC pin mappings
      drm/i915/gen9_bc: Introduce HPD pin mappings for TGP PCH + CML combos
      drm/i915/gen9_bc: Add W/A for missing STRAP config on TGP PCH + CML combos
      drm/i915/icp+: Use icp_hpd_irq_setup() instead of spt_hpd_irq_setup()

Matt Roper (5):
      drm/i915/adl_s: Update combo PHY master/slave relationships
      drm/i915/adl_s: Update PHY_MISC programming
      drm/i915/adl_s: Re-use TGL GuC/HuC firmware
      drm/i915: FPGA_DBG is display-specific
      drm/i915: Try to detect sudden loss of MMIO access

Nathan Chancellor (1):
      drm/i915: Enable -Wuninitialized

Sean Paul (2):
      drm/i915/dp_link_training: Add newlines to debug messages
      drm/i915/dp_link_training: Convert DRM_DEBUG_KMS to drm_dbg_kms

Tejas Upadhyay (3):
      drm/i915/adl_s: Update memory bandwidth parameters
      drm/i915/rkl: Remove require_force_probe protection
      drm/i915/gen9bc: Handle TGP PCH during suspend/resume

Thomas Zimmermann (3):
      drm/i915: Remove references to struct drm_device.pdev
      drm/i915/gt: Remove references to struct drm_device.pdev
      drm/i915/gvt: Remove references to struct drm_device.pdev

Uma Shankar (1):
      drm/i915/display: Handle lane polarity for DDI port

Umesh Nerlige Ramappa (5):
      i915/perf: Store a mask of valid OA formats for a platform
      i915/perf: Move OA formats to single array
      i915/perf: Add additional OA formats for gen12
      i915/perf: Drop the check for report reason in OA
      i915/perf: Start hrtimer only if sampling the OA buffer

Ville Syrjälä (53):
      drm/i915: Skip vswing programming for TBT
      drm/i915: Extract intel_ddi_power_up_lanes()
      drm/i915: Power up combo PHY lanes for for HDMI as well
      drm/i915: Move HDMI vswing programming to the right place
      drm/i915: Don't check tc_mode unless dealing with a TC PHY
      drm/i915: Reject 446-480MHz HDMI clock on GLK
      drm/i915: Index min_{cdclk,voltage_level}[] with pipe
      drm/i915: Use intel_hdmi_port_clock() more
      drm/i915: Disallow plane x+w>stride on ilk+ with X-tiling
      drm/i915: Fix overlay frontbuffer tracking
      drm/i915: Warn when releasing a frontbuffer while in use
      drm/i915: Use intel_ddi_clk_select() for FDI
      drm/i915: Introduce .{enable,disable}_clock() encoder vfuncs
      drm/i915: Extract hsw_ddi_{enable,disable}_clock()
      drm/i915: Extract skl_ddi_{enable,disable}_clock()
      drm/i195: Extract cnl_ddi_{enable,disable}_clock()
      drm/i915: Convert DG1 over to .{enable,disable}_clock()
      drm/i915: Extract icl+ .{enable,disable}_clock() vfuncs
      drm/i915: Use intel_de_rmw() for DDI clock routing
      drm/i915: Sprinkle a few missing locks around shared DDI clock registers
      drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable()
      drm/i915: Extract _cnl_ddi_{enable,disable}_clock()
      drm/i915: Split adl-s/rkl from icl_ddi_combo_{enable,disable}_clock()
      drm/i915: Use .disable_clock() for pll sanitation
      drm/i915: Relocate icl_sanitize_encoder_pll_mapping()
      drm/i915: s/dev_priv/i915/ for the remainder of DDI clock routing
      drm/i915: Nuke INTEL_OUTPUT_FORMAT_INVALID
      drm/i915: Wait for scanout to stop when sanitizing planes
      drm/i915: Readout conn_state->max_bpc
      drm/i915: Fix TGL+ plane SAGV watermark programming
      drm/i915: Zero out SAGV wm when we don't have enough DDB for it
      drm/i915: Print wm changes if sagv_wm0 changes
      drm/i915: Stuff SAGV watermark into a sub-structure
      drm/i915: Introduce SAGV transtion watermark
      drm/i915: Check tgl+ SAGV watermarks properly
      drm/i915: Clean up verify_wm_state()
      drm/i915: Move pipe enable/disable tracepoints to intel_crtc_vblank_{on,off}()
      drm/i915: Don't try to query the frame counter for disabled pipes
      drm/i915: Return zero as the scanline counter for disabled pipes
      drm/i915: Fix DSI TE max_vblank_count handling
      drm/i915: Call primary encoder's .get_config() from MST .get_config()
      drm/i915: Do intel_dpll_readout_hw_state() after encoder readout
      drm/i915: Use pipes instead crtc indices in PLL state tracking
      drm/i915: Move DDI clock readout to encoder->get_config()
      drm/i915: Add encoder->is_clock_enabled()
      drm/i915: Extend icl_sanitize_encoder_pll_mapping() to all DDI platforms
      drm/i915: Tolerate bogus DPLL selection
      drm/i915: Workaround async flip + VT-d corruption on HSW/BDW
      drm/i915: Tighten SAGV constraint for pre-tgl
      drm/i915: Check SAGV wm min_ddb_alloc rather than plane_res_b
      drm/i915: Calculate min_ddb_alloc for trans_wm
      drm/i915: Extract skl_check_wm_level() and skl_check_nv12_wm_level()
      drm/i915: s/plane_res_b/blocks/ etc.

 arch/x86/kernel/early-quirks.c                     |    1 +
 drivers/gpu/drm/i915/Makefile                      |    5 +-
 drivers/gpu/drm/i915/display/i9xx_plane.c          |  123 +-
 drivers/gpu/drm/i915/display/i9xx_plane.h          |    4 +
 drivers/gpu/drm/i915/display/icl_dsi.c             |   28 +-
 drivers/gpu/drm/i915/display/intel_atomic.c        |    2 +-
 drivers/gpu/drm/i915/display/intel_bios.c          |  166 +-
 drivers/gpu/drm/i915/display/intel_bios.h          |    2 +
 drivers/gpu/drm/i915/display/intel_bw.c            |   22 +-
 drivers/gpu/drm/i915/display/intel_cdclk.c         |   22 +-
 drivers/gpu/drm/i915/display/intel_combo_phy.c     |   23 +-
 drivers/gpu/drm/i915/display/intel_crt.c           |    6 +-
 drivers/gpu/drm/i915/display/intel_crtc.c          |  276 +-
 drivers/gpu/drm/i915/display/intel_csr.c           |   12 +-
 drivers/gpu/drm/i915/display/intel_ddi.c           | 2658 +++++++-------------
 drivers/gpu/drm/i915/display/intel_ddi.h           |   23 +-
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 1394 ++++++++++
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h |  100 +
 drivers/gpu/drm/i915/display/intel_display.c       | 2637 ++-----------------
 drivers/gpu/drm/i915/display/intel_display.h       |   48 +-
 .../gpu/drm/i915/display/intel_display_debugfs.c   |  132 +-
 drivers/gpu/drm/i915/display/intel_display_power.c |  231 +-
 drivers/gpu/drm/i915/display/intel_display_power.h |   32 +
 drivers/gpu/drm/i915/display/intel_display_types.h |  117 +-
 drivers/gpu/drm/i915/display/intel_dp.c            |  134 +-
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c       |   31 +-
 .../gpu/drm/i915/display/intel_dp_link_training.c  |   17 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c        |    3 +-
 drivers/gpu/drm/i915/display/intel_dpll.c          |  509 ++++
 drivers/gpu/drm/i915/display/intel_dpll.h          |   18 +
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c      |   95 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h      |    9 +-
 drivers/gpu/drm/i915/display/intel_dsi_vbt.c       |    2 +-
 drivers/gpu/drm/i915/display/intel_fbdev.c         |    2 +-
 drivers/gpu/drm/i915/display/intel_fdi.c           |  138 +
 drivers/gpu/drm/i915/display/intel_fdi.h           |    3 +
 drivers/gpu/drm/i915/display/intel_frontbuffer.c   |    2 +
 drivers/gpu/drm/i915/display/intel_gmbus.c         |    2 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c          |   67 +-
 drivers/gpu/drm/i915/display/intel_lpe_audio.c     |    5 +-
 drivers/gpu/drm/i915/display/intel_opregion.c      |    6 +-
 drivers/gpu/drm/i915/display/intel_overlay.c       |    2 +-
 drivers/gpu/drm/i915/display/intel_panel.c         |    4 +-
 drivers/gpu/drm/i915/display/intel_pps.c           |    1 +
 drivers/gpu/drm/i915/display/intel_psr.c           |  611 +++--
 drivers/gpu/drm/i915/display/intel_psr.h           |   10 +-
 drivers/gpu/drm/i915/display/intel_quirks.c        |    2 +-
 drivers/gpu/drm/i915/display/intel_sdvo.c          |    2 +-
 drivers/gpu/drm/i915/display/intel_sprite.c        | 1718 +------------
 drivers/gpu/drm/i915/display/intel_sprite.h        |    7 -
 drivers/gpu/drm/i915/display/intel_vbt_defs.h      |   27 +-
 drivers/gpu/drm/i915/display/intel_vga.c           |    8 +-
 drivers/gpu/drm/i915/display/skl_scaler.c          |  556 ++++
 drivers/gpu/drm/i915/display/skl_scaler.h          |   29 +
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 2266 +++++++++++++++++
 drivers/gpu/drm/i915/display/skl_universal_plane.h |   37 +
 drivers/gpu/drm/i915/display/vlv_dsi.c             |    1 +
 drivers/gpu/drm/i915/gem/i915_gem_phys.c           |    6 +-
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c          |    2 +-
 drivers/gpu/drm/i915/gt/intel_engine_cs.c          |    2 +-
 drivers/gpu/drm/i915/gt/intel_ggtt.c               |   10 +-
 drivers/gpu/drm/i915/gt/intel_ppgtt.c              |    2 +-
 drivers/gpu/drm/i915/gt/intel_rc6.c                |    4 +-
 drivers/gpu/drm/i915/gt/intel_region_lmem.c        |    8 +-
 drivers/gpu/drm/i915/gt/intel_reset.c              |    6 +-
 drivers/gpu/drm/i915/gt/intel_workarounds.c        |   68 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c           |    4 +-
 drivers/gpu/drm/i915/gvt/cfg_space.c               |    5 +-
 drivers/gpu/drm/i915/gvt/display.c                 |  107 +-
 drivers/gpu/drm/i915/gvt/display.h                 |   14 +-
 drivers/gpu/drm/i915/gvt/firmware.c                |   10 +-
 drivers/gpu/drm/i915/gvt/gtt.c                     |   16 +-
 drivers/gpu/drm/i915/gvt/gvt.c                     |   31 +-
 drivers/gpu/drm/i915/gvt/gvt.h                     |   13 +-
 drivers/gpu/drm/i915/gvt/handlers.c                |  261 +-
 drivers/gpu/drm/i915/gvt/interrupt.c               |   37 -
 drivers/gpu/drm/i915/gvt/interrupt.h               |    7 -
 drivers/gpu/drm/i915/gvt/kvmgt.c                   |    4 +-
 drivers/gpu/drm/i915/gvt/vgpu.c                    |    2 -
 drivers/gpu/drm/i915/i915_debugfs.c                |    2 +-
 drivers/gpu/drm/i915/i915_drv.c                    |   84 +-
 drivers/gpu/drm/i915/i915_drv.h                    |  130 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c                |    5 +-
 drivers/gpu/drm/i915/i915_getparam.c               |    5 +-
 drivers/gpu/drm/i915/i915_gpu_error.c              |    2 +-
 drivers/gpu/drm/i915/i915_irq.c                    |  106 +-
 drivers/gpu/drm/i915/i915_params.h                 |    4 +-
 drivers/gpu/drm/i915/i915_pci.c                    |   18 +-
 drivers/gpu/drm/i915/i915_perf.c                   |   97 +-
 drivers/gpu/drm/i915/i915_perf_types.h             |    8 +
 drivers/gpu/drm/i915/i915_pmu.c                    |    2 +-
 drivers/gpu/drm/i915/i915_reg.h                    |   76 +-
 drivers/gpu/drm/i915/i915_suspend.c                |    4 +-
 drivers/gpu/drm/i915/i915_switcheroo.c             |    4 +-
 drivers/gpu/drm/i915/i915_vgpu.c                   |    2 +-
 drivers/gpu/drm/i915/intel_device_info.c           |   11 +-
 drivers/gpu/drm/i915/intel_device_info.h           |    3 +-
 drivers/gpu/drm/i915/intel_dram.c                  |    6 +
 drivers/gpu/drm/i915/intel_pch.c                   |   11 +-
 drivers/gpu/drm/i915/intel_pch.h                   |    3 +
 drivers/gpu/drm/i915/intel_pm.c                    |  422 ++--
 drivers/gpu/drm/i915/intel_pm.h                    |    5 +
 drivers/gpu/drm/i915/intel_runtime_pm.c            |    2 +-
 drivers/gpu/drm/i915/intel_uncore.c                |   20 +-
 drivers/gpu/drm/i915/selftests/mock_gtt.c          |    2 +-
 include/drm/drm_dp_helper.h                        |    5 +
 include/drm/i915_pciids.h                          |   11 +
 107 files changed, 8885 insertions(+), 7172 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
 create mode 100644 drivers/gpu/drm/i915/display/skl_scaler.c
 create mode 100644 drivers/gpu/drm/i915/display/skl_scaler.h
 create mode 100644 drivers/gpu/drm/i915/display/skl_universal_plane.c
 create mode 100644 drivers/gpu/drm/i915/display/skl_universal_plane.h

-- 
Jani Nikula, Intel Open Source Graphics Center
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