[PATCH] KVM: SVM: relax conditions for allowing MSR_IA32_SPEC_CTRL accesses

[PATCH] KVM: SVM: relax conditions for allowing MSR_IA32_SPEC_CTRL accesses

[Paolo Bonzini]

Userspace that does not know about the AMD_IBRS bit might still
allow the guest to protect itself with MSR_IA32_SPEC_CTRL using
the Intel SPEC_CTRL bit.  However, svm.c disallows this and will
cause a #GP in the guest when writing to the MSR.  Fix this by
loosening the test and allowing the Intel CPUID bit, and in fact
allow the AMD_STIBP bit as well since it allows writing to
MSR_IA32_SPEC_CTRL too.

Reported-by: Zhiyi Guo <zhguo@redhat.com>
Analyzed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Analyzed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 arch/x86/kvm/svm.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index bf0556588ad0..a3e32d61d60c 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -4225,6 +4225,8 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 		break;
 	case MSR_IA32_SPEC_CTRL:
 		if (!msr_info->host_initiated &&
+		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
+		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&
 		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&
 		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
 			return 1;
@@ -4310,6 +4312,8 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 		break;
 	case MSR_IA32_SPEC_CTRL:
 		if (!msr->host_initiated &&
+		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
+		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&
 		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&
 		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
 			return 1;
-- 
1.8.3.1

Re: [PATCH] KVM: SVM: relax conditions for allowing MSR_IA32_SPEC_CTRL accesses

[Vitaly Kuznetsov]

Paolo Bonzini <pbonzini@redhat.com> writes:

> Userspace that does not know about the AMD_IBRS bit might still
> allow the guest to protect itself with MSR_IA32_SPEC_CTRL using
> the Intel SPEC_CTRL bit.  However, svm.c disallows this and will
> cause a #GP in the guest when writing to the MSR.  Fix this by
> loosening the test and allowing the Intel CPUID bit, and in fact
> allow the AMD_STIBP bit as well since it allows writing to
> MSR_IA32_SPEC_CTRL too.
>
> Reported-by: Zhiyi Guo <zhguo@redhat.com>
> Analyzed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
> Analyzed-by: Laszlo Ersek <lersek@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  arch/x86/kvm/svm.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index bf0556588ad0..a3e32d61d60c 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -4225,6 +4225,8 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  		break;
>  	case MSR_IA32_SPEC_CTRL:
>  		if (!msr_info->host_initiated &&
> +		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
> +		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&
>  		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&
>  		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
>  			return 1;
> @@ -4310,6 +4312,8 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
>  		break;
>  	case MSR_IA32_SPEC_CTRL:
>  		if (!msr->host_initiated &&
> +		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
> +		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&
>  		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&
>  		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
>  			return 1;

Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com>

but out of pure curiosity, why do we need these checks?

At least for the 'set' case right below them we have:

        if (data & ~kvm_spec_ctrl_valid_bits(vcpu))
                 return 1;

so if guest will try using unsupported features it will #GP. So
basically, these checks will only fire when reading/writing '0' and all
features are missing, right? Do we care?

-- 
Vitaly

Re: [PATCH] KVM: SVM: relax conditions for allowing MSR_IA32_SPEC_CTRL accesses

[Paolo Bonzini]

On 06/02/20 15:17, Vitaly Kuznetsov wrote:
> Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com>
> 
> but out of pure curiosity, why do we need these checks?
> 
> At least for the 'set' case right below them we have:
> 
>         if (data & ~kvm_spec_ctrl_valid_bits(vcpu))
>                  return 1;
> 
> so if guest will try using unsupported features it will #GP. So
> basically, these checks will only fire when reading/writing '0' and all
> features are missing, right? Do we care?

Probably not...  I just wanted the smallest possible change in semantics
for this patch, and the rest can be done equally on Intel and AMD.

Paolo