[RFC 00/15] VBT read Cleanup

[RFC 00/15] VBT read Cleanup

[Radhakrishna Sripada]

This series does the VBT read cleanup. The series introduces new
intel_vbt structure to cache and collate vbt related info. Vbt
read from different sources viz. firmware/opregion/spi/oprom
needs to be cached for debug purposes and handled accordingly
during cleanup.

Radhakrishna Sripada (15):
  drm/i915: Extract display->vbt_data to a new vbt structure
  drm/i915: Move vbt fields from opregion to its own structure
  drm/i915: Cache opregion asls pointer
  drm/i915: Extract opregion vbt capture to its own function
  drm/i915: Init vbt fields when read from oprom/spi
  drm/i915: Classify vbt type based on its residence
  drm/i915: Collate vbt cleanup for different types
  drm/i915: Make intel_bios_init operate on intel_vbt
  drm/i915: Move vbt load from opregion to bios init
  drm/i915: Move vbt firmware load into intel_bios_init
  drm/i915: Make oprom_get_vbt operate on intel_vbt
  drm/i915: Make spi_oprom_get_vbt operate on intel_vbt
  drm/i915: Make intel_load_vbt_firmware operate on intel_vbt
  drm/i915: Kill reduntant vbt_firmware from intel_vbt
  drm/i915: Use vbt type to determine its validity

 drivers/gpu/drm/i915/display/intel_bios.c     | 348 +++++++++++-------
 drivers/gpu/drm/i915/display/intel_crt.c      |   2 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  10 +-
 .../gpu/drm/i915/display/intel_display_core.h |  16 +-
 .../drm/i915/display/intel_display_debugfs.c  |   6 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |   2 +-
 drivers/gpu/drm/i915/display/intel_dpll.c     |  16 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  19 +-
 drivers/gpu/drm/i915/display/intel_dsi.c      |   2 +-
 drivers/gpu/drm/i915/display/intel_lvds.c     |   4 +-
 drivers/gpu/drm/i915/display/intel_opregion.c | 165 ++++-----
 drivers/gpu/drm/i915/display/intel_opregion.h |  13 +-
 drivers/gpu/drm/i915/display/intel_panel.c    |   2 +-
 .../gpu/drm/i915/display/intel_pch_refclk.c   |   2 +-
 drivers/gpu/drm/i915/display/intel_sdvo.c     |  18 +-
 drivers/gpu/drm/i915/intel_clock_gating.c     |   2 +-
 16 files changed, 348 insertions(+), 279 deletions(-)

-- 
2.34.1

[RFC 01/15] drm/i915: Extract display->vbt_data to a new vbt structure

[Radhakrishna Sripada]

Vbt data is scattered to multiple places like vbt_data and
opregion vbt fields. Introduce a new structure intel_vbt
to collate various vbt fields into one simple structure. This
will be used to cache the vbt read from spi flash/oprom as well
as the vbt read from opregion and firmware.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 195 +++++++++---------
 drivers/gpu/drm/i915/display/intel_crt.c      |   2 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  10 +-
 .../gpu/drm/i915/display/intel_display_core.h |   6 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |   2 +-
 drivers/gpu/drm/i915/display/intel_dpll.c     |  16 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  19 +-
 drivers/gpu/drm/i915/display/intel_dsi.c      |   2 +-
 drivers/gpu/drm/i915/display/intel_lvds.c     |   4 +-
 drivers/gpu/drm/i915/display/intel_panel.c    |   2 +-
 .../gpu/drm/i915/display/intel_pch_refclk.c   |   2 +-
 drivers/gpu/drm/i915/display/intel_sdvo.c     |  18 +-
 drivers/gpu/drm/i915/intel_clock_gating.c     |   2 +-
 13 files changed, 144 insertions(+), 136 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 0e61e424802e..b9120eb1321d 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -146,7 +146,7 @@ bdb_find_section(struct drm_i915_private *i915,
 {
 	struct bdb_block_entry *entry;
 
-	list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) {
+	list_for_each_entry(entry, &i915->display.vbt.data.bdb_blocks, node) {
 		if (entry->section_id == section_id)
 			return entry->data + 3;
 	}
@@ -370,7 +370,7 @@ static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
 	 * include block 41 and thus we don't need to
 	 * generate one.
 	 */
-	if (i915->display.vbt.version < 155)
+	if (i915->display.vbt.data.version < 155)
 		return NULL;
 
 	fp_timing_size = 38;
@@ -501,7 +501,7 @@ init_bdb_block(struct drm_i915_private *i915,
 		return;
 	}
 
-	list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks);
+	list_add_tail(&entry->node, &i915->display.vbt.data.bdb_blocks);
 }
 
 static void init_bdb_blocks(struct drm_i915_private *i915,
@@ -910,7 +910,7 @@ parse_lfp_data(struct drm_i915_private *i915,
 		    (int)sizeof(tail->panel_name[0].name),
 		    tail->panel_name[panel_type].name);
 
-	if (i915->display.vbt.version >= 188) {
+	if (i915->display.vbt.data.version >= 188) {
 		panel->vbt.seamless_drrs_min_refresh_rate =
 			tail->seamless_drrs_min_refresh_rate[panel_type];
 		drm_dbg_kms(&i915->drm,
@@ -936,7 +936,7 @@ parse_generic_dtd(struct drm_i915_private *i915,
 	 * first on VBT >= 229, but still fall back to trying the old LFP
 	 * block if that fails.
 	 */
-	if (i915->display.vbt.version < 229)
+	if (i915->display.vbt.data.version < 229)
 		return;
 
 	generic_dtd = bdb_find_section(i915, BDB_GENERIC_DTD);
@@ -1041,12 +1041,12 @@ parse_lfp_backlight(struct drm_i915_private *i915,
 
 	panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
 	panel->vbt.backlight.controller = 0;
-	if (i915->display.vbt.version >= 191) {
+	if (i915->display.vbt.data.version >= 191) {
 		size_t exp_size;
 
-		if (i915->display.vbt.version >= 236)
+		if (i915->display.vbt.data.version >= 236)
 			exp_size = sizeof(struct bdb_lfp_backlight_data);
-		else if (i915->display.vbt.version >= 234)
+		else if (i915->display.vbt.data.version >= 234)
 			exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
 		else
 			exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
@@ -1063,14 +1063,14 @@ parse_lfp_backlight(struct drm_i915_private *i915,
 	panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
 	panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
 
-	if (i915->display.vbt.version >= 234) {
+	if (i915->display.vbt.data.version >= 234) {
 		u16 min_level;
 		bool scale;
 
 		level = backlight_data->brightness_level[panel_type].level;
 		min_level = backlight_data->brightness_min_level[panel_type].level;
 
-		if (i915->display.vbt.version >= 236)
+		if (i915->display.vbt.data.version >= 236)
 			scale = backlight_data->brightness_precision_bits[panel_type] == 16;
 		else
 			scale = level > 255;
@@ -1091,7 +1091,7 @@ parse_lfp_backlight(struct drm_i915_private *i915,
 		panel->vbt.backlight.min_brightness = entry->min_brightness;
 	}
 
-	if (i915->display.vbt.version >= 239)
+	if (i915->display.vbt.data.version >= 239)
 		panel->vbt.backlight.hdr_dpcd_refresh_timeout =
 			DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100);
 	else
@@ -1168,42 +1168,44 @@ static void
 parse_general_features(struct drm_i915_private *i915)
 {
 	const struct bdb_general_features *general;
+	struct intel_vbt_data *data = &i915->display.vbt.data;
 
 	general = bdb_find_section(i915, BDB_GENERAL_FEATURES);
 	if (!general)
 		return;
 
-	i915->display.vbt.int_tv_support = general->int_tv_support;
+	data->int_tv_support = general->int_tv_support;
 	/* int_crt_support can't be trusted on earlier platforms */
-	if (i915->display.vbt.version >= 155 &&
+	if (data->version >= 155 &&
 	    (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
-		i915->display.vbt.int_crt_support = general->int_crt_support;
-	i915->display.vbt.lvds_use_ssc = general->enable_ssc;
-	i915->display.vbt.lvds_ssc_freq =
+		data->int_crt_support = general->int_crt_support;
+	data->lvds_use_ssc = general->enable_ssc;
+	data->lvds_ssc_freq =
 		intel_bios_ssc_frequency(i915, general->ssc_freq);
-	i915->display.vbt.display_clock_mode = general->display_clock_mode;
-	i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
-	if (i915->display.vbt.version >= 181) {
-		i915->display.vbt.orientation = general->rotate_180 ?
+	data->display_clock_mode = general->display_clock_mode;
+	data->fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
+	if (data->version >= 181) {
+		data->orientation = general->rotate_180 ?
 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
 			DRM_MODE_PANEL_ORIENTATION_NORMAL;
 	} else {
-		i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
+		data->orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
 	}
 
-	if (i915->display.vbt.version >= 249 && general->afc_startup_config) {
-		i915->display.vbt.override_afc_startup = true;
-		i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
+	if (data->version >= 249 && general->afc_startup_config) {
+		data->override_afc_startup = true;
+		data->override_afc_startup_val =
+			general->afc_startup_config == 0x1 ? 0x0 : 0x7;
 	}
 
 	drm_dbg_kms(&i915->drm,
 		    "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
-		    i915->display.vbt.int_tv_support,
-		    i915->display.vbt.int_crt_support,
-		    i915->display.vbt.lvds_use_ssc,
-		    i915->display.vbt.lvds_ssc_freq,
-		    i915->display.vbt.display_clock_mode,
-		    i915->display.vbt.fdi_rx_polarity_inverted);
+		    data->int_tv_support,
+		    data->int_crt_support,
+		    data->lvds_use_ssc,
+		    data->lvds_ssc_freq,
+		    data->display_clock_mode,
+		    data->fdi_rx_polarity_inverted);
 }
 
 static const struct child_device_config *
@@ -1227,7 +1229,7 @@ parse_sdvo_device_mapping(struct drm_i915_private *i915)
 		return;
 	}
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) {
 		const struct child_device_config *child = &devdata->child;
 		struct sdvo_device_mapping *mapping;
 
@@ -1252,7 +1254,7 @@ parse_sdvo_device_mapping(struct drm_i915_private *i915)
 			    child->slave_addr,
 			    (child->dvo_port == DEVICE_PORT_DVOB) ?
 			    "SDVOB" : "SDVOC");
-		mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1];
+		mapping = &i915->display.vbt.data.sdvo_mappings[child->dvo_port - 1];
 		if (!mapping->initialized) {
 			mapping->dvo_port = child->dvo_port;
 			mapping->slave_addr = child->slave_addr;
@@ -1303,7 +1305,7 @@ parse_driver_features(struct drm_i915_private *i915)
 		 * interpretation, but real world VBTs seem to.
 		 */
 		if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
-			i915->display.vbt.int_lvds_support = 0;
+			i915->display.vbt.data.int_lvds_support = 0;
 	} else {
 		/*
 		 * FIXME it's not clear which BDB version has the LVDS config
@@ -1316,10 +1318,10 @@ parse_driver_features(struct drm_i915_private *i915)
 		 * in the wild with the bits correctly populated. Version
 		 * 108 (on i85x) does not have the bits correctly populated.
 		 */
-		if (i915->display.vbt.version >= 134 &&
+		if (i915->display.vbt.data.version >= 134 &&
 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
-			i915->display.vbt.int_lvds_support = 0;
+			i915->display.vbt.data.int_lvds_support = 0;
 	}
 }
 
@@ -1333,7 +1335,7 @@ parse_panel_driver_features(struct drm_i915_private *i915,
 	if (!driver)
 		return;
 
-	if (i915->display.vbt.version < 228) {
+	if (i915->display.vbt.data.version < 228) {
 		drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
 			    driver->drrs_enabled);
 		/*
@@ -1366,7 +1368,7 @@ parse_power_conservation_features(struct drm_i915_private *i915,
 
 	panel->vbt.vrr = true; /* matches Windows behaviour */
 
-	if (i915->display.vbt.version < 228)
+	if (i915->display.vbt.data.version < 228)
 		return;
 
 	power = bdb_find_section(i915, BDB_LFP_POWER);
@@ -1392,10 +1394,10 @@ parse_power_conservation_features(struct drm_i915_private *i915,
 			panel->vbt.drrs_type = DRRS_TYPE_NONE;
 	}
 
-	if (i915->display.vbt.version >= 232)
+	if (i915->display.vbt.data.version >= 232)
 		panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
 
-	if (i915->display.vbt.version >= 233)
+	if (i915->display.vbt.data.version >= 233)
 		panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
 					    panel_type);
 }
@@ -1431,7 +1433,7 @@ parse_edp(struct drm_i915_private *i915,
 
 	panel->vbt.edp.pps = *edp_pps;
 
-	if (i915->display.vbt.version >= 224) {
+	if (i915->display.vbt.data.version >= 224) {
 		panel->vbt.edp.rate =
 			edp->edp_fast_link_training_rate[panel_type] * 20;
 	} else {
@@ -1510,7 +1512,7 @@ parse_edp(struct drm_i915_private *i915,
 		break;
 	}
 
-	if (i915->display.vbt.version >= 173) {
+	if (i915->display.vbt.data.version >= 173) {
 		u8 vswing;
 
 		/* Don't read from VBT if module parameter has valid value*/
@@ -1526,7 +1528,7 @@ parse_edp(struct drm_i915_private *i915,
 	panel->vbt.edp.drrs_msa_timing_delay =
 		panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
 
-	if (i915->display.vbt.version >= 244)
+	if (i915->display.vbt.data.version >= 244)
 		panel->vbt.edp.max_link_rate =
 			edp->edp_max_port_link_rate[panel_type] * 20;
 }
@@ -1558,7 +1560,7 @@ parse_psr(struct drm_i915_private *i915,
 	 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
 	 * Old decimal value is wake up time in multiples of 100 us.
 	 */
-	if (i915->display.vbt.version >= 205 &&
+	if (i915->display.vbt.data.version >= 205 &&
 	    (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
 		switch (psr_table->tp1_wakeup_time) {
 		case 0:
@@ -1604,7 +1606,7 @@ parse_psr(struct drm_i915_private *i915,
 		panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
 	}
 
-	if (i915->display.vbt.version >= 226) {
+	if (i915->display.vbt.data.version >= 226) {
 		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
 
 		wakeup_time = panel_bits(wakeup_time, panel_type, 2);
@@ -1636,7 +1638,7 @@ static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
 {
 	enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C;
 
-	if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) {
+	if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.data.version < 197) {
 		panel->vbt.dsi.bl_ports = BIT(port);
 		if (panel->vbt.dsi.config->cabc_supported)
 			panel->vbt.dsi.cabc_ports = BIT(port);
@@ -2090,7 +2092,7 @@ parse_compression_parameters(struct drm_i915_private *i915)
 	u16 block_size;
 	int index;
 
-	if (i915->display.vbt.version < 198)
+	if (i915->display.vbt.data.version < 198)
 		return;
 
 	params = bdb_find_section(i915, BDB_COMPRESSION_PARAMETERS);
@@ -2110,7 +2112,7 @@ parse_compression_parameters(struct drm_i915_private *i915)
 		}
 	}
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) {
 		const struct child_device_config *child = &devdata->child;
 
 		if (!child->compression_enable)
@@ -2435,10 +2437,10 @@ static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
 
 int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
 {
-	if (!devdata || devdata->i915->display.vbt.version < 216)
+	if (!devdata || devdata->i915->display.vbt.data.version < 216)
 		return 0;
 
-	if (devdata->i915->display.vbt.version >= 230)
+	if (devdata->i915->display.vbt.data.version >= 230)
 		return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
 	else
 		return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
@@ -2446,7 +2448,7 @@ int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
 
 int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
 {
-	if (!devdata || devdata->i915->display.vbt.version < 244)
+	if (!devdata || devdata->i915->display.vbt.data.version < 244)
 		return 0;
 
 	return devdata->child.dp_max_lane_count + 1;
@@ -2541,7 +2543,7 @@ intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata)
 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
 int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
 {
-	if (!devdata || devdata->i915->display.vbt.version < 158 ||
+	if (!devdata || devdata->i915->display.vbt.data.version < 158 ||
 	    DISPLAY_VER(devdata->i915) >= 14)
 		return -1;
 
@@ -2550,7 +2552,7 @@ int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
 
 int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
 {
-	if (!devdata || devdata->i915->display.vbt.version < 204)
+	if (!devdata || devdata->i915->display.vbt.data.version < 204)
 		return 0;
 
 	switch (devdata->child.hdmi_max_data_rate) {
@@ -2688,10 +2690,10 @@ static void parse_ddi_ports(struct drm_i915_private *i915)
 	if (!has_ddi_port_info(i915))
 		return;
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node)
 		parse_ddi_port(devdata);
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node)
 		print_ddi_port(devdata);
 }
 
@@ -2724,33 +2726,33 @@ parse_general_definitions(struct drm_i915_private *i915)
 	bus_pin = defs->crt_ddc_gmbus_pin;
 	drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
 	if (intel_gmbus_is_valid_pin(i915, bus_pin))
-		i915->display.vbt.crt_ddc_pin = bus_pin;
+		i915->display.vbt.data.crt_ddc_pin = bus_pin;
 
-	if (i915->display.vbt.version < 106) {
+	if (i915->display.vbt.data.version < 106) {
 		expected_size = 22;
-	} else if (i915->display.vbt.version < 111) {
+	} else if (i915->display.vbt.data.version < 111) {
 		expected_size = 27;
-	} else if (i915->display.vbt.version < 195) {
+	} else if (i915->display.vbt.data.version < 195) {
 		expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
-	} else if (i915->display.vbt.version == 195) {
+	} else if (i915->display.vbt.data.version == 195) {
 		expected_size = 37;
-	} else if (i915->display.vbt.version <= 215) {
+	} else if (i915->display.vbt.data.version <= 215) {
 		expected_size = 38;
-	} else if (i915->display.vbt.version <= 250) {
+	} else if (i915->display.vbt.data.version <= 250) {
 		expected_size = 39;
 	} else {
 		expected_size = sizeof(*child);
 		BUILD_BUG_ON(sizeof(*child) < 39);
 		drm_dbg(&i915->drm,
 			"Expected child device config size for VBT version %u not known; assuming %u\n",
-			i915->display.vbt.version, expected_size);
+			i915->display.vbt.data.version, expected_size);
 	}
 
 	/* Flag an error for unexpected size, but continue anyway. */
 	if (defs->child_dev_size != expected_size)
 		drm_err(&i915->drm,
 			"Unexpected child device config size %u (expected %u for VBT version %u)\n",
-			defs->child_dev_size, expected_size, i915->display.vbt.version);
+			defs->child_dev_size, expected_size, i915->display.vbt.data.version);
 
 	/* The legacy sized child device config is the minimum we need. */
 	if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
@@ -2786,10 +2788,10 @@ parse_general_definitions(struct drm_i915_private *i915)
 		memcpy(&devdata->child, child,
 		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
 
-		list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
+		list_add_tail(&devdata->node, &i915->display.vbt.data.display_devices);
 	}
 
-	if (list_empty(&i915->display.vbt.display_devices))
+	if (list_empty(&i915->display.vbt.data.display_devices))
 		drm_dbg_kms(&i915->drm,
 			    "no child dev is parsed from VBT\n");
 }
@@ -2798,25 +2800,25 @@ parse_general_definitions(struct drm_i915_private *i915)
 static void
 init_vbt_defaults(struct drm_i915_private *i915)
 {
-	i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
+	i915->display.vbt.data.crt_ddc_pin = GMBUS_PIN_VGADDC;
 
 	/* general features */
-	i915->display.vbt.int_tv_support = 1;
-	i915->display.vbt.int_crt_support = 1;
+	i915->display.vbt.data.int_tv_support = 1;
+	i915->display.vbt.data.int_crt_support = 1;
 
 	/* driver features */
-	i915->display.vbt.int_lvds_support = 1;
+	i915->display.vbt.data.int_lvds_support = 1;
 
 	/* Default to using SSC */
-	i915->display.vbt.lvds_use_ssc = 1;
+	i915->display.vbt.data.lvds_use_ssc = 1;
 	/*
 	 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
 	 * clock for LVDS.
 	 */
-	i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
-								   !HAS_PCH_SPLIT(i915));
+	i915->display.vbt.data.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
+									!HAS_PCH_SPLIT(i915));
 	drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
-		    i915->display.vbt.lvds_ssc_freq);
+		    i915->display.vbt.data.lvds_ssc_freq);
 }
 
 /* Common defaults which may be overridden by VBT. */
@@ -2877,7 +2879,7 @@ init_vbt_missing_defaults(struct drm_i915_private *i915)
 		if (port == PORT_A)
 			child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
 
-		list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
+		list_add_tail(&devdata->node, &i915->display.vbt.data.display_devices);
 
 		drm_dbg_kms(&i915->drm,
 			    "Generating default VBT child device with type 0x04%x on port %c\n",
@@ -2885,7 +2887,7 @@ init_vbt_missing_defaults(struct drm_i915_private *i915)
 	}
 
 	/* Bypass some minimum baseline VBT version checks */
-	i915->display.vbt.version = 155;
+	i915->display.vbt.data.version = 155;
 }
 
 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
@@ -3077,8 +3079,8 @@ void intel_bios_init(struct drm_i915_private *i915)
 	struct vbt_header *oprom_vbt = NULL;
 	const struct bdb_header *bdb;
 
-	INIT_LIST_HEAD(&i915->display.vbt.display_devices);
-	INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks);
+	INIT_LIST_HEAD(&i915->display.vbt.data.display_devices);
+	INIT_LIST_HEAD(&i915->display.vbt.data.bdb_blocks);
 
 	if (!HAS_DISPLAY(i915)) {
 		drm_dbg_kms(&i915->drm,
@@ -3106,11 +3108,11 @@ void intel_bios_init(struct drm_i915_private *i915)
 		goto out;
 
 	bdb = get_bdb_header(vbt);
-	i915->display.vbt.version = bdb->version;
+	i915->display.vbt.data.version = bdb->version;
 
 	drm_dbg_kms(&i915->drm,
 		    "VBT signature \"%.*s\", BDB version %d\n",
-		    (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version);
+		    (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.data.version);
 
 	init_bdb_blocks(i915, bdb);
 
@@ -3192,15 +3194,16 @@ void intel_bios_init_panel_late(struct drm_i915_private *i915,
 void intel_bios_driver_remove(struct drm_i915_private *i915)
 {
 	struct intel_bios_encoder_data *devdata, *nd;
+	struct intel_vbt *vbt = &i915->display.vbt;
 	struct bdb_block_entry *entry, *ne;
 
-	list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) {
+	list_for_each_entry_safe(devdata, nd, &vbt->data.display_devices, node) {
 		list_del(&devdata->node);
 		kfree(devdata->dsc);
 		kfree(devdata);
 	}
 
-	list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) {
+	list_for_each_entry_safe(entry, ne, &vbt->data.bdb_blocks, node) {
 		list_del(&entry->node);
 		kfree(entry);
 	}
@@ -3233,13 +3236,13 @@ bool intel_bios_is_tv_present(struct drm_i915_private *i915)
 {
 	const struct intel_bios_encoder_data *devdata;
 
-	if (!i915->display.vbt.int_tv_support)
+	if (!i915->display.vbt.data.int_tv_support)
 		return false;
 
-	if (list_empty(&i915->display.vbt.display_devices))
+	if (list_empty(&i915->display.vbt.data.display_devices))
 		return true;
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) {
 		const struct child_device_config *child = &devdata->child;
 
 		/*
@@ -3275,10 +3278,10 @@ bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
 {
 	const struct intel_bios_encoder_data *devdata;
 
-	if (list_empty(&i915->display.vbt.display_devices))
+	if (list_empty(&i915->display.vbt.data.display_devices))
 		return true;
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) {
 		const struct child_device_config *child = &devdata->child;
 
 		/* If the device type is not LFP, continue.
@@ -3329,7 +3332,7 @@ bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
 	if (!is_port_valid(i915, port))
 		return false;
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) {
 		const struct child_device_config *child = &devdata->child;
 
 		if (dvo_port_to_port(i915, child->dvo_port) == port)
@@ -3370,7 +3373,7 @@ bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
 {
 	const struct intel_bios_encoder_data *devdata;
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) {
 		const struct child_device_config *child = &devdata->child;
 		u8 dvo_port = child->dvo_port;
 
@@ -3464,7 +3467,7 @@ bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 	const struct intel_bios_encoder_data *devdata;
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) {
 		const struct child_device_config *child = &devdata->child;
 
 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
@@ -3581,7 +3584,7 @@ bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devda
 	i915 = devdata->i915;
 	aux_channel = devdata->child.aux_channel;
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) {
 		if (intel_bios_encoder_supports_dp(devdata) &&
 		    aux_channel == devdata->child.aux_channel)
 			count++;
@@ -3592,7 +3595,7 @@ bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devda
 
 int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
 {
-	if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
+	if (!devdata || devdata->i915->display.vbt.data.version < 196 || !devdata->child.iboost)
 		return 0;
 
 	return translate_iboost(devdata->child.dp_iboost_level);
@@ -3600,7 +3603,7 @@ int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
 
 int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
 {
-	if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
+	if (!devdata || devdata->i915->display.vbt.data.version < 196 || !devdata->child.iboost)
 		return 0;
 
 	return translate_iboost(devdata->child.hdmi_iboost_level);
@@ -3616,12 +3619,12 @@ int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata)
 
 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
 {
-	return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c;
+	return devdata->i915->display.vbt.data.version >= 195 && devdata->child.dp_usb_type_c;
 }
 
 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
 {
-	return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt;
+	return devdata->i915->display.vbt.data.version >= 209 && devdata->child.tbt;
 }
 
 bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata)
@@ -3639,7 +3642,7 @@ intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
 {
 	struct intel_bios_encoder_data *devdata;
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) {
 		if (intel_bios_encoder_port(devdata) == port)
 			return devdata;
 	}
@@ -3653,6 +3656,6 @@ void intel_bios_for_each_encoder(struct drm_i915_private *i915,
 {
 	struct intel_bios_encoder_data *devdata;
 
-	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
+	list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node)
 		func(i915, devdata);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index abaacea5c2cc..b1953a447f20 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -1033,7 +1033,7 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
 		return;
 	}
 
-	ddc_pin = dev_priv->display.vbt.crt_ddc_pin;
+	ddc_pin = dev_priv->display.vbt.data.crt_ddc_pin;
 
 	connector = &intel_connector->base;
 	crt->connector = intel_connector;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 927d124457b6..f559c089b038 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2509,12 +2509,12 @@ void intel_panel_sanitize_ssc(struct drm_i915_private *dev_priv)
 						       PCH_DREF_CONTROL) &
 			DREF_SSC1_ENABLE;
 
-		if (dev_priv->display.vbt.lvds_use_ssc != bios_lvds_use_ssc) {
+		if (dev_priv->display.vbt.data.lvds_use_ssc != bios_lvds_use_ssc) {
 			drm_dbg_kms(&dev_priv->drm,
 				    "SSC %s by BIOS, overriding VBT which says %s\n",
 				    str_enabled_disabled(bios_lvds_use_ssc),
-				    str_enabled_disabled(dev_priv->display.vbt.lvds_use_ssc));
-			dev_priv->display.vbt.lvds_use_ssc = bios_lvds_use_ssc;
+				    str_enabled_disabled(dev_priv->display.vbt.data.lvds_use_ssc));
+			dev_priv->display.vbt.data.lvds_use_ssc = bios_lvds_use_ssc;
 		}
 	}
 }
@@ -7465,7 +7465,7 @@ static bool intel_ddi_crt_present(struct drm_i915_private *dev_priv)
 	if (intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)
 		return false;
 
-	if (!dev_priv->display.vbt.int_crt_support)
+	if (!dev_priv->display.vbt.data.int_crt_support)
 		return false;
 
 	return true;
@@ -7534,7 +7534,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
 	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
 		bool has_edp, has_port;
 
-		if (IS_VALLEYVIEW(dev_priv) && dev_priv->display.vbt.int_crt_support)
+		if (IS_VALLEYVIEW(dev_priv) && dev_priv->display.vbt.data.int_crt_support)
 			intel_crt_init(dev_priv);
 
 		/*
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 47297ed85822..6e1aa58aad61 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -232,6 +232,10 @@ struct intel_vbt_data {
 	} sdvo_mappings[2];
 };
 
+struct intel_vbt {
+	struct intel_vbt_data data;
+};
+
 struct intel_wm {
 	/*
 	 * Raw watermark latency values:
@@ -516,7 +520,7 @@ struct intel_display {
 	struct intel_opregion opregion;
 	struct intel_overlay *overlay;
 	struct intel_display_params params;
-	struct intel_vbt_data vbt;
+	struct intel_vbt vbt;
 	struct intel_wm wm;
 };
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9ff0cbd9c0df..c3ef87d1107b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6182,7 +6182,7 @@ intel_edp_add_properties(struct intel_dp *intel_dp)
 	intel_attach_scaling_mode_property(&connector->base);
 
 	drm_connector_set_panel_orientation_with_quirk(&connector->base,
-						       i915->display.vbt.orientation,
+						       i915->display.vbt.data.orientation,
 						       fixed_mode->hdisplay,
 						       fixed_mode->vdisplay);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index 3038655377ea..c5efd665bc6f 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -376,7 +376,7 @@ static int i9xx_pll_refclk(struct drm_device *dev,
 	u32 dpll = pipe_config->dpll_hw_state.dpll;
 
 	if ((dpll & PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN)
-		return dev_priv->display.vbt.lvds_ssc_freq;
+		return dev_priv->display.vbt.data.lvds_ssc_freq;
 	else if (HAS_PCH_SPLIT(dev_priv))
 		return 120000;
 	else if (DISPLAY_VER(dev_priv) != 2)
@@ -1210,7 +1210,7 @@ static void ilk_update_pll_dividers(struct intel_crtc_state *crtc_state,
 	factor = 21;
 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {
 		if ((intel_panel_use_ssc(dev_priv) &&
-		     dev_priv->display.vbt.lvds_ssc_freq == 100000) ||
+		     dev_priv->display.vbt.data.lvds_ssc_freq == 100000) ||
 		    (HAS_PCH_IBX(dev_priv) &&
 		     intel_is_dual_link_lvds(dev_priv)))
 			factor = 25;
@@ -1325,8 +1325,8 @@ static int ilk_crtc_compute_clock(struct intel_atomic_state *state,
 		if (intel_panel_use_ssc(dev_priv)) {
 			drm_dbg_kms(&dev_priv->drm,
 				    "using SSC reference clock of %d kHz\n",
-				    dev_priv->display.vbt.lvds_ssc_freq);
-			refclk = dev_priv->display.vbt.lvds_ssc_freq;
+				    dev_priv->display.vbt.data.lvds_ssc_freq);
+			refclk = dev_priv->display.vbt.data.lvds_ssc_freq;
 		}
 
 		if (intel_is_dual_link_lvds(dev_priv)) {
@@ -1477,7 +1477,7 @@ static int g4x_crtc_compute_clock(struct intel_atomic_state *state,
 
 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {
 		if (intel_panel_use_ssc(dev_priv)) {
-			refclk = dev_priv->display.vbt.lvds_ssc_freq;
+			refclk = dev_priv->display.vbt.data.lvds_ssc_freq;
 			drm_dbg_kms(&dev_priv->drm,
 				    "using SSC reference clock of %d kHz\n",
 				    refclk);
@@ -1526,7 +1526,7 @@ static int pnv_crtc_compute_clock(struct intel_atomic_state *state,
 
 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {
 		if (intel_panel_use_ssc(dev_priv)) {
-			refclk = dev_priv->display.vbt.lvds_ssc_freq;
+			refclk = dev_priv->display.vbt.data.lvds_ssc_freq;
 			drm_dbg_kms(&dev_priv->drm,
 				    "using SSC reference clock of %d kHz\n",
 				    refclk);
@@ -1564,7 +1564,7 @@ static int i9xx_crtc_compute_clock(struct intel_atomic_state *state,
 
 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {
 		if (intel_panel_use_ssc(dev_priv)) {
-			refclk = dev_priv->display.vbt.lvds_ssc_freq;
+			refclk = dev_priv->display.vbt.data.lvds_ssc_freq;
 			drm_dbg_kms(&dev_priv->drm,
 				    "using SSC reference clock of %d kHz\n",
 				    refclk);
@@ -1604,7 +1604,7 @@ static int i8xx_crtc_compute_clock(struct intel_atomic_state *state,
 
 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {
 		if (intel_panel_use_ssc(dev_priv)) {
-			refclk = dev_priv->display.vbt.lvds_ssc_freq;
+			refclk = dev_priv->display.vbt.data.lvds_ssc_freq;
 			drm_dbg_kms(&dev_priv->drm,
 				    "using SSC reference clock of %d kHz\n",
 				    refclk);
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index ef57dad1a9cb..4b6c57f89bef 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -2796,6 +2796,7 @@ static void icl_calc_dpll_state(struct drm_i915_private *i915,
 				struct intel_dpll_hw_state *pll_state)
 {
 	u32 dco_fraction = pll_params->dco_fraction;
+	struct intel_vbt_data *data = &i915->display.vbt.data;
 
 	if (ehl_combo_pll_div_frac_wa_needed(i915))
 		dco_fraction = DIV_ROUND_CLOSEST(dco_fraction, 2);
@@ -2813,8 +2814,8 @@ static void icl_calc_dpll_state(struct drm_i915_private *i915,
 	else
 		pll_state->cfgcr1 |= DPLL_CFGCR1_CENTRAL_FREQ_8400;
 
-	if (i915->display.vbt.override_afc_startup)
-		pll_state->div0 = TGL_DPLL0_DIV0_AFC_STARTUP(i915->display.vbt.override_afc_startup_val);
+	if (data->override_afc_startup)
+		pll_state->div0 = TGL_DPLL0_DIV0_AFC_STARTUP(data->override_afc_startup_val);
 }
 
 static int icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,
@@ -3009,8 +3010,8 @@ static int icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,
 					 DKL_PLL_DIV0_PROP_COEFF(prop_coeff) |
 					 DKL_PLL_DIV0_FBPREDIV(m1div) |
 					 DKL_PLL_DIV0_FBDIV_INT(m2div_int);
-		if (i915->display.vbt.override_afc_startup) {
-			u8 val = i915->display.vbt.override_afc_startup_val;
+		if (i915->display.vbt.data.override_afc_startup) {
+			u8 val = i915->display.vbt.data.override_afc_startup_val;
 
 			pll_state->mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(val);
 		}
@@ -3548,7 +3549,7 @@ static bool dkl_pll_get_hw_state(struct drm_i915_private *i915,
 
 	hw_state->mg_pll_div0 = intel_dkl_phy_read(i915, DKL_PLL_DIV0(tc_port));
 	val = DKL_PLL_DIV0_MASK;
-	if (i915->display.vbt.override_afc_startup)
+	if (i915->display.vbt.data.override_afc_startup)
 		val |= DKL_PLL_DIV0_AFC_STARTUP_MASK;
 	hw_state->mg_pll_div0 &= val;
 
@@ -3612,7 +3613,7 @@ static bool icl_pll_get_hw_state(struct drm_i915_private *i915,
 						 TGL_DPLL_CFGCR0(id));
 		hw_state->cfgcr1 = intel_de_read(i915,
 						 TGL_DPLL_CFGCR1(id));
-		if (i915->display.vbt.override_afc_startup) {
+		if (i915->display.vbt.data.override_afc_startup) {
 			hw_state->div0 = intel_de_read(i915, TGL_DPLL0_DIV0(id));
 			hw_state->div0 &= TGL_DPLL0_DIV0_AFC_STARTUP_MASK;
 		}
@@ -3686,9 +3687,9 @@ static void icl_dpll_write(struct drm_i915_private *i915,
 
 	intel_de_write(i915, cfgcr0_reg, hw_state->cfgcr0);
 	intel_de_write(i915, cfgcr1_reg, hw_state->cfgcr1);
-	drm_WARN_ON_ONCE(&i915->drm, i915->display.vbt.override_afc_startup &&
+	drm_WARN_ON_ONCE(&i915->drm, i915->display.vbt.data.override_afc_startup &&
 			 !i915_mmio_reg_valid(div0_reg));
-	if (i915->display.vbt.override_afc_startup &&
+	if (i915->display.vbt.data.override_afc_startup &&
 	    i915_mmio_reg_valid(div0_reg))
 		intel_de_rmw(i915, div0_reg,
 			     TGL_DPLL0_DIV0_AFC_STARTUP_MASK, hw_state->div0);
@@ -3769,7 +3770,7 @@ static void dkl_pll_write(struct drm_i915_private *i915,
 	intel_dkl_phy_write(i915, DKL_CLKTOP2_HSCLKCTL(tc_port), val);
 
 	val = DKL_PLL_DIV0_MASK;
-	if (i915->display.vbt.override_afc_startup)
+	if (i915->display.vbt.data.override_afc_startup)
 		val |= DKL_PLL_DIV0_AFC_STARTUP_MASK;
 	intel_dkl_phy_rmw(i915, DKL_PLL_DIV0(tc_port), val,
 			  hw_state->mg_pll_div0);
diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c b/drivers/gpu/drm/i915/display/intel_dsi.c
index d3cf6a652221..aa44c1effa54 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi.c
@@ -126,7 +126,7 @@ intel_dsi_get_panel_orientation(struct intel_connector *connector)
 	if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
 		return orientation;
 
-	orientation = dev_priv->display.vbt.orientation;
+	orientation = dev_priv->display.vbt.data.orientation;
 	if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
 		return orientation;
 
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 221f5c6c871b..64dd4717122f 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -850,12 +850,12 @@ void intel_lvds_init(struct drm_i915_private *i915)
 
 	/* Skip init on machines we know falsely report LVDS */
 	if (dmi_check_system(intel_no_lvds)) {
-		drm_WARN(&i915->drm, !i915->display.vbt.int_lvds_support,
+		drm_WARN(&i915->drm, !i915->display.vbt.data.int_lvds_support,
 			 "Useless DMI match. Internal LVDS support disabled by VBT\n");
 		return;
 	}
 
-	if (!i915->display.vbt.int_lvds_support) {
+	if (!i915->display.vbt.data.int_lvds_support) {
 		drm_dbg_kms(&i915->drm,
 			    "Internal LVDS support disabled by VBT\n");
 		return;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 0d8e5320a4f8..5e76e366d4d1 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -48,7 +48,7 @@ bool intel_panel_use_ssc(struct drm_i915_private *i915)
 {
 	if (i915->display.params.panel_use_ssc >= 0)
 		return i915->display.params.panel_use_ssc != 0;
-	return i915->display.vbt.lvds_use_ssc &&
+	return i915->display.vbt.data.lvds_use_ssc &&
 		!intel_has_quirk(i915, QUIRK_LVDS_SSC_DISABLE);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_pch_refclk.c b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
index 713cfba71475..f37fce257fbd 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_refclk.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
@@ -520,7 +520,7 @@ static void ilk_init_pch_refclk(struct drm_i915_private *dev_priv)
 	}
 
 	if (HAS_PCH_IBX(dev_priv)) {
-		has_ck505 = dev_priv->display.vbt.display_clock_mode;
+		has_ck505 = dev_priv->display.vbt.data.display_clock_mode;
 		can_ssc = has_ck505;
 	} else {
 		has_ck505 = false;
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 9218047495fb..632d0f0daa32 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2078,7 +2078,7 @@ intel_sdvo_get_analog_edid(struct drm_connector *connector)
 	struct drm_i915_private *i915 = to_i915(connector->dev);
 	struct i2c_adapter *ddc;
 
-	ddc = intel_gmbus_get_adapter(i915, i915->display.vbt.crt_ddc_pin);
+	ddc = intel_gmbus_get_adapter(i915, i915->display.vbt.data.crt_ddc_pin);
 	if (!ddc)
 		return NULL;
 
@@ -2601,9 +2601,9 @@ intel_sdvo_select_ddc_bus(struct intel_sdvo *sdvo,
 	int ddc_bus;
 
 	if (sdvo->base.port == PORT_B)
-		mapping = &dev_priv->display.vbt.sdvo_mappings[0];
+		mapping = &dev_priv->display.vbt.data.sdvo_mappings[0];
 	else
-		mapping = &dev_priv->display.vbt.sdvo_mappings[1];
+		mapping = &dev_priv->display.vbt.data.sdvo_mappings[1];
 
 	if (mapping->initialized)
 		ddc_bus = (mapping->ddc_pin & 0xf0) >> 4;
@@ -2624,9 +2624,9 @@ intel_sdvo_select_i2c_bus(struct intel_sdvo *sdvo)
 	u8 pin;
 
 	if (sdvo->base.port == PORT_B)
-		mapping = &dev_priv->display.vbt.sdvo_mappings[0];
+		mapping = &dev_priv->display.vbt.data.sdvo_mappings[0];
 	else
-		mapping = &dev_priv->display.vbt.sdvo_mappings[1];
+		mapping = &dev_priv->display.vbt.data.sdvo_mappings[1];
 
 	if (mapping->initialized &&
 	    intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
@@ -2668,11 +2668,11 @@ intel_sdvo_get_slave_addr(struct intel_sdvo *sdvo)
 	const struct sdvo_device_mapping *my_mapping, *other_mapping;
 
 	if (sdvo->base.port == PORT_B) {
-		my_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
-		other_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
+		my_mapping = &dev_priv->display.vbt.data.sdvo_mappings[0];
+		other_mapping = &dev_priv->display.vbt.data.sdvo_mappings[1];
 	} else {
-		my_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
-		other_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
+		my_mapping = &dev_priv->display.vbt.data.sdvo_mappings[1];
+		other_mapping = &dev_priv->display.vbt.data.sdvo_mappings[0];
 	}
 
 	/* If the BIOS described our SDVO device, take advantage of it. */
diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c b/drivers/gpu/drm/i915/intel_clock_gating.c
index 9c21ce69bd98..8b6991db369e 100644
--- a/drivers/gpu/drm/i915/intel_clock_gating.c
+++ b/drivers/gpu/drm/i915/intel_clock_gating.c
@@ -225,7 +225,7 @@ static void cpt_init_clock_gating(struct drm_i915_private *i915)
 		val = intel_uncore_read(&i915->uncore, TRANS_CHICKEN2(pipe));
 		val |= TRANS_CHICKEN2_TIMING_OVERRIDE;
 		val &= ~TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
-		if (i915->display.vbt.fdi_rx_polarity_inverted)
+		if (i915->display.vbt.data.fdi_rx_polarity_inverted)
 			val |= TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
 		val &= ~TRANS_CHICKEN2_DISABLE_DEEP_COLOR_COUNTER;
 		val &= ~TRANS_CHICKEN2_DISABLE_DEEP_COLOR_MODESWITCH;
-- 
2.34.1

[RFC 02/15] drm/i915: Move vbt fields from opregion to its own structure

[Radhakrishna Sripada]

For discrete cards, vbt need not exist in opregion as in the case with
pre opregion platforms. To handle vbt in such cases, move vbt fields
in opregion structure to newly introduced vbt structure. This organizes vbt
related fields and processed intel_vbt_data under the same structure.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     |  4 +-
 .../gpu/drm/i915/display/intel_display_core.h |  3 ++
 .../drm/i915/display/intel_display_debugfs.c  |  6 +--
 drivers/gpu/drm/i915/display/intel_opregion.c | 38 +++++++++----------
 drivers/gpu/drm/i915/display/intel_opregion.h |  3 --
 5 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index b9120eb1321d..0e09454ba79c 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3075,7 +3075,7 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
  */
 void intel_bios_init(struct drm_i915_private *i915)
 {
-	const struct vbt_header *vbt = i915->display.opregion.vbt;
+	const struct vbt_header *vbt = i915->display.vbt.vbt;
 	struct vbt_header *oprom_vbt = NULL;
 	const struct bdb_header *bdb;
 
@@ -3308,7 +3308,7 @@ bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
 		 * additional data.  Trust that if the VBT was written into
 		 * the OpRegion then they have validated the LVDS's existence.
 		 */
-		if (i915->display.opregion.vbt)
+		if (i915->display.vbt.vbt)
 			return true;
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 6e1aa58aad61..9e134b08aea0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -233,6 +233,9 @@ struct intel_vbt_data {
 };
 
 struct intel_vbt {
+	void *vbt_firmware;
+	const void *vbt;
+	u32 vbt_size;
 	struct intel_vbt_data data;
 };
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index d951edb36687..c01e04a0142a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -100,10 +100,10 @@ static int i915_opregion(struct seq_file *m, void *unused)
 static int i915_vbt(struct seq_file *m, void *unused)
 {
 	struct drm_i915_private *i915 = node_to_i915(m->private);
-	struct intel_opregion *opregion = &i915->display.opregion;
+	struct intel_vbt *vbt = &i915->display.vbt;
 
-	if (opregion->vbt)
-		seq_write(m, opregion->vbt, opregion->vbt_size);
+	if (vbt->vbt)
+		seq_write(m, vbt->vbt, vbt->vbt_size);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index 1ce785db6a5e..fa25007fac3a 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -839,7 +839,7 @@ static const struct dmi_system_id intel_no_opregion_vbt[] = {
 
 static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
 {
-	struct intel_opregion *opregion = &dev_priv->display.opregion;
+	struct intel_vbt *vbt = &dev_priv->display.vbt;
 	const struct firmware *fw = NULL;
 	const char *name = dev_priv->display.params.vbt_firmware;
 	int ret;
@@ -856,12 +856,12 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
 	}
 
 	if (intel_bios_is_valid_vbt(fw->data, fw->size)) {
-		opregion->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL);
-		if (opregion->vbt_firmware) {
+		vbt->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL);
+		if (vbt->vbt_firmware) {
 			drm_dbg_kms(&dev_priv->drm,
 				    "Found valid VBT firmware \"%s\"\n", name);
-			opregion->vbt = opregion->vbt_firmware;
-			opregion->vbt_size = fw->size;
+			vbt->vbt = vbt->vbt_firmware;
+			vbt->vbt_size = fw->size;
 			ret = 0;
 		} else {
 			ret = -ENOMEM;
@@ -880,12 +880,13 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
 int intel_opregion_setup(struct drm_i915_private *dev_priv)
 {
 	struct intel_opregion *opregion = &dev_priv->display.opregion;
+	struct intel_vbt *vbt = &dev_priv->display.vbt;
 	struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
 	u32 asls, mboxes;
 	char buf[sizeof(OPREGION_SIGNATURE)];
 	int err = 0;
 	void *base;
-	const void *vbt;
+	const void *vbt_data;
 	u32 vbt_size;
 
 	BUILD_BUG_ON(sizeof(struct opregion_header) != 0x100);
@@ -992,13 +993,13 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv)
 		opregion->rvda = memremap(rvda, opregion->asle->rvds,
 					  MEMREMAP_WB);
 
-		vbt = opregion->rvda;
+		vbt_data = opregion->rvda;
 		vbt_size = opregion->asle->rvds;
-		if (intel_bios_is_valid_vbt(vbt, vbt_size)) {
+		if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) {
 			drm_dbg_kms(&dev_priv->drm,
 				    "Found valid VBT in ACPI OpRegion (RVDA)\n");
-			opregion->vbt = vbt;
-			opregion->vbt_size = vbt_size;
+			vbt->vbt = vbt_data;
+			vbt->vbt_size = vbt_size;
 			goto out;
 		} else {
 			drm_dbg_kms(&dev_priv->drm,
@@ -1008,7 +1009,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv)
 		}
 	}
 
-	vbt = base + OPREGION_VBT_OFFSET;
+	vbt_data = base + OPREGION_VBT_OFFSET;
 	/*
 	 * The VBT specification says that if the ASLE ext mailbox is not used
 	 * its area is reserved, but on some CHT boards the VBT extends into the
@@ -1019,11 +1020,11 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv)
 	vbt_size = (mboxes & MBOX_ASLE_EXT) ?
 		OPREGION_ASLE_EXT_OFFSET : OPREGION_SIZE;
 	vbt_size -= OPREGION_VBT_OFFSET;
-	if (intel_bios_is_valid_vbt(vbt, vbt_size)) {
+	if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Found valid VBT in ACPI OpRegion (Mailbox #4)\n");
-		opregion->vbt = vbt;
-		opregion->vbt_size = vbt_size;
+		vbt->vbt = vbt_data;
+		vbt->vbt_size = vbt_size;
 	} else {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Invalid VBT in ACPI OpRegion (Mailbox #4)\n");
@@ -1243,6 +1244,7 @@ void intel_opregion_unregister(struct drm_i915_private *i915)
 void intel_opregion_cleanup(struct drm_i915_private *i915)
 {
 	struct intel_opregion *opregion = &i915->display.opregion;
+	struct intel_vbt *vbt = &i915->display.vbt;
 
 	if (!opregion->header)
 		return;
@@ -1253,15 +1255,13 @@ void intel_opregion_cleanup(struct drm_i915_private *i915)
 		memunmap(opregion->rvda);
 		opregion->rvda = NULL;
 	}
-	if (opregion->vbt_firmware) {
-		kfree(opregion->vbt_firmware);
-		opregion->vbt_firmware = NULL;
-	}
+	kfree(vbt->vbt_firmware);
+	vbt->vbt_firmware = NULL;
 	opregion->header = NULL;
 	opregion->acpi = NULL;
 	opregion->swsci = NULL;
 	opregion->asle = NULL;
 	opregion->asle_ext = NULL;
-	opregion->vbt = NULL;
+	vbt->vbt = NULL;
 	opregion->lid_state = NULL;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h b/drivers/gpu/drm/i915/display/intel_opregion.h
index fd2ea8ef0fa2..7e1c8f1c2da5 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.h
+++ b/drivers/gpu/drm/i915/display/intel_opregion.h
@@ -47,9 +47,6 @@ struct intel_opregion {
 	struct opregion_asle *asle;
 	struct opregion_asle_ext *asle_ext;
 	void *rvda;
-	void *vbt_firmware;
-	const void *vbt;
-	u32 vbt_size;
 	u32 *lid_state;
 	struct work_struct asle_work;
 	struct notifier_block acpi_notifier;
-- 
2.34.1

[RFC 03/15] drm/i915: Cache opregion asls pointer

[Radhakrishna Sripada]

Asls offset is used to calculate the relative offset of vbt in ASLE
mailbox. Cache the address read from PCI config space to use later during
vbt extraction.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_opregion.c | 4 +++-
 drivers/gpu/drm/i915/display/intel_opregion.h | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index fa25007fac3a..bd654d773ca7 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -903,6 +903,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv)
 		return -ENOTSUPP;
 	}
 
+	opregion->asls = asls;
 	INIT_WORK(&opregion->asle_work, asle_work);
 
 	base = memremap(asls, OPREGION_SIZE, MEMREMAP_WB);
@@ -987,7 +988,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv)
 		    opregion->header->over.minor >= 1) {
 			drm_WARN_ON(&dev_priv->drm, rvda < OPREGION_SIZE);
 
-			rvda += asls;
+			rvda += opregion->asls;
 		}
 
 		opregion->rvda = memremap(rvda, opregion->asle->rvds,
@@ -1262,6 +1263,7 @@ void intel_opregion_cleanup(struct drm_i915_private *i915)
 	opregion->swsci = NULL;
 	opregion->asle = NULL;
 	opregion->asle_ext = NULL;
+	opregion->asls = 0;
 	vbt->vbt = NULL;
 	opregion->lid_state = NULL;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h b/drivers/gpu/drm/i915/display/intel_opregion.h
index 7e1c8f1c2da5..03838fa39d0d 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.h
+++ b/drivers/gpu/drm/i915/display/intel_opregion.h
@@ -48,6 +48,7 @@ struct intel_opregion {
 	struct opregion_asle_ext *asle_ext;
 	void *rvda;
 	u32 *lid_state;
+	u32 asls;
 	struct work_struct asle_work;
 	struct notifier_block acpi_notifier;
 };
-- 
2.34.1

[RFC 04/15] drm/i915: Extract opregion vbt capture to its own function

[Radhakrishna Sripada]

As part of opregion setup, vbt is extracted from the opregion. Move
the vbt parts of opregion setup into its own function.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_opregion.c | 143 ++++++++++--------
 1 file changed, 76 insertions(+), 67 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index bd654d773ca7..cf7312cfd94a 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -877,6 +877,81 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
 	return ret;
 }
 
+static int intel_load_opregion_vbt(struct drm_i915_private *i915,
+				   struct intel_opregion *opregion,
+				   struct intel_vbt *vbt)
+{
+	const void *vbt_data;
+	u32 vbt_size;
+	void *base = opregion->header;
+
+	if (intel_load_vbt_firmware(i915) == 0)
+		goto out;
+
+	if (dmi_check_system(intel_no_opregion_vbt))
+		goto out;
+
+	if (opregion->header->over.major >= 2 && opregion->asle &&
+	    opregion->asle->rvda && opregion->asle->rvds) {
+		resource_size_t rvda = opregion->asle->rvda;
+
+		/*
+		 * opregion 2.0: rvda is the physical VBT address.
+		 *
+		 * opregion 2.1+: rvda is unsigned, relative offset from
+		 * opregion base, and should never point within opregion.
+		 */
+		if (opregion->header->over.major > 2 ||
+		    opregion->header->over.minor >= 1) {
+			drm_WARN_ON(&i915->drm, rvda < OPREGION_SIZE);
+
+			rvda += opregion->asls;
+		}
+
+		opregion->rvda = memremap(rvda, opregion->asle->rvds,
+					  MEMREMAP_WB);
+
+		vbt_data = opregion->rvda;
+		vbt_size = opregion->asle->rvds;
+		if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) {
+			drm_dbg_kms(&i915->drm,
+				    "Found valid VBT in ACPI OpRegion (RVDA)\n");
+			vbt->vbt = vbt_data;
+			vbt->vbt_size = vbt_size;
+			goto out;
+		} else {
+			drm_dbg_kms(&i915->drm,
+				    "Invalid VBT in ACPI OpRegion (RVDA)\n");
+			memunmap(opregion->rvda);
+			opregion->rvda = NULL;
+		}
+	}
+
+	vbt_data = base + OPREGION_VBT_OFFSET;
+	/*
+	 * The VBT specification says that if the ASLE ext mailbox is not used
+	 * its area is reserved, but on some CHT boards the VBT extends into the
+	 * ASLE ext area. Allow this even though it is against the spec, so we
+	 * do not end up rejecting the VBT on those boards (and end up not
+	 * finding the LCD panel because of this).
+	 */
+	vbt_size = (opregion->header->mboxes & MBOX_ASLE_EXT) ?
+		OPREGION_ASLE_EXT_OFFSET : OPREGION_SIZE;
+	vbt_size -= OPREGION_VBT_OFFSET;
+	if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) {
+		drm_dbg_kms(&i915->drm,
+			    "Found valid VBT in ACPI OpRegion (Mailbox #4)\n");
+		vbt->vbt = vbt_data;
+		vbt->vbt_size = vbt_size;
+	} else {
+		drm_dbg_kms(&i915->drm,
+			    "Invalid VBT in ACPI OpRegion (Mailbox #4)\n");
+	}
+
+out:
+	return 0;
+}
+
 int intel_opregion_setup(struct drm_i915_private *dev_priv)
 {
 	struct intel_opregion *opregion = &dev_priv->display.opregion;
@@ -886,8 +961,6 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv)
 	char buf[sizeof(OPREGION_SIGNATURE)];
 	int err = 0;
 	void *base;
-	const void *vbt_data;
-	u32 vbt_size;
 
 	BUILD_BUG_ON(sizeof(struct opregion_header) != 0x100);
 	BUILD_BUG_ON(sizeof(struct opregion_acpi) != 0x100);
@@ -968,71 +1041,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv)
 		drm_dbg(&dev_priv->drm, "Mailbox #2 for backlight present\n");
 	}
 
-	if (intel_load_vbt_firmware(dev_priv) == 0)
-		goto out;
-
-	if (dmi_check_system(intel_no_opregion_vbt))
-		goto out;
-
-	if (opregion->header->over.major >= 2 && opregion->asle &&
-	    opregion->asle->rvda && opregion->asle->rvds) {
-		resource_size_t rvda = opregion->asle->rvda;
-
-		/*
-		 * opregion 2.0: rvda is the physical VBT address.
-		 *
-		 * opregion 2.1+: rvda is unsigned, relative offset from
-		 * opregion base, and should never point within opregion.
-		 */
-		if (opregion->header->over.major > 2 ||
-		    opregion->header->over.minor >= 1) {
-			drm_WARN_ON(&dev_priv->drm, rvda < OPREGION_SIZE);
-
-			rvda += opregion->asls;
-		}
-
-		opregion->rvda = memremap(rvda, opregion->asle->rvds,
-					  MEMREMAP_WB);
-
-		vbt_data = opregion->rvda;
-		vbt_size = opregion->asle->rvds;
-		if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) {
-			drm_dbg_kms(&dev_priv->drm,
-				    "Found valid VBT in ACPI OpRegion (RVDA)\n");
-			vbt->vbt = vbt_data;
-			vbt->vbt_size = vbt_size;
-			goto out;
-		} else {
-			drm_dbg_kms(&dev_priv->drm,
-				    "Invalid VBT in ACPI OpRegion (RVDA)\n");
-			memunmap(opregion->rvda);
-			opregion->rvda = NULL;
-		}
-	}
-
-	vbt_data = base + OPREGION_VBT_OFFSET;
-	/*
-	 * The VBT specification says that if the ASLE ext mailbox is not used
-	 * its area is reserved, but on some CHT boards the VBT extends into the
-	 * ASLE ext area. Allow this even though it is against the spec, so we
-	 * do not end up rejecting the VBT on those boards (and end up not
-	 * finding the LCD panel because of this).
-	 */
-	vbt_size = (mboxes & MBOX_ASLE_EXT) ?
-		OPREGION_ASLE_EXT_OFFSET : OPREGION_SIZE;
-	vbt_size -= OPREGION_VBT_OFFSET;
-	if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "Found valid VBT in ACPI OpRegion (Mailbox #4)\n");
-		vbt->vbt = vbt_data;
-		vbt->vbt_size = vbt_size;
-	} else {
-		drm_dbg_kms(&dev_priv->drm,
-			    "Invalid VBT in ACPI OpRegion (Mailbox #4)\n");
-	}
-
-out:
-	return 0;
+	return intel_load_opregion_vbt(dev_priv, opregion, vbt);
 
 err_out:
 	memunmap(base);
-- 
2.34.1

[RFC 05/15] drm/i915: Init vbt fields when read from oprom/spi

[Radhakrishna Sripada]

For some platforms where vbt does not reside in opregion,
vbt needs to be cached for debug purposes. Cache them for
future usage.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 0e09454ba79c..0944802ecbd5 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2994,6 +2994,8 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
 	if (!intel_bios_is_valid_vbt(vbt, vbt_size))
 		goto err_free_vbt;
 
+	i915->display.vbt.vbt = vbt;
+	i915->display.vbt.vbt_size = vbt_size;
 	drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
 
 	return (struct vbt_header *)vbt;
@@ -3053,6 +3055,8 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
 
 	pci_unmap_rom(pdev, oprom);
 
+	i915->display.vbt.vbt = vbt;
+	i915->display.vbt.vbt_size = vbt_size;
 	drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
 
 	return vbt;
@@ -3134,8 +3138,6 @@ void intel_bios_init(struct drm_i915_private *i915)
 	/* Further processing on pre-parsed or generated child device data */
 	parse_sdvo_device_mapping(i915);
 	parse_ddi_ports(i915);
-
-	kfree(oprom_vbt);
 }
 
 static void intel_bios_init_panel(struct drm_i915_private *i915,
@@ -3207,6 +3209,9 @@ void intel_bios_driver_remove(struct drm_i915_private *i915)
 		list_del(&entry->node);
 		kfree(entry);
 	}
+
+	/* FIXME: Handle vbt free in opregion case. */
+	kfree(vbt->vbt);
 }
 
 void intel_bios_fini_panel(struct intel_panel *panel)
-- 
2.34.1

[RFC 06/15] drm/i915: Classify vbt type based on its residence

[Radhakrishna Sripada]

Vbt can be read from different sources viz. firmware, opregion,
oprom or spi. This will be useful for us to handle the vbt cleanup
during bios remove phase.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c         | 15 ++++++++++++---
 drivers/gpu/drm/i915/display/intel_display_core.h |  8 ++++++++
 drivers/gpu/drm/i915/display/intel_opregion.c     |  3 +++
 3 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 0944802ecbd5..bd46a14a04f5 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2996,6 +2996,7 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
 
 	i915->display.vbt.vbt = vbt;
 	i915->display.vbt.vbt_size = vbt_size;
+	i915->display.vbt.type = I915_VBT_SPI;
 	drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
 
 	return (struct vbt_header *)vbt;
@@ -3057,6 +3058,7 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
 
 	i915->display.vbt.vbt = vbt;
 	i915->display.vbt.vbt_size = vbt_size;
+	i915->display.vbt.type = I915_VBT_OPROM;
 	drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
 
 	return vbt;
@@ -3082,6 +3084,13 @@ void intel_bios_init(struct drm_i915_private *i915)
 	const struct vbt_header *vbt = i915->display.vbt.vbt;
 	struct vbt_header *oprom_vbt = NULL;
 	const struct bdb_header *bdb;
+	const char * const vbt_type[] = {
+		[I915_VBT_NONE] = "None",
+		[I915_VBT_FIRMWARE] = "Firmware",
+		[I915_VBT_OPREGION] = "Opregion",
+		[I915_VBT_OPROM] = "Oprom",
+		[I915_VBT_SPI] = "SPI",
+	};
 
 	INIT_LIST_HEAD(&i915->display.vbt.data.display_devices);
 	INIT_LIST_HEAD(&i915->display.vbt.data.bdb_blocks);
@@ -3114,9 +3123,9 @@ void intel_bios_init(struct drm_i915_private *i915)
 	bdb = get_bdb_header(vbt);
 	i915->display.vbt.data.version = bdb->version;
 
-	drm_dbg_kms(&i915->drm,
-		    "VBT signature \"%.*s\", BDB version %d\n",
-		    (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.data.version);
+	drm_dbg_kms(&i915->drm, "%s VBT signature \"%.*s\", BDB version %d\n",
+		    vbt_type[i915->display.vbt.type], (int)sizeof(vbt->signature),
+		    vbt->signature, i915->display.vbt.data.version);
 
 	init_bdb_blocks(i915, bdb);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 9e134b08aea0..4807edc88f81 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -236,6 +236,14 @@ struct intel_vbt {
 	void *vbt_firmware;
 	const void *vbt;
 	u32 vbt_size;
+	enum {
+		I915_VBT_NONE = 0,
+		I915_VBT_FIRMWARE,
+		I915_VBT_OPREGION,
+		I915_VBT_OPROM,
+		I915_VBT_SPI
+	} type;
+
 	struct intel_vbt_data data;
 };
 
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index cf7312cfd94a..5c4a5ddba01d 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -862,6 +862,7 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
 				    "Found valid VBT firmware \"%s\"\n", name);
 			vbt->vbt = vbt->vbt_firmware;
 			vbt->vbt_size = fw->size;
+			vbt->type = I915_VBT_FIRMWARE;
 			ret = 0;
 		} else {
 			ret = -ENOMEM;
@@ -918,6 +919,7 @@ static int intel_load_opregion_vbt(struct drm_i915_private *i915,
 				    "Found valid VBT in ACPI OpRegion (RVDA)\n");
 			vbt->vbt = vbt_data;
 			vbt->vbt_size = vbt_size;
+			vbt->type = I915_VBT_OPREGION;
 			goto out;
 		} else {
 			drm_dbg_kms(&i915->drm,
@@ -943,6 +945,7 @@ static int intel_load_opregion_vbt(struct drm_i915_private *i915,
 			    "Found valid VBT in ACPI OpRegion (Mailbox #4)\n");
 		vbt->vbt = vbt_data;
 		vbt->vbt_size = vbt_size;
+		vbt->type = I915_VBT_OPREGION;
 	} else {
 		drm_dbg_kms(&i915->drm,
 			    "Invalid VBT in ACPI OpRegion (Mailbox #4)\n");
-- 
2.34.1

[RFC 07/15] drm/i915: Collate vbt cleanup for different types

[Radhakrishna Sripada]

VBT not read from opregion needs to be freed. Vbt read from
opregion is simply remapped and hence need to point to NULL. While
at it assign the type to NONE VBT type. Free the vbt in other cases.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 20 +++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_opregion.c |  4 ----
 2 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index bd46a14a04f5..ccfc4a4e4c98 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3219,8 +3219,24 @@ void intel_bios_driver_remove(struct drm_i915_private *i915)
 		kfree(entry);
 	}
 
-	/* FIXME: Handle vbt free in opregion case. */
-	kfree(vbt->vbt);
+	switch (vbt->type) {
+	case I915_VBT_SPI:
+	case I915_VBT_OPROM:
+		kfree(vbt->vbt);
+		vbt->type = I915_VBT_NONE;
+		break;
+	case I915_VBT_FIRMWARE:
+		kfree(vbt->vbt_firmware);
+		fallthrough;
+	case I915_VBT_OPREGION:
+		vbt->vbt = NULL;
+		vbt->type = I915_VBT_NONE;
+		break;
+	case I915_VBT_NONE:
+		break;
+	default:
+		MISSING_CASE(vbt->type);
+	}
 }
 
 void intel_bios_fini_panel(struct intel_panel *panel)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index 5c4a5ddba01d..b879e89d0fb6 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -1257,7 +1257,6 @@ void intel_opregion_unregister(struct drm_i915_private *i915)
 void intel_opregion_cleanup(struct drm_i915_private *i915)
 {
 	struct intel_opregion *opregion = &i915->display.opregion;
-	struct intel_vbt *vbt = &i915->display.vbt;
 
 	if (!opregion->header)
 		return;
@@ -1268,14 +1267,11 @@ void intel_opregion_cleanup(struct drm_i915_private *i915)
 		memunmap(opregion->rvda);
 		opregion->rvda = NULL;
 	}
-	kfree(vbt->vbt_firmware);
-	vbt->vbt_firmware = NULL;
 	opregion->header = NULL;
 	opregion->acpi = NULL;
 	opregion->swsci = NULL;
 	opregion->asle = NULL;
 	opregion->asle_ext = NULL;
 	opregion->asls = 0;
-	vbt->vbt = NULL;
 	opregion->lid_state = NULL;
 }
-- 
2.34.1

[RFC 08/15] drm/i915: Make intel_bios_init operate on intel_vbt

[Radhakrishna Sripada]

intel_bios_init previously operated on vbt_header. Make use
of the newly introduced intel_vbt to be later streamline
different vbt reading methods.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 28 ++++++++++++-----------
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index ccfc4a4e4c98..bde58a1ceadb 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3081,8 +3081,9 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
  */
 void intel_bios_init(struct drm_i915_private *i915)
 {
-	const struct vbt_header *vbt = i915->display.vbt.vbt;
+	struct intel_vbt *vbt = &i915->display.vbt;
 	struct vbt_header *oprom_vbt = NULL;
+	struct vbt_header *header = NULL;
 	const struct bdb_header *bdb;
 	const char * const vbt_type[] = {
 		[I915_VBT_NONE] = "None",
@@ -3092,8 +3093,8 @@ void intel_bios_init(struct drm_i915_private *i915)
 		[I915_VBT_SPI] = "SPI",
 	};
 
-	INIT_LIST_HEAD(&i915->display.vbt.data.display_devices);
-	INIT_LIST_HEAD(&i915->display.vbt.data.bdb_blocks);
+	INIT_LIST_HEAD(&vbt->data.display_devices);
+	INIT_LIST_HEAD(&vbt->data.bdb_blocks);
 
 	if (!HAS_DISPLAY(i915)) {
 		drm_dbg_kms(&i915->drm,
@@ -3107,25 +3108,26 @@ void intel_bios_init(struct drm_i915_private *i915)
 	 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
 	 * PCI mapping
 	 */
-	if (!vbt && IS_DGFX(i915)) {
+	if (!vbt->vbt && IS_DGFX(i915)) {
 		oprom_vbt = spi_oprom_get_vbt(i915);
-		vbt = oprom_vbt;
+		vbt->vbt = oprom_vbt;
 	}
 
-	if (!vbt) {
+	if (!vbt->vbt) {
 		oprom_vbt = oprom_get_vbt(i915);
-		vbt = oprom_vbt;
+		vbt->vbt = oprom_vbt;
 	}
 
-	if (!vbt)
+	if (!vbt->vbt)
 		goto out;
 
-	bdb = get_bdb_header(vbt);
-	i915->display.vbt.data.version = bdb->version;
+	header = (struct vbt_header *)vbt->vbt;
+	bdb = get_bdb_header(header);
+	vbt->data.version = bdb->version;
 
 	drm_dbg_kms(&i915->drm, "%s VBT signature \"%.*s\", BDB version %d\n",
-		    vbt_type[i915->display.vbt.type], (int)sizeof(vbt->signature),
-		    vbt->signature, i915->display.vbt.data.version);
+		    vbt_type[vbt->type], (int)sizeof(header->signature),
+		    header->signature, vbt->data.version);
 
 	init_bdb_blocks(i915, bdb);
 
@@ -3138,7 +3140,7 @@ void intel_bios_init(struct drm_i915_private *i915)
 	parse_compression_parameters(i915);
 
 out:
-	if (!vbt) {
+	if (!vbt->vbt) {
 		drm_info(&i915->drm,
 			 "Failed to find VBIOS tables (VBT)\n");
 		init_vbt_missing_defaults(i915);
-- 
2.34.1

[RFC 09/15] drm/i915: Move vbt load from opregion to bios init

[Radhakrishna Sripada]

Opregion is probed early during the driver bring up and if present,
vbt is extracted. Move vbt loading to a more appropriate place during
bios init where the vbt is parsed. While at it remove the empty return.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     |  4 ++++
 drivers/gpu/drm/i915/display/intel_opregion.c | 18 +++++++-----------
 drivers/gpu/drm/i915/display/intel_opregion.h |  9 +++++++++
 3 files changed, 20 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index bde58a1ceadb..5d2a56df029d 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -34,6 +34,7 @@
 #include "intel_display.h"
 #include "intel_display_types.h"
 #include "intel_gmbus.h"
+#include "intel_opregion.h"
 
 #define _INTEL_BIOS_PRIVATE
 #include "intel_vbt_defs.h"
@@ -3082,6 +3083,7 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
 void intel_bios_init(struct drm_i915_private *i915)
 {
 	struct intel_vbt *vbt = &i915->display.vbt;
+	struct intel_opregion *opregion = &i915->display.opregion;
 	struct vbt_header *oprom_vbt = NULL;
 	struct vbt_header *header = NULL;
 	const struct bdb_header *bdb;
@@ -3104,6 +3106,8 @@ void intel_bios_init(struct drm_i915_private *i915)
 
 	init_vbt_defaults(i915);
 
+	if (opregion->asls)
+		intel_load_opregion_vbt(i915, opregion, vbt);
 	/*
 	 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
 	 * PCI mapping
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b879e89d0fb6..5ff6466548a3 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -878,19 +878,19 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
 	return ret;
 }
 
-static int intel_load_opregion_vbt(struct drm_i915_private *i915,
-				   struct intel_opregion *opregion,
-				   struct intel_vbt *vbt)
+void intel_load_opregion_vbt(struct drm_i915_private *i915,
+			     struct intel_opregion *opregion,
+			     struct intel_vbt *vbt)
 {
 	const void *vbt_data;
 	u32 vbt_size;
 	void *base = opregion->header;
 
 	if (intel_load_vbt_firmware(i915) == 0)
-		goto out;
+		return;
 
 	if (dmi_check_system(intel_no_opregion_vbt))
-		goto out;
+		return;
 
 	if (opregion->header->over.major >= 2 && opregion->asle &&
 	    opregion->asle->rvda && opregion->asle->rvds) {
@@ -920,7 +920,7 @@ static int intel_load_opregion_vbt(struct drm_i915_private *i915,
 			vbt->vbt = vbt_data;
 			vbt->vbt_size = vbt_size;
 			vbt->type = I915_VBT_OPREGION;
-			goto out;
+			return;
 		} else {
 			drm_dbg_kms(&i915->drm,
 				    "Invalid VBT in ACPI OpRegion (RVDA)\n");
@@ -950,15 +950,11 @@ static int intel_load_opregion_vbt(struct drm_i915_private *i915,
 		drm_dbg_kms(&i915->drm,
 			    "Invalid VBT in ACPI OpRegion (Mailbox #4)\n");
 	}
-
-out:
-	return 0;
 }
 
 int intel_opregion_setup(struct drm_i915_private *dev_priv)
 {
 	struct intel_opregion *opregion = &dev_priv->display.opregion;
-	struct intel_vbt *vbt = &dev_priv->display.vbt;
 	struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
 	u32 asls, mboxes;
 	char buf[sizeof(OPREGION_SIGNATURE)];
@@ -1044,7 +1040,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv)
 		drm_dbg(&dev_priv->drm, "Mailbox #2 for backlight present\n");
 	}
 
-	return intel_load_opregion_vbt(dev_priv, opregion, vbt);
+	return 0;
 
 err_out:
 	memunmap(base);
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h b/drivers/gpu/drm/i915/display/intel_opregion.h
index 03838fa39d0d..5a46a4b1805a 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.h
+++ b/drivers/gpu/drm/i915/display/intel_opregion.h
@@ -31,6 +31,7 @@
 struct drm_i915_private;
 struct intel_connector;
 struct intel_encoder;
+struct intel_vbt;
 
 struct opregion_header;
 struct opregion_acpi;
@@ -77,6 +78,9 @@ const struct drm_edid *intel_opregion_get_edid(struct intel_connector *connector
 
 bool intel_opregion_headless_sku(struct drm_i915_private *i915);
 
+void intel_load_opregion_vbt(struct drm_i915_private *i915,
+			     struct intel_opregion *opregion,
+			     struct intel_vbt *vbt);
 #else /* CONFIG_ACPI*/
 
 static inline int intel_opregion_setup(struct drm_i915_private *dev_priv)
@@ -137,6 +141,11 @@ static inline bool intel_opregion_headless_sku(struct drm_i915_private *i915)
 	return false;
 }
 
+static inline void intel_load_opregion_vbt(struct drm_i915_private *i915,
+					   struct intel_opregion *opregion,
+					   struct intel_vbt *vbt)
+{
+}
 #endif /* CONFIG_ACPI */
 
 #endif
-- 
2.34.1

[RFC 10/15] drm/i915: Move vbt firmware load into intel_bios_init

[Radhakrishna Sripada]

Grouping various vbt load options, move vbt load from firmware option
from opregion vbt load function to bios init.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 47 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_opregion.c | 45 ------------------
 2 files changed, 46 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 5d2a56df029d..711ae963ed7a 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -25,6 +25,8 @@
  *
  */
 
+#include <linux/firmware.h>
+
 #include <drm/display/drm_dp_helper.h>
 #include <drm/display/drm_dsc_helper.h>
 #include <drm/drm_edid.h>
@@ -2947,6 +2949,47 @@ bool intel_bios_is_valid_vbt(const void *buf, size_t size)
 	return vbt;
 }
 
+static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
+{
+	struct intel_vbt *vbt = &dev_priv->display.vbt;
+	const struct firmware *fw = NULL;
+	const char *name = dev_priv->display.params.vbt_firmware;
+	int ret;
+
+	if (!name || !*name)
+		return -ENOENT;
+
+	ret = request_firmware(&fw, name, dev_priv->drm.dev);
+	if (ret) {
+		drm_err(&dev_priv->drm,
+			"Requesting VBT firmware \"%s\" failed (%d)\n",
+			name, ret);
+		return ret;
+	}
+
+	if (intel_bios_is_valid_vbt(fw->data, fw->size)) {
+		vbt->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL);
+		if (vbt->vbt_firmware) {
+			drm_dbg_kms(&dev_priv->drm,
+				    "Found valid VBT firmware \"%s\"\n", name);
+			vbt->vbt = vbt->vbt_firmware;
+			vbt->vbt_size = fw->size;
+			vbt->type = I915_VBT_FIRMWARE;
+			ret = 0;
+		} else {
+			ret = -ENOMEM;
+		}
+	} else {
+		drm_dbg_kms(&dev_priv->drm, "Invalid VBT firmware \"%s\"\n",
+			    name);
+		ret = -EINVAL;
+	}
+
+	release_firmware(fw);
+
+	return ret;
+}
+
 static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset)
 {
 	intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, offset);
@@ -3106,7 +3149,9 @@ void intel_bios_init(struct drm_i915_private *i915)
 
 	init_vbt_defaults(i915);
 
-	if (opregion->asls)
+	intel_load_vbt_firmware(i915);
+
+	if (!vbt->vbt && opregion->asls)
 		intel_load_opregion_vbt(i915, opregion, vbt);
 	/*
 	 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index 5ff6466548a3..32875f0e89bd 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -27,7 +27,6 @@
 
 #include <linux/acpi.h>
 #include <linux/dmi.h>
-#include <linux/firmware.h>
 #include <acpi/video.h>
 
 #include <drm/drm_edid.h>
@@ -837,47 +836,6 @@ static const struct dmi_system_id intel_no_opregion_vbt[] = {
 	{ }
 };
 
-static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
-{
-	struct intel_vbt *vbt = &dev_priv->display.vbt;
-	const struct firmware *fw = NULL;
-	const char *name = dev_priv->display.params.vbt_firmware;
-	int ret;
-
-	if (!name || !*name)
-		return -ENOENT;
-
-	ret = request_firmware(&fw, name, dev_priv->drm.dev);
-	if (ret) {
-		drm_err(&dev_priv->drm,
-			"Requesting VBT firmware \"%s\" failed (%d)\n",
-			name, ret);
-		return ret;
-	}
-
-	if (intel_bios_is_valid_vbt(fw->data, fw->size)) {
-		vbt->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL);
-		if (vbt->vbt_firmware) {
-			drm_dbg_kms(&dev_priv->drm,
-				    "Found valid VBT firmware \"%s\"\n", name);
-			vbt->vbt = vbt->vbt_firmware;
-			vbt->vbt_size = fw->size;
-			vbt->type = I915_VBT_FIRMWARE;
-			ret = 0;
-		} else {
-			ret = -ENOMEM;
-		}
-	} else {
-		drm_dbg_kms(&dev_priv->drm, "Invalid VBT firmware \"%s\"\n",
-			    name);
-		ret = -EINVAL;
-	}
-
-	release_firmware(fw);
-
-	return ret;
-}
-
 void intel_load_opregion_vbt(struct drm_i915_private *i915,
 			     struct intel_opregion *opregion,
 			     struct intel_vbt *vbt)
@@ -886,9 +844,6 @@ void intel_load_opregion_vbt(struct drm_i915_private *i915,
 	u32 vbt_size;
 	void *base = opregion->header;
 
-	if (intel_load_vbt_firmware(i915) == 0)
-		return;
-
 	if (dmi_check_system(intel_no_opregion_vbt))
 		return;
 
-- 
2.34.1

[RFC 11/15] drm/i915: Make oprom_get_vbt operate on intel_vbt

[Radhakrishna Sripada]

Pass newly created intel_vbt to oprom_get_vbt to standardize
the signature and naming. vbt_header explicitly called out within
the body to avoid confusing with intel_vbt.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 32 +++++++++++------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 711ae963ed7a..31183ac36c57 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3051,17 +3051,18 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
 	return NULL;
 }
 
-static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
+static void oprom_get_vbt(struct drm_i915_private *i915,
+			  struct intel_vbt *vbt)
 {
 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
 	void __iomem *p = NULL, *oprom;
-	struct vbt_header *vbt;
+	struct vbt_header *header;
 	u16 vbt_size;
 	size_t i, size;
 
 	oprom = pci_map_rom(pdev, &size);
 	if (!oprom)
-		return NULL;
+		return;
 
 	/* Scour memory looking for the VBT signature. */
 	for (i = 0; i + 4 < size; i += 4) {
@@ -3089,30 +3090,31 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
 	}
 
 	/* The rest will be validated by intel_bios_is_valid_vbt() */
-	vbt = kmalloc(vbt_size, GFP_KERNEL);
-	if (!vbt)
+	header = kmalloc(vbt_size, GFP_KERNEL);
+	if (!header)
 		goto err_unmap_oprom;
 
-	memcpy_fromio(vbt, p, vbt_size);
+	memcpy_fromio(header, p, vbt_size);
 
-	if (!intel_bios_is_valid_vbt(vbt, vbt_size))
+	if (!intel_bios_is_valid_vbt(header, vbt_size))
 		goto err_free_vbt;
 
 	pci_unmap_rom(pdev, oprom);
 
-	i915->display.vbt.vbt = vbt;
-	i915->display.vbt.vbt_size = vbt_size;
-	i915->display.vbt.type = I915_VBT_OPROM;
+	vbt->vbt = header;
+	vbt->vbt_size = vbt_size;
+	vbt->type = I915_VBT_OPROM;
 	drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
 
-	return vbt;
+	return;
 
 err_free_vbt:
 	kfree(vbt);
 err_unmap_oprom:
 	pci_unmap_rom(pdev, oprom);
+	vbt->vbt = NULL;
 
-	return NULL;
+	return;
 }
 
 /**
@@ -3162,10 +3164,8 @@ void intel_bios_init(struct drm_i915_private *i915)
 		vbt->vbt = oprom_vbt;
 	}
 
-	if (!vbt->vbt) {
-		oprom_vbt = oprom_get_vbt(i915);
-		vbt->vbt = oprom_vbt;
-	}
+	if (!vbt->vbt)
+		oprom_get_vbt(i915, vbt);
 
 	if (!vbt->vbt)
 		goto out;
-- 
2.34.1

[RFC 12/15] drm/i915: Make spi_oprom_get_vbt operate on intel_vbt

[Radhakrishna Sripada]

intel_vbt newly introduced, should be used to cache in the vbt
read from spi. Pass intel_vbt to spi read variant to cache intel_vbt
for future reference.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 32 +++++++++++------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 31183ac36c57..5a06879d6825 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2997,13 +2997,14 @@ static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset)
 	return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER);
 }
 
-static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
+static void spi_oprom_get_vbt(struct drm_i915_private *i915,
+			      struct intel_vbt *vbt)
 {
 	u32 count, data, found, store = 0;
 	u32 static_region, oprom_offset;
 	u32 oprom_size = 0x200000;
 	u16 vbt_size;
-	u32 *vbt;
+	u32 *header;
 
 	static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
 	static_region &= OPTIONROM_SPI_REGIONID_MASK;
@@ -3028,27 +3029,29 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
 				  found + offsetof(struct vbt_header, vbt_size));
 	vbt_size &= 0xffff;
 
-	vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
-	if (!vbt)
+	header = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
+	if (!header)
 		goto err_not_found;
 
 	for (count = 0; count < vbt_size; count += 4)
-		*(vbt + store++) = intel_spi_read(&i915->uncore, found + count);
+		*(header + store++) = intel_spi_read(&i915->uncore, found + count);
 
-	if (!intel_bios_is_valid_vbt(vbt, vbt_size))
+	if (!intel_bios_is_valid_vbt(header, vbt_size))
 		goto err_free_vbt;
 
-	i915->display.vbt.vbt = vbt;
-	i915->display.vbt.vbt_size = vbt_size;
-	i915->display.vbt.type = I915_VBT_SPI;
+	vbt->vbt = header;
+	vbt->vbt_size = vbt_size;
+	vbt->type = I915_VBT_SPI;
 	drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
 
-	return (struct vbt_header *)vbt;
+	return;
 
 err_free_vbt:
 	kfree(vbt);
 err_not_found:
-	return NULL;
+	vbt->vbt = NULL;
+
+	return;
 }
 
 static void oprom_get_vbt(struct drm_i915_private *i915,
@@ -3129,7 +3132,6 @@ void intel_bios_init(struct drm_i915_private *i915)
 {
 	struct intel_vbt *vbt = &i915->display.vbt;
 	struct intel_opregion *opregion = &i915->display.opregion;
-	struct vbt_header *oprom_vbt = NULL;
 	struct vbt_header *header = NULL;
 	const struct bdb_header *bdb;
 	const char * const vbt_type[] = {
@@ -3159,10 +3161,8 @@ void intel_bios_init(struct drm_i915_private *i915)
 	 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
 	 * PCI mapping
 	 */
-	if (!vbt->vbt && IS_DGFX(i915)) {
-		oprom_vbt = spi_oprom_get_vbt(i915);
-		vbt->vbt = oprom_vbt;
-	}
+	if (!vbt->vbt && IS_DGFX(i915))
+		spi_oprom_get_vbt(i915, vbt);
 
 	if (!vbt->vbt)
 		oprom_get_vbt(i915, vbt);
-- 
2.34.1

[RFC 13/15] drm/i915: Make intel_load_vbt_firmware operate on intel_vbt

[Radhakrishna Sripada]

intel_vbt will be used to cache the vbt read from firmware. Make
vbt firmware read variant operate on intel_vbt to cache the fw for
future reference.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 5a06879d6825..1b5cc3416d77 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2949,9 +2949,9 @@ bool intel_bios_is_valid_vbt(const void *buf, size_t size)
 	return vbt;
 }
 
-static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
+static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv,
+				   struct intel_vbt *vbt)
 {
-	struct intel_vbt *vbt = &dev_priv->display.vbt;
 	const struct firmware *fw = NULL;
 	const char *name = dev_priv->display.params.vbt_firmware;
 	int ret;
@@ -3153,7 +3153,7 @@ void intel_bios_init(struct drm_i915_private *i915)
 
 	init_vbt_defaults(i915);
 
-	intel_load_vbt_firmware(i915);
+	intel_load_vbt_firmware(i915, vbt);
 
 	if (!vbt->vbt && opregion->asls)
 		intel_load_opregion_vbt(i915, opregion, vbt);
-- 
2.34.1

[RFC 14/15] drm/i915: Kill reduntant vbt_firmware from intel_vbt

[Radhakrishna Sripada]

vbt_firmware was used to cache the vbt read from firmware. With
introduction of intel_vbt, vbt field is used to cache the firmware read
from different sources making vbt_firmware field redundant. Kill this
field to simplify intel_vbt structure.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c         | 9 +++------
 drivers/gpu/drm/i915/display/intel_display_core.h | 1 -
 2 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 1b5cc3416d77..135a2d5d50b8 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2968,11 +2968,10 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv,
 	}
 
 	if (intel_bios_is_valid_vbt(fw->data, fw->size)) {
-		vbt->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL);
-		if (vbt->vbt_firmware) {
+		vbt->vbt = kmemdup(fw->data, fw->size, GFP_KERNEL);
+		if (vbt->vbt) {
 			drm_dbg_kms(&dev_priv->drm,
 				    "Found valid VBT firmware \"%s\"\n", name);
-			vbt->vbt = vbt->vbt_firmware;
 			vbt->vbt_size = fw->size;
 			vbt->type = I915_VBT_FIRMWARE;
 			ret = 0;
@@ -3273,12 +3272,10 @@ void intel_bios_driver_remove(struct drm_i915_private *i915)
 	switch (vbt->type) {
 	case I915_VBT_SPI:
 	case I915_VBT_OPROM:
+	case I915_VBT_FIRMWARE:
 		kfree(vbt->vbt);
 		vbt->type = I915_VBT_NONE;
 		break;
-	case I915_VBT_FIRMWARE:
-		kfree(vbt->vbt_firmware);
-		fallthrough;
 	case I915_VBT_OPREGION:
 		vbt->vbt = NULL;
 		vbt->type = I915_VBT_NONE;
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 4807edc88f81..cdc6e30ba6a6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -233,7 +233,6 @@ struct intel_vbt_data {
 };
 
 struct intel_vbt {
-	void *vbt_firmware;
 	const void *vbt;
 	u32 vbt_size;
 	enum {
-- 
2.34.1

[RFC 15/15] drm/i915: Use vbt type to determine its validity

[Radhakrishna Sripada]

We depend on a non null vbt field in intel_vbt to determine
if a vbt is read from its source. This may not be foolproof
hence rely on vbt->type to determine if vbt is read from a source.
Note that this does not determine the validity of read vbt.

Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 135a2d5d50b8..0938c9ec8fbe 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3119,6 +3119,11 @@ static void oprom_get_vbt(struct drm_i915_private *i915,
 	return;
 }
 
+static inline bool is_empty_vbt(struct intel_vbt *vbt)
+{
+	return vbt && vbt->type == I915_VBT_NONE;
+}
+
 /**
  * intel_bios_init - find VBT and initialize settings from the BIOS
  * @i915: i915 device instance
@@ -3154,19 +3159,19 @@ void intel_bios_init(struct drm_i915_private *i915)
 
 	intel_load_vbt_firmware(i915, vbt);
 
-	if (!vbt->vbt && opregion->asls)
+	if (is_empty_vbt(vbt) && opregion->asls)
 		intel_load_opregion_vbt(i915, opregion, vbt);
 	/*
 	 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
 	 * PCI mapping
 	 */
-	if (!vbt->vbt && IS_DGFX(i915))
+	if (is_empty_vbt(vbt) && IS_DGFX(i915))
 		spi_oprom_get_vbt(i915, vbt);
 
-	if (!vbt->vbt)
+	if (is_empty_vbt(vbt))
 		oprom_get_vbt(i915, vbt);
 
-	if (!vbt->vbt)
+	if (is_empty_vbt(vbt))
 		goto out;
 
 	header = (struct vbt_header *)vbt->vbt;
-- 
2.34.1

✗ Fi.CI.SPARSE: warning for VBT read Cleanup

[Patchwork]

== Series Details ==

Series: VBT read Cleanup
URL   : https://patchwork.freedesktop.org/series/128341/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ Fi.CI.BAT: success for VBT read Cleanup

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4410 bytes --]

== Series Details ==

Series: VBT read Cleanup
URL   : https://patchwork.freedesktop.org/series/128341/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14098 -> Patchwork_128341v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/index.html

Participating hosts (35 -> 34)
------------------------------

  Additional (1): fi-pnv-d510 
  Missing    (2): bat-mtlp-8 fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_128341v1:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-2:
    - {bat-dg2-14}:       [PASS][1] -> [FAIL][2] +3 other tests fail
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/bat-dg2-14/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-2.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/bat-dg2-14/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-2.html

  
Known issues
------------

  Here are the changes found in Patchwork_128341v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_lmem_swapping@basic:
    - fi-pnv-d510:        NOTRUN -> [SKIP][3] ([fdo#109271]) +31 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/fi-pnv-d510/igt@gem_lmem_swapping@basic.html

  * igt@i915_suspend@basic-s3-without-i915:
    - bat-mtlp-6:         NOTRUN -> [SKIP][4] ([i915#6645])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/bat-mtlp-6/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - bat-mtlp-6:         NOTRUN -> [SKIP][5] ([i915#9792])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/bat-mtlp-6/igt@kms_pipe_crc_basic@suspend-read-crc.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@ring_submission:
    - bat-mtlp-6:         [INCOMPLETE][6] ([i915#10036]) -> [PASS][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/bat-mtlp-6/igt@i915_selftest@live@ring_submission.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/bat-mtlp-6/igt@i915_selftest@live@ring_submission.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#10036]: https://gitlab.freedesktop.org/drm/intel/issues/10036
  [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
  [i915#9792]: https://gitlab.freedesktop.org/drm/intel/issues/9792


Build changes
-------------

  * Linux: CI_DRM_14098 -> Patchwork_128341v1

  CI-20190529: 20190529
  CI_DRM_14098: 33069fe3dece485caa21cc0870afec427877b105 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7663: b5eca7b97430309e320874594feaeaa8e770e25e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128341v1: 33069fe3dece485caa21cc0870afec427877b105 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

57b127808526 drm/i915: Use vbt type to determine its validity
d157c2531ee3 drm/i915: Kill reduntant vbt_firmware from intel_vbt
63da8ed54264 drm/i915: Make intel_load_vbt_firmware operate on intel_vbt
2e2b5a3e48cc drm/i915: Make spi_oprom_get_vbt operate on intel_vbt
f3c33f622902 drm/i915: Make oprom_get_vbt operate on intel_vbt
592e9d12ed49 drm/i915: Move vbt firmware load into intel_bios_init
c54a8068a6f0 drm/i915: Move vbt load from opregion to bios init
66ac0be54be4 drm/i915: Make intel_bios_init operate on intel_vbt
df822f8b1b87 drm/i915: Collate vbt cleanup for different types
460fb513a3b3 drm/i915: Classify vbt type based on its residence
9c2264a82760 drm/i915: Init vbt fields when read from oprom/spi
0e5e07ba3d4b drm/i915: Extract opregion vbt capture to its own function
8a2ca9604fb4 drm/i915: Cache opregion asls pointer
83e8e5de9d45 drm/i915: Move vbt fields from opregion to its own structure
cfd9df25ec72 drm/i915: Extract display->vbt_data to a new vbt structure

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/index.html

[-- Attachment #2: Type: text/html, Size: 5227 bytes --]

✗ Fi.CI.IGT: failure for VBT read Cleanup

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 82900 bytes --]

== Series Details ==

Series: VBT read Cleanup
URL   : https://patchwork.freedesktop.org/series/128341/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14098_full -> Patchwork_128341v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_128341v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128341v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (8 -> 9)
------------------------------

  Additional (1): pig-kbl-iris 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_128341v1_full:

### IGT changes ###

#### Possible regressions ####

  * igt@dmabuf@all-tests@dma_fence_chain:
    - shard-glk:          NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-glk6/igt@dmabuf@all-tests@dma_fence_chain.html

  * igt@gem_eio@unwedge-stress:
    - shard-mtlp:         [PASS][2] -> [ABORT][3] +1 other test abort
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-mtlp-8/igt@gem_eio@unwedge-stress.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-4/igt@gem_eio@unwedge-stress.html

  * igt@kms_frontbuffer_tracking@plane-fbc-rte:
    - shard-dg2:          NOTRUN -> [SKIP][4] +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@kms_frontbuffer_tracking@plane-fbc-rte.html

  

### Piglit changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_exec_suspend@basic-s3@smem:
    - pig-kbl-iris:       NOTRUN -> [{DMESG-WARN}][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/pig-kbl-iris/igt@gem_exec_suspend@basic-s3@smem.html

  
Known issues
------------

  Here are the changes found in Patchwork_128341v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-dg2:          NOTRUN -> [SKIP][6] ([i915#8411]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@device_reset@cold-reset-bound:
    - shard-mtlp:         NOTRUN -> [SKIP][7] ([i915#7701])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@device_reset@cold-reset-bound.html
    - shard-rkl:          NOTRUN -> [SKIP][8] ([i915#7701])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-7/igt@device_reset@cold-reset-bound.html

  * igt@device_reset@unbind-cold-reset-rebind:
    - shard-dg1:          NOTRUN -> [SKIP][9] ([i915#7701])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@device_reset@unbind-cold-reset-rebind.html

  * igt@drm_fdinfo@busy-idle-check-all@ccs3:
    - shard-dg2:          NOTRUN -> [SKIP][10] ([i915#8414]) +29 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@drm_fdinfo@busy-idle-check-all@ccs3.html

  * igt@drm_fdinfo@isolation@vecs0:
    - shard-dg1:          NOTRUN -> [SKIP][11] ([i915#8414]) +4 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@drm_fdinfo@isolation@vecs0.html

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
    - shard-rkl:          [PASS][12] -> [FAIL][13] ([i915#7742])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-rkl-4/igt@drm_fdinfo@most-busy-check-all@rcs0.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-6/igt@drm_fdinfo@most-busy-check-all@rcs0.html

  * igt@gem_basic@multigpu-create-close:
    - shard-dg2:          NOTRUN -> [SKIP][14] ([i915#7697])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@gem_basic@multigpu-create-close.html

  * igt@gem_busy@semaphore:
    - shard-dg2:          NOTRUN -> [SKIP][15] ([i915#3936])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@gem_busy@semaphore.html

  * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0:
    - shard-dg2:          [PASS][16] -> [INCOMPLETE][17] ([i915#7297])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-dg2-11/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-6/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
    - shard-tglu:         NOTRUN -> [SKIP][18] ([i915#6335])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@gem_create@create-ext-cpu-access-sanity-check.html

  * igt@gem_create@create-ext-set-pat:
    - shard-dg2:          NOTRUN -> [SKIP][19] ([i915#8562])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@gem_create@create-ext-set-pat.html

  * igt@gem_ctx_persistence@heartbeat-close:
    - shard-dg2:          NOTRUN -> [SKIP][20] ([i915#8555])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@gem_ctx_persistence@heartbeat-close.html

  * igt@gem_ctx_persistence@legacy-engines-mixed-process:
    - shard-snb:          NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#1099])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-snb5/igt@gem_ctx_persistence@legacy-engines-mixed-process.html

  * igt@gem_ctx_sseu@engines:
    - shard-mtlp:         NOTRUN -> [SKIP][22] ([i915#280])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@gem_ctx_sseu@engines.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-dg2:          NOTRUN -> [SKIP][23] ([i915#280])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_eio@hibernate:
    - shard-dg2:          [PASS][24] -> [ABORT][25] ([i915#7975] / [i915#8213])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-dg2-11/igt@gem_eio@hibernate.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-1/igt@gem_eio@hibernate.html

  * igt@gem_exec_balancer@bonded-pair:
    - shard-dg2:          NOTRUN -> [SKIP][26] ([i915#4771])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@gem_exec_balancer@bonded-pair.html

  * igt@gem_exec_balancer@bonded-true-hang:
    - shard-dg2:          NOTRUN -> [SKIP][27] ([i915#4812])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@gem_exec_balancer@bonded-true-hang.html

  * igt@gem_exec_balancer@parallel-out-fence:
    - shard-rkl:          NOTRUN -> [SKIP][28] ([i915#4525]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-7/igt@gem_exec_balancer@parallel-out-fence.html

  * igt@gem_exec_capture@many-4k-zero:
    - shard-glk:          NOTRUN -> [FAIL][29] ([i915#9606])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-glk7/igt@gem_exec_capture@many-4k-zero.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          NOTRUN -> [FAIL][30] ([i915#2846])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-glk4/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-flow:
    - shard-dg2:          NOTRUN -> [SKIP][31] ([i915#3539] / [i915#4852])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@gem_exec_fair@basic-flow.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
    - shard-glk:          NOTRUN -> [FAIL][32] ([i915#2842])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-glk8/igt@gem_exec_fair@basic-none-vip@rcs0.html

  * igt@gem_exec_fair@basic-pace:
    - shard-dg2:          NOTRUN -> [SKIP][33] ([i915#3539])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@gem_exec_fair@basic-pace.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-tglu:         [PASS][34] -> [FAIL][35] ([i915#2842])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-tglu-5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-5/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-rkl:          [PASS][36] -> [FAIL][37] ([i915#2842]) +2 other tests fail
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-rkl-4/igt@gem_exec_fair@basic-pace@vecs0.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-6/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_exec_flush@basic-wb-pro-default:
    - shard-dg1:          NOTRUN -> [SKIP][38] ([i915#3539] / [i915#4852])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gem_exec_flush@basic-wb-pro-default.html

  * igt@gem_exec_reloc@basic-gtt-active:
    - shard-dg1:          NOTRUN -> [SKIP][39] ([i915#3281]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gem_exec_reloc@basic-gtt-active.html

  * igt@gem_exec_reloc@basic-softpin:
    - shard-rkl:          NOTRUN -> [SKIP][40] ([i915#3281]) +4 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@gem_exec_reloc@basic-softpin.html

  * igt@gem_exec_reloc@basic-write-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][41] ([i915#3281]) +5 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@gem_exec_reloc@basic-write-gtt.html

  * igt@gem_exec_reloc@basic-write-wc-active:
    - shard-mtlp:         NOTRUN -> [SKIP][42] ([i915#3281]) +4 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@gem_exec_reloc@basic-write-wc-active.html

  * igt@gem_exec_schedule@reorder-wide:
    - shard-dg1:          NOTRUN -> [SKIP][43] ([i915#4812]) +1 other test skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gem_exec_schedule@reorder-wide.html

  * igt@gem_fence_thrash@bo-copy:
    - shard-mtlp:         NOTRUN -> [SKIP][44] ([i915#4860])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@gem_fence_thrash@bo-copy.html

  * igt@gem_fenced_exec_thrash@no-spare-fences:
    - shard-dg1:          NOTRUN -> [SKIP][45] ([i915#4860]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gem_fenced_exec_thrash@no-spare-fences.html

  * igt@gem_lmem_swapping@heavy-verify-random:
    - shard-rkl:          NOTRUN -> [SKIP][46] ([i915#4613]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@gem_lmem_swapping@heavy-verify-random.html

  * igt@gem_lmem_swapping@parallel-random-verify-ccs:
    - shard-glk:          NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#4613]) +2 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-glk6/igt@gem_lmem_swapping@parallel-random-verify-ccs.html

  * igt@gem_lmem_swapping@verify:
    - shard-mtlp:         NOTRUN -> [SKIP][48] ([i915#4613])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@gem_lmem_swapping@verify.html

  * igt@gem_mmap_gtt@basic-small-bo:
    - shard-dg1:          NOTRUN -> [SKIP][49] ([i915#4077]) +3 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gem_mmap_gtt@basic-small-bo.html

  * igt@gem_mmap_gtt@fault-concurrent-x:
    - shard-dg2:          NOTRUN -> [SKIP][50] ([i915#4077]) +11 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@gem_mmap_gtt@fault-concurrent-x.html

  * igt@gem_mmap_gtt@fault-concurrent-y:
    - shard-mtlp:         NOTRUN -> [SKIP][51] ([i915#4077]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@gem_mmap_gtt@fault-concurrent-y.html

  * igt@gem_mmap_wc@bad-size:
    - shard-dg2:          NOTRUN -> [SKIP][52] ([i915#4083]) +5 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@gem_mmap_wc@bad-size.html

  * igt@gem_partial_pwrite_pread@reads:
    - shard-dg2:          NOTRUN -> [SKIP][53] ([i915#3282]) +5 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@gem_partial_pwrite_pread@reads.html

  * igt@gem_pread@exhaustion:
    - shard-glk:          NOTRUN -> [INCOMPLETE][54] ([i915#10042])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-glk8/igt@gem_pread@exhaustion.html

  * igt@gem_pxp@create-regular-context-1:
    - shard-mtlp:         NOTRUN -> [SKIP][55] ([i915#4270]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@gem_pxp@create-regular-context-1.html

  * igt@gem_pxp@reject-modify-context-protection-off-2:
    - shard-dg2:          NOTRUN -> [SKIP][56] ([i915#4270]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@gem_pxp@reject-modify-context-protection-off-2.html

  * igt@gem_pxp@verify-pxp-stale-ctx-execution:
    - shard-dg1:          NOTRUN -> [SKIP][57] ([i915#4270]) +2 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gem_pxp@verify-pxp-stale-ctx-execution.html
    - shard-tglu:         NOTRUN -> [SKIP][58] ([i915#4270]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@gem_pxp@verify-pxp-stale-ctx-execution.html

  * igt@gem_readwrite@new-obj:
    - shard-mtlp:         NOTRUN -> [SKIP][59] ([i915#3282]) +1 other test skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@gem_readwrite@new-obj.html

  * igt@gem_readwrite@read-bad-handle:
    - shard-dg1:          NOTRUN -> [SKIP][60] ([i915#3282])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gem_readwrite@read-bad-handle.html

  * igt@gem_render_copy@y-tiled-to-vebox-yf-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][61] ([i915#5190]) +11 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-7/igt@gem_render_copy@y-tiled-to-vebox-yf-tiled.html
    - shard-mtlp:         NOTRUN -> [SKIP][62] ([i915#8428])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@gem_render_copy@y-tiled-to-vebox-yf-tiled.html

  * igt@gem_set_tiling_vs_blt@tiled-to-tiled:
    - shard-rkl:          NOTRUN -> [SKIP][63] ([i915#8411])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html

  * igt@gem_set_tiling_vs_pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][64] ([i915#4079])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gem_set_tiling_vs_pwrite.html

  * igt@gem_tiled_pread_basic:
    - shard-dg2:          NOTRUN -> [SKIP][65] ([i915#4079])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@gem_tiled_pread_basic.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-glk:          NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#3323])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-glk7/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@invalid-mmap-offset-unsync:
    - shard-tglu:         NOTRUN -> [SKIP][67] ([i915#3297])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-dg2:          NOTRUN -> [SKIP][68] ([i915#3297] / [i915#4880]) +1 other test skip
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@unsync-unmap-after-close:
    - shard-dg1:          NOTRUN -> [SKIP][69] ([i915#3297]) +1 other test skip
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gem_userptr_blits@unsync-unmap-after-close.html

  * igt@gen3_mixed_blits:
    - shard-dg1:          NOTRUN -> [SKIP][70] ([fdo#109289])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gen3_mixed_blits.html

  * igt@gen3_render_linear_blits:
    - shard-rkl:          NOTRUN -> [SKIP][71] ([fdo#109289])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@gen3_render_linear_blits.html

  * igt@gen9_exec_parse@basic-rejected:
    - shard-tglu:         NOTRUN -> [SKIP][72] ([i915#2527] / [i915#2856]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@gen9_exec_parse@basic-rejected.html

  * igt@gen9_exec_parse@batch-invalid-length:
    - shard-dg1:          NOTRUN -> [SKIP][73] ([i915#2527]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@gen9_exec_parse@batch-invalid-length.html

  * igt@gen9_exec_parse@bb-start-param:
    - shard-dg2:          NOTRUN -> [SKIP][74] ([i915#2856]) +2 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@gen9_exec_parse@bb-start-param.html

  * igt@gen9_exec_parse@secure-batches:
    - shard-rkl:          NOTRUN -> [SKIP][75] ([i915#2527])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@gen9_exec_parse@secure-batches.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-mtlp:         NOTRUN -> [SKIP][76] ([i915#2856])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@gen9_exec_parse@shadow-peek.html

  * igt@i915_module_load@load:
    - shard-dg1:          NOTRUN -> [SKIP][77] ([i915#6227])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@i915_module_load@load.html
    - shard-tglu:         NOTRUN -> [SKIP][78] ([i915#6227])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@i915_module_load@load.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-tglu:         [PASS][79] -> [INCOMPLETE][80] ([i915#9200])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-tglu-5/igt@i915_module_load@reload-with-fault-injection.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@i915_module_load@reload-with-fault-injection.html
    - shard-dg2:          NOTRUN -> [ABORT][81] ([i915#9820])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-7/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pipe_stress@stress-xrgb8888-ytiled:
    - shard-dg2:          NOTRUN -> [SKIP][82] ([i915#7091])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@i915_pm_freq_api@freq-reset:
    - shard-tglu:         NOTRUN -> [SKIP][83] ([i915#8399])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@i915_pm_freq_api@freq-reset.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0:
    - shard-tglu:         NOTRUN -> [WARN][84] ([i915#2681]) +3 other tests warn
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0:
    - shard-dg1:          [PASS][85] -> [FAIL][86] ([i915#3591])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html

  * igt@i915_pm_rps@thresholds-idle-park@gt0:
    - shard-dg2:          NOTRUN -> [SKIP][87] ([i915#8925])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@i915_pm_rps@thresholds-idle-park@gt0.html

  * igt@i915_pm_rps@thresholds@gt0:
    - shard-dg1:          NOTRUN -> [SKIP][88] ([i915#8925])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@i915_pm_rps@thresholds@gt0.html

  * igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling:
    - shard-dg1:          NOTRUN -> [SKIP][89] ([i915#4212])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][90] ([i915#4212])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_addfb_basic@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@bo-too-small-due-to-tiling:
    - shard-mtlp:         NOTRUN -> [SKIP][91] ([i915#4212])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_addfb_basic@bo-too-small-due-to-tiling.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-y-rc-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][92] ([i915#8709]) +7 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-12/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-y-rc-ccs.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-y-rc-ccs-cc:
    - shard-rkl:          NOTRUN -> [SKIP][93] ([i915#8709]) +3 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-6/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-y-rc-ccs-cc.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-2-4-mc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][94] ([i915#8709]) +11 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-2-4-mc-ccs.html

  * igt@kms_async_flips@crc@pipe-b-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [FAIL][95] ([i915#8247]) +3 other tests fail
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@kms_async_flips@crc@pipe-b-hdmi-a-1.html

  * igt@kms_async_flips@crc@pipe-b-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [FAIL][96] ([i915#8247]) +3 other tests fail
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-13/igt@kms_async_flips@crc@pipe-b-hdmi-a-3.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-tglu:         NOTRUN -> [SKIP][97] ([i915#1769] / [i915#3555])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-tglu:         NOTRUN -> [SKIP][98] ([fdo#111615] / [i915#5286]) +3 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-dg1:          NOTRUN -> [SKIP][99] ([i915#4538] / [i915#5286]) +3 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-mtlp:         [PASS][100] -> [FAIL][101] ([i915#5138])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
    - shard-rkl:          NOTRUN -> [SKIP][102] ([i915#5286])
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-rkl:          NOTRUN -> [SKIP][103] ([fdo#111614] / [i915#3638])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-7/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-dg2:          NOTRUN -> [SKIP][104] ([fdo#111614]) +4 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-mtlp:         NOTRUN -> [SKIP][105] ([fdo#111614]) +1 other test skip
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-90:
    - shard-dg1:          NOTRUN -> [SKIP][106] ([i915#3638])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-tglu:         [PASS][107] -> [FAIL][108] ([i915#3743])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-tglu-5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
    - shard-dg1:          NOTRUN -> [SKIP][109] ([i915#4538]) +1 other test skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_big_fb@yf-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
    - shard-dg2:          NOTRUN -> [SKIP][110] ([i915#4538] / [i915#5190]) +6 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-rkl:          NOTRUN -> [SKIP][111] ([fdo#110723]) +1 other test skip
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-mtlp:         NOTRUN -> [SKIP][112] ([fdo#111615]) +1 other test skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-tglu:         NOTRUN -> [SKIP][113] ([fdo#111615]) +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_ccs@pipe-a-bad-aux-stride-y-tiled-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][114] ([i915#5354] / [i915#6095]) +9 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_ccs@pipe-a-bad-aux-stride-y-tiled-ccs.html

  * igt@kms_ccs@pipe-a-crc-primary-basic-y-tiled-gen12-rc-ccs:
    - shard-snb:          NOTRUN -> [SKIP][115] ([fdo#109271]) +8 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-snb5/igt@kms_ccs@pipe-a-crc-primary-basic-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@pipe-b-bad-rotation-90-y-tiled-gen12-mc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][116] ([i915#5354]) +76 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_ccs@pipe-b-bad-rotation-90-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@pipe-b-missing-ccs-buffer-y-tiled-gen12-mc-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][117] ([i915#5354] / [i915#6095]) +10 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-7/igt@kms_ccs@pipe-b-missing-ccs-buffer-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y-tiled-gen12-mc-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][118] ([i915#5354] / [i915#6095]) +25 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_ccs@pipe-b-random-ccs-data-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@pipe-c-missing-ccs-buffer-4-tiled-mtl-mc-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][119] ([i915#5354] / [i915#6095]) +16 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_ccs@pipe-c-missing-ccs-buffer-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@pipe-d-crc-primary-basic-y-tiled-gen12-rc-ccs-cc:
    - shard-rkl:          NOTRUN -> [SKIP][120] ([i915#5354]) +9 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_ccs@pipe-d-crc-primary-basic-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_cdclk@plane-scaling:
    - shard-rkl:          NOTRUN -> [SKIP][121] ([i915#3742])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_cdclk@plane-scaling.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-dg1:          NOTRUN -> [SKIP][122] ([fdo#111827]) +1 other test skip
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_color@ctm-max:
    - shard-mtlp:         NOTRUN -> [SKIP][123] ([fdo#111827])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_chamelium_color@ctm-max.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-tglu:         NOTRUN -> [SKIP][124] ([fdo#111827])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_color@degamma:
    - shard-rkl:          NOTRUN -> [SKIP][125] ([fdo#111827]) +1 other test skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_frames@hdmi-cmp-planar-formats:
    - shard-dg2:          NOTRUN -> [SKIP][126] ([i915#7828]) +9 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@kms_chamelium_frames@hdmi-cmp-planar-formats.html

  * igt@kms_chamelium_frames@hdmi-crc-multiple:
    - shard-rkl:          NOTRUN -> [SKIP][127] ([i915#7828]) +1 other test skip
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_chamelium_frames@hdmi-crc-multiple.html

  * igt@kms_chamelium_hpd@hdmi-hpd:
    - shard-dg1:          NOTRUN -> [SKIP][128] ([i915#7828]) +1 other test skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_chamelium_hpd@hdmi-hpd.html
    - shard-tglu:         NOTRUN -> [SKIP][129] ([i915#7828])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_chamelium_hpd@hdmi-hpd.html

  * igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
    - shard-mtlp:         NOTRUN -> [SKIP][130] ([i915#7828]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-mtlp:         NOTRUN -> [SKIP][131] ([i915#3299])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_content_protection@dp-mst-type-1.html
    - shard-dg2:          NOTRUN -> [SKIP][132] ([i915#3299])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-7/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@legacy@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [TIMEOUT][133] ([i915#7173])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@kms_content_protection@legacy@pipe-a-dp-4.html

  * igt@kms_content_protection@lic:
    - shard-dg2:          NOTRUN -> [SKIP][134] ([i915#7118])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@kms_content_protection@lic.html

  * igt@kms_content_protection@type1:
    - shard-rkl:          NOTRUN -> [SKIP][135] ([i915#7118])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-offscreen-32x10:
    - shard-dg1:          NOTRUN -> [SKIP][136] ([i915#3555])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_cursor_crc@cursor-offscreen-32x10.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-dg1:          NOTRUN -> [SKIP][137] ([i915#3359])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_cursor_crc@cursor-random-512x170.html
    - shard-tglu:         NOTRUN -> [SKIP][138] ([i915#3359])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-mtlp:         NOTRUN -> [SKIP][139] ([i915#3555] / [i915#8814])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x32:
    - shard-dg2:          NOTRUN -> [SKIP][140] ([i915#3555]) +10 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-tglu:         NOTRUN -> [SKIP][141] ([fdo#109274]) +1 other test skip
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - shard-mtlp:         NOTRUN -> [SKIP][142] ([i915#4213])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][143] ([i915#4103])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-toggle:
    - shard-mtlp:         NOTRUN -> [SKIP][144] ([i915#9809])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
    - shard-dg2:          NOTRUN -> [SKIP][145] ([fdo#109274] / [i915#5354]) +5 other tests skip
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-dg1:          NOTRUN -> [SKIP][146] ([fdo#111767] / [fdo#111825])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
    - shard-tglu:         NOTRUN -> [SKIP][147] ([fdo#109274] / [fdo#111767])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-dg1:          NOTRUN -> [SKIP][148] ([fdo#111825]) +17 other tests skip
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-dg2:          NOTRUN -> [SKIP][149] ([i915#9833])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][150] ([i915#9723])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-13/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-3.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-rkl:          NOTRUN -> [SKIP][151] ([i915#3555]) +3 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_display_modes@extended-mode-basic@pipe-a-hdmi-a-1-pipe-b-vga-1:
    - shard-snb:          NOTRUN -> [FAIL][152] ([i915#9841]) +3 other tests fail
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-snb7/igt@kms_display_modes@extended-mode-basic@pipe-a-hdmi-a-1-pipe-b-vga-1.html

  * igt@kms_display_modes@mst-extended-mode-negative:
    - shard-dg1:          NOTRUN -> [SKIP][153] ([i915#8588])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_display_modes@mst-extended-mode-negative.html
    - shard-tglu:         NOTRUN -> [SKIP][154] ([i915#8588])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_display_modes@mst-extended-mode-negative.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][155] ([i915#3804])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_draw_crc@draw-method-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][156] ([i915#3555] / [i915#8812])
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_draw_crc@draw-method-mmap-gtt.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-dg2:          NOTRUN -> [SKIP][157] ([i915#3840] / [i915#9688])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-dg2:          NOTRUN -> [SKIP][158] ([i915#3840])
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-dg2:          NOTRUN -> [SKIP][159] ([i915#3555] / [i915#3840])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-dg1:          NOTRUN -> [SKIP][160] ([i915#3840] / [i915#9053])
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_feature_discovery@display-2x:
    - shard-mtlp:         NOTRUN -> [SKIP][161] ([i915#1839])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_feature_discovery@display-2x.html

  * igt@kms_feature_discovery@psr2:
    - shard-dg1:          NOTRUN -> [SKIP][162] ([i915#658])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_feature_discovery@psr2.html
    - shard-tglu:         NOTRUN -> [SKIP][163] ([i915#658])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_feature_discovery@psr2.html

  * igt@kms_fence_pin_leak:
    - shard-dg2:          NOTRUN -> [SKIP][164] ([i915#4881])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@kms_fence_pin_leak.html

  * igt@kms_flip@2x-absolute-wf_vblank:
    - shard-dg2:          NOTRUN -> [SKIP][165] ([fdo#109274]) +6 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_flip@2x-absolute-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-absolute-wf_vblank:
    - shard-mtlp:         NOTRUN -> [SKIP][166] ([i915#3637]) +1 other test skip
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][167] ([fdo#109274] / [fdo#111767]) +1 other test skip
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-rmfb:
    - shard-dg1:          NOTRUN -> [SKIP][168] ([fdo#111825] / [i915#9934]) +1 other test skip
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_flip@2x-flip-vs-rmfb.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-tglu:         NOTRUN -> [SKIP][169] ([fdo#109274] / [i915#3637]) +3 other tests skip
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][170] ([i915#2587] / [i915#2672]) +1 other test skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][171] ([i915#2672]) +2 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][172] ([i915#2672])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][173] ([i915#2672] / [i915#3555])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
    - shard-dg1:          NOTRUN -> [SKIP][174] ([i915#2587] / [i915#2672]) +1 other test skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][175] ([i915#2672] / [i915#3555])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_force_connector_basic@force-load-detect:
    - shard-dg1:          NOTRUN -> [SKIP][176] ([fdo#109285])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
    - shard-dg2:          [PASS][177] -> [FAIL][178] ([i915#6880])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen.html
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-rkl:          NOTRUN -> [SKIP][179] ([fdo#111825] / [i915#1825]) +15 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-snb:          [PASS][180] -> [SKIP][181] ([fdo#109271]) +12 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite:
    - shard-dg2:          NOTRUN -> [SKIP][182] ([i915#3458]) +16 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][183] ([fdo#111825]) +4 other tests skip
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html
    - shard-mtlp:         NOTRUN -> [SKIP][184] ([i915#8708])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][185] ([i915#1825]) +7 other tests skip
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][186] ([i915#8708]) +19 other tests skip
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-dg1:          NOTRUN -> [SKIP][187] ([i915#8708]) +6 other tests skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite:
    - shard-tglu:         NOTRUN -> [SKIP][188] ([fdo#110189]) +5 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt:
    - shard-glk:          NOTRUN -> [SKIP][189] ([fdo#109271]) +232 other tests skip
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-glk3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-rte:
    - shard-rkl:          NOTRUN -> [SKIP][190] ([i915#3023]) +7 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-1p-rte.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-move:
    - shard-tglu:         NOTRUN -> [SKIP][191] ([fdo#109280]) +9 other tests skip
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu:
    - shard-dg1:          NOTRUN -> [SKIP][192] ([i915#3458]) +5 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][193] ([i915#3555] / [i915#8228])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_hdr@bpc-switch-suspend.html
    - shard-dg1:          NOTRUN -> [SKIP][194] ([i915#3555] / [i915#8228])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-dg2:          NOTRUN -> [SKIP][195] ([i915#3555] / [i915#8228]) +1 other test skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-6/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_panel_fitting@legacy:
    - shard-dg2:          NOTRUN -> [SKIP][196] ([i915#6301])
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@kms_panel_fitting@legacy.html

  * igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
    - shard-dg2:          NOTRUN -> [SKIP][197] ([fdo#109289]) +1 other test skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html

  * igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c:
    - shard-mtlp:         NOTRUN -> [SKIP][198] ([fdo#109289])
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c.html

  * igt@kms_plane_lowres@tiling-4@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][199] ([i915#3582]) +3 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_plane_lowres@tiling-4@pipe-b-edp-1.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [FAIL][200] ([i915#8292])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@kms_plane_scaling@intel-max-src-size@pipe-a-dp-4.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [FAIL][201] ([i915#8292])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-19/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][202] ([i915#9423]) +7 other tests skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-dp-4.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][203] ([i915#9423]) +11 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-19/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a-hdmi-a-4.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][204] ([i915#5176] / [i915#9423]) +1 other test skip
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-5/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][205] ([i915#5176] / [i915#9423]) +3 other tests skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-12/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-3.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][206] ([i915#9423]) +7 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-1/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-a-hdmi-a-2.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][207] ([i915#5235] / [i915#9423]) +15 other tests skip
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-2.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][208] ([i915#5235]) +11 other tests skip
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-1/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-2.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][209] ([i915#5235]) +2 other tests skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-a-edp-1.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][210] ([i915#3555] / [i915#5235])
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d-edp-1.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][211] ([i915#5235]) +15 other tests skip
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-dg1:          NOTRUN -> [SKIP][212] ([i915#5354])
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-dg2:          NOTRUN -> [SKIP][213] ([i915#9685]) +2 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][214] ([i915#3361])
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_pm_dc@dc6-dpms.html
    - shard-tglu:         [PASS][215] -> [FAIL][216] ([i915#9295])
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-tglu-9/igt@kms_pm_dc@dc6-dpms.html
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-5/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-tglu:         [PASS][217] -> [SKIP][218] ([i915#4281])
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-tglu-4/igt@kms_pm_dc@dc9-dpms.html
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-3/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-tglu:         NOTRUN -> [SKIP][219] ([i915#9519])
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg2:          NOTRUN -> [SKIP][220] ([i915#9519]) +1 other test skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@kms_pm_rpm@modeset-lpsp.html
    - shard-rkl:          [PASS][221] -> [SKIP][222] ([i915#9519]) +2 other tests skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp.html
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-6/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-rkl:          NOTRUN -> [SKIP][223] ([i915#9519])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-7/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
    - shard-mtlp:         NOTRUN -> [SKIP][224] ([i915#9519])
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_prime@d3hot:
    - shard-dg1:          NOTRUN -> [SKIP][225] ([i915#6524])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_prime@d3hot.html
    - shard-tglu:         NOTRUN -> [SKIP][226] ([i915#6524])
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_prime@d3hot.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
    - shard-rkl:          NOTRUN -> [SKIP][227] ([i915#9683])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-dg2:          NOTRUN -> [SKIP][228] ([i915#9683]) +3 other tests skip
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-tglu:         NOTRUN -> [SKIP][229] ([fdo#109642] / [fdo#111068] / [i915#9683])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-rkl:          NOTRUN -> [SKIP][230] ([fdo#111068] / [i915#9683])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_rotation_crc@exhaust-fences:
    - shard-dg2:          NOTRUN -> [SKIP][231] ([i915#4235])
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@kms_rotation_crc@exhaust-fences.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-dg1:          NOTRUN -> [SKIP][232] ([fdo#111615] / [i915#5289])
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-mtlp:         NOTRUN -> [SKIP][233] ([i915#3555] / [i915#8809])
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-tglu:         NOTRUN -> [SKIP][234] ([fdo#109309])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_tv_load_detect@load-detect.html
    - shard-dg1:          NOTRUN -> [SKIP][235] ([fdo#109309])
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-dg2:          NOTRUN -> [SKIP][236] ([i915#9906])
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@flip-dpms:
    - shard-mtlp:         NOTRUN -> [SKIP][237] ([i915#3555] / [i915#8808])
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@kms_vrr@flip-dpms.html

  * igt@kms_writeback@writeback-check-output:
    - shard-rkl:          NOTRUN -> [SKIP][238] ([i915#2437])
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@kms_writeback@writeback-check-output.html
    - shard-glk:          NOTRUN -> [SKIP][239] ([fdo#109271] / [i915#2437])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-glk4/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-tglu:         NOTRUN -> [SKIP][240] ([i915#2437])
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_writeback@writeback-fb-id.html
    - shard-dg1:          NOTRUN -> [SKIP][241] ([i915#2437])
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-fb-id-xrgb2101010:
    - shard-tglu:         NOTRUN -> [SKIP][242] ([i915#2437] / [i915#9412])
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@kms_writeback@writeback-fb-id-xrgb2101010.html

  * igt@perf@gen8-unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][243] ([i915#2436])
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@perf@gen8-unprivileged-single-ctx-counters.html

  * igt@perf@per-context-mode-unprivileged:
    - shard-dg1:          NOTRUN -> [SKIP][244] ([fdo#109289] / [i915#2433])
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@perf@per-context-mode-unprivileged.html
    - shard-tglu:         NOTRUN -> [SKIP][245] ([fdo#109289])
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@perf@per-context-mode-unprivileged.html

  * igt@perf_pmu@busy-double-start@rcs0:
    - shard-dg1:          NOTRUN -> [FAIL][246] ([i915#4349])
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@perf_pmu@busy-double-start@rcs0.html

  * igt@perf_pmu@cpu-hotplug:
    - shard-dg2:          NOTRUN -> [SKIP][247] ([i915#8850])
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@perf_pmu@cpu-hotplug.html

  * igt@prime_udl:
    - shard-dg2:          NOTRUN -> [SKIP][248] ([fdo#109291])
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@prime_udl.html

  * igt@prime_vgem@basic-write:
    - shard-dg2:          NOTRUN -> [SKIP][249] ([i915#3291] / [i915#3708]) +1 other test skip
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@prime_vgem@basic-write.html

  * igt@prime_vgem@fence-write-hang:
    - shard-rkl:          NOTRUN -> [SKIP][250] ([fdo#109295] / [i915#3708])
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@prime_vgem@fence-write-hang.html

  * igt@sriov_basic@bind-unbind-vf:
    - shard-dg2:          NOTRUN -> [SKIP][251] ([i915#9917]) +1 other test skip
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-5/igt@sriov_basic@bind-unbind-vf.html

  * igt@v3d/v3d_perfmon@get-values-invalid-pad:
    - shard-mtlp:         NOTRUN -> [SKIP][252] ([i915#2575]) +2 other tests skip
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@v3d/v3d_perfmon@get-values-invalid-pad.html

  * igt@v3d/v3d_submit_cl@bad-multisync-out-sync:
    - shard-dg2:          NOTRUN -> [SKIP][253] ([i915#2575]) +11 other tests skip
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-2/igt@v3d/v3d_submit_cl@bad-multisync-out-sync.html

  * igt@v3d/v3d_submit_cl@multisync-out-syncs:
    - shard-tglu:         NOTRUN -> [SKIP][254] ([fdo#109315] / [i915#2575]) +3 other tests skip
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@v3d/v3d_submit_cl@multisync-out-syncs.html

  * igt@v3d/v3d_submit_cl@simple-flush-cache:
    - shard-rkl:          NOTRUN -> [SKIP][255] ([fdo#109315]) +2 other tests skip
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-7/igt@v3d/v3d_submit_cl@simple-flush-cache.html

  * igt@v3d/v3d_submit_csd@bad-perfmon:
    - shard-dg1:          NOTRUN -> [SKIP][256] ([i915#2575]) +4 other tests skip
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@v3d/v3d_submit_csd@bad-perfmon.html

  * igt@vc4/vc4_perfmon@create-perfmon-invalid-events:
    - shard-rkl:          NOTRUN -> [SKIP][257] ([i915#7711]) +2 other tests skip
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-4/igt@vc4/vc4_perfmon@create-perfmon-invalid-events.html

  * igt@vc4/vc4_perfmon@get-values-invalid-pointer:
    - shard-tglu:         NOTRUN -> [SKIP][258] ([i915#2575]) +2 other tests skip
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@vc4/vc4_perfmon@get-values-invalid-pointer.html

  * igt@vc4/vc4_perfmon@get-values-valid-perfmon:
    - shard-dg2:          NOTRUN -> [SKIP][259] ([i915#7711]) +6 other tests skip
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-10/igt@vc4/vc4_perfmon@get-values-valid-perfmon.html

  * igt@vc4/vc4_wait_bo@bad-pad:
    - shard-dg1:          NOTRUN -> [SKIP][260] ([i915#7711]) +4 other tests skip
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-16/igt@vc4/vc4_wait_bo@bad-pad.html

  * igt@vc4/vc4_wait_seqno@bad-seqno-0ns:
    - shard-mtlp:         NOTRUN -> [SKIP][261] ([i915#7711]) +2 other tests skip
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-2/igt@vc4/vc4_wait_seqno@bad-seqno-0ns.html

  
#### Possible fixes ####

  * igt@fbdev@pan:
    - shard-snb:          [FAIL][262] ([i915#4435]) -> [PASS][263]
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-snb7/igt@fbdev@pan.html
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-snb4/igt@fbdev@pan.html

  * igt@gem_eio@in-flight-suspend:
    - shard-tglu:         [ABORT][264] -> [PASS][265]
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-tglu-9/igt@gem_eio@in-flight-suspend.html
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-4/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglu:         [FAIL][266] ([i915#2842]) -> [PASS][267]
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-tglu-3/igt@gem_exec_fair@basic-none-share@rcs0.html
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-5/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [FAIL][268] ([i915#2842]) -> [PASS][269]
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_suspend@basic-s4-devices@smem:
    - shard-tglu:         [ABORT][270] ([i915#7975] / [i915#8213]) -> [PASS][271]
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices@smem.html
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@gem_exec_suspend@basic-s4-devices@smem.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0:
    - shard-dg1:          [FAIL][272] ([i915#3591]) -> [PASS][273] +1 other test pass
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-mtlp:         [FAIL][274] ([i915#5138]) -> [PASS][275]
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-tglu:         [FAIL][276] ([i915#3743]) -> [PASS][277] +1 other test pass
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-tglu-7/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu:
    - shard-dg2:          [FAIL][278] ([i915#6880]) -> [PASS][279]
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu.html
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
    - shard-snb:          [SKIP][280] ([fdo#109271]) -> [PASS][281] +11 other tests pass
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-rkl:          [SKIP][282] ([i915#9519]) -> [PASS][283] +2 other tests pass
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-rkl-6/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1:
    - shard-tglu:         [FAIL][284] ([i915#9196]) -> [PASS][285]
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-tglu-5/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-tglu-2/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html

  
#### Warnings ####

  * igt@device_reset@unbind-reset-rebind:
    - shard-dg1:          [ABORT][286] ([i915#9618]) -> [INCOMPLETE][287] ([i915#9408] / [i915#9618])
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-dg1-13/igt@device_reset@unbind-reset-rebind.html
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-19/igt@device_reset@unbind-reset-rebind.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg1:          [INCOMPLETE][288] ([i915#9820] / [i915#9849]) -> [ABORT][289] ([i915#9820])
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-dg1-12/igt@i915_module_load@reload-with-fault-injection.html
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-13/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg1:          [SKIP][290] ([i915#9433]) -> [SKIP][291] ([i915#9424])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-dg1-13/igt@kms_content_protection@mei-interface.html
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-dg1-15/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@type1:
    - shard-snb:          [SKIP][292] ([fdo#109271]) -> [INCOMPLETE][293] ([i915#8816])
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-snb5/igt@kms_content_protection@type1.html
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-snb7/igt@kms_content_protection@type1.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-rkl:          [SKIP][294] ([i915#4816]) -> [SKIP][295] ([i915#4070] / [i915#4816])
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14098/shard-rkl-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/shard-rkl-2/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#10042]: https://gitlab.freedesktop.org/drm/intel/issues/10042
  [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
  [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3582]: https://gitlab.freedesktop.org/drm/intel/issues/3582
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
  [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
  [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
  [i915#4435]: https://gitlab.freedesktop.org/drm/intel/issues/4435
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
  [i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
  [i915#7091]: https://gitlab.freedesktop.org/drm/intel/issues/7091
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
  [i915#7297]: https://gitlab.freedesktop.org/drm/intel/issues/7297
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
  [i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247
  [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
  [i915#8399]: https://gitlab.freedesktop.org/drm/intel/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
  [i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
  [i915#8562]: https://gitlab.freedesktop.org/drm/intel/issues/8562
  [i915#8588]: https://gitlab.freedesktop.org/drm/intel/issues/8588
  [i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709
  [i915#8808]: https://gitlab.freedesktop.org/drm/intel/issues/8808
  [i915#8809]: https://gitlab.freedesktop.org/drm/intel/issues/8809
  [i915#8812]: https://gitlab.freedesktop.org/drm/intel/issues/8812
  [i915#8814]: https://gitlab.freedesktop.org/drm/intel/issues/8814
  [i915#8816]: https://gitlab.freedesktop.org/drm/intel/issues/8816
  [i915#8850]: https://gitlab.freedesktop.org/drm/intel/issues/8850
  [i915#8925]: https://gitlab.freedesktop.org/drm/intel/issues/8925
  [i915#9053]: https://gitlab.freedesktop.org/drm/intel/issues/9053
  [i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
  [i915#9200]: https://gitlab.freedesktop.org/drm/intel/issues/9200
  [i915#9295]: https://gitlab.freedesktop.org/drm/intel/issues/9295
  [i915#9408]: https://gitlab.freedesktop.org/drm/intel/issues/9408
  [i915#9412]: https://gitlab.freedesktop.org/drm/intel/issues/9412
  [i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/intel/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/intel/issues/9433
  [i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
  [i915#9606]: https://gitlab.freedesktop.org/drm/intel/issues/9606
  [i915#9618]: https://gitlab.freedesktop.org/drm/intel/issues/9618
  [i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
  [i915#9683]: https://gitlab.freedesktop.org/drm/intel/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/intel/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/intel/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/intel/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/intel/issues/9732
  [i915#9808]: https://gitlab.freedesktop.org/drm/intel/issues/9808
  [i915#9809]: https://gitlab.freedesktop.org/drm/intel/issues/9809
  [i915#9820]: https://gitlab.freedesktop.org/drm/intel/issues/9820
  [i915#9833]: https://gitlab.freedesktop.org/drm/intel/issues/9833
  [i915#9841]: https://gitlab.freedesktop.org/drm/intel/issues/9841
  [i915#9849]: https://gitlab.freedesktop.org/drm/intel/issues/9849
  [i915#9906]: https://gitlab.freedesktop.org/drm/intel/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/intel/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/intel/issues/9934


Build changes
-------------

  * Linux: CI_DRM_14098 -> Patchwork_128341v1
  * Piglit: None -> piglit_4509

  CI-20190529: 20190529
  CI_DRM_14098: 33069fe3dece485caa21cc0870afec427877b105 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7663: b5eca7b97430309e320874594feaeaa8e770e25e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128341v1: 33069fe3dece485caa21cc0870afec427877b105 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128341v1/index.html

[-- Attachment #2: Type: text/html, Size: 100692 bytes --]

Re: [RFC 00/15] VBT read Cleanup

[Jani Nikula]

On Mon, 08 Jan 2024, Radhakrishna Sripada <radhakrishna.sripada@intel.com> wrote:
> This series does the VBT read cleanup. The series introduces new
> intel_vbt structure to cache and collate vbt related info. Vbt
> read from different sources viz. firmware/opregion/spi/oprom
> needs to be cached for debug purposes and handled accordingly
> during cleanup.

Mixed feelings. I think the goal is good, not convinced by the
implementation.

First, i915->display.vbt.data.foo is just too much depth. It was
borderline too much before, but now it definitely is.

Second, whichever place allocates some stuff should also be responsible
for freeing it. I don't like the idea that you have different places
allocating and then you have a combined cleanup to take care of the
alternatives.

Possibly the first thing to do would be to put intel_bios_init() in
charge of picking the VBT. Stop looking at opregion directly in
intel_bios.c, and instead abstract that away. Also move firmware EDID
loading there. Move debugfs there. Etc.

The opregion code could still figure out what its idea of VBT is, but
intel_bios_init() would the place to ask opregion code about it only if
needed.


BR,
Jani.





>
> Radhakrishna Sripada (15):
>   drm/i915: Extract display->vbt_data to a new vbt structure
>   drm/i915: Move vbt fields from opregion to its own structure
>   drm/i915: Cache opregion asls pointer
>   drm/i915: Extract opregion vbt capture to its own function
>   drm/i915: Init vbt fields when read from oprom/spi
>   drm/i915: Classify vbt type based on its residence
>   drm/i915: Collate vbt cleanup for different types
>   drm/i915: Make intel_bios_init operate on intel_vbt
>   drm/i915: Move vbt load from opregion to bios init
>   drm/i915: Move vbt firmware load into intel_bios_init
>   drm/i915: Make oprom_get_vbt operate on intel_vbt
>   drm/i915: Make spi_oprom_get_vbt operate on intel_vbt
>   drm/i915: Make intel_load_vbt_firmware operate on intel_vbt
>   drm/i915: Kill reduntant vbt_firmware from intel_vbt
>   drm/i915: Use vbt type to determine its validity
>
>  drivers/gpu/drm/i915/display/intel_bios.c     | 348 +++++++++++-------
>  drivers/gpu/drm/i915/display/intel_crt.c      |   2 +-
>  drivers/gpu/drm/i915/display/intel_display.c  |  10 +-
>  .../gpu/drm/i915/display/intel_display_core.h |  16 +-
>  .../drm/i915/display/intel_display_debugfs.c  |   6 +-
>  drivers/gpu/drm/i915/display/intel_dp.c       |   2 +-
>  drivers/gpu/drm/i915/display/intel_dpll.c     |  16 +-
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  19 +-
>  drivers/gpu/drm/i915/display/intel_dsi.c      |   2 +-
>  drivers/gpu/drm/i915/display/intel_lvds.c     |   4 +-
>  drivers/gpu/drm/i915/display/intel_opregion.c | 165 ++++-----
>  drivers/gpu/drm/i915/display/intel_opregion.h |  13 +-
>  drivers/gpu/drm/i915/display/intel_panel.c    |   2 +-
>  .../gpu/drm/i915/display/intel_pch_refclk.c   |   2 +-
>  drivers/gpu/drm/i915/display/intel_sdvo.c     |  18 +-
>  drivers/gpu/drm/i915/intel_clock_gating.c     |   2 +-
>  16 files changed, 348 insertions(+), 279 deletions(-)

-- 
Jani Nikula, Intel

RE: [RFC 00/15] VBT read Cleanup

[Sripada, Radhakrishna]

Hi Jani,

> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Wednesday, January 10, 2024 4:34 AM
> To: Sripada, Radhakrishna <radhakrishna.sripada@intel.com>; intel-
> gfx@lists.freedesktop.org
> Subject: Re: [RFC 00/15] VBT read Cleanup
> 
> On Mon, 08 Jan 2024, Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> wrote:
> > This series does the VBT read cleanup. The series introduces new
> > intel_vbt structure to cache and collate vbt related info. Vbt
> > read from different sources viz. firmware/opregion/spi/oprom
> > needs to be cached for debug purposes and handled accordingly
> > during cleanup.
> 
> Mixed feelings. I think the goal is good, not convinced by the
> implementation.
> 
> First, i915->display.vbt.data.foo is just too much depth. It was
> borderline too much before, but now it definitely is.
Sure. I will cache and store the parsed fields under the same structure.

> 
> Second, whichever place allocates some stuff should also be responsible
> for freeing it. I don't like the idea that you have different places
> allocating and then you have a combined cleanup to take care of the
> alternatives.
Previously, allocations were happening under spi_get_oprom_vbt and
oprom_get_vbt but the de-allocation was happening immediately in
intel_bios_init. Because we need to cache vbt we will have to free the memory
only during driver remove phase.

I understand what you are suggesting here, the problem that I was thinking is
how to determine the sizes without extra reads, your series does it in a clean way.
 Will use that way to peek into the presence of vbt's in spi and oprom.

> 
> Possibly the first thing to do would be to put intel_bios_init() in
> charge of picking the VBT. Stop looking at opregion directly in
> intel_bios.c, and instead abstract that away. Also move firmware EDID
> loading there. Move debugfs there. Etc.
I think you meant firmware vbt here. I will rebase my work on top of your work
of opregion cleanup and come with a new series.

Thanks,
Radhakrishna(RK) Sripada
> 
> The opregion code could still figure out what its idea of VBT is, but
> intel_bios_init() would the place to ask opregion code about it only if
> needed.
> 
> 
> BR,
> Jani.
> 
> 
> 
> 
> 
> >
> > Radhakrishna Sripada (15):
> >   drm/i915: Extract display->vbt_data to a new vbt structure
> >   drm/i915: Move vbt fields from opregion to its own structure
> >   drm/i915: Cache opregion asls pointer
> >   drm/i915: Extract opregion vbt capture to its own function
> >   drm/i915: Init vbt fields when read from oprom/spi
> >   drm/i915: Classify vbt type based on its residence
> >   drm/i915: Collate vbt cleanup for different types
> >   drm/i915: Make intel_bios_init operate on intel_vbt
> >   drm/i915: Move vbt load from opregion to bios init
> >   drm/i915: Move vbt firmware load into intel_bios_init
> >   drm/i915: Make oprom_get_vbt operate on intel_vbt
> >   drm/i915: Make spi_oprom_get_vbt operate on intel_vbt
> >   drm/i915: Make intel_load_vbt_firmware operate on intel_vbt
> >   drm/i915: Kill reduntant vbt_firmware from intel_vbt
> >   drm/i915: Use vbt type to determine its validity
> >
> >  drivers/gpu/drm/i915/display/intel_bios.c     | 348 +++++++++++-------
> >  drivers/gpu/drm/i915/display/intel_crt.c      |   2 +-
> >  drivers/gpu/drm/i915/display/intel_display.c  |  10 +-
> >  .../gpu/drm/i915/display/intel_display_core.h |  16 +-
> >  .../drm/i915/display/intel_display_debugfs.c  |   6 +-
> >  drivers/gpu/drm/i915/display/intel_dp.c       |   2 +-
> >  drivers/gpu/drm/i915/display/intel_dpll.c     |  16 +-
> >  drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  19 +-
> >  drivers/gpu/drm/i915/display/intel_dsi.c      |   2 +-
> >  drivers/gpu/drm/i915/display/intel_lvds.c     |   4 +-
> >  drivers/gpu/drm/i915/display/intel_opregion.c | 165 ++++-----
> >  drivers/gpu/drm/i915/display/intel_opregion.h |  13 +-
> >  drivers/gpu/drm/i915/display/intel_panel.c    |   2 +-
> >  .../gpu/drm/i915/display/intel_pch_refclk.c   |   2 +-
> >  drivers/gpu/drm/i915/display/intel_sdvo.c     |  18 +-
> >  drivers/gpu/drm/i915/intel_clock_gating.c     |   2 +-
> >  16 files changed, 348 insertions(+), 279 deletions(-)
> 
> --
> Jani Nikula, Intel