* [Intel-gfx] [PATCH v2] drm/i915/display: Implement Wa_14015648006
@ 2023-01-04 9:02 Jouni Högander
2023-01-04 9:23 ` Jani Nikula
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Jouni Högander @ 2023-01-04 9:02 UTC (permalink / raw)
To: intel-gfx
Add 4th pipe and extend TGL Wa_16013835468 to support ADLP, MTL and
DG2 and all TGL steppings.
BSpec: 54369, 55378, 66624
v2:
- apply for PSR1 as well
- remove stepping information from comments
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 48 ++++++++++++++----------
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 29 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index d0d774219cc5..507f810d4a4a 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1112,6 +1112,8 @@ static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp)
return LATENCY_REPORTING_REMOVED_PIPE_B;
case PIPE_C:
return LATENCY_REPORTING_REMOVED_PIPE_C;
+ case PIPE_D:
+ return LATENCY_REPORTING_REMOVED_PIPE_D;
default:
MISSING_CASE(intel_dp->psr.pipe);
return 0;
@@ -1163,6 +1165,23 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
intel_dp->psr.psr2_sel_fetch_enabled ?
IGNORE_PSR2_HW_TRACKING : 0);
+ /*
+ * Wa_16013835468
+ * Wa_14015648006
+ */
+ if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
+ IS_DISPLAY_VER(dev_priv, 12, 13)) {
+ u16 vtotal, vblank;
+
+ vtotal = crtc_state->uapi.adjusted_mode.crtc_vtotal -
+ crtc_state->uapi.adjusted_mode.crtc_vdisplay;
+ vblank = crtc_state->uapi.adjusted_mode.crtc_vblank_end -
+ crtc_state->uapi.adjusted_mode.crtc_vblank_start;
+ if (vblank > vtotal)
+ intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0,
+ wa_16013835468_bit_get(intel_dp));
+ }
+
if (intel_dp->psr.psr2_enabled) {
if (DISPLAY_VER(dev_priv) == 9)
intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0,
@@ -1196,20 +1215,6 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
else if (IS_ALDERLAKE_P(dev_priv))
intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0,
CLKGATE_DIS_MISC_DMASC_GATING_DIS);
-
- /* Wa_16013835468:tgl[b0+], dg1 */
- if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) ||
- IS_DG1(dev_priv)) {
- u16 vtotal, vblank;
-
- vtotal = crtc_state->uapi.adjusted_mode.crtc_vtotal -
- crtc_state->uapi.adjusted_mode.crtc_vdisplay;
- vblank = crtc_state->uapi.adjusted_mode.crtc_vblank_end -
- crtc_state->uapi.adjusted_mode.crtc_vblank_start;
- if (vblank > vtotal)
- intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0,
- wa_16013835468_bit_get(intel_dp));
- }
}
}
@@ -1362,6 +1367,15 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
DIS_RAM_BYPASS_PSR2_MAN_TRACK, 0);
+ /*
+ * Wa_16013835468
+ * Wa_14015648006
+ */
+ if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
+ IS_DISPLAY_VER(dev_priv, 12, 13))
+ intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,
+ wa_16013835468_bit_get(intel_dp), 0);
+
if (intel_dp->psr.psr2_enabled) {
/* Wa_16011168373:adl-p */
if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
@@ -1377,12 +1391,6 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
else if (IS_ALDERLAKE_P(dev_priv))
intel_de_rmw(dev_priv, CLKGATE_DIS_MISC,
CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0);
-
- /* Wa_16013835468:tgl[b0+], dg1 */
- if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) ||
- IS_DG1(dev_priv))
- intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,
- wa_16013835468_bit_get(intel_dp), 0);
}
intel_snps_phy_update_psr_power_state(dev_priv, phy, false);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8b2cf980f323..b0b3b511e19f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5737,6 +5737,7 @@
#define RESET_PCH_HANDSHAKE_ENABLE REG_BIT(4)
#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430)
+#define LATENCY_REPORTING_REMOVED_PIPE_D REG_BIT(31)
#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30)
#define LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25)
#define LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24)
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915/display: Implement Wa_14015648006
2023-01-04 9:02 [Intel-gfx] [PATCH v2] drm/i915/display: Implement Wa_14015648006 Jouni Högander
@ 2023-01-04 9:23 ` Jani Nikula
2023-01-04 9:54 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Implement Wa_14015648006 (rev3) Patchwork
2023-01-04 21:19 ` [Intel-gfx] [PATCH v2] drm/i915/display: Implement Wa_14015648006 Matt Roper
2 siblings, 0 replies; 4+ messages in thread
From: Jani Nikula @ 2023-01-04 9:23 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Wed, 04 Jan 2023, Jouni Högander <jouni.hogander@intel.com> wrote:
> Add 4th pipe and extend TGL Wa_16013835468 to support ADLP, MTL and
> DG2 and all TGL steppings.
Please prefix the subject with "drm/i915/psr" instead of the overly
generic "display".
>
> BSpec: 54369, 55378, 66624
>
> v2:
> - apply for PSR1 as well
> - remove stepping information from comments
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
>
Nitpick, while at it, please no blank lines between tags.
Both of the above can be fixed while applying if there's no other reason
to resend the patch.
BR,
Jani.
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 48 ++++++++++++++----------
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 29 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index d0d774219cc5..507f810d4a4a 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1112,6 +1112,8 @@ static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp)
> return LATENCY_REPORTING_REMOVED_PIPE_B;
> case PIPE_C:
> return LATENCY_REPORTING_REMOVED_PIPE_C;
> + case PIPE_D:
> + return LATENCY_REPORTING_REMOVED_PIPE_D;
> default:
> MISSING_CASE(intel_dp->psr.pipe);
> return 0;
> @@ -1163,6 +1165,23 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
> intel_dp->psr.psr2_sel_fetch_enabled ?
> IGNORE_PSR2_HW_TRACKING : 0);
>
> + /*
> + * Wa_16013835468
> + * Wa_14015648006
> + */
> + if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
> + IS_DISPLAY_VER(dev_priv, 12, 13)) {
> + u16 vtotal, vblank;
> +
> + vtotal = crtc_state->uapi.adjusted_mode.crtc_vtotal -
> + crtc_state->uapi.adjusted_mode.crtc_vdisplay;
> + vblank = crtc_state->uapi.adjusted_mode.crtc_vblank_end -
> + crtc_state->uapi.adjusted_mode.crtc_vblank_start;
> + if (vblank > vtotal)
> + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0,
> + wa_16013835468_bit_get(intel_dp));
> + }
> +
> if (intel_dp->psr.psr2_enabled) {
> if (DISPLAY_VER(dev_priv) == 9)
> intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0,
> @@ -1196,20 +1215,6 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
> else if (IS_ALDERLAKE_P(dev_priv))
> intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0,
> CLKGATE_DIS_MISC_DMASC_GATING_DIS);
> -
> - /* Wa_16013835468:tgl[b0+], dg1 */
> - if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) ||
> - IS_DG1(dev_priv)) {
> - u16 vtotal, vblank;
> -
> - vtotal = crtc_state->uapi.adjusted_mode.crtc_vtotal -
> - crtc_state->uapi.adjusted_mode.crtc_vdisplay;
> - vblank = crtc_state->uapi.adjusted_mode.crtc_vblank_end -
> - crtc_state->uapi.adjusted_mode.crtc_vblank_start;
> - if (vblank > vtotal)
> - intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0,
> - wa_16013835468_bit_get(intel_dp));
> - }
> }
> }
>
> @@ -1362,6 +1367,15 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
> intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
> DIS_RAM_BYPASS_PSR2_MAN_TRACK, 0);
>
> + /*
> + * Wa_16013835468
> + * Wa_14015648006
> + */
> + if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
> + IS_DISPLAY_VER(dev_priv, 12, 13))
> + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,
> + wa_16013835468_bit_get(intel_dp), 0);
> +
> if (intel_dp->psr.psr2_enabled) {
> /* Wa_16011168373:adl-p */
> if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
> @@ -1377,12 +1391,6 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
> else if (IS_ALDERLAKE_P(dev_priv))
> intel_de_rmw(dev_priv, CLKGATE_DIS_MISC,
> CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0);
> -
> - /* Wa_16013835468:tgl[b0+], dg1 */
> - if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) ||
> - IS_DG1(dev_priv))
> - intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,
> - wa_16013835468_bit_get(intel_dp), 0);
> }
>
> intel_snps_phy_update_psr_power_state(dev_priv, phy, false);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8b2cf980f323..b0b3b511e19f 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5737,6 +5737,7 @@
> #define RESET_PCH_HANDSHAKE_ENABLE REG_BIT(4)
>
> #define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430)
> +#define LATENCY_REPORTING_REMOVED_PIPE_D REG_BIT(31)
> #define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30)
> #define LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25)
> #define LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24)
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Implement Wa_14015648006 (rev3)
2023-01-04 9:02 [Intel-gfx] [PATCH v2] drm/i915/display: Implement Wa_14015648006 Jouni Högander
2023-01-04 9:23 ` Jani Nikula
@ 2023-01-04 9:54 ` Patchwork
2023-01-04 21:19 ` [Intel-gfx] [PATCH v2] drm/i915/display: Implement Wa_14015648006 Matt Roper
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2023-01-04 9:54 UTC (permalink / raw)
To: Kahola, Mika; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 11407 bytes --]
== Series Details ==
Series: drm/i915/display: Implement Wa_14015648006 (rev3)
URL : https://patchwork.freedesktop.org/series/103518/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12541 -> Patchwork_103518v3
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_103518v3 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_103518v3, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/index.html
Participating hosts (42 -> 42)
------------------------------
Additional (2): fi-kbl-soraka fi-rkl-11600
Missing (2): bat-dg2-oem1 bat-atsm-1
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_103518v3:
### IGT changes ###
#### Possible regressions ####
* igt@debugfs_test@read_all_entries:
- fi-icl-u2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12541/fi-icl-u2/igt@debugfs_test@read_all_entries.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-icl-u2/igt@debugfs_test@read_all_entries.html
* igt@i915_selftest@live@guc:
- fi-kbl-soraka: NOTRUN -> [INCOMPLETE][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-kbl-soraka/igt@i915_selftest@live@guc.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_pm_rpm@basic-rte:
- {bat-adln-1}: [PASS][4] -> [DMESG-WARN][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12541/bat-adln-1/igt@i915_pm_rpm@basic-rte.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/bat-adln-1/igt@i915_pm_rpm@basic-rte.html
* igt@i915_selftest@live@hangcheck:
- {bat-rpls-1}: [PASS][6] -> [INCOMPLETE][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12541/bat-rpls-1/igt@i915_selftest@live@hangcheck.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/bat-rpls-1/igt@i915_selftest@live@hangcheck.html
Known issues
------------
Here are the changes found in Patchwork_103518v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- fi-rkl-11600: NOTRUN -> [SKIP][8] ([i915#7456])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@debugfs_test@basic-hwmon.html
* igt@gem_exec_gttfill@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][9] ([fdo#109271]) +7 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-kbl-soraka/igt@gem_exec_gttfill@basic.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#2190])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
- fi-rkl-11600: NOTRUN -> [SKIP][11] ([i915#2190])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4613]) +3 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html
- fi-rkl-11600: NOTRUN -> [SKIP][13] ([i915#4613]) +3 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@gem_lmem_swapping@basic.html
* igt@gem_tiled_pread_basic:
- fi-rkl-11600: NOTRUN -> [SKIP][14] ([i915#3282])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600: NOTRUN -> [SKIP][15] ([i915#7561])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][16] ([i915#5334])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][17] ([i915#1886])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600: NOTRUN -> [INCOMPLETE][18] ([i915#4817])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_chamelium@common-hpd-after-suspend:
- bat-dg1-6: NOTRUN -> [SKIP][19] ([fdo#111827])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/bat-dg1-6/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-edid-read:
- fi-rkl-11600: NOTRUN -> [SKIP][20] ([fdo#111827]) +7 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@kms_chamelium@hdmi-edid-read.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-soraka: NOTRUN -> [SKIP][21] ([fdo#109271] / [fdo#111827]) +7 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-kbl-soraka/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600: NOTRUN -> [SKIP][22] ([i915#4103])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-n3050: [PASS][23] -> [FAIL][24] ([i915#6298])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12541/fi-bsw-n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-bsw-n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600: NOTRUN -> [SKIP][25] ([fdo#109285] / [i915#4098])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_psr@primary_page_flip:
- fi-rkl-11600: NOTRUN -> [SKIP][26] ([i915#1072]) +3 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@kms_psr@primary_page_flip.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600: NOTRUN -> [SKIP][27] ([i915#3555] / [i915#4098])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-read:
- fi-rkl-11600: NOTRUN -> [SKIP][28] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-userptr:
- fi-rkl-11600: NOTRUN -> [SKIP][29] ([fdo#109295] / [i915#3301] / [i915#3708])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-rkl-11600/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-icl-u2: NOTRUN -> [FAIL][30] ([i915#4312])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/fi-icl-u2/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [INCOMPLETE][31] -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12541/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@slpc:
- bat-adlp-4: [DMESG-FAIL][33] ([i915#6367]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12541/bat-adlp-4/igt@i915_selftest@live@slpc.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/bat-adlp-4/igt@i915_selftest@live@slpc.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-1:
- {bat-adlp-9}: [DMESG-WARN][35] ([i915#2867]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12541/bat-adlp-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-1.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/bat-adlp-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7336]: https://gitlab.freedesktop.org/drm/intel/issues/7336
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
Build changes
-------------
* Linux: CI_DRM_12541 -> Patchwork_103518v3
CI-20190529: 20190529
CI_DRM_12541: b832866fa6063614b3637598aca19aee3bc3039f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7106: 8cce332bdc50d2b20d553d7a0221737f4399d031 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_103518v3: b832866fa6063614b3637598aca19aee3bc3039f @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
9c038cd4a34d drm/i915/display: Implement Wa_14015648006
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103518v3/index.html
[-- Attachment #2: Type: text/html, Size: 13245 bytes --]
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915/display: Implement Wa_14015648006
2023-01-04 9:02 [Intel-gfx] [PATCH v2] drm/i915/display: Implement Wa_14015648006 Jouni Högander
2023-01-04 9:23 ` Jani Nikula
2023-01-04 9:54 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Implement Wa_14015648006 (rev3) Patchwork
@ 2023-01-04 21:19 ` Matt Roper
2 siblings, 0 replies; 4+ messages in thread
From: Matt Roper @ 2023-01-04 21:19 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-gfx
On Wed, Jan 04, 2023 at 11:02:29AM +0200, Jouni Högander wrote:
> Add 4th pipe and extend TGL Wa_16013835468 to support ADLP, MTL and
> DG2 and all TGL steppings.
>
> BSpec: 54369, 55378, 66624
>
> v2:
> - apply for PSR1 as well
> - remove stepping information from comments
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
>
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 48 ++++++++++++++----------
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 29 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index d0d774219cc5..507f810d4a4a 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1112,6 +1112,8 @@ static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp)
> return LATENCY_REPORTING_REMOVED_PIPE_B;
> case PIPE_C:
> return LATENCY_REPORTING_REMOVED_PIPE_C;
> + case PIPE_D:
> + return LATENCY_REPORTING_REMOVED_PIPE_D;
> default:
> MISSING_CASE(intel_dp->psr.pipe);
> return 0;
> @@ -1163,6 +1165,23 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
> intel_dp->psr.psr2_sel_fetch_enabled ?
> IGNORE_PSR2_HW_TRACKING : 0);
>
> + /*
> + * Wa_16013835468
> + * Wa_14015648006
> + */
> + if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
> + IS_DISPLAY_VER(dev_priv, 12, 13)) {
> + u16 vtotal, vblank;
> +
> + vtotal = crtc_state->uapi.adjusted_mode.crtc_vtotal -
> + crtc_state->uapi.adjusted_mode.crtc_vdisplay;
> + vblank = crtc_state->uapi.adjusted_mode.crtc_vblank_end -
> + crtc_state->uapi.adjusted_mode.crtc_vblank_start;
> + if (vblank > vtotal)
> + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0,
> + wa_16013835468_bit_get(intel_dp));
> + }
> +
> if (intel_dp->psr.psr2_enabled) {
> if (DISPLAY_VER(dev_priv) == 9)
> intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0,
> @@ -1196,20 +1215,6 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
> else if (IS_ALDERLAKE_P(dev_priv))
> intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0,
> CLKGATE_DIS_MISC_DMASC_GATING_DIS);
> -
> - /* Wa_16013835468:tgl[b0+], dg1 */
> - if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) ||
> - IS_DG1(dev_priv)) {
> - u16 vtotal, vblank;
> -
> - vtotal = crtc_state->uapi.adjusted_mode.crtc_vtotal -
> - crtc_state->uapi.adjusted_mode.crtc_vdisplay;
> - vblank = crtc_state->uapi.adjusted_mode.crtc_vblank_end -
> - crtc_state->uapi.adjusted_mode.crtc_vblank_start;
> - if (vblank > vtotal)
> - intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0,
> - wa_16013835468_bit_get(intel_dp));
> - }
> }
> }
>
> @@ -1362,6 +1367,15 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
> intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
> DIS_RAM_BYPASS_PSR2_MAN_TRACK, 0);
>
> + /*
> + * Wa_16013835468
> + * Wa_14015648006
> + */
> + if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
> + IS_DISPLAY_VER(dev_priv, 12, 13))
> + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,
> + wa_16013835468_bit_get(intel_dp), 0);
> +
> if (intel_dp->psr.psr2_enabled) {
> /* Wa_16011168373:adl-p */
> if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
> @@ -1377,12 +1391,6 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
> else if (IS_ALDERLAKE_P(dev_priv))
> intel_de_rmw(dev_priv, CLKGATE_DIS_MISC,
> CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0);
> -
> - /* Wa_16013835468:tgl[b0+], dg1 */
> - if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) ||
> - IS_DG1(dev_priv))
> - intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,
> - wa_16013835468_bit_get(intel_dp), 0);
> }
>
> intel_snps_phy_update_psr_power_state(dev_priv, phy, false);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8b2cf980f323..b0b3b511e19f 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5737,6 +5737,7 @@
> #define RESET_PCH_HANDSHAKE_ENABLE REG_BIT(4)
>
> #define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430)
> +#define LATENCY_REPORTING_REMOVED_PIPE_D REG_BIT(31)
> #define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30)
> #define LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25)
> #define LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24)
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-01-04 21:19 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-01-04 9:02 [Intel-gfx] [PATCH v2] drm/i915/display: Implement Wa_14015648006 Jouni Högander
2023-01-04 9:23 ` Jani Nikula
2023-01-04 9:54 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Implement Wa_14015648006 (rev3) Patchwork
2023-01-04 21:19 ` [Intel-gfx] [PATCH v2] drm/i915/display: Implement Wa_14015648006 Matt Roper
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