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From: Marc Zyngier <maz@kernel.org>
To: Sunil Muthuswamy <sunilmut@microsoft.com>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
	"will@kernel.org" <will@kernel.org>,
	Michael Kelley <mikelley@microsoft.com>,
	Boqun Feng <Boqun.Feng@microsoft.com>,
	KY Srinivasan <kys@microsoft.com>, Arnd Bergmann <arnd@arndb.de>
Subject: Re: [EXTERNAL] Re: [RFC 1/1] irqchip/gic-v3-its: Add irq domain and chip for Direct LPI without ITS
Date: Thu, 05 Aug 2021 09:35:17 +0100	[thread overview]
Message-ID: <87wnp0b86y.wl-maz@kernel.org> (raw)
In-Reply-To: <MW4PR21MB2002860BAED850B2B52D6E2BC0F19@MW4PR21MB2002.namprd21.prod.outlook.com>

On Wed, 04 Aug 2021 21:10:43 +0100,
Sunil Muthuswamy <sunilmut@microsoft.com> wrote:
> 
> Thanks Marc and Robin for clarifying. I see and understand the point
> about having explicit MSI mappings in the firmware specification for
> Direct LPIs for generic hardware support.
> 
> Hey Mark

I assume this is for me?

> would you be willing to consider a scoped down implementation of GIC
> Direct LPI with just an IRQ chip implementation and no Direct LPI
> PCI-MSI IRQ chip.

Could you please clarify? If you are not implementing MSIs, how can a
device signal LPIs? At the end of the day, something has to write into
the RD, and it isn't going to happen by sheer magic.

> This will allow a MSI provider (such as Hyper-V vPCI) to provide a
> PCI-MSI IRQ chip on top of the Direct LPI IRQ chip and enable
> PCI-MSI scenarios, and avoid building in assumptions in other cases
> (like PCI) where firmware specification is not available.

I really don't get what you are suggesting. Could you please describe
what you have in mind?

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Sunil Muthuswamy <sunilmut@microsoft.com>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
	"will@kernel.org" <will@kernel.org>,
	Michael Kelley <mikelley@microsoft.com>,
	Boqun Feng <Boqun.Feng@microsoft.com>,
	KY Srinivasan <kys@microsoft.com>, Arnd Bergmann <arnd@arndb.de>
Subject: Re: [EXTERNAL] Re: [RFC 1/1] irqchip/gic-v3-its: Add irq domain and chip for Direct LPI without ITS
Date: Thu, 05 Aug 2021 09:35:17 +0100	[thread overview]
Message-ID: <87wnp0b86y.wl-maz@kernel.org> (raw)
In-Reply-To: <MW4PR21MB2002860BAED850B2B52D6E2BC0F19@MW4PR21MB2002.namprd21.prod.outlook.com>

On Wed, 04 Aug 2021 21:10:43 +0100,
Sunil Muthuswamy <sunilmut@microsoft.com> wrote:
> 
> Thanks Marc and Robin for clarifying. I see and understand the point
> about having explicit MSI mappings in the firmware specification for
> Direct LPIs for generic hardware support.
> 
> Hey Mark

I assume this is for me?

> would you be willing to consider a scoped down implementation of GIC
> Direct LPI with just an IRQ chip implementation and no Direct LPI
> PCI-MSI IRQ chip.

Could you please clarify? If you are not implementing MSIs, how can a
device signal LPIs? At the end of the day, something has to write into
the RD, and it isn't going to happen by sheer magic.

> This will allow a MSI provider (such as Hyper-V vPCI) to provide a
> PCI-MSI IRQ chip on top of the Direct LPI IRQ chip and enable
> PCI-MSI scenarios, and avoid building in assumptions in other cases
> (like PCI) where firmware specification is not available.

I really don't get what you are suggesting. Could you please describe
what you have in mind?

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2021-08-05  8:37 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-08 19:36 [RFC 1/1] irqchip/gic-v3-its: Add irq domain and chip for Direct LPI without ITS Sunil Muthuswamy
2021-07-08 19:36 ` Sunil Muthuswamy
2021-07-09  0:21 ` kernel test robot
2021-07-09  0:21 ` kernel test robot
2021-07-11 11:09 ` Marc Zyngier
2021-07-11 11:09   ` Marc Zyngier
2021-07-26 15:33   ` [EXTERNAL] " Sunil Muthuswamy
2021-07-26 15:33     ` Sunil Muthuswamy
2021-07-31  9:52     ` Marc Zyngier
2021-07-31  9:52       ` Marc Zyngier
2021-08-03  2:11       ` Sunil Muthuswamy
2021-08-03  2:11         ` Sunil Muthuswamy
2021-08-03  8:35         ` Robin Murphy
2021-08-03  8:35           ` Robin Murphy
2021-08-04  9:21           ` Marc Zyngier
2021-08-04  9:21             ` Marc Zyngier
2021-08-04 20:10             ` Sunil Muthuswamy
2021-08-04 20:10               ` Sunil Muthuswamy
2021-08-05  8:35               ` Marc Zyngier [this message]
2021-08-05  8:35                 ` Marc Zyngier
2021-08-06 19:14                 ` Sunil Muthuswamy
2021-08-06 19:14                   ` Sunil Muthuswamy
2021-08-08 10:19                   ` Marc Zyngier
2021-08-08 10:19                     ` Marc Zyngier
2021-08-09  2:35                     ` Sunil Muthuswamy
2021-08-09  2:35                       ` Sunil Muthuswamy
2021-08-09  9:15                       ` Marc Zyngier
2021-08-09  9:15                         ` Marc Zyngier
2021-08-10  1:10                         ` Sunil Muthuswamy
2021-08-10  1:10                           ` Sunil Muthuswamy
2021-08-10 13:57                           ` Marc Zyngier
2021-08-10 13:57                             ` Marc Zyngier

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