From: "Alex Bennée" <alex.bennee@linaro.org>
To: Keith Packard <keithp@keithp.com>
Cc: qemu-devel@nongnu.org,
Alistair Francis <Alistair.Francis@wdc.com>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Laurent Vivier <laurent@vivier.eu>,
Palmer Dabbelt <palmer@dabbelt.com>,
Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-riscv@nongnu.org,
Sagar Karandikar <sagark@eecs.berkeley.edu>
Subject: Re: [PATCH 0/8] Add RISC-V semihosting 0.2. Finish ARM semihosting 2.0
Date: Mon, 14 Dec 2020 14:58:12 +0000 [thread overview]
Message-ID: <87wnxktost.fsf@linaro.org> (raw)
In-Reply-To: <873608vde9.fsf@linaro.org>
Alex Bennée <alex.bennee@linaro.org> writes:
> Keith Packard <keithp@keithp.com> writes:
>
>> This series adds support for RISC-V Semihosting, version 0.2 as
>> specified here:
>>
>> https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2
>>
>> This specification references the ARM semihosting release 2.0 as specified here:
>>
>> https://static.docs.arm.com/100863/0200/semihosting.pdf
>>
>> That specification includes several semihosting calls which were not
>> previously implemented. This series includes implementations for the
>> remaining calls so that both RISC-V and ARM versions are now complete.
>>
>> Tests for release 2.0 can be found in picolibc on the semihost-2.0-all
>> branch:
>>
>> https://github.com/picolibc/picolibc/tree/semihost-2.0-all
>>
>> These tests uncovered a bug in the SYS_HEAPINFO implementation for
>> ARM, which has been fixed in this series as well.
>>
>> The series is structured as follows:
>>
>> 1. Move shared semihosting files
>> 2. Change public common semihosting APIs
>> 3. Change internal semihosting interfaces
>> 4. Fix SYS_HEAPINFO crash on ARM
>> 5. Add RISC-V semihosting implementation
>> 6-8. Add missing semihosting operations from release 2.0
>>
>> Signed-off-by: Keith Packard <keithp@keithp.com>
>
> Queued to semihosting/next, thanks.
Hmm scratch that... it fails in a number of linux-user only builds with:
/usr/bin/ld: libqemu-aarch64_be-linux-user.fa.p/linux-user_aarch64_cpu_loop.c.o: in function `cpu_loop':
/builds/stsquad/qemu/build/../linux-user/aarch64/cpu_loop.c:133: undefined reference to `do_common_semihosting'
collect2: error: ld returned 1 exit status
[651/2871] Compiling C object libqemu-alpha-linux-user.fa.p/target_alpha_translate.c.o
ninja: build stopped: subcommand failed.
As well as a chunk of the various cross builds, see:
https://gitlab.com/stsquad/qemu/-/pipelines/229443833/failures
On the next re-spin could you include Kito Cheng's patch for linux-user
support and also drop the version numbering from the commit titles so I
don't have to file them off again.
Thanks,
--
Alex Bennée
WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Keith Packard <keithp@keithp.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-riscv@nongnu.org,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
qemu-devel@nongnu.org, Laurent Vivier <laurent@vivier.eu>,
qemu-arm@nongnu.org, Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <Alistair.Francis@wdc.com>
Subject: Re: [PATCH 0/8] Add RISC-V semihosting 0.2. Finish ARM semihosting 2.0
Date: Mon, 14 Dec 2020 14:58:12 +0000 [thread overview]
Message-ID: <87wnxktost.fsf@linaro.org> (raw)
In-Reply-To: <873608vde9.fsf@linaro.org>
Alex Bennée <alex.bennee@linaro.org> writes:
> Keith Packard <keithp@keithp.com> writes:
>
>> This series adds support for RISC-V Semihosting, version 0.2 as
>> specified here:
>>
>> https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2
>>
>> This specification references the ARM semihosting release 2.0 as specified here:
>>
>> https://static.docs.arm.com/100863/0200/semihosting.pdf
>>
>> That specification includes several semihosting calls which were not
>> previously implemented. This series includes implementations for the
>> remaining calls so that both RISC-V and ARM versions are now complete.
>>
>> Tests for release 2.0 can be found in picolibc on the semihost-2.0-all
>> branch:
>>
>> https://github.com/picolibc/picolibc/tree/semihost-2.0-all
>>
>> These tests uncovered a bug in the SYS_HEAPINFO implementation for
>> ARM, which has been fixed in this series as well.
>>
>> The series is structured as follows:
>>
>> 1. Move shared semihosting files
>> 2. Change public common semihosting APIs
>> 3. Change internal semihosting interfaces
>> 4. Fix SYS_HEAPINFO crash on ARM
>> 5. Add RISC-V semihosting implementation
>> 6-8. Add missing semihosting operations from release 2.0
>>
>> Signed-off-by: Keith Packard <keithp@keithp.com>
>
> Queued to semihosting/next, thanks.
Hmm scratch that... it fails in a number of linux-user only builds with:
/usr/bin/ld: libqemu-aarch64_be-linux-user.fa.p/linux-user_aarch64_cpu_loop.c.o: in function `cpu_loop':
/builds/stsquad/qemu/build/../linux-user/aarch64/cpu_loop.c:133: undefined reference to `do_common_semihosting'
collect2: error: ld returned 1 exit status
[651/2871] Compiling C object libqemu-alpha-linux-user.fa.p/target_alpha_translate.c.o
ninja: build stopped: subcommand failed.
As well as a chunk of the various cross builds, see:
https://gitlab.com/stsquad/qemu/-/pipelines/229443833/failures
On the next re-spin could you include Kito Cheng's patch for linux-user
support and also drop the version numbering from the commit titles so I
don't have to file them off again.
Thanks,
--
Alex Bennée
next prev parent reply other threads:[~2020-12-14 15:01 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-25 21:36 [PATCH 0/8] Add RISC-V semihosting 0.2. Finish ARM semihosting 2.0 Keith Packard
2020-11-25 21:36 ` Keith Packard via
2020-11-25 21:36 ` [PATCH 1/8] semihosting: Move ARM semihosting code to shared directories [v3] Keith Packard
2020-11-25 21:36 ` Keith Packard via
2020-11-25 21:36 ` [PATCH 2/8] semihosting: Change common-semi API to be architecture-independent Keith Packard
2020-11-25 21:36 ` Keith Packard via
2020-11-25 21:36 ` [PATCH 3/8] semihosting: Change internal common-semi interfaces to use CPUState * [v2] Keith Packard
2020-11-25 21:36 ` Keith Packard via
2020-11-25 21:36 ` [PATCH 4/8] semihosting: Support SYS_HEAPINFO when env->boot_info is not set Keith Packard
2020-11-25 21:36 ` Keith Packard via
2020-11-25 21:36 ` [PATCH 5/8] riscv: Add semihosting support [v13] Keith Packard
2020-11-25 21:36 ` Keith Packard via
2020-12-09 7:58 ` Kito Cheng
2020-12-09 7:58 ` Kito Cheng
2020-12-09 16:29 ` Keith Packard
2020-12-09 16:29 ` Keith Packard via
2020-12-10 3:39 ` Kito Cheng
2020-12-10 3:39 ` Kito Cheng
2020-12-10 6:21 ` Keith Packard
2020-12-10 6:21 ` Keith Packard via
2020-12-14 11:29 ` Alex Bennée
2020-12-14 11:29 ` Alex Bennée
2020-11-25 21:36 ` [PATCH 6/8] semihosting: Implement SYS_ELAPSED and SYS_TICKFREQ Keith Packard
2020-11-25 21:36 ` Keith Packard via
2020-11-25 21:36 ` [PATCH 7/8] semihosting: Implement SYS_TMPNAM Keith Packard
2020-11-25 21:36 ` Keith Packard via
2020-11-25 21:36 ` [PATCH 8/8] semihosting: Implement SYS_ISERROR Keith Packard
2020-11-25 21:36 ` Keith Packard via
2020-12-14 11:24 ` [PATCH 0/8] Add RISC-V semihosting 0.2. Finish ARM semihosting 2.0 Alex Bennée
2020-12-14 11:24 ` Alex Bennée
2020-12-14 14:58 ` Alex Bennée [this message]
2020-12-14 14:58 ` Alex Bennée
2020-12-14 20:06 ` Keith Packard
2020-12-14 20:06 ` Keith Packard via
2020-12-14 20:07 ` [PATCH 0/9] " Keith Packard
2020-12-14 20:07 ` Keith Packard via
2020-12-14 20:07 ` [PATCH 1/9] semihosting: Move ARM semihosting code to shared directories Keith Packard
2020-12-14 20:07 ` Keith Packard via
2020-12-14 20:07 ` [PATCH 2/9] semihosting: Change common-semi API to be architecture-independent Keith Packard
2020-12-14 20:07 ` Keith Packard via
2020-12-14 20:07 ` [PATCH 3/9] semihosting: Change internal common-semi interfaces to use CPUState * Keith Packard
2020-12-14 20:07 ` Keith Packard via
2020-12-14 20:07 ` [PATCH 4/9] semihosting: Support SYS_HEAPINFO when env->boot_info is not set Keith Packard
2020-12-14 20:07 ` Keith Packard via
2020-12-14 20:07 ` [PATCH 5/9] riscv: Add semihosting support Keith Packard
2020-12-14 20:07 ` Keith Packard via
2020-12-14 20:07 ` [PATCH 6/9] riscv: Add semihosting support for user mode Keith Packard
2020-12-14 20:07 ` Keith Packard via
2020-12-14 20:07 ` [PATCH 7/9] semihosting: Implement SYS_ELAPSED and SYS_TICKFREQ Keith Packard
2020-12-14 20:07 ` Keith Packard via
2020-12-14 20:07 ` [PATCH 8/9] semihosting: Implement SYS_TMPNAM Keith Packard
2020-12-14 20:07 ` Keith Packard via
2020-12-14 20:07 ` [PATCH 9/9] semihosting: Implement SYS_ISERROR Keith Packard
2020-12-14 20:07 ` Keith Packard via
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87wnxktost.fsf@linaro.org \
--to=alex.bennee@linaro.org \
--cc=Alistair.Francis@wdc.com \
--cc=kbastian@mail.uni-paderborn.de \
--cc=keithp@keithp.com \
--cc=laurent@vivier.eu \
--cc=palmer@dabbelt.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=sagark@eecs.berkeley.edu \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.