From: "Lluís Vilanova" <vilanova@ac.upc.edu>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: Marek Vasut <marex@denx.de>,
Peter Maydell <peter.maydell@linaro.org>,
Eduardo Habkost <ehabkost@redhat.com>,
Peter Crosthwaite <crosthwaite.peter@gmail.com>,
Alexander Graf <agraf@suse.de>, Chris Wulff <crwulff@gmail.com>,
qemu-devel@nongnu.org, Laurent Vivier <laurent@vivier.eu>,
Max Filippov <jcmvbkbc@gmail.com>,
Michael Walle <michael@walle.cc>,
"Emilio G. Cota" <cota@braap.org>,
"open list\:ARM" <qemu-arm@nongnu.org>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Stafford Horne <shorne@gmail.com>,
Guan Xuetao <gxt@mprc.pku.edu.cn>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v12 03/27] target: [tcg] Use a generic enum for DISAS_ values
Date: Wed, 12 Jul 2017 13:56:57 +0300 [thread overview]
Message-ID: <87wp7dexdy.fsf@frigg.lan> (raw)
In-Reply-To: <87bmoq9g13.fsf@linaro.org> ("Alex Bennée"'s message of "Wed, 12 Jul 2017 10:10:48 +0100")
Alex Bennée writes:
> Lluís Vilanova <vilanova@ac.upc.edu> writes:
>> Used later. An enum makes expected values explicit and bounds the value space of
>> switches.
>>
>> Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
>> Reviewed-by: Emilio G. Cota <cota@braap.org>
>> Reviewed-by: Richard Henderson <rth@twiddle.net>
>> ---
>> include/exec/exec-all.h | 6 ------
>> include/exec/translator.h | 39 +++++++++++++++++++++++++++++++++++++++
>> target/arm/translate.h | 26 ++++++++++++++++----------
>> target/cris/translate.c | 7 ++++++-
>> target/i386/translate.c | 4 ++++
>> target/lm32/translate.c | 6 ++++++
>> target/m68k/translate.c | 7 ++++++-
>> target/microblaze/translate.c | 6 ++++++
>> target/nios2/translate.c | 6 ++++++
>> target/openrisc/translate.c | 6 ++++++
>> target/s390x/translate.c | 3 ++-
>> target/unicore32/translate.c | 7 ++++++-
>> target/xtensa/translate.c | 4 ++++
>> 13 files changed, 107 insertions(+), 20 deletions(-)
>> create mode 100644 include/exec/translator.h
>>
>> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
>> index 0826894ec5..27498cf740 100644
>> --- a/include/exec/exec-all.h
>> +++ b/include/exec/exec-all.h
>> @@ -35,12 +35,6 @@ typedef abi_ulong tb_page_addr_t;
>> typedef ram_addr_t tb_page_addr_t;
>> #endif
>>
>> -/* is_jmp field values */
>> -#define DISAS_NEXT 0 /* next instruction can be analyzed */
>> -#define DISAS_JUMP 1 /* only pc was modified dynamically */
>> -#define DISAS_UPDATE 2 /* cpu state was modified dynamically */
>> -#define DISAS_TB_JUMP 3 /* only pc was modified statically */
>> -
>> #include "qemu/log.h"
>>
>> void gen_intermediate_code(CPUState *cpu, struct TranslationBlock *tb);
>> diff --git a/include/exec/translator.h b/include/exec/translator.h
>> new file mode 100644
>> index 0000000000..1f9697dd31
>> --- /dev/null
>> +++ b/include/exec/translator.h
>> @@ -0,0 +1,39 @@
>> +/*
>> + * Generic intermediate code generation.
>> + *
>> + * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
>> + *
>> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> + * See the COPYING file in the top-level directory.
>> + */
>> +
>> +#ifndef EXEC__TRANSLATOR_H
>> +#define EXEC__TRANSLATOR_H
>> +
>> +/**
>> + * DisasJumpType:
>> + * @DISAS_NEXT: Next instruction in program order.
>> + * @DISAS_TOO_MANY: Too many instructions translated.
>> + * @DISAS_TARGET: Start of target-specific conditions.
>> + *
>> + * What instruction to disassemble next.
>> + */
>> +typedef enum DisasJumpType {
>> + DISAS_NEXT,
>> + DISAS_TOO_MANY,
> Is DISAS_TOO_MANY really a useful distinction. Sure we have ended the
> loop because of an instruction limit but the more important information
> is what it means for the epilogue code and how we go to the next block.
You mean this is just the sae as DISAS_NEXT? Could be, I don't know about all
the other targets.
> The recent work on fixing eret on ARM[1] has had me thinking about the
> semantics of exit conditions and how much commonality we have across the
> translators. I don't think we'll ever have a comprehensive DisasJumpType
> that all translators will only use the common exits but I think we could
> stand to have a few more.
> I think the cases we want to cover are:
> DISAS_JUMP - the block ends with a jump to the next block (either
> computed via PC or hard-coded with patched branch to next TB)
> DISAS_NORETURN - the block exits via a helper or some other mechanism
> (for example cpu_loop_exit from helper)
> DISAS_EXIT_LOOP - we need to return to the main loop before we enter
> again (typically to deal with IRQ issues)
> [1] https://lists.nongnu.org/archive/html/qemu-devel/2017-07/msg02963.html
Right now (v13 that I will send after this round of reviews) it only has
DISAS_TOO_MANY and DISAS_NORETURN because these are the only ones used in the
generic code.
I'm not that familiar with the internals of the disassembly process of all the
many targets in QEMU, and so I prefer to stick to the bare minimum we clearly
need now, and only later refactor target-specific DISAS_* values into generic
ones.
If you provide me a rename mapping from i386 and arm to the values you're
proposing, I can send it for v13, but would otherwise prefer to stick to the
current state of affairs.
>> + DISAS_TARGET_0,
>> + DISAS_TARGET_1,
>> + DISAS_TARGET_2,
>> + DISAS_TARGET_3,
>> + DISAS_TARGET_4,
>> + DISAS_TARGET_5,
>> + DISAS_TARGET_6,
>> + DISAS_TARGET_7,
>> + DISAS_TARGET_8,
>> + DISAS_TARGET_9,
>> + DISAS_TARGET_10,
>> + DISAS_TARGET_11,
>> + DISAS_TARGET_12,
>> +} DisasJumpType;
>> +
>> +#endif /* EXEC__TRANSLATOR_H */
>> diff --git a/target/arm/translate.h b/target/arm/translate.h
>> index e5da614db5..aba3f44c9f 100644
>> --- a/target/arm/translate.h
>> +++ b/target/arm/translate.h
>> @@ -1,6 +1,9 @@
>> #ifndef TARGET_ARM_TRANSLATE_H
>> #define TARGET_ARM_TRANSLATE_H
>>
>> +#include "exec/translator.h"
>> +
>> +
>> /* internal defines */
>> typedef struct DisasContext {
>> target_ulong pc;
>> @@ -119,30 +122,33 @@ static void disas_set_insn_syndrome(DisasContext *s, uint32_t syn)
s-> insn_start_idx = 0;
>> }
>>
>> -/* target-specific extra values for is_jmp */
>> +/* is_jmp field values */
>> +#define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */
>> +#define DISAS_UPDATE DISAS_TARGET_1 /* cpu state was modified dynamically */
>> +#define DISAS_TB_JUMP DISAS_TARGET_2 /* only pc was modified statically */
>> /* These instructions trap after executing, so the A32/T32 decoder must
>> * defer them until after the conditional execution state has been updated.
>> * WFI also needs special handling when single-stepping.
>> */
>> -#define DISAS_WFI 4
>> -#define DISAS_SWI 5
> So in the new model for example we only really need the special handling
> for things like WFI/SWI onwards.
And how do the previous ones map to the generic ones? And what about the i386
target?
Thanks,
Lluis
WARNING: multiple messages have this Message-ID (diff)
From: "Lluís Vilanova" <vilanova@ac.upc.edu>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: Marek Vasut <marex@denx.de>,
Peter Maydell <peter.maydell@linaro.org>,
Eduardo Habkost <ehabkost@redhat.com>,
Peter Crosthwaite <crosthwaite.peter@gmail.com>,
Alexander Graf <agraf@suse.de>, Chris Wulff <crwulff@gmail.com>,
qemu-devel@nongnu.org, Laurent Vivier <laurent@vivier.eu>,
Max Filippov <jcmvbkbc@gmail.com>,
Michael Walle <michael@walle.cc>,
"Emilio G. Cota" <cota@braap.org>,
"open list:ARM" <qemu-arm@nongnu.org>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Stafford Horne <shorne@gmail.com>,
Guan Xuetao <gxt@mprc.pku.edu.cn>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v12 03/27] target: [tcg] Use a generic enum for DISAS_ values
Date: Wed, 12 Jul 2017 13:56:57 +0300 [thread overview]
Message-ID: <87wp7dexdy.fsf@frigg.lan> (raw)
In-Reply-To: <87bmoq9g13.fsf@linaro.org> ("Alex Bennée"'s message of "Wed, 12 Jul 2017 10:10:48 +0100")
Alex Bennée writes:
> Lluís Vilanova <vilanova@ac.upc.edu> writes:
>> Used later. An enum makes expected values explicit and bounds the value space of
>> switches.
>>
>> Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
>> Reviewed-by: Emilio G. Cota <cota@braap.org>
>> Reviewed-by: Richard Henderson <rth@twiddle.net>
>> ---
>> include/exec/exec-all.h | 6 ------
>> include/exec/translator.h | 39 +++++++++++++++++++++++++++++++++++++++
>> target/arm/translate.h | 26 ++++++++++++++++----------
>> target/cris/translate.c | 7 ++++++-
>> target/i386/translate.c | 4 ++++
>> target/lm32/translate.c | 6 ++++++
>> target/m68k/translate.c | 7 ++++++-
>> target/microblaze/translate.c | 6 ++++++
>> target/nios2/translate.c | 6 ++++++
>> target/openrisc/translate.c | 6 ++++++
>> target/s390x/translate.c | 3 ++-
>> target/unicore32/translate.c | 7 ++++++-
>> target/xtensa/translate.c | 4 ++++
>> 13 files changed, 107 insertions(+), 20 deletions(-)
>> create mode 100644 include/exec/translator.h
>>
>> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
>> index 0826894ec5..27498cf740 100644
>> --- a/include/exec/exec-all.h
>> +++ b/include/exec/exec-all.h
>> @@ -35,12 +35,6 @@ typedef abi_ulong tb_page_addr_t;
>> typedef ram_addr_t tb_page_addr_t;
>> #endif
>>
>> -/* is_jmp field values */
>> -#define DISAS_NEXT 0 /* next instruction can be analyzed */
>> -#define DISAS_JUMP 1 /* only pc was modified dynamically */
>> -#define DISAS_UPDATE 2 /* cpu state was modified dynamically */
>> -#define DISAS_TB_JUMP 3 /* only pc was modified statically */
>> -
>> #include "qemu/log.h"
>>
>> void gen_intermediate_code(CPUState *cpu, struct TranslationBlock *tb);
>> diff --git a/include/exec/translator.h b/include/exec/translator.h
>> new file mode 100644
>> index 0000000000..1f9697dd31
>> --- /dev/null
>> +++ b/include/exec/translator.h
>> @@ -0,0 +1,39 @@
>> +/*
>> + * Generic intermediate code generation.
>> + *
>> + * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
>> + *
>> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> + * See the COPYING file in the top-level directory.
>> + */
>> +
>> +#ifndef EXEC__TRANSLATOR_H
>> +#define EXEC__TRANSLATOR_H
>> +
>> +/**
>> + * DisasJumpType:
>> + * @DISAS_NEXT: Next instruction in program order.
>> + * @DISAS_TOO_MANY: Too many instructions translated.
>> + * @DISAS_TARGET: Start of target-specific conditions.
>> + *
>> + * What instruction to disassemble next.
>> + */
>> +typedef enum DisasJumpType {
>> + DISAS_NEXT,
>> + DISAS_TOO_MANY,
> Is DISAS_TOO_MANY really a useful distinction. Sure we have ended the
> loop because of an instruction limit but the more important information
> is what it means for the epilogue code and how we go to the next block.
You mean this is just the sae as DISAS_NEXT? Could be, I don't know about all
the other targets.
> The recent work on fixing eret on ARM[1] has had me thinking about the
> semantics of exit conditions and how much commonality we have across the
> translators. I don't think we'll ever have a comprehensive DisasJumpType
> that all translators will only use the common exits but I think we could
> stand to have a few more.
> I think the cases we want to cover are:
> DISAS_JUMP - the block ends with a jump to the next block (either
> computed via PC or hard-coded with patched branch to next TB)
> DISAS_NORETURN - the block exits via a helper or some other mechanism
> (for example cpu_loop_exit from helper)
> DISAS_EXIT_LOOP - we need to return to the main loop before we enter
> again (typically to deal with IRQ issues)
> [1] https://lists.nongnu.org/archive/html/qemu-devel/2017-07/msg02963.html
Right now (v13 that I will send after this round of reviews) it only has
DISAS_TOO_MANY and DISAS_NORETURN because these are the only ones used in the
generic code.
I'm not that familiar with the internals of the disassembly process of all the
many targets in QEMU, and so I prefer to stick to the bare minimum we clearly
need now, and only later refactor target-specific DISAS_* values into generic
ones.
If you provide me a rename mapping from i386 and arm to the values you're
proposing, I can send it for v13, but would otherwise prefer to stick to the
current state of affairs.
>> + DISAS_TARGET_0,
>> + DISAS_TARGET_1,
>> + DISAS_TARGET_2,
>> + DISAS_TARGET_3,
>> + DISAS_TARGET_4,
>> + DISAS_TARGET_5,
>> + DISAS_TARGET_6,
>> + DISAS_TARGET_7,
>> + DISAS_TARGET_8,
>> + DISAS_TARGET_9,
>> + DISAS_TARGET_10,
>> + DISAS_TARGET_11,
>> + DISAS_TARGET_12,
>> +} DisasJumpType;
>> +
>> +#endif /* EXEC__TRANSLATOR_H */
>> diff --git a/target/arm/translate.h b/target/arm/translate.h
>> index e5da614db5..aba3f44c9f 100644
>> --- a/target/arm/translate.h
>> +++ b/target/arm/translate.h
>> @@ -1,6 +1,9 @@
>> #ifndef TARGET_ARM_TRANSLATE_H
>> #define TARGET_ARM_TRANSLATE_H
>>
>> +#include "exec/translator.h"
>> +
>> +
>> /* internal defines */
>> typedef struct DisasContext {
>> target_ulong pc;
>> @@ -119,30 +122,33 @@ static void disas_set_insn_syndrome(DisasContext *s, uint32_t syn)
s-> insn_start_idx = 0;
>> }
>>
>> -/* target-specific extra values for is_jmp */
>> +/* is_jmp field values */
>> +#define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */
>> +#define DISAS_UPDATE DISAS_TARGET_1 /* cpu state was modified dynamically */
>> +#define DISAS_TB_JUMP DISAS_TARGET_2 /* only pc was modified statically */
>> /* These instructions trap after executing, so the A32/T32 decoder must
>> * defer them until after the conditional execution state has been updated.
>> * WFI also needs special handling when single-stepping.
>> */
>> -#define DISAS_WFI 4
>> -#define DISAS_SWI 5
> So in the new model for example we only really need the special handling
> for things like WFI/SWI onwards.
And how do the previous ones map to the generic ones? And what about the i386
target?
Thanks,
Lluis
next prev parent reply other threads:[~2017-07-12 10:57 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-07 11:40 [Qemu-devel] [PATCH v12 00/27] translate: [tcg] Generic translation framework Lluís Vilanova
2017-07-07 11:44 ` [PATCH v12 01/27] Pass generic CPUState to gen_intermediate_code() Lluís Vilanova
2017-07-07 11:44 ` [Qemu-devel] " Lluís Vilanova
2017-07-11 19:22 ` Alex Bennée
2017-07-11 19:22 ` [Qemu-devel] " Alex Bennée
2017-07-07 11:48 ` [Qemu-devel] [PATCH v12 02/27] cpu-exec: Avoid global variables in icount-related functions Lluís Vilanova
2017-07-11 19:25 ` Alex Bennée
2017-07-12 8:42 ` Lluís Vilanova
2017-07-12 22:06 ` Emilio G. Cota
2017-07-07 11:52 ` [PATCH v12 03/27] target: [tcg] Use a generic enum for DISAS_ values Lluís Vilanova
2017-07-07 11:52 ` [Qemu-devel] " Lluís Vilanova
2017-07-12 9:10 ` Alex Bennée
2017-07-12 9:10 ` [Qemu-devel] " Alex Bennée
2017-07-12 10:56 ` Lluís Vilanova [this message]
2017-07-12 10:56 ` Lluís Vilanova
2017-07-12 16:53 ` Richard Henderson
2017-07-12 16:53 ` [Qemu-devel] " Richard Henderson
2017-07-07 11:56 ` [Qemu-devel] [PATCH v12 04/27] target: [tcg] Add generic translation framework Lluís Vilanova
2017-07-07 18:42 ` Richard Henderson
2017-07-11 16:40 ` Lluís Vilanova
2017-07-11 17:21 ` Richard Henderson
2017-07-12 8:50 ` Lluís Vilanova
2017-07-11 18:17 ` Alex Bennée
2017-07-12 8:59 ` Lluís Vilanova
2017-07-12 9:13 ` Alex Bennée
2017-07-07 12:00 ` [Qemu-devel] [PATCH v12 05/27] target/i386: [tcg] Port to DisasContextBase Lluís Vilanova
2017-07-12 9:18 ` Alex Bennée
2017-07-12 11:00 ` Lluís Vilanova
2017-07-07 12:04 ` [Qemu-devel] [PATCH v12 06/27] target/i386: [tcg] Port to init_disas_context Lluís Vilanova
2017-07-12 9:20 ` Alex Bennée
2017-07-07 12:08 ` [Qemu-devel] [PATCH v12 07/27] target/i386: [tcg] Port to insn_start Lluís Vilanova
2017-07-12 9:21 ` Alex Bennée
2017-07-07 12:13 ` [Qemu-devel] [PATCH v12 08/27] target/i386: [tcg] Port to breakpoint_check Lluís Vilanova
2017-07-07 12:17 ` [Qemu-devel] [PATCH v12 09/27] target/i386: [tcg] Port to translate_insn Lluís Vilanova
2017-07-07 12:21 ` [Qemu-devel] [PATCH v12 10/27] target/i386: [tcg] Port to tb_stop Lluís Vilanova
2017-07-07 12:25 ` [Qemu-devel] [PATCH v12 11/27] target/i386: [tcg] Port to disas_log Lluís Vilanova
2017-07-07 12:29 ` [Qemu-devel] [PATCH v12 12/27] target/i386: [tcg] Port to generic translation framework Lluís Vilanova
2017-07-07 12:33 ` [PATCH v12 13/27] target/arm: [tcg] Port to DisasContextBase Lluís Vilanova
2017-07-07 12:33 ` [Qemu-devel] " Lluís Vilanova
2017-07-12 9:25 ` Alex Bennée
2017-07-12 9:25 ` [Qemu-devel] " Alex Bennée
2017-07-07 12:37 ` [PATCH v12 14/27] target/arm: [tcg] Port to init_disas_context Lluís Vilanova
2017-07-07 12:37 ` [Qemu-devel] " Lluís Vilanova
2017-07-12 9:27 ` Alex Bennée
2017-07-12 9:27 ` [Qemu-devel] " Alex Bennée
2017-07-07 12:41 ` [PATCH v12 15/27] target/arm: [tcg,a64] " Lluís Vilanova
2017-07-07 12:41 ` [Qemu-devel] [PATCH v12 15/27] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-12 9:30 ` [PATCH v12 15/27] target/arm: [tcg,a64] " Alex Bennée
2017-07-12 9:30 ` [Qemu-devel] [PATCH v12 15/27] target/arm: [tcg, a64] " Alex Bennée
2017-07-07 12:46 ` [PATCH v12 16/27] target/arm: [tcg] Port to tb_start Lluís Vilanova
2017-07-07 12:46 ` [Qemu-devel] " Lluís Vilanova
2017-07-12 9:31 ` Alex Bennée
2017-07-12 9:31 ` [Qemu-devel] " Alex Bennée
2017-07-07 12:50 ` [PATCH v12 17/27] target/arm: [tcg] Port to insn_start Lluís Vilanova
2017-07-07 12:50 ` [Qemu-devel] " Lluís Vilanova
2017-07-12 9:32 ` Alex Bennée
2017-07-12 9:32 ` [Qemu-devel] " Alex Bennée
2017-07-07 12:54 ` [PATCH v12 18/27] target/arm: [tcg,a64] " Lluís Vilanova
2017-07-07 12:54 ` [Qemu-devel] [PATCH v12 18/27] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-12 9:32 ` [PATCH v12 18/27] target/arm: [tcg,a64] " Alex Bennée
2017-07-12 9:32 ` [Qemu-devel] [PATCH v12 18/27] target/arm: [tcg, a64] " Alex Bennée
2017-07-07 12:58 ` [PATCH v12 19/27] target/arm: [tcg] Port to breakpoint_check Lluís Vilanova
2017-07-07 12:58 ` [Qemu-devel] " Lluís Vilanova
2017-07-07 13:02 ` [PATCH v12 20/27] target/arm: [tcg,a64] " Lluís Vilanova
2017-07-07 13:02 ` [Qemu-devel] [PATCH v12 20/27] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-07 13:06 ` [PATCH v12 21/27] target/arm: [tcg] Port to translate_insn Lluís Vilanova
2017-07-07 13:06 ` [Qemu-devel] " Lluís Vilanova
2017-07-12 9:39 ` Alex Bennée
2017-07-12 9:39 ` [Qemu-devel] " Alex Bennée
2017-07-12 11:05 ` Lluís Vilanova
2017-07-12 11:05 ` Lluís Vilanova
2017-07-07 13:10 ` [PATCH v12 22/27] target/arm: [tcg,a64] " Lluís Vilanova
2017-07-07 13:10 ` [Qemu-devel] [PATCH v12 22/27] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-07 13:14 ` [PATCH v12 23/27] target/arm: [tcg] Port to tb_stop Lluís Vilanova
2017-07-07 13:14 ` [Qemu-devel] " Lluís Vilanova
2017-07-07 13:18 ` [PATCH v12 24/27] target/arm: [tcg,a64] " Lluís Vilanova
2017-07-07 13:18 ` [Qemu-devel] [PATCH v12 24/27] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-07 13:23 ` [PATCH v12 25/27] target/arm: [tcg] Port to disas_log Lluís Vilanova
2017-07-07 13:23 ` [Qemu-devel] " Lluís Vilanova
2017-07-12 9:41 ` Alex Bennée
2017-07-12 9:41 ` [Qemu-devel] " Alex Bennée
2017-07-07 13:27 ` [PATCH v12 26/27] target/arm: [tcg,a64] " Lluís Vilanova
2017-07-07 13:27 ` [Qemu-devel] [PATCH v12 26/27] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-07 13:31 ` [PATCH v12 27/27] target/arm: [tcg] Port to generic translation framework Lluís Vilanova
2017-07-07 13:31 ` [Qemu-devel] " Lluís Vilanova
2017-07-12 9:47 ` [Qemu-devel] [PATCH v12 00/27] translate: [tcg] Generic " Alex Bennée
2017-07-12 11:10 ` Lluís Vilanova
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