From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org, "Emilio G. Cota" <cota@braap.org>
Subject: Re: [Qemu-devel] [PATCH v3 24/34] target-i386: remove helper_lock()
Date: Wed, 14 Sep 2016 12:14:26 +0100 [thread overview]
Message-ID: <87wpieivhp.fsf@linaro.org> (raw)
In-Reply-To: <1472935202-3342-25-git-send-email-rth@twiddle.net>
Richard Henderson <rth@twiddle.net> writes:
> From: "Emilio G. Cota" <cota@braap.org>
>
> It's been superseded by the atomic helpers.
>
> The use of the atomic helpers provides a significant performance and scalability
> improvement. Below is the result of running the atomic_add-test microbenchmark with:
> $ x86_64-linux-user/qemu-x86_64 tests/atomic_add-bench -o 5000000 -r $r -n $n
> , where $n is the number of threads and $r is the allowed range for the additions.
>
> The scenarios measured are:
> - atomic: implements x86' ADDL with the atomic_add helper (i.e. this patchset)
> - cmpxchg: implement x86' ADDL with a TCG loop using the cmpxchg helper
> - master: before this patchset
>
> Results sorted in ascending range, i.e. descending degree of contention.
> Y axis is Throughput in Mops/s. Tests are run on an AMD machine with 64
> Opteron 6376 cores.
>
> atomic_add-bench: 5000000 ops/thread, [0,1] range
>
> 25 ++---------+----------+---------+----------+----------+----------+---++
> + atomic +-E--+ + + + + + |
> |cmpxchg +-H--+ |
> 20 +Emaster +-N--+ ++
> || |
> |++ |
> || |
> 15 +++ ++
> |N| |
> |+| |
> 10 ++| ++
> |+|+ |
> | | -+E+------ +++ ---+E+------+E+------+E+-----+E+------+E|
> |+E+E+- +++ +E+------+E+-- |
> 5 ++|+ ++
> |+N+H+--- +++ |
> ++++N+--+H++----+++ + +++ --++H+------+H+------+H++----+H+---+--- |
> 0 ++---------+-----H----+---H-----+----------+----------+----------+---H+
> 0 10 20 30 40 50 60
> Number of threads
>
> atomic_add-bench: 5000000 ops/thread, [0,2] range
>
> 25 ++---------+----------+---------+----------+----------+----------+---++
> ++atomic +-E--+ + + + + + |
> |cmpxchg +-H--+ |
> 20 ++master +-N--+ ++
> |E| |
> |++ |
> ||E |
> 15 ++| ++
> |N|| |
> |+|| ---+E+------+E+-----+E+------+E|
> 10 ++| | ---+E+------+E+-----+E+--- +++ +++
> ||H+E+--+E+-- |
> |+++++ |
> | || |
> 5 ++|+H+-- +++ ++
> |+N+ - ---+H+------+H+------ |
> + +N+--+H++----+H+---+--+H+----++H+--- + + +H+---+--+H|
> 0 ++---------+----------+---------+----------+----------+----------+---++
> 0 10 20 30 40 50 60
> Number of threads
>
> atomic_add-bench: 5000000 ops/thread, [0,8] range
>
> 40 ++---------+----------+---------+----------+----------+----------+---++
> ++atomic +-E--+ + + + + + |
> 35 +cmpxchg +-H--+ ++
> | master +-N--+ ---+E+------+E+------+E+-----+E+------+E|
> 30 ++| ---+E+-- +++ ++
> | | -+E+--- |
> 25 ++E ---- +++ ++
> |+++++ -+E+ |
> 20 +E+ E-- +++ ++
> |H|+++ |
> |+| +H+------- |
> 15 ++H+ ---+++ +H+------ ++
> |N++H+-- +++--- +H+------++|
> 10 ++ +++ - +++ ---+H+ +++ +H+
> | | +H+-----+H+------+H+-- |
> 5 ++| +++ ++
> ++N+N+--+N++ + + + + + |
> 0 ++---------+----------+---------+----------+----------+----------+---++
> 0 10 20 30 40 50 60
> Number of threads
>
> atomic_add-bench: 5000000 ops/thread, [0,128] range
>
> 160 ++---------+---------+----------+---------+----------+----------+---++
> + atomic +-E--+ + + + + + |
> 140 +cmpxchg +-H--+ +++ +++ ++
> | master +-N--+ E--------E------+E+------++|
> 120 ++ --| | +++ E+
> | -- +++ +++ ++|
> 100 ++ - ++
> | +++- +++ ++|
> 80 ++ -+E+ -+H+------+H+------H--------++
> | ---- ---- +++ H|
> | ---+E+-----+E+- ---+H+ ++|
> 60 ++ +E+--- +++ ---+H+--- ++
> | --+++ ---+H+-- |
> 40 ++ +E+-+H+--- ++
> | +H+ |
> 20 +EE+ ++
> +N+ + + + + + + |
> 0 ++N-N---N--+---------+----------+---------+----------+----------+---++
> 0 10 20 30 40 50 60
> Number of threads
>
> atomic_add-bench: 5000000 ops/thread, [0,1024] range
>
> 350 ++---------+---------+----------+---------+----------+----------+---++
> + atomic +-E--+ + + + + + |
> 300 +cmpxchg +-H--+ +++
> | master +-N--+ +++ ||
> | +++ | ----E|
> 250 ++ | ----E---- ++
> | ----E--- | ---+H|
> 200 ++ -+E+--- +++ ---+H+--- ++
> | ---- -+H+-- |
> | +E+ +++ ---- +++ |
> 150 ++ ---+++ ---+H+- ++
> | --- -+H+-- |
> 100 ++ ---+E+ ---- +++ ++
> | +++ ---+E+-----+H+- |
> | -+E+------+H+-- |
> 50 ++ +E+ ++
> +EE+ + + + + + + |
> 0 ++N-N---N--+---------+----------+---------+----------+----------+---++
> 0 10 20 30 40 50 60
> Number of threads
>
> hi-res: http://imgur.com/a/fMRmq
>
> For master I stopped measuring master after 8 threads, because there is little
> point in measuring the well-known performance collapse of a contended lock.
>
> Signed-off-by: Emilio G. Cota <cota@braap.org>
> Message-Id: <1467054136-10430-21-git-send-email-cota@braap.org>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
> target-i386/helper.h | 2 --
> target-i386/mem_helper.c | 33 ---------------------------------
> target-i386/translate.c | 15 ---------------
> 3 files changed, 50 deletions(-)
>
> diff --git a/target-i386/helper.h b/target-i386/helper.h
> index 729d4b6..4e859eb 100644
> --- a/target-i386/helper.h
> +++ b/target-i386/helper.h
> @@ -1,8 +1,6 @@
> DEF_HELPER_FLAGS_4(cc_compute_all, TCG_CALL_NO_RWG_SE, tl, tl, tl, tl, int)
> DEF_HELPER_FLAGS_4(cc_compute_c, TCG_CALL_NO_RWG_SE, tl, tl, tl, tl, int)
>
> -DEF_HELPER_0(lock, void)
> -DEF_HELPER_0(unlock, void)
> DEF_HELPER_3(write_eflags, void, env, tl, i32)
> DEF_HELPER_1(read_eflags, tl, env)
> DEF_HELPER_2(divb_AL, void, env, tl)
> diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c
> index 8b72fda..f8d2a1e 100644
> --- a/target-i386/mem_helper.c
> +++ b/target-i386/mem_helper.c
> @@ -25,39 +25,6 @@
> #include "qemu/int128.h"
> #include "tcg.h"
>
> -/* broken thread support */
> -
> -#if defined(CONFIG_USER_ONLY)
> -QemuMutex global_cpu_lock;
> -
> -void helper_lock(void)
> -{
> - qemu_mutex_lock(&global_cpu_lock);
> -}
> -
> -void helper_unlock(void)
> -{
> - qemu_mutex_unlock(&global_cpu_lock);
> -}
> -
> -void helper_lock_init(void)
> -{
> - qemu_mutex_init(&global_cpu_lock);
> -}
> -#else
> -void helper_lock(void)
> -{
> -}
> -
> -void helper_unlock(void)
> -{
> -}
> -
> -void helper_lock_init(void)
> -{
> -}
> -#endif
> -
> void helper_cmpxchg8b_unlocked(CPUX86State *env, target_ulong a0)
> {
> uintptr_t ra = GETPC();
> diff --git a/target-i386/translate.c b/target-i386/translate.c
> index b8c5dde..755a18f 100644
> --- a/target-i386/translate.c
> +++ b/target-i386/translate.c
> @@ -4537,10 +4537,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
> s->aflag = aflag;
> s->dflag = dflag;
>
> - /* lock generation */
> - if (prefixes & PREFIX_LOCK)
> - gen_helper_lock();
> -
> /* now check op code */
> reswitch:
> switch(b) {
> @@ -8203,20 +8199,11 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
> default:
> goto unknown_op;
> }
> - /* lock generation */
> - if (s->prefix & PREFIX_LOCK)
> - gen_helper_unlock();
> return s->pc;
> illegal_op:
> - if (s->prefix & PREFIX_LOCK)
> - gen_helper_unlock();
> - /* XXX: ensure that no lock was generated */
> gen_illegal_opcode(s);
> return s->pc;
> unknown_op:
> - if (s->prefix & PREFIX_LOCK)
> - gen_helper_unlock();
> - /* XXX: ensure that no lock was generated */
> gen_unknown_opcode(env, s);
> return s->pc;
> }
> @@ -8308,8 +8295,6 @@ void tcg_x86_init(void)
> offsetof(CPUX86State, bnd_regs[i].ub),
> bnd_regu_names[i]);
> }
> -
> - helper_lock_init();
> }
>
> /* generate intermediate code for basic block 'tb'. */
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
I also looked over the rest of the target-i386 stuff and it seems fine
to me but I'm not really an x86 expert. You can treat that as a r-b if
you want if no one with more x86-fu want to look at it.
--
Alex Bennée
next prev parent reply other threads:[~2016-09-14 11:15 UTC|newest]
Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-03 20:39 [Qemu-devel] [PATCH v3 00/34] cmpxchg-based emulation of atomics Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 01/34] atomics: add atomic_xor Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 02/34] atomics: add atomic_op_fetch variants Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 03/34] exec: Avoid direct references to Int128 parts Richard Henderson
2016-09-09 17:14 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 04/34] int128: Use __int128 if available Richard Henderson
2016-09-09 17:19 ` Alex Bennée
2016-09-09 17:38 ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 05/34] int128: Add int128_make128 Richard Henderson
2016-09-09 13:01 ` Leon Alrae
2016-09-09 20:16 ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 06/34] tcg: Add EXCP_ATOMIC Richard Henderson
2016-09-12 14:16 ` Alex Bennée
2016-09-12 20:19 ` Richard Henderson
2016-09-13 6:42 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 07/34] HACK: Always enable parallel_cpus Richard Henderson
2016-09-12 14:20 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 08/34] cputlb: Replace SHIFT with DATA_SIZE Richard Henderson
2016-09-12 14:22 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 09/34] cputlb: Move probe_write out of softmmu_template.h Richard Henderson
2016-09-12 14:35 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 10/34] cputlb: Remove includes from softmmu_template.h Richard Henderson
2016-09-12 14:38 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 11/34] cputlb: Move most of iotlb code out of line Richard Henderson
2016-09-12 15:26 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 12/34] cputlb: Tidy some macros Richard Henderson
2016-09-12 15:28 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 13/34] tcg: Add atomic helpers Richard Henderson
2016-09-09 13:11 ` Leon Alrae
2016-09-09 14:46 ` Leon Alrae
2016-09-09 16:26 ` Richard Henderson
2016-09-12 7:59 ` Leon Alrae
2016-09-12 16:13 ` Richard Henderson
2016-09-13 12:32 ` Leon Alrae
2016-09-12 13:47 ` Alex Bennée
2016-09-13 18:00 ` Richard Henderson
2017-03-24 10:14 ` Nikunj A Dadhania
2017-03-24 10:58 ` Alex Bennée
2017-03-24 17:27 ` Nikunj A Dadhania
2017-03-27 11:56 ` Nikunj A Dadhania
2016-09-13 17:06 ` Alex Bennée
2016-09-13 17:26 ` Richard Henderson
2016-09-13 18:45 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 14/34] tcg: Add atomic128 helpers Richard Henderson
2016-09-13 11:18 ` Alex Bennée
2016-09-13 14:18 ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 15/34] tcg: Add CONFIG_ATOMIC64 Richard Henderson
2016-09-14 10:12 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 16/34] target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 17/34] target-i386: emulate LOCK'ed OP instructions using atomic helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 18/34] target-i386: emulate LOCK'ed INC using atomic helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 19/34] target-i386: emulate LOCK'ed NOT " Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 20/34] target-i386: emulate LOCK'ed NEG using cmpxchg helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 21/34] target-i386: emulate LOCK'ed XADD using atomic helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 22/34] target-i386: emulate LOCK'ed BTX ops using atomic helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 23/34] target-i386: emulate XCHG using atomic helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 24/34] target-i386: remove helper_lock() Richard Henderson
2016-09-14 11:14 ` Alex Bennée [this message]
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 25/34] tests: add atomic_add-bench Richard Henderson
2016-09-14 13:53 ` Alex Bennée
2016-09-15 2:23 ` Emilio G. Cota
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 26/34] target-arm: Rearrange aa32 load and store functions Richard Henderson
2016-09-14 15:58 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 27/34] target-arm: emulate LL/SC using cmpxchg helpers Richard Henderson
2016-09-14 16:03 ` Alex Bennée
2016-09-14 16:38 ` Richard Henderson
2016-10-20 17:51 ` Pranith Kumar
2016-10-20 18:00 ` Richard Henderson
2016-10-20 18:58 ` Pranith Kumar
2016-10-20 19:02 ` Richard Henderson
2016-10-20 19:07 ` Pranith Kumar
2016-10-21 4:34 ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 28/34] target-arm: emulate SWP with atomic_xchg helper Richard Henderson
2016-09-14 16:05 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 29/34] target-arm: emulate aarch64's LL/SC using cmpxchg helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 30/34] linux-user: remove handling of ARM's EXCP_STREX Richard Henderson
2016-09-15 9:36 ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 31/34] linux-user: remove handling of aarch64's EXCP_STREX Richard Henderson
2016-09-15 9:36 ` Alex Bennée
2016-09-03 20:40 ` [Qemu-devel] [PATCH v3 32/34] target-arm: remove EXCP_STREX + cpu_exclusive_{test, info} Richard Henderson
2016-09-15 9:39 ` Alex Bennée
2016-09-03 20:40 ` [Qemu-devel] [PATCH v3 33/34] target-alpha: Introduce MMU_PHYS_IDX Richard Henderson
2016-09-15 10:10 ` Alex Bennée
2016-09-15 16:38 ` Richard Henderson
2016-09-03 20:40 ` [Qemu-devel] [PATCH v3 34/34] target-alpha: Emulate LL/SC using cmpxchg helpers Richard Henderson
2016-09-15 14:38 ` Alex Bennée
2016-09-15 16:48 ` Richard Henderson
2016-09-15 17:48 ` Alex Bennée
2016-09-15 18:28 ` Richard Henderson
2016-09-03 21:25 ` [Qemu-devel] [PATCH v3 00/34] cmpxchg-based emulation of atomics no-reply
2016-09-03 21:26 ` no-reply
2016-09-09 18:33 ` Alex Bennée
2016-09-09 19:07 ` Richard Henderson
2016-09-09 19:29 ` Alex Bennée
2016-09-09 20:03 ` Richard Henderson
2016-09-09 20:11 ` Richard Henderson
2016-09-15 14:39 ` Alex Bennée
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