[PATCH V2] OMAP: GPIO: Fix OMAP4 GPIO reg access issues

[PATCH V2] OMAP: GPIO: Fix OMAP4 GPIO reg access issues

[Charulatha V]

Access to some of the OMAP4 GPIO registers are not properly handled.
This patch fixes it.

This patch is tested on 3430SDP and 4430SDP boards

Signed-off-by: Charulatha V <charu@ti.com>
cc: Kevin Hilman <khilman@deeprootsystems.com>
---
 arch/arm/plat-omap/gpio.c |   61 +++++++++++++++++++++++++++++++++++---------
 1 files changed, 55 insertions(+), 12 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 76a347b..3a9891c 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -137,7 +137,11 @@
 #define OMAP4_GPIO_IRQSTATUSCLR1	0x0040
 #define OMAP4_GPIO_IRQWAKEN0		0x0044
 #define OMAP4_GPIO_IRQWAKEN1		0x0048
-#define OMAP4_GPIO_SYSSTATUS		0x0104
+#define OMAP4_GPIO_SYSSTATUS		0x0114
+#define OMAP4_GPIO_IRQENABLE1		0x011c
+#define OMAP4_GPIO_WAKE_EN		0x0120
+#define OMAP4_GPIO_IRQSTATUS2		0x0128
+#define OMAP4_GPIO_IRQENABLE2		0x012c
 #define OMAP4_GPIO_CTRL			0x0130
 #define OMAP4_GPIO_OE			0x0134
 #define OMAP4_GPIO_DATAIN		0x0138
@@ -148,6 +152,10 @@
 #define OMAP4_GPIO_FALLINGDETECT	0x014c
 #define OMAP4_GPIO_DEBOUNCENABLE	0x0150
 #define OMAP4_GPIO_DEBOUNCINGTIME	0x0154
+#define OMAP4_GPIO_CLEARIRQENABLE1	0x0160
+#define OMAP4_GPIO_SETIRQENABLE1	0x0164
+#define OMAP4_GPIO_CLEARWKUENA		0x0180
+#define OMAP4_GPIO_SETWKUENA		0x0184
 #define OMAP4_GPIO_CLEARDATAOUT		0x0190
 #define OMAP4_GPIO_SETDATAOUT		0x0194
 /*
@@ -591,12 +599,16 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
 		reg += OMAP7XX_GPIO_DATA_OUTPUT;
 		break;
 #endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 	case METHOD_GPIO_24XX:
-	case METHOD_GPIO_44XX:
 		reg += OMAP24XX_GPIO_DATAOUT;
 		break;
 #endif
+#ifdef CONFIG_ARCH_OMAP4
+	case METHOD_GPIO_44XX:
+		reg += OMAP4_GPIO_DATAOUT;
+		break;
+#endif
 	default:
 		return -EINVAL;
 	}
@@ -1200,11 +1215,17 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
 #endif
 	if (!cpu_class_is_omap1()) {
 		if (!bank->mod_usage) {
+			void __iomem *reg = bank->base;
 			u32 ctrl;
-			ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
-			ctrl &= 0xFFFFFFFE;
+
+			if (cpu_is_omap24xx() || cpu_is_omap34xx())
+				reg += OMAP24XX_GPIO_CTRL;
+			else if (cpu_is_omap44xx())
+				reg += OMAP4_GPIO_CTRL;
+			ctrl = __raw_readl(reg);
 			/* Module is enabled, clocks are not gated */
-			__raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL);
+			ctrl &= 0xFFFFFFFE;
+			__raw_writel(ctrl, reg);
 		}
 		bank->mod_usage |= 1 << offset;
 	}
@@ -1226,22 +1247,34 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
 		__raw_writel(1 << offset, reg);
 	}
 #endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
-	if ((bank->method == METHOD_GPIO_24XX) ||
-			(bank->method == METHOD_GPIO_44XX)) {
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+	if (bank->method == METHOD_GPIO_24XX) {
 		/* Disable wake-up during idle for dynamic tick */
 		void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
 		__raw_writel(1 << offset, reg);
 	}
 #endif
+#ifdef CONFIG_ARCH_OMAP4
+	if (bank->method == METHOD_GPIO_44XX) {
+		/* Disable wake-up during idle for dynamic tick */
+		void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
+		__raw_writel(1 << offset, reg);
+	}
+#endif
 	if (!cpu_class_is_omap1()) {
 		bank->mod_usage &= ~(1 << offset);
 		if (!bank->mod_usage) {
+			void __iomem *reg = bank->base;
 			u32 ctrl;
-			ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
+
+			if (cpu_is_omap24xx() || cpu_is_omap34xx())
+				reg += OMAP24XX_GPIO_CTRL;
+			else if (cpu_is_omap44xx())
+				reg += OMAP4_GPIO_CTRL;
+			ctrl = __raw_readl(reg);
 			/* Module is disabled, clocks are gated */
 			ctrl |= 1;
-			__raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL);
+			__raw_writel(ctrl, reg);
 		}
 	}
 	_reset_gpio(bank, bank->chip.base + offset);
@@ -1570,9 +1603,14 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
 		reg += OMAP7XX_GPIO_DIR_CONTROL;
 		break;
 	case METHOD_GPIO_24XX:
-	case METHOD_GPIO_44XX:
 		reg += OMAP24XX_GPIO_OE;
 		break;
+	case METHOD_GPIO_44XX:
+		reg += OMAP4_GPIO_OE;
+		break;
+	default:
+		WARN_ONCE(1, "gpio_is_input: incorrect OMAP GPIO method");
+		return -EINVAL;
 	}
 	return __raw_readl(reg) & mask;
 }
-- 
1.6.3.3

RE: [PATCH V2] OMAP: GPIO: Fix OMAP4 GPIO reg access issues

[Varadarajan, Charulatha]

Tony,

If there are no review comments, can you please push this patch?

-V Charulatha

> -----Original Message-----
> From: Varadarajan, Charulatha
> Sent: Thursday, April 08, 2010 4:28 PM
> To: linux-omap@vger.kernel.org
> Cc: Varadarajan, Charulatha; Kevin Hilman
> Subject: [PATCH V2] OMAP: GPIO: Fix OMAP4 GPIO reg access issues
> 
> Access to some of the OMAP4 GPIO registers are not properly handled.
> This patch fixes it.
> 
> This patch is tested on 3430SDP and 4430SDP boards
> 
> Signed-off-by: Charulatha V <charu@ti.com>
> cc: Kevin Hilman <khilman@deeprootsystems.com>
> ---
>  arch/arm/plat-omap/gpio.c |   61 +++++++++++++++++++++++++++++++++++---------
>  1 files changed, 55 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
> index 76a347b..3a9891c 100644
> --- a/arch/arm/plat-omap/gpio.c
> +++ b/arch/arm/plat-omap/gpio.c
> @@ -137,7 +137,11 @@
>  #define OMAP4_GPIO_IRQSTATUSCLR1	0x0040
>  #define OMAP4_GPIO_IRQWAKEN0		0x0044
>  #define OMAP4_GPIO_IRQWAKEN1		0x0048
> -#define OMAP4_GPIO_SYSSTATUS		0x0104
> +#define OMAP4_GPIO_SYSSTATUS		0x0114
> +#define OMAP4_GPIO_IRQENABLE1		0x011c
> +#define OMAP4_GPIO_WAKE_EN		0x0120
> +#define OMAP4_GPIO_IRQSTATUS2		0x0128
> +#define OMAP4_GPIO_IRQENABLE2		0x012c
>  #define OMAP4_GPIO_CTRL			0x0130
>  #define OMAP4_GPIO_OE			0x0134
>  #define OMAP4_GPIO_DATAIN		0x0138
> @@ -148,6 +152,10 @@
>  #define OMAP4_GPIO_FALLINGDETECT	0x014c
>  #define OMAP4_GPIO_DEBOUNCENABLE	0x0150
>  #define OMAP4_GPIO_DEBOUNCINGTIME	0x0154
> +#define OMAP4_GPIO_CLEARIRQENABLE1	0x0160
> +#define OMAP4_GPIO_SETIRQENABLE1	0x0164
> +#define OMAP4_GPIO_CLEARWKUENA		0x0180
> +#define OMAP4_GPIO_SETWKUENA		0x0184
>  #define OMAP4_GPIO_CLEARDATAOUT		0x0190
>  #define OMAP4_GPIO_SETDATAOUT		0x0194
>  /*
> @@ -591,12 +599,16 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int
> gpio)
>  		reg += OMAP7XX_GPIO_DATA_OUTPUT;
>  		break;
>  #endif
> -#ifdef CONFIG_ARCH_OMAP2PLUS
> +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
>  	case METHOD_GPIO_24XX:
> -	case METHOD_GPIO_44XX:
>  		reg += OMAP24XX_GPIO_DATAOUT;
>  		break;
>  #endif
> +#ifdef CONFIG_ARCH_OMAP4
> +	case METHOD_GPIO_44XX:
> +		reg += OMAP4_GPIO_DATAOUT;
> +		break;
> +#endif
>  	default:
>  		return -EINVAL;
>  	}
> @@ -1200,11 +1215,17 @@ static int omap_gpio_request(struct gpio_chip *chip,
> unsigned offset)
>  #endif
>  	if (!cpu_class_is_omap1()) {
>  		if (!bank->mod_usage) {
> +			void __iomem *reg = bank->base;
>  			u32 ctrl;
> -			ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
> -			ctrl &= 0xFFFFFFFE;
> +
> +			if (cpu_is_omap24xx() || cpu_is_omap34xx())
> +				reg += OMAP24XX_GPIO_CTRL;
> +			else if (cpu_is_omap44xx())
> +				reg += OMAP4_GPIO_CTRL;
> +			ctrl = __raw_readl(reg);
>  			/* Module is enabled, clocks are not gated */
> -			__raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL);
> +			ctrl &= 0xFFFFFFFE;
> +			__raw_writel(ctrl, reg);
>  		}
>  		bank->mod_usage |= 1 << offset;
>  	}
> @@ -1226,22 +1247,34 @@ static void omap_gpio_free(struct gpio_chip *chip,
> unsigned offset)
>  		__raw_writel(1 << offset, reg);
>  	}
>  #endif
> -#ifdef CONFIG_ARCH_OMAP2PLUS
> -	if ((bank->method == METHOD_GPIO_24XX) ||
> -			(bank->method == METHOD_GPIO_44XX)) {
> +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +	if (bank->method == METHOD_GPIO_24XX) {
>  		/* Disable wake-up during idle for dynamic tick */
>  		void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
>  		__raw_writel(1 << offset, reg);
>  	}
>  #endif
> +#ifdef CONFIG_ARCH_OMAP4
> +	if (bank->method == METHOD_GPIO_44XX) {
> +		/* Disable wake-up during idle for dynamic tick */
> +		void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
> +		__raw_writel(1 << offset, reg);
> +	}
> +#endif
>  	if (!cpu_class_is_omap1()) {
>  		bank->mod_usage &= ~(1 << offset);
>  		if (!bank->mod_usage) {
> +			void __iomem *reg = bank->base;
>  			u32 ctrl;
> -			ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
> +
> +			if (cpu_is_omap24xx() || cpu_is_omap34xx())
> +				reg += OMAP24XX_GPIO_CTRL;
> +			else if (cpu_is_omap44xx())
> +				reg += OMAP4_GPIO_CTRL;
> +			ctrl = __raw_readl(reg);
>  			/* Module is disabled, clocks are gated */
>  			ctrl |= 1;
> -			__raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL);
> +			__raw_writel(ctrl, reg);
>  		}
>  	}
>  	_reset_gpio(bank, bank->chip.base + offset);
> @@ -1570,9 +1603,14 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
>  		reg += OMAP7XX_GPIO_DIR_CONTROL;
>  		break;
>  	case METHOD_GPIO_24XX:
> -	case METHOD_GPIO_44XX:
>  		reg += OMAP24XX_GPIO_OE;
>  		break;
> +	case METHOD_GPIO_44XX:
> +		reg += OMAP4_GPIO_OE;
> +		break;
> +	default:
> +		WARN_ONCE(1, "gpio_is_input: incorrect OMAP GPIO method");
> +		return -EINVAL;
>  	}
>  	return __raw_readl(reg) & mask;
>  }
> --
> 1.6.3.3

Re: [PATCH V2] OMAP: GPIO: Fix OMAP4 GPIO reg access issues

[Kevin Hilman]

Charulatha V <charu@ti.com> writes:

> Access to some of the OMAP4 GPIO registers are not properly handled.
> This patch fixes it.
>
> This patch is tested on 3430SDP and 4430SDP boards
>
> Signed-off-by: Charulatha V <charu@ti.com>
> cc: Kevin Hilman <khilman@deeprootsystems.com>

Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

All this #ifdeffery will be gone with the in-progress hwmod
conversion, but this fix should go in in the meantime.

Kevin

OMAP Runtime APIs

[Varadarajan, Charulatha]

Kevin,

While adapting some drivers to HWMOD way, I tried using pm_runtime APIs. My understanding is that instead of using clock FW APIs or omap_device APIs, we can make use of pm_runtime APIs.

But, I observed that pm_runtime_enable() does not enable the clocks (fck/ick). 

To test this, I used origin/pm-wip/mmc branch. 

In omap_hsmmc_probe() function, I tried printing the values of CM_FCLKEN1_CORE and CM_ICLKEN1_CORE registers before and after pm_runtime_enable(). The values indicated that both before and after pm_runtime_enable(), the MMC clocks (fclk & iclk) are disabled. 

Strangely, I do not find any crash while accessing MMC registers with mmc iclk disabled.

If I use clock FW APIs to enable these clocks (after pm_runtime_enable()) and print these values, I could see those clocks enabled properly and values printed accordingly.

I observed similar behavior with Watchdog and found that access of some watchdog registers end up in crash if I use pm_runtime APIs (as the wdt iclk is not enabled while using pm_runtime_enable()), but works fine if I use clk FW APIS to enable clks.

I am using origin/pm-wip/runtime branch with patches to adapt watchdog to HWMOD FW on top of.

I use "omap3_defconfig" and test on 3430SDP.

On mmc branch I am working on top of the following commit:
commit fe64f0fab492651d7f9296b9d830f2c11844b546
Author: Kevin Hilman <khilman@deeprootsystems.com>
Date:   Wed Jan 20 09:48:52 2010 -0800

    OMAP2/3 MMC: initial conversion to runtime PM


Please clarify.

Thanks,
V Charulatha

Re: OMAP Runtime APIs

[Kevin Hilman]

Hi Charu,

"Varadarajan, Charulatha" <charu@ti.com> writes:

> While adapting some drivers to HWMOD way, I tried using pm_runtime
> APIs. My understanding is that instead of using clock FW APIs or
> omap_device APIs, we can make use of pm_runtime APIs.
>
> But, I observed that pm_runtime_enable() does not enable the clocks
> (fck/ick).

pm_runtime_enable() is not the equivalent of enabling the clocks.
This function simply enables runtime PM _functionality_ for that
device, it doesn't actually do any HW manipulation.

The way that clocks are enabled/disabled is by using the
pm_runtime_get*() and pm_runtime_put*() calls.  These do usage couting
in the runtime PM core and when there's a zero use-count, then
pm_runtime_idle() is called which will use omap_device API to disable
the clocks.  Similar for the enable path.

[...]

> I am using origin/pm-wip/runtime branch with patches to adapt
> watchdog to HWMOD FW on top of.
>
> I use "omap3_defconfig" and test on 3430SDP.
>
> On mmc branch I am working on top of the following commit:
> commit fe64f0fab492651d7f9296b9d830f2c11844b546
> Author: Kevin Hilman <khilman@deeprootsystems.com>
> Date:   Wed Jan 20 09:48:52 2010 -0800
>
>     OMAP2/3 MMC: initial conversion to runtime PM
>

I recommend you look at the details of this patch you will see that
the clock enable/disable calls were replaced by runtime PM _get() and
_put() calls.

The _enable() call is just done at _probe() time.

Hope that helps,

Kevin

[APPLIED] [PATCH V2] OMAP: GPIO: Fix OMAP4 GPIO reg access issues

[Tony Lindgren]

This patch has been applied to the linux-omap
by youw fwiendly patch wobot.

Branch in linux-omap: for-next

Initial commit ID (Likely to change): 27d714284a31693362bafeb124d5c400db20e2ad

PatchWorks
http://patchwork.kernel.org/patch/91247/

Git (Likely to change, and takes a while to get mirrored)
http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=27d714284a31693362bafeb124d5c400db20e2ad