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From: Marc Zyngier <maz@kernel.org>
To: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
Cc: scott@os.amperecomputing.com, kvm@vger.kernel.org,
	catalin.marinas@arm.com, keyur@os.amperecomputing.com,
	will@kernel.org, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/3] KVM: arm64: nv: Emulate ISTATUS when emulated timers are fired.
Date: Thu, 29 Dec 2022 13:53:15 +0000	[thread overview]
Message-ID: <87y1qqe2pg.wl-maz@kernel.org> (raw)
In-Reply-To: <20220824060304.21128-3-gankulkarni@os.amperecomputing.com>

On Wed, 24 Aug 2022 07:03:03 +0100,
Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com> wrote:
> 
> Guest-Hypervisor forwards the timer interrupt to Guest-Guest, if it is
> enabled, unmasked and ISTATUS bit of register CNTV_CTL_EL0 is set for a
> loaded timer.
> 
> For NV2 implementation, the Host-Hypervisor is not emulating the ISTATUS
> bit while forwarding the Emulated Vtimer Interrupt to Guest-Hypervisor.
> This results in the drop of interrupt from Guest-Hypervisor, where as
> Host Hypervisor marked it as an active interrupt and expecting Guest-Guest
> to consume and acknowledge. Due to this, some of the Guest-Guest vCPUs
> are stuck in Idle thread and rcu soft lockups are seen.
> 
> This issue is not seen with NV1 case since the register CNTV_CTL_EL0 read
> trap handler is emulating the ISTATUS bit.
> 
> Adding code to set/emulate the ISTATUS when the emulated timers are fired.
> 
> Signed-off-by: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
> ---
>  arch/arm64/kvm/arch_timer.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c
> index 27a6ec46803a..0b32d943d2d5 100644
> --- a/arch/arm64/kvm/arch_timer.c
> +++ b/arch/arm64/kvm/arch_timer.c
> @@ -63,6 +63,7 @@ static u64 kvm_arm_timer_read(struct kvm_vcpu *vcpu,
>  			      struct arch_timer_context *timer,
>  			      enum kvm_arch_timer_regs treg);
>  static bool kvm_arch_timer_get_input_level(int vintid);
> +static u64 read_timer_ctl(struct arch_timer_context *timer);
>  
>  static struct irq_ops arch_timer_irq_ops = {
>  	.get_input_level = kvm_arch_timer_get_input_level,
> @@ -356,6 +357,8 @@ static enum hrtimer_restart kvm_hrtimer_expire(struct hrtimer *hrt)
>  		return HRTIMER_RESTART;
>  	}
>  
> +	/* Timer emulated, emulate ISTATUS also */
> +	timer_set_ctl(ctx, read_timer_ctl(ctx));

Why should we do that for non-NV2 configurations?

>  	kvm_timer_update_irq(vcpu, true, ctx);
>  	return HRTIMER_NORESTART;
>  }
> @@ -458,6 +461,8 @@ static void timer_emulate(struct arch_timer_context *ctx)
>  	trace_kvm_timer_emulate(ctx, should_fire);
>  
>  	if (should_fire != ctx->irq.level) {
> +		/* Timer emulated, emulate ISTATUS also */
> +		timer_set_ctl(ctx, read_timer_ctl(ctx));
>  		kvm_timer_update_irq(ctx->vcpu, should_fire, ctx);
>  		return;
>  	}

I'm not overly keen on this. Yes, we can set the status bit there. But
conversely, the bit will not get cleared when the guest reprograms the
timer, and will take a full exit/entry cycle for it to appear.

Ergo, the architecture is buggy as memory (the VNCR page) cannot be
used to emulate something as dynamic as a timer.

It is only with FEAT_ECV that we can solve this correctly by trapping
the counter/timer accesses and emulate them for the guest hypervisor.
I'd rather we add support for that, as I expect all the FEAT_NV2
implementations to have it (and hopefully FEAT_FGT as well).

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
Cc: catalin.marinas@arm.com, will@kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	scott@os.amperecomputing.com, keyur@os.amperecomputing.com
Subject: Re: [PATCH 2/3] KVM: arm64: nv: Emulate ISTATUS when emulated timers are fired.
Date: Thu, 29 Dec 2022 13:53:15 +0000	[thread overview]
Message-ID: <87y1qqe2pg.wl-maz@kernel.org> (raw)
In-Reply-To: <20220824060304.21128-3-gankulkarni@os.amperecomputing.com>

On Wed, 24 Aug 2022 07:03:03 +0100,
Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com> wrote:
> 
> Guest-Hypervisor forwards the timer interrupt to Guest-Guest, if it is
> enabled, unmasked and ISTATUS bit of register CNTV_CTL_EL0 is set for a
> loaded timer.
> 
> For NV2 implementation, the Host-Hypervisor is not emulating the ISTATUS
> bit while forwarding the Emulated Vtimer Interrupt to Guest-Hypervisor.
> This results in the drop of interrupt from Guest-Hypervisor, where as
> Host Hypervisor marked it as an active interrupt and expecting Guest-Guest
> to consume and acknowledge. Due to this, some of the Guest-Guest vCPUs
> are stuck in Idle thread and rcu soft lockups are seen.
> 
> This issue is not seen with NV1 case since the register CNTV_CTL_EL0 read
> trap handler is emulating the ISTATUS bit.
> 
> Adding code to set/emulate the ISTATUS when the emulated timers are fired.
> 
> Signed-off-by: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
> ---
>  arch/arm64/kvm/arch_timer.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c
> index 27a6ec46803a..0b32d943d2d5 100644
> --- a/arch/arm64/kvm/arch_timer.c
> +++ b/arch/arm64/kvm/arch_timer.c
> @@ -63,6 +63,7 @@ static u64 kvm_arm_timer_read(struct kvm_vcpu *vcpu,
>  			      struct arch_timer_context *timer,
>  			      enum kvm_arch_timer_regs treg);
>  static bool kvm_arch_timer_get_input_level(int vintid);
> +static u64 read_timer_ctl(struct arch_timer_context *timer);
>  
>  static struct irq_ops arch_timer_irq_ops = {
>  	.get_input_level = kvm_arch_timer_get_input_level,
> @@ -356,6 +357,8 @@ static enum hrtimer_restart kvm_hrtimer_expire(struct hrtimer *hrt)
>  		return HRTIMER_RESTART;
>  	}
>  
> +	/* Timer emulated, emulate ISTATUS also */
> +	timer_set_ctl(ctx, read_timer_ctl(ctx));

Why should we do that for non-NV2 configurations?

>  	kvm_timer_update_irq(vcpu, true, ctx);
>  	return HRTIMER_NORESTART;
>  }
> @@ -458,6 +461,8 @@ static void timer_emulate(struct arch_timer_context *ctx)
>  	trace_kvm_timer_emulate(ctx, should_fire);
>  
>  	if (should_fire != ctx->irq.level) {
> +		/* Timer emulated, emulate ISTATUS also */
> +		timer_set_ctl(ctx, read_timer_ctl(ctx));
>  		kvm_timer_update_irq(ctx->vcpu, should_fire, ctx);
>  		return;
>  	}

I'm not overly keen on this. Yes, we can set the status bit there. But
conversely, the bit will not get cleared when the guest reprograms the
timer, and will take a full exit/entry cycle for it to appear.

Ergo, the architecture is buggy as memory (the VNCR page) cannot be
used to emulate something as dynamic as a timer.

It is only with FEAT_ECV that we can solve this correctly by trapping
the counter/timer accesses and emulate them for the guest hypervisor.
I'd rather we add support for that, as I expect all the FEAT_NV2
implementations to have it (and hopefully FEAT_FGT as well).

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
Cc: catalin.marinas@arm.com, will@kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	scott@os.amperecomputing.com, keyur@os.amperecomputing.com
Subject: Re: [PATCH 2/3] KVM: arm64: nv: Emulate ISTATUS when emulated timers are fired.
Date: Thu, 29 Dec 2022 13:53:15 +0000	[thread overview]
Message-ID: <87y1qqe2pg.wl-maz@kernel.org> (raw)
In-Reply-To: <20220824060304.21128-3-gankulkarni@os.amperecomputing.com>

On Wed, 24 Aug 2022 07:03:03 +0100,
Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com> wrote:
> 
> Guest-Hypervisor forwards the timer interrupt to Guest-Guest, if it is
> enabled, unmasked and ISTATUS bit of register CNTV_CTL_EL0 is set for a
> loaded timer.
> 
> For NV2 implementation, the Host-Hypervisor is not emulating the ISTATUS
> bit while forwarding the Emulated Vtimer Interrupt to Guest-Hypervisor.
> This results in the drop of interrupt from Guest-Hypervisor, where as
> Host Hypervisor marked it as an active interrupt and expecting Guest-Guest
> to consume and acknowledge. Due to this, some of the Guest-Guest vCPUs
> are stuck in Idle thread and rcu soft lockups are seen.
> 
> This issue is not seen with NV1 case since the register CNTV_CTL_EL0 read
> trap handler is emulating the ISTATUS bit.
> 
> Adding code to set/emulate the ISTATUS when the emulated timers are fired.
> 
> Signed-off-by: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
> ---
>  arch/arm64/kvm/arch_timer.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c
> index 27a6ec46803a..0b32d943d2d5 100644
> --- a/arch/arm64/kvm/arch_timer.c
> +++ b/arch/arm64/kvm/arch_timer.c
> @@ -63,6 +63,7 @@ static u64 kvm_arm_timer_read(struct kvm_vcpu *vcpu,
>  			      struct arch_timer_context *timer,
>  			      enum kvm_arch_timer_regs treg);
>  static bool kvm_arch_timer_get_input_level(int vintid);
> +static u64 read_timer_ctl(struct arch_timer_context *timer);
>  
>  static struct irq_ops arch_timer_irq_ops = {
>  	.get_input_level = kvm_arch_timer_get_input_level,
> @@ -356,6 +357,8 @@ static enum hrtimer_restart kvm_hrtimer_expire(struct hrtimer *hrt)
>  		return HRTIMER_RESTART;
>  	}
>  
> +	/* Timer emulated, emulate ISTATUS also */
> +	timer_set_ctl(ctx, read_timer_ctl(ctx));

Why should we do that for non-NV2 configurations?

>  	kvm_timer_update_irq(vcpu, true, ctx);
>  	return HRTIMER_NORESTART;
>  }
> @@ -458,6 +461,8 @@ static void timer_emulate(struct arch_timer_context *ctx)
>  	trace_kvm_timer_emulate(ctx, should_fire);
>  
>  	if (should_fire != ctx->irq.level) {
> +		/* Timer emulated, emulate ISTATUS also */
> +		timer_set_ctl(ctx, read_timer_ctl(ctx));
>  		kvm_timer_update_irq(ctx->vcpu, should_fire, ctx);
>  		return;
>  	}

I'm not overly keen on this. Yes, we can set the status bit there. But
conversely, the bit will not get cleared when the guest reprograms the
timer, and will take a full exit/entry cycle for it to appear.

Ergo, the architecture is buggy as memory (the VNCR page) cannot be
used to emulate something as dynamic as a timer.

It is only with FEAT_ECV that we can solve this correctly by trapping
the counter/timer accesses and emulate them for the guest hypervisor.
I'd rather we add support for that, as I expect all the FEAT_NV2
implementations to have it (and hopefully FEAT_FGT as well).

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2022-12-29 13:54 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-24  6:03 [PATCH 0/3] KVM: arm64: nv: Fixes for Nested Virtualization issues Ganapatrao Kulkarni
2022-08-24  6:03 ` Ganapatrao Kulkarni
2022-08-24  6:03 ` Ganapatrao Kulkarni
2022-08-24  6:03 ` [PATCH 1/3] KVM: arm64: nv: only emulate timers that have not yet fired Ganapatrao Kulkarni
2022-08-24  6:03   ` Ganapatrao Kulkarni
2022-08-24  6:03   ` Ganapatrao Kulkarni
2022-12-29 13:00   ` Marc Zyngier
2022-12-29 13:00     ` Marc Zyngier
2022-12-29 13:00     ` Marc Zyngier
2023-01-09 12:25     ` Ganapatrao Kulkarni
2023-01-09 12:25       ` Ganapatrao Kulkarni
2023-01-09 13:44       ` Marc Zyngier
2023-01-09 13:44         ` Marc Zyngier
2023-01-09 14:03         ` Ganapatrao Kulkarni
2023-01-09 14:03           ` Ganapatrao Kulkarni
2022-08-24  6:03 ` [PATCH 2/3] KVM: arm64: nv: Emulate ISTATUS when emulated timers are fired Ganapatrao Kulkarni
2022-08-24  6:03   ` Ganapatrao Kulkarni
2022-08-24  6:03   ` Ganapatrao Kulkarni
2022-12-29 13:53   ` Marc Zyngier [this message]
2022-12-29 13:53     ` Marc Zyngier
2022-12-29 13:53     ` Marc Zyngier
2023-01-02 11:46     ` Marc Zyngier
2023-01-02 11:46       ` Marc Zyngier
2023-01-02 11:46       ` Marc Zyngier
2023-01-03  4:21       ` Ganapatrao Kulkarni
2023-01-03  4:21         ` Ganapatrao Kulkarni
2023-01-03  4:21         ` Ganapatrao Kulkarni
2023-01-10  8:41       ` Ganapatrao Kulkarni
2023-01-10  8:41         ` Ganapatrao Kulkarni
2023-01-10 10:46         ` Marc Zyngier
2023-01-10 10:46           ` Marc Zyngier
2022-08-24  6:03 ` [PATCH 3/3] KVM: arm64: nv: Avoid block mapping if max_map_size is smaller than block size Ganapatrao Kulkarni
2022-08-24  6:03   ` Ganapatrao Kulkarni
2022-08-24  6:03   ` Ganapatrao Kulkarni
2022-12-29 17:42   ` Marc Zyngier
2022-12-29 17:42     ` Marc Zyngier
2022-12-29 17:42     ` Marc Zyngier
2023-01-03  4:26     ` Ganapatrao Kulkarni
2023-01-03  4:26       ` Ganapatrao Kulkarni
2023-01-03  4:26       ` Ganapatrao Kulkarni
2023-01-09 13:58       ` Ganapatrao Kulkarni
2023-01-09 13:58         ` Ganapatrao Kulkarni
2022-10-10  5:56 ` [PATCH 0/3] KVM: arm64: nv: Fixes for Nested Virtualization issues Ganapatrao Kulkarni
2022-10-10  5:56   ` Ganapatrao Kulkarni
2022-10-10  5:56   ` Ganapatrao Kulkarni
2022-10-19  7:59   ` Marc Zyngier
2022-10-19  7:59     ` Marc Zyngier
2022-10-19  7:59     ` Marc Zyngier
2023-01-10 12:17 ` Ganapatrao Kulkarni
2023-01-10 12:17   ` Ganapatrao Kulkarni
2023-01-10 14:05   ` Marc Zyngier
2023-01-10 14:05     ` Marc Zyngier
2023-01-10 21:54   ` Marc Zyngier
2023-01-10 21:54     ` Marc Zyngier
2023-01-11  7:54     ` Marc Zyngier
2023-01-11  7:54       ` Marc Zyngier
2023-01-11  8:46     ` Ganapatrao Kulkarni
2023-01-11  8:46       ` Ganapatrao Kulkarni
2023-01-11  8:48       ` Ganapatrao Kulkarni
2023-01-11  8:48         ` Ganapatrao Kulkarni
2023-01-11 11:39       ` Marc Zyngier
2023-01-11 11:39         ` Marc Zyngier
2023-01-11 12:46         ` Ganapatrao Kulkarni
2023-01-11 12:46           ` Ganapatrao Kulkarni
2023-01-11 13:36           ` Marc Zyngier
2023-01-11 13:36             ` Marc Zyngier

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