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From: Marc Zyngier <maz@kernel.org>
To: Will Deacon <will@kernel.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	linux-kernel@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V2] arm64/cpufeature: Drop open encodings while extracting parange
Date: Mon, 18 May 2020 19:46:58 +0100	[thread overview]
Message-ID: <87y2ppytb1.wl-maz@kernel.org> (raw)
In-Reply-To: <20200518170934.GT32394@willie-the-truck>

On Mon, 18 May 2020 18:09:34 +0100,
Will Deacon <will@kernel.org> wrote:
> 
> On Mon, May 18, 2020 at 05:59:59PM +0100, Will Deacon wrote:
> > On Wed, May 13, 2020 at 02:33:34PM +0530, Anshuman Khandual wrote:
> > > Currently there are multiple instances of parange feature width mask open
> > > encodings while fetching it's value. Even the width mask value (0x7) itself
> > > is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as in
> > > ARM ARM (0487F.a). Replace them with cpuid_feature_extract_unsigned_field()
> > > which can extract given standard feature (4 bits width i.e 0xf mask) field.
> > > 
> > > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > > Cc: Will Deacon <will@kernel.org>
> > > Cc: Marc Zyngier <maz@kernel.org>
> > > Cc: James Morse <james.morse@arm.com>
> > > Cc: kvmarm@lists.cs.columbia.edu
> > > Cc: linux-arm-kernel@lists.infradead.org
> > > Cc: linux-kernel@vger.kernel.org
> > > 
> > > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> > > ---
> > > Changes in V2:
> > > 
> > > - Used cpuid_feature_extract_unsigned_field() per Mark
> > > 
> > > Changes in V1: (https://patchwork.kernel.org/patch/11541913/)
> > > 
> > >  arch/arm64/kernel/cpufeature.c |  3 ++-
> > >  arch/arm64/kvm/reset.c         | 11 ++++++++---
> > >  2 files changed, 10 insertions(+), 4 deletions(-)
> > 
> > Acked-by: Will Deacon <will@kernel.org>
> > 
> > I'm assuming Marc will take this, but let me know if it should go via arm64
> > instead (where we have a bunch of other cpufeature stuff queued).
> 
> Hmm, but having just spotted [1], it looks like we might need a bit of
> co-ordination here. Marc?

Yeah, there is a clear dependency between the two. I'm happy to take
both patches via the KVM tree, or to have a shared branch with the
arm64 tree (we already have one for Andrew's generic AT patch).

Just let me know,

	M.

-- 
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Will Deacon <will@kernel.org>
Cc: mark.rutland@arm.com,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	linux-kernel@vger.kernel.org, James Morse <james.morse@arm.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V2] arm64/cpufeature: Drop open encodings while extracting parange
Date: Mon, 18 May 2020 19:46:58 +0100	[thread overview]
Message-ID: <87y2ppytb1.wl-maz@kernel.org> (raw)
In-Reply-To: <20200518170934.GT32394@willie-the-truck>

On Mon, 18 May 2020 18:09:34 +0100,
Will Deacon <will@kernel.org> wrote:
> 
> On Mon, May 18, 2020 at 05:59:59PM +0100, Will Deacon wrote:
> > On Wed, May 13, 2020 at 02:33:34PM +0530, Anshuman Khandual wrote:
> > > Currently there are multiple instances of parange feature width mask open
> > > encodings while fetching it's value. Even the width mask value (0x7) itself
> > > is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as in
> > > ARM ARM (0487F.a). Replace them with cpuid_feature_extract_unsigned_field()
> > > which can extract given standard feature (4 bits width i.e 0xf mask) field.
> > > 
> > > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > > Cc: Will Deacon <will@kernel.org>
> > > Cc: Marc Zyngier <maz@kernel.org>
> > > Cc: James Morse <james.morse@arm.com>
> > > Cc: kvmarm@lists.cs.columbia.edu
> > > Cc: linux-arm-kernel@lists.infradead.org
> > > Cc: linux-kernel@vger.kernel.org
> > > 
> > > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> > > ---
> > > Changes in V2:
> > > 
> > > - Used cpuid_feature_extract_unsigned_field() per Mark
> > > 
> > > Changes in V1: (https://patchwork.kernel.org/patch/11541913/)
> > > 
> > >  arch/arm64/kernel/cpufeature.c |  3 ++-
> > >  arch/arm64/kvm/reset.c         | 11 ++++++++---
> > >  2 files changed, 10 insertions(+), 4 deletions(-)
> > 
> > Acked-by: Will Deacon <will@kernel.org>
> > 
> > I'm assuming Marc will take this, but let me know if it should go via arm64
> > instead (where we have a bunch of other cpufeature stuff queued).
> 
> Hmm, but having just spotted [1], it looks like we might need a bit of
> co-ordination here. Marc?

Yeah, there is a clear dependency between the two. I'm happy to take
both patches via the KVM tree, or to have a shared branch with the
arm64 tree (we already have one for Andrew's generic AT patch).

Just let me know,

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Will Deacon <will@kernel.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>,
	mark.rutland@arm.com, Catalin Marinas <catalin.marinas@arm.com>,
	linux-kernel@vger.kernel.org, James Morse <james.morse@arm.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V2] arm64/cpufeature: Drop open encodings while extracting parange
Date: Mon, 18 May 2020 19:46:58 +0100	[thread overview]
Message-ID: <87y2ppytb1.wl-maz@kernel.org> (raw)
In-Reply-To: <20200518170934.GT32394@willie-the-truck>

On Mon, 18 May 2020 18:09:34 +0100,
Will Deacon <will@kernel.org> wrote:
> 
> On Mon, May 18, 2020 at 05:59:59PM +0100, Will Deacon wrote:
> > On Wed, May 13, 2020 at 02:33:34PM +0530, Anshuman Khandual wrote:
> > > Currently there are multiple instances of parange feature width mask open
> > > encodings while fetching it's value. Even the width mask value (0x7) itself
> > > is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as in
> > > ARM ARM (0487F.a). Replace them with cpuid_feature_extract_unsigned_field()
> > > which can extract given standard feature (4 bits width i.e 0xf mask) field.
> > > 
> > > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > > Cc: Will Deacon <will@kernel.org>
> > > Cc: Marc Zyngier <maz@kernel.org>
> > > Cc: James Morse <james.morse@arm.com>
> > > Cc: kvmarm@lists.cs.columbia.edu
> > > Cc: linux-arm-kernel@lists.infradead.org
> > > Cc: linux-kernel@vger.kernel.org
> > > 
> > > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> > > ---
> > > Changes in V2:
> > > 
> > > - Used cpuid_feature_extract_unsigned_field() per Mark
> > > 
> > > Changes in V1: (https://patchwork.kernel.org/patch/11541913/)
> > > 
> > >  arch/arm64/kernel/cpufeature.c |  3 ++-
> > >  arch/arm64/kvm/reset.c         | 11 ++++++++---
> > >  2 files changed, 10 insertions(+), 4 deletions(-)
> > 
> > Acked-by: Will Deacon <will@kernel.org>
> > 
> > I'm assuming Marc will take this, but let me know if it should go via arm64
> > instead (where we have a bunch of other cpufeature stuff queued).
> 
> Hmm, but having just spotted [1], it looks like we might need a bit of
> co-ordination here. Marc?

Yeah, there is a clear dependency between the two. I'm happy to take
both patches via the KVM tree, or to have a shared branch with the
arm64 tree (we already have one for Andrew's generic AT patch).

Just let me know,

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2020-05-18 18:47 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-13  9:03 [PATCH V2] arm64/cpufeature: Drop open encodings while extracting parange Anshuman Khandual
2020-05-13  9:03 ` Anshuman Khandual
2020-05-13  9:03 ` Anshuman Khandual
2020-05-18 16:59 ` Will Deacon
2020-05-18 16:59   ` Will Deacon
2020-05-18 16:59   ` Will Deacon
2020-05-18 17:09   ` Will Deacon
2020-05-18 17:09     ` Will Deacon
2020-05-18 17:09     ` Will Deacon
2020-05-18 18:46     ` Marc Zyngier [this message]
2020-05-18 18:46       ` Marc Zyngier
2020-05-18 18:46       ` Marc Zyngier
2020-05-20 14:05 ` Marc Zyngier
2020-05-20 14:05   ` Marc Zyngier
2020-05-20 14:05   ` Marc Zyngier
2020-05-20 17:54 ` Will Deacon
2020-05-20 17:54   ` Will Deacon
2020-05-20 17:54   ` Will Deacon

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