* [PATCH] x86: tsc: Add missing Cherrytrail frequency to the table
@ 2016-05-11 14:09 Compostella, Jeremy
2016-05-11 15:23 ` Compostella, Jeremy
0 siblings, 1 reply; 3+ messages in thread
From: Compostella, Jeremy @ 2016-05-11 14:09 UTC (permalink / raw)
To: Ingo Molnar, H. Peter Anvin; +Cc: linux-kernel
Intel Cherrytrail is based on Airmont core so MSR_FSB_FREQ[2:0] = 4
means that the CPU reference clock runs at 80MHz. Add this missing
frequency to the table.
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
---
arch/x86/kernel/tsc_msr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index 6aa0f4d..89694a7 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -23,6 +23,7 @@
#include <asm/param.h>
/* CPU reference clock frequency: in KHz */
+#define FREQ_80 80000
#define FREQ_83 83200
#define FREQ_100 99840
#define FREQ_133 133200
@@ -56,6 +57,8 @@ static struct freq_desc freq_desc_tables[] = {
{ 6, 0x37, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, 0, 0, 0, 0 } },
/* ANN */
{ 6, 0x5a, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_100, 0, 0, 0, 0 } },
+ /* AIRMONT */
+ { 6, 0x4c, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, FREQ_80, 0, 0, 0 } },
};
static int match_cpu(u8 family, u8 model)
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] x86: tsc: Add missing Cherrytrail frequency to the table
2016-05-11 14:09 [PATCH] x86: tsc: Add missing Cherrytrail frequency to the table Compostella, Jeremy
@ 2016-05-11 15:23 ` Compostella, Jeremy
2016-05-12 12:34 ` [tip:x86/urgent] x86/tsc: " tip-bot for Jeremy Compostella
0 siblings, 1 reply; 3+ messages in thread
From: Compostella, Jeremy @ 2016-05-11 15:23 UTC (permalink / raw)
To: Ingo Molnar; +Cc: H. Peter Anvin, linux-kernel
Intel Cherrytrail is based on Airmont core so MSR_FSB_FREQ[2:0] = 4
means that the CPU reference clock runs at 80MHz. Add this missing
frequency to the table.
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
---
arch/x86/kernel/tsc_msr.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index 6aa0f4d..ab271a7 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -23,6 +23,7 @@
#include <asm/param.h>
/* CPU reference clock frequency: in KHz */
+#define FREQ_80 80000
#define FREQ_83 83200
#define FREQ_100 99840
#define FREQ_133 133200
@@ -56,6 +57,9 @@ static struct freq_desc freq_desc_tables[] = {
{ 6, 0x37, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, 0, 0, 0, 0 } },
/* ANN */
{ 6, 0x5a, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_100, 0, 0, 0, 0 } },
+ /* AIRMONT */
+ { 6, 0x4c, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, FREQ_80,
+ 0, 0, 0 } },
};
static int match_cpu(u8 family, u8 model)
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* [tip:x86/urgent] x86/tsc: Add missing Cherrytrail frequency to the table
2016-05-11 15:23 ` Compostella, Jeremy
@ 2016-05-12 12:34 ` tip-bot for Jeremy Compostella
0 siblings, 0 replies; 3+ messages in thread
From: tip-bot for Jeremy Compostella @ 2016-05-12 12:34 UTC (permalink / raw)
To: linux-tip-commits; +Cc: mingo, jeremy.compostella, hpa, linux-kernel, tglx
Commit-ID: e2724e9d969294879936daf7833d4adda26c8efc
Gitweb: http://git.kernel.org/tip/e2724e9d969294879936daf7833d4adda26c8efc
Author: Jeremy Compostella <jeremy.compostella@intel.com>
AuthorDate: Wed, 11 May 2016 17:23:34 +0200
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Thu, 12 May 2016 14:27:14 +0200
x86/tsc: Add missing Cherrytrail frequency to the table
Intel Cherrytrail is based on Airmont core so MSR_FSB_FREQ[2:0] = 4
means that the CPU reference clock runs at 80MHz. Add this missing
frequency to the table.
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Link: http://lkml.kernel.org/r/87y47gty89.fsf@intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/kernel/tsc_msr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index 6aa0f4d..9911a06 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -23,6 +23,7 @@
#include <asm/param.h>
/* CPU reference clock frequency: in KHz */
+#define FREQ_80 80000
#define FREQ_83 83200
#define FREQ_100 99840
#define FREQ_133 133200
@@ -56,6 +57,8 @@ static struct freq_desc freq_desc_tables[] = {
{ 6, 0x37, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, 0, 0, 0, 0 } },
/* ANN */
{ 6, 0x5a, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_100, 0, 0, 0, 0 } },
+ /* AIRMONT */
+ { 6, 0x4c, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, FREQ_80, 0, 0, 0 } },
};
static int match_cpu(u8 family, u8 model)
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2016-05-12 12:34 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-05-11 14:09 [PATCH] x86: tsc: Add missing Cherrytrail frequency to the table Compostella, Jeremy
2016-05-11 15:23 ` Compostella, Jeremy
2016-05-12 12:34 ` [tip:x86/urgent] x86/tsc: " tip-bot for Jeremy Compostella
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.