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From: Philippe Gerum <rpm@xenomai.org>
To: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Tobias Schaffner <tobias.schaffner@siemens.com>,
	 Florian Bezdeka <florian.bezdeka@siemens.com>,
	 xenomai@lists.linux.dev
Subject: Re: [PATCH linux-evl 0/2] Add RISC-V support to EVL
Date: Wed, 08 Jul 2026 10:55:36 +0200	[thread overview]
Message-ID: <87zf01lv1z.fsf@xenomai.org> (raw)
In-Reply-To: <bd2c18af-c93e-43fb-81ef-14cdd31a8bba@siemens.com> (Jan Kiszka's message of "Wed, 8 Jul 2026 09:23:45 +0200")

Jan Kiszka <jan.kiszka@siemens.com> writes:

> On 08.07.26 08:26, Tobias Schaffner wrote:
>> 
>> 
>> On 7/8/26 08:07, Jan Kiszka wrote:
>>> On 08.07.26 07:17, Tobias Schaffner wrote:
>>>> On 7/8/26 00:30, Florian Bezdeka wrote:
>>>>> On Fri, 2025-10-10 at 12:10 +0200, Tobias Schaffner wrote:
>>>>>> Hi all,
>>>>>>
>>>>>> this series introduces an initial EVL port for RISC-V.
>>>>>>
>>>>>> While some tests are still failing, I’d like to share this early
>>>>>> version with the community to gather feedback, reviews, and hopefully
>>>>>> some assistance in refining the port.
>>>>>>
>>>>>> The patches have been tested in combination with the Dovetail RISC-V
>>>>>> port on top of v6.12-evl1-rebase.
>>>>>>
>>>>>> Looking forward to your feedback and suggestions.
>>>>>>
>>>>>
>>>>> I tried to apply this series today, and run into the following issues
>>>>> reported by my tooling.
>>>>>
>>>>> Patch 1 is fine, patch 2 has some checkpatch findings.
>>>>>
>>>>> A couple of debatable warnings like:
>>>>>
>>>>> WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead
>>>>> #58: FILE: arch/riscv/include/uapi/asm/evl/fptest.h:2:
>>>>> + * SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
>>>>>
>>>>> WARNING: unnecessary whitespace before a quoted newline
>>>>> #95: FILE: arch/riscv/include/uapi/asm/evl/fptest.h:34:
>>>>> +
>>>>>
>>>>> In addition to a serious one:
>>>>>
>>>>> ERROR: Missing Signed-off-by: line by nominal patch author 'shannmu
>>>>> <shanmu1901@gmail.com>'
>>>>
>>>> I did not get any responses from this email anymore. I can try to reach
>>>> out to him one last time, but what do we do about it if he will not
>>>> reply?
>>>>
>>>
>>> If I read that patch correctly, it's majority is taken from the
>>> corresponding Xenomai 3 logic. How much is unique contribution, how much
>>> was your work, Tobias?
>> 
>> I added the evl_set_fpregs/evl_check_fpregs content which is a
>> translation from what Gilles Chanteperdrix
>> <gilles.chanteperdrix@xenomai.org> did for the x86 and arm architectures
>> with some isa enablement bits added.
>> 
>> This should be the initial version by shanmu where I added this on top:
>> https://github.com/shannmu/linux/blob/xenomai4/wip/dovetail-riscv/
>> evl_port/arch/riscv/include/asm/evl/fptest.h
>> 
>
> At least for this patch, I think it would be fair to claim authorship
> for the final one and only refer to shanmu as provider of a baseline.
>

Agreed.  This is a trivial adaptation of the pre-existing
arch/arm*/include/asm/evl/fptest.h, which is in and of itself
boilerplate code.

-- 
Philippe.

  reply	other threads:[~2026-07-08  8:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-10 10:10 [PATCH linux-evl 0/2] Add RISC-V support to EVL Tobias Schaffner
2025-10-10 10:10 ` [PATCH 1/2] riscv: Add EVL core Tobias Schaffner
2025-10-10 10:10 ` [PATCH 2/2] riscv: Add FPU register test support Tobias Schaffner
2026-07-07 22:30 ` [PATCH linux-evl 0/2] Add RISC-V support to EVL Florian Bezdeka
2026-07-08  5:17   ` Tobias Schaffner
2026-07-08  6:07     ` Jan Kiszka
2026-07-08  6:26       ` Tobias Schaffner
2026-07-08  6:33         ` Tobias Schaffner
2026-07-08  7:23         ` Jan Kiszka
2026-07-08  8:55           ` Philippe Gerum [this message]
2026-07-08  9:51             ` Florian Bezdeka
2026-07-08 15:32               ` Jan Kiszka
2026-07-08 15:54                 ` Florian Bezdeka
2026-07-08 15:58                 ` Tobias Schaffner

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