Re: [RFC PATCH 27/35] target/arm: wrap event_register in a union

["Alex Bennée" <alex.bennee@linaro.org>]

Richard Henderson <richard.henderson@linaro.org> writes:

> On 3/21/26 00:05, Alex Bennée wrote:
>> While the event register is either set or not due to the
>> implementation defined nature of bool types we can't set it directly
>> from TCG code. By wrapping in a union we can alias a 32 bit value to
>> the bool in a future patch.
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>>   target/arm/cpu.h           | 9 +++++++--
>>   hw/intc/armv7m_nvic.c      | 2 +-
>>   target/arm/machine.c       | 4 ++--
>>   target/arm/tcg/m_helper.c  | 4 ++--
>>   target/arm/tcg/op_helper.c | 6 +++---
>>   5 files changed, 15 insertions(+), 10 deletions(-)
>> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
>> index bf6cf74c2e1..9c25b60ae83 100644
>> --- a/target/arm/cpu.h
>> +++ b/target/arm/cpu.h
>> @@ -763,9 +763,14 @@ typedef struct CPUArchState {
>>       /*
>>        * The event register is shared by all ARM profiles (A/R/M),
>>        * so it is stored in the top-level CPU state.
>> -     * WFE/SEV handling is currently implemented only for M-profile.
>> +     *
>> +     * It is treated as a boolean but we need the union so we can set
>> +     * it from TCG.
>>        */
>> -    bool event_register;
>> +    union {
>> +        bool as_bool;
>> +        uint32_t as_uint32;
>> +    } event_register;
>
> What are you attempting here?  This smells like a big-endian bug.
>
> TCG is certainly capable of storing to a bool, via tcg_gen_st8_*.

So the problem I had was I don't know what size bool will be as its up
to each architecture to define the size. I originally had a compile time
assert but that failed. Hence this hack to put something that would
plausibly overlap.

I wonder if there would be a way to use a Generic so tcg_gen_st8_bool
would always map to the right size whichever arch we are on?

>
>
> r~

-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro