* [PATCH v3 01/25] system/physmem: Inline and remove leul_to_cpu()
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-24 15:21 ` [PATCH v3 02/25] system/physmem: Convert DEBUG_SUBPAGE printf() to trace events Philippe Mathieu-Daudé
` (23 subsequent siblings)
24 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
leul_to_cpu() is only used within physmem.c: inline it
and remove.
Since @bitmap is of 'unsigned long' type, use its size
with ldn_le_p() instead of using HOST_LONG_BITS.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
include/qemu/bswap.h | 11 -----------
system/physmem.c | 5 +++--
2 files changed, 3 insertions(+), 13 deletions(-)
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index 39ba64046a6..65a1b3634f4 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -375,17 +375,6 @@ static inline void stq_be_p(void *ptr, uint64_t v)
stq_he_p(ptr, be_bswap(v, 64));
}
-static inline unsigned long leul_to_cpu(unsigned long v)
-{
-#if HOST_LONG_BITS == 32
- return le_bswap(v, 32);
-#elif HOST_LONG_BITS == 64
- return le_bswap(v, 64);
-#else
-# error Unknown sizeof long
-#endif
-}
-
/* Store v to p as a sz byte value in host order */
#define DO_STN_LDN_P(END) \
static inline void stn_## END ## _p(void *ptr, int sz, uint64_t v) \
diff --git a/system/physmem.c b/system/physmem.c
index c9869e4049f..1292f49095f 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -1254,7 +1254,8 @@ uint64_t physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
for (k = 0; k < nr; k++) {
if (bitmap[k]) {
- unsigned long temp = leul_to_cpu(bitmap[k]);
+ unsigned long temp = ldn_le_p(&bitmap[k],
+ sizeof(bitmap[k]));
nbits = ctpopl(temp);
qatomic_or(&blocks[DIRTY_MEMORY_VGA][idx][offset], temp);
@@ -1301,7 +1302,7 @@ uint64_t physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
*/
for (i = 0; i < len; i++) {
if (bitmap[i] != 0) {
- c = leul_to_cpu(bitmap[i]);
+ c = ldn_le_p(&bitmap[i], sizeof(bitmap[i]));
nbits = ctpopl(c);
if (unlikely(global_dirty_tracking & GLOBAL_DIRTY_DIRTY_RATE)) {
total_dirty_pages += nbits;
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* [PATCH v3 02/25] system/physmem: Convert DEBUG_SUBPAGE printf() to trace events
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
2025-12-24 15:21 ` [PATCH v3 01/25] system/physmem: Inline and remove leul_to_cpu() Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-24 19:02 ` Manos Pitsidianakis
2025-12-29 0:47 ` Richard Henderson
2025-12-24 15:21 ` [PATCH v3 03/25] system/physmem: Use explicit endianness in subpage_ops::read/write() Philippe Mathieu-Daudé
` (22 subsequent siblings)
24 siblings, 2 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Defining DEBUG_SUBPAGE allows to use raw printf() statements to
print information about some events; convert these to tracepoints.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/physmem.c | 29 ++++++-----------------------
system/trace-events | 6 ++++++
2 files changed, 12 insertions(+), 23 deletions(-)
diff --git a/system/physmem.c b/system/physmem.c
index 1292f49095f..7e914ecf648 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -91,8 +91,6 @@
#include "memory-internal.h"
-//#define DEBUG_SUBPAGE
-
/* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
* are protected by the ramlist lock.
*/
@@ -2903,10 +2901,7 @@ static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
uint8_t buf[8];
MemTxResult res;
-#if defined(DEBUG_SUBPAGE)
- printf("%s: subpage %p len %u addr " HWADDR_FMT_plx "\n", __func__,
- subpage, len, addr);
-#endif
+ trace_subpage_read(subpage, len, addr);
res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
if (res) {
return res;
@@ -2921,11 +2916,7 @@ static MemTxResult subpage_write(void *opaque, hwaddr addr,
subpage_t *subpage = opaque;
uint8_t buf[8];
-#if defined(DEBUG_SUBPAGE)
- printf("%s: subpage %p len %u addr " HWADDR_FMT_plx
- " value %"PRIx64"\n",
- __func__, subpage, len, addr, value);
-#endif
+ trace_subpage_write(subpage, len, addr, value);
stn_p(buf, len, value);
return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
}
@@ -2935,10 +2926,8 @@ static bool subpage_accepts(void *opaque, hwaddr addr,
MemTxAttrs attrs)
{
subpage_t *subpage = opaque;
-#if defined(DEBUG_SUBPAGE)
- printf("%s: subpage %p %c len %u addr " HWADDR_FMT_plx "\n",
- __func__, subpage, is_write ? 'w' : 'r', len, addr);
-#endif
+
+ trace_subpage_accepts(subpage, is_write ? 'w' : 'r', len, addr);
return flatview_access_valid(subpage->fv, addr + subpage->base,
len, is_write, attrs);
@@ -2964,10 +2953,7 @@ static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
return -1;
idx = SUBPAGE_IDX(start);
eidx = SUBPAGE_IDX(end);
-#if defined(DEBUG_SUBPAGE)
- printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
- __func__, mmio, start, end, idx, eidx, section);
-#endif
+ trace_subpage_register(mmio, start, end, idx, eidx, section);
for (; idx <= eidx; idx++) {
mmio->sub_section[idx] = section;
}
@@ -2986,10 +2972,7 @@ static subpage_t *subpage_init(FlatView *fv, hwaddr base)
memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
NULL, TARGET_PAGE_SIZE);
mmio->iomem.subpage = true;
-#if defined(DEBUG_SUBPAGE)
- printf("%s: %p base " HWADDR_FMT_plx " len %08x\n", __func__,
- mmio, base, TARGET_PAGE_SIZE);
-#endif
+ trace_subpage_init(mmio, base, TARGET_PAGE_SIZE);
return mmio;
}
diff --git a/system/trace-events b/system/trace-events
index 82856e44f2e..6d29a823f04 100644
--- a/system/trace-events
+++ b/system/trace-events
@@ -35,6 +35,12 @@ find_ram_offset_loop(uint64_t size, uint64_t candidate, uint64_t offset, uint64_
ram_block_discard_range(const char *rbname, void *hva, size_t length, bool need_madvise, bool need_fallocate, int ret) "%s@%p + 0x%zx: madvise: %d fallocate: %d ret: %d"
qemu_ram_alloc_shared(const char *name, size_t size, size_t max_size, int fd, void *host) "%s size %zu max_size %zu fd %d host %p"
+subpage_register(void *subpage, uint32_t start, uint32_t end, int idx, int eidx, uint16_t section) "subpage %p start 0x%08x end 0x%08x idx 0x%08x eidx 0x%08x section %u"
+subpage_init(void *subpage, uint64_t base, uint64_t len) "subpage %p base 0x%08" PRIx64 " len 0x%08" PRIx64
+subpage_accepts(void *subpage, char access, unsigned len, uint64_t addr) "subpage %p %c len %u addr 0x%" PRIx64
+subpage_read(void *subpage, unsigned len, uint64_t addr) "subpage %p len %u addr 0x%" PRIx64
+subpage_write(void *subpage, unsigned len, uint64_t addr, uint64_t value) "subpage %p len %u addr 0x%" PRIx64 " value 0x%" PRIx64
+
# cpus.c
vm_stop_flush_all(int ret) "ret %d"
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 02/25] system/physmem: Convert DEBUG_SUBPAGE printf() to trace events
2025-12-24 15:21 ` [PATCH v3 02/25] system/physmem: Convert DEBUG_SUBPAGE printf() to trace events Philippe Mathieu-Daudé
@ 2025-12-24 19:02 ` Manos Pitsidianakis
2025-12-29 0:47 ` Richard Henderson
1 sibling, 0 replies; 62+ messages in thread
From: Manos Pitsidianakis @ 2025-12-24 19:02 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Paolo Bonzini, Pierrick Bouvier, Peter Xu,
Richard Henderson, Anton Johansson, David Hildenbrand
On Wed, Dec 24, 2025 at 5:22 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Defining DEBUG_SUBPAGE allows to use raw printf() statements to
> print information about some events; convert these to tracepoints.
>
> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
> system/physmem.c | 29 ++++++-----------------------
> system/trace-events | 6 ++++++
> 2 files changed, 12 insertions(+), 23 deletions(-)
>
> diff --git a/system/physmem.c b/system/physmem.c
> index 1292f49095f..7e914ecf648 100644
> --- a/system/physmem.c
> +++ b/system/physmem.c
> @@ -91,8 +91,6 @@
>
> #include "memory-internal.h"
>
> -//#define DEBUG_SUBPAGE
> -
> /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
> * are protected by the ramlist lock.
> */
> @@ -2903,10 +2901,7 @@ static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
> uint8_t buf[8];
> MemTxResult res;
>
> -#if defined(DEBUG_SUBPAGE)
> - printf("%s: subpage %p len %u addr " HWADDR_FMT_plx "\n", __func__,
> - subpage, len, addr);
> -#endif
> + trace_subpage_read(subpage, len, addr);
> res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
> if (res) {
> return res;
> @@ -2921,11 +2916,7 @@ static MemTxResult subpage_write(void *opaque, hwaddr addr,
> subpage_t *subpage = opaque;
> uint8_t buf[8];
>
> -#if defined(DEBUG_SUBPAGE)
> - printf("%s: subpage %p len %u addr " HWADDR_FMT_plx
> - " value %"PRIx64"\n",
> - __func__, subpage, len, addr, value);
> -#endif
> + trace_subpage_write(subpage, len, addr, value);
> stn_p(buf, len, value);
> return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
> }
> @@ -2935,10 +2926,8 @@ static bool subpage_accepts(void *opaque, hwaddr addr,
> MemTxAttrs attrs)
> {
> subpage_t *subpage = opaque;
> -#if defined(DEBUG_SUBPAGE)
> - printf("%s: subpage %p %c len %u addr " HWADDR_FMT_plx "\n",
> - __func__, subpage, is_write ? 'w' : 'r', len, addr);
> -#endif
> +
> + trace_subpage_accepts(subpage, is_write ? 'w' : 'r', len, addr);
>
> return flatview_access_valid(subpage->fv, addr + subpage->base,
> len, is_write, attrs);
> @@ -2964,10 +2953,7 @@ static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
> return -1;
> idx = SUBPAGE_IDX(start);
> eidx = SUBPAGE_IDX(end);
> -#if defined(DEBUG_SUBPAGE)
> - printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
> - __func__, mmio, start, end, idx, eidx, section);
> -#endif
> + trace_subpage_register(mmio, start, end, idx, eidx, section);
> for (; idx <= eidx; idx++) {
> mmio->sub_section[idx] = section;
> }
> @@ -2986,10 +2972,7 @@ static subpage_t *subpage_init(FlatView *fv, hwaddr base)
> memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
> NULL, TARGET_PAGE_SIZE);
> mmio->iomem.subpage = true;
> -#if defined(DEBUG_SUBPAGE)
> - printf("%s: %p base " HWADDR_FMT_plx " len %08x\n", __func__,
> - mmio, base, TARGET_PAGE_SIZE);
> -#endif
> + trace_subpage_init(mmio, base, TARGET_PAGE_SIZE);
>
> return mmio;
> }
> diff --git a/system/trace-events b/system/trace-events
> index 82856e44f2e..6d29a823f04 100644
> --- a/system/trace-events
> +++ b/system/trace-events
> @@ -35,6 +35,12 @@ find_ram_offset_loop(uint64_t size, uint64_t candidate, uint64_t offset, uint64_
> ram_block_discard_range(const char *rbname, void *hva, size_t length, bool need_madvise, bool need_fallocate, int ret) "%s@%p + 0x%zx: madvise: %d fallocate: %d ret: %d"
> qemu_ram_alloc_shared(const char *name, size_t size, size_t max_size, int fd, void *host) "%s size %zu max_size %zu fd %d host %p"
>
> +subpage_register(void *subpage, uint32_t start, uint32_t end, int idx, int eidx, uint16_t section) "subpage %p start 0x%08x end 0x%08x idx 0x%08x eidx 0x%08x section %u"
> +subpage_init(void *subpage, uint64_t base, uint64_t len) "subpage %p base 0x%08" PRIx64 " len 0x%08" PRIx64
> +subpage_accepts(void *subpage, char access, unsigned len, uint64_t addr) "subpage %p %c len %u addr 0x%" PRIx64
> +subpage_read(void *subpage, unsigned len, uint64_t addr) "subpage %p len %u addr 0x%" PRIx64
> +subpage_write(void *subpage, unsigned len, uint64_t addr, uint64_t value) "subpage %p len %u addr 0x%" PRIx64 " value 0x%" PRIx64
> +
> # cpus.c
> vm_stop_flush_all(int ret) "ret %d"
>
> --
> 2.52.0
>
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v3 02/25] system/physmem: Convert DEBUG_SUBPAGE printf() to trace events
2025-12-24 15:21 ` [PATCH v3 02/25] system/physmem: Convert DEBUG_SUBPAGE printf() to trace events Philippe Mathieu-Daudé
2025-12-24 19:02 ` Manos Pitsidianakis
@ 2025-12-29 0:47 ` Richard Henderson
1 sibling, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 0:47 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson, David Hildenbrand
On 12/25/25 02:21, Philippe Mathieu-Daudé wrote:
> Defining DEBUG_SUBPAGE allows to use raw printf() statements to
> print information about some events; convert these to tracepoints.
>
> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> system/physmem.c | 29 ++++++-----------------------
> system/trace-events | 6 ++++++
> 2 files changed, 12 insertions(+), 23 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 03/25] system/physmem: Use explicit endianness in subpage_ops::read/write()
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
2025-12-24 15:21 ` [PATCH v3 01/25] system/physmem: Inline and remove leul_to_cpu() Philippe Mathieu-Daudé
2025-12-24 15:21 ` [PATCH v3 02/25] system/physmem: Convert DEBUG_SUBPAGE printf() to trace events Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-28 10:54 ` Paolo Bonzini
2025-12-24 15:21 ` [PATCH v3 04/25] system/memory: Split MemoryRegionCache API to 'memory_cached.h' Philippe Mathieu-Daudé
` (21 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Replace the ldn_p/stn_p() calls by their explicit endianness
variants. Duplicate the MemoryRegionOps, replacing the single
DEVICE_NATIVE_ENDIAN entry by a pair of LITTLE and BIG ones.
Select the proper MemoryRegionOps in subpage_init().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
system/physmem.c | 76 +++++++++++++++++++++++++++++++++++++-----------
1 file changed, 59 insertions(+), 17 deletions(-)
diff --git a/system/physmem.c b/system/physmem.c
index 7e914ecf648..9fe84679cac 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -2894,8 +2894,8 @@ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len,
bool is_write, MemTxAttrs attrs);
-static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
- unsigned len, MemTxAttrs attrs)
+static MemTxResult subpage_read_le(void *opaque, hwaddr addr, uint64_t *data,
+ unsigned len, MemTxAttrs attrs)
{
subpage_t *subpage = opaque;
uint8_t buf[8];
@@ -2906,18 +2906,49 @@ static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
if (res) {
return res;
}
- *data = ldn_p(buf, len);
+ *data = ldn_le_p(buf, len);
return MEMTX_OK;
}
-static MemTxResult subpage_write(void *opaque, hwaddr addr,
- uint64_t value, unsigned len, MemTxAttrs attrs)
+static MemTxResult subpage_read_be(void *opaque, hwaddr addr, uint64_t *data,
+ unsigned len, MemTxAttrs attrs)
+{
+ subpage_t *subpage = opaque;
+ uint8_t buf[8];
+ MemTxResult res;
+
+ trace_subpage_read(subpage, len, addr);
+ res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
+ if (res) {
+ return res;
+ }
+ *data = ldn_be_p(buf, len);
+ return MEMTX_OK;
+}
+
+static MemTxResult subpage_write_le(void *opaque, hwaddr addr,
+ uint64_t value, unsigned len,
+ MemTxAttrs attrs)
{
subpage_t *subpage = opaque;
uint8_t buf[8];
trace_subpage_write(subpage, len, addr, value);
- stn_p(buf, len, value);
+ stn_le_p(buf, len, value);
+
+ return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
+}
+
+static MemTxResult subpage_write_be(void *opaque, hwaddr addr,
+ uint64_t value, unsigned len,
+ MemTxAttrs attrs)
+{
+ subpage_t *subpage = opaque;
+ uint8_t buf[8];
+
+ trace_subpage_write(subpage, len, addr, value);
+ stn_be_p(buf, len, value);
+
return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
}
@@ -2933,15 +2964,26 @@ static bool subpage_accepts(void *opaque, hwaddr addr,
len, is_write, attrs);
}
-static const MemoryRegionOps subpage_ops = {
- .read_with_attrs = subpage_read,
- .write_with_attrs = subpage_write,
- .impl.min_access_size = 1,
- .impl.max_access_size = 8,
- .valid.min_access_size = 1,
- .valid.max_access_size = 8,
- .valid.accepts = subpage_accepts,
- .endianness = DEVICE_NATIVE_ENDIAN,
+static const MemoryRegionOps subpage_ops[2] = {
+ [0 ... 1] = {
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 8,
+ },
+ .valid = {
+ .min_access_size = 1,
+ .max_access_size = 8,
+ .accepts = subpage_accepts,
+ },
+ },
+
+ [0].endianness = DEVICE_LITTLE_ENDIAN,
+ [0].read_with_attrs = subpage_read_le,
+ [0].write_with_attrs = subpage_write_le,
+
+ [1].endianness = DEVICE_BIG_ENDIAN,
+ [1].read_with_attrs = subpage_read_be,
+ [1].write_with_attrs = subpage_write_be,
};
static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
@@ -2969,8 +3011,8 @@ static subpage_t *subpage_init(FlatView *fv, hwaddr base)
mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
mmio->fv = fv;
mmio->base = base;
- memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
- NULL, TARGET_PAGE_SIZE);
+ memory_region_init_io(&mmio->iomem, NULL, &subpage_ops[target_big_endian()],
+ mmio, NULL, TARGET_PAGE_SIZE);
mmio->iomem.subpage = true;
trace_subpage_init(mmio, base, TARGET_PAGE_SIZE);
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 03/25] system/physmem: Use explicit endianness in subpage_ops::read/write()
2025-12-24 15:21 ` [PATCH v3 03/25] system/physmem: Use explicit endianness in subpage_ops::read/write() Philippe Mathieu-Daudé
@ 2025-12-28 10:54 ` Paolo Bonzini
2025-12-28 16:00 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 62+ messages in thread
From: Paolo Bonzini @ 2025-12-28 10:54 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, David Hildenbrand
[-- Attachment #1: Type: text/plain, Size: 711 bytes --]
Il mer 24 dic 2025, 16:22 Philippe Mathieu-Daudé <philmd@linaro.org> ha
scritto:
> Replace the ldn_p/stn_p() calls by their explicit endianness
> variants. Duplicate the MemoryRegionOps, replacing the single
> DEVICE_NATIVE_ENDIAN entry by a pair of LITTLE and BIG ones.
> Select the proper MemoryRegionOps in subpage_init().
>
This would need further adjustment when the target endianness is not fixed,
but luckily the extra complexity you're introducing is not needed. The two
ops add either 0 or 2 swaps to the underlying flatview_read/flatview_write
so you only need one copy. As long as the ldn_*_p is consistent with the
endianness of the MemoryRegionOps the result is the same.
Paolo
[-- Attachment #2: Type: text/html, Size: 1116 bytes --]
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v3 03/25] system/physmem: Use explicit endianness in subpage_ops::read/write()
2025-12-28 10:54 ` Paolo Bonzini
@ 2025-12-28 16:00 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-28 16:00 UTC (permalink / raw)
To: Paolo Bonzini
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, David Hildenbrand
On 28/12/25 11:54, Paolo Bonzini wrote:
>
>
> Il mer 24 dic 2025, 16:22 Philippe Mathieu-Daudé <philmd@linaro.org
> <mailto:philmd@linaro.org>> ha scritto:
>
> Replace the ldn_p/stn_p() calls by their explicit endianness
> variants. Duplicate the MemoryRegionOps, replacing the single
> DEVICE_NATIVE_ENDIAN entry by a pair of LITTLE and BIG ones.
> Select the proper MemoryRegionOps in subpage_init().
>
>
> This would need further adjustment when the target endianness is not
> fixed, but luckily the extra complexity you're introducing is not
> needed. The two ops add either 0 or 2 swaps to the underlying
> flatview_read/flatview_write so you only need one copy. As long as the
> ldn_*_p is consistent with the endianness of the MemoryRegionOps the
> result is the same.
Ack, patch dropped.
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 04/25] system/memory: Split MemoryRegionCache API to 'memory_cached.h'
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 03/25] system/physmem: Use explicit endianness in subpage_ops::read/write() Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-24 15:21 ` [PATCH v3 05/25] system/memory: Move *ldst* headers from exec/ to system/ namespace Philippe Mathieu-Daudé
` (20 subsequent siblings)
24 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
Michael S. Tsirkin, David Hildenbrand
We have 115 direct inclusions of "system/memory.h", and 91 headers
in include/ use it: hundreds of files have to process it.
However only one single header really uses the MemoryRegionCache
API: "hw/virtio/virtio-access.h". Split it out to a new header,
avoiding processing unused inlined functions hundreds of times.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
MAINTAINERS | 1 +
include/hw/virtio/virtio-access.h | 1 +
include/system/memory.h | 185 --------------------------
include/system/memory_cached.h | 207 ++++++++++++++++++++++++++++++
system/physmem.c | 1 +
5 files changed, 210 insertions(+), 185 deletions(-)
create mode 100644 include/system/memory_cached.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 63e9ba521bc..c299b84d418 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3255,6 +3255,7 @@ S: Supported
F: include/system/ioport.h
F: include/exec/memop.h
F: include/system/memory.h
+F: include/system/memory_cached.h
F: include/system/physmem.h
F: include/system/ram_addr.h
F: include/system/ramblock.h
diff --git a/include/hw/virtio/virtio-access.h b/include/hw/virtio/virtio-access.h
index 5b5fff5295e..cd17d0c87eb 100644
--- a/include/hw/virtio/virtio-access.h
+++ b/include/hw/virtio/virtio-access.h
@@ -17,6 +17,7 @@
#define QEMU_VIRTIO_ACCESS_H
#include "exec/hwaddr.h"
+#include "system/memory_cached.h"
#include "hw/virtio/virtio.h"
#include "hw/virtio/virtio-bus.h"
diff --git a/include/system/memory.h b/include/system/memory.h
index d5c248f1794..692c2f67dd3 100644
--- a/include/system/memory.h
+++ b/include/system/memory.h
@@ -2857,140 +2857,6 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
#include "exec/memory_ldst_phys.h.inc"
#endif
-struct MemoryRegionCache {
- uint8_t *ptr;
- hwaddr xlat;
- hwaddr len;
- FlatView *fv;
- MemoryRegionSection mrs;
- bool is_write;
-};
-
-/* address_space_ld*_cached: load from a cached #MemoryRegion
- * address_space_st*_cached: store into a cached #MemoryRegion
- *
- * These functions perform a load or store of the byte, word,
- * longword or quad to the specified address. The address is
- * a physical address in the AddressSpace, but it must lie within
- * a #MemoryRegion that was mapped with address_space_cache_init.
- *
- * The _le suffixed functions treat the data as little endian;
- * _be indicates big endian; no suffix indicates "same endianness
- * as guest CPU".
- *
- * The "guest CPU endianness" accessors are deprecated for use outside
- * target-* code; devices should be CPU-agnostic and use either the LE
- * or the BE accessors.
- *
- * @cache: previously initialized #MemoryRegionCache to be accessed
- * @addr: address within the address space
- * @val: data value, for stores
- * @attrs: memory transaction attributes
- * @result: location to write the success/failure of the transaction;
- * if NULL, this information is discarded
- */
-
-#define SUFFIX _cached_slow
-#define ARG1 cache
-#define ARG1_DECL MemoryRegionCache *cache
-#include "exec/memory_ldst.h.inc"
-
-/* Inline fast path for direct RAM access. */
-static inline uint8_t address_space_ldub_cached(MemoryRegionCache *cache,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- assert(addr < cache->len);
- if (likely(cache->ptr)) {
- return ldub_p(cache->ptr + addr);
- } else {
- return address_space_ldub_cached_slow(cache, addr, attrs, result);
- }
-}
-
-static inline void address_space_stb_cached(MemoryRegionCache *cache,
- hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- assert(addr < cache->len);
- if (likely(cache->ptr)) {
- stb_p(cache->ptr + addr, val);
- } else {
- address_space_stb_cached_slow(cache, addr, val, attrs, result);
- }
-}
-
-#define ENDIANNESS
-#include "exec/memory_ldst_cached.h.inc"
-
-#define ENDIANNESS _le
-#include "exec/memory_ldst_cached.h.inc"
-
-#define ENDIANNESS _be
-#include "exec/memory_ldst_cached.h.inc"
-
-#define SUFFIX _cached
-#define ARG1 cache
-#define ARG1_DECL MemoryRegionCache *cache
-#include "exec/memory_ldst_phys.h.inc"
-
-/* address_space_cache_init: prepare for repeated access to a physical
- * memory region
- *
- * @cache: #MemoryRegionCache to be filled
- * @as: #AddressSpace to be accessed
- * @addr: address within that address space
- * @len: length of buffer
- * @is_write: indicates the transfer direction
- *
- * Will only work with RAM, and may map a subset of the requested range by
- * returning a value that is less than @len. On failure, return a negative
- * errno value.
- *
- * Because it only works with RAM, this function can be used for
- * read-modify-write operations. In this case, is_write should be %true.
- *
- * Note that addresses passed to the address_space_*_cached functions
- * are relative to @addr.
- */
-int64_t address_space_cache_init(MemoryRegionCache *cache,
- AddressSpace *as,
- hwaddr addr,
- hwaddr len,
- bool is_write);
-
-/**
- * address_space_cache_init_empty: Initialize empty #MemoryRegionCache
- *
- * @cache: The #MemoryRegionCache to operate on.
- *
- * Initializes #MemoryRegionCache structure without memory region attached.
- * Cache initialized this way can only be safely destroyed, but not used.
- */
-static inline void address_space_cache_init_empty(MemoryRegionCache *cache)
-{
- cache->mrs.mr = NULL;
- /* There is no real need to initialize fv, but it makes Coverity happy. */
- cache->fv = NULL;
-}
-
-/**
- * address_space_cache_invalidate: complete a write to a #MemoryRegionCache
- *
- * @cache: The #MemoryRegionCache to operate on.
- * @addr: The first physical address that was written, relative to the
- * address that was passed to @address_space_cache_init.
- * @access_len: The number of bytes that were written starting at @addr.
- */
-void address_space_cache_invalidate(MemoryRegionCache *cache,
- hwaddr addr,
- hwaddr access_len);
-
-/**
- * address_space_cache_destroy: free a #MemoryRegionCache
- *
- * @cache: The #MemoryRegionCache whose memory should be released.
- */
-void address_space_cache_destroy(MemoryRegionCache *cache);
-
void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len);
/* address_space_get_iotlb_entry: translate an address into an IOTLB
@@ -3118,14 +2984,6 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
MemoryRegion *mr);
void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr);
-/* Internal functions, part of the implementation of address_space_read_cached
- * and address_space_write_cached. */
-MemTxResult address_space_read_cached_slow(MemoryRegionCache *cache,
- hwaddr addr, void *buf, hwaddr len);
-MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache,
- hwaddr addr, const void *buf,
- hwaddr len);
-
int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr);
bool prepare_mmio_access(MemoryRegion *mr);
@@ -3203,49 +3061,6 @@ MemTxResult address_space_read(AddressSpace *as, hwaddr addr,
return result;
}
-/**
- * address_space_read_cached: read from a cached RAM region
- *
- * @cache: Cached region to be addressed
- * @addr: address relative to the base of the RAM region
- * @buf: buffer with the data transferred
- * @len: length of the data transferred
- */
-static inline MemTxResult
-address_space_read_cached(MemoryRegionCache *cache, hwaddr addr,
- void *buf, hwaddr len)
-{
- assert(addr < cache->len && len <= cache->len - addr);
- fuzz_dma_read_cb(cache->xlat + addr, len, cache->mrs.mr);
- if (likely(cache->ptr)) {
- memcpy(buf, cache->ptr + addr, len);
- return MEMTX_OK;
- } else {
- return address_space_read_cached_slow(cache, addr, buf, len);
- }
-}
-
-/**
- * address_space_write_cached: write to a cached RAM region
- *
- * @cache: Cached region to be addressed
- * @addr: address relative to the base of the RAM region
- * @buf: buffer with the data transferred
- * @len: length of the data transferred
- */
-static inline MemTxResult
-address_space_write_cached(MemoryRegionCache *cache, hwaddr addr,
- const void *buf, hwaddr len)
-{
- assert(addr < cache->len && len <= cache->len - addr);
- if (likely(cache->ptr)) {
- memcpy(cache->ptr + addr, buf, len);
- return MEMTX_OK;
- } else {
- return address_space_write_cached_slow(cache, addr, buf, len);
- }
-}
-
/**
* address_space_set: Fill address space with a constant byte.
*
diff --git a/include/system/memory_cached.h b/include/system/memory_cached.h
new file mode 100644
index 00000000000..1a07774b6ad
--- /dev/null
+++ b/include/system/memory_cached.h
@@ -0,0 +1,207 @@
+/*
+ * Physical memory management API
+ *
+ * Copyright 2011 Red Hat, Inc. and/or its affiliates
+ *
+ * Authors:
+ * Avi Kivity <avi@redhat.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef SYSTEM_MEMORY_CACHED_H
+#define SYSTEM_MEMORY_CACHED_H
+
+#include "exec/hwaddr.h"
+#include "system/memory.h"
+
+struct MemoryRegionCache {
+ uint8_t *ptr;
+ hwaddr xlat;
+ hwaddr len;
+ FlatView *fv;
+ MemoryRegionSection mrs;
+ bool is_write;
+};
+
+/**
+ * address_space_ld*_cached: load from a cached #MemoryRegion
+ * address_space_st*_cached: store into a cached #MemoryRegion
+ *
+ * These functions perform a load or store of the byte, word,
+ * longword or quad to the specified address. The address is
+ * a physical address in the AddressSpace, but it must lie within
+ * a #MemoryRegion that was mapped with address_space_cache_init.
+ *
+ * The _le suffixed functions treat the data as little endian;
+ * _be indicates big endian; no suffix indicates "same endianness
+ * as guest CPU".
+ *
+ * The "guest CPU endianness" accessors are deprecated for use outside
+ * target-* code; devices should be CPU-agnostic and use either the LE
+ * or the BE accessors.
+ *
+ * @cache: previously initialized #MemoryRegionCache to be accessed
+ * @addr: address within the address space
+ * @val: data value, for stores
+ * @attrs: memory transaction attributes
+ * @result: location to write the success/failure of the transaction;
+ * if NULL, this information is discarded
+ */
+
+#define SUFFIX _cached_slow
+#define ARG1 cache
+#define ARG1_DECL MemoryRegionCache *cache
+#include "exec/memory_ldst.h.inc"
+
+/* Inline fast path for direct RAM access. */
+static inline uint8_t address_space_ldub_cached(MemoryRegionCache *cache,
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
+{
+ assert(addr < cache->len);
+ if (likely(cache->ptr)) {
+ return ldub_p(cache->ptr + addr);
+ } else {
+ return address_space_ldub_cached_slow(cache, addr, attrs, result);
+ }
+}
+
+static inline void address_space_stb_cached(MemoryRegionCache *cache,
+ hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result)
+{
+ assert(addr < cache->len);
+ if (likely(cache->ptr)) {
+ stb_p(cache->ptr + addr, val);
+ } else {
+ address_space_stb_cached_slow(cache, addr, val, attrs, result);
+ }
+}
+
+#define ENDIANNESS
+#include "exec/memory_ldst_cached.h.inc"
+
+#define ENDIANNESS _le
+#include "exec/memory_ldst_cached.h.inc"
+
+#define ENDIANNESS _be
+#include "exec/memory_ldst_cached.h.inc"
+
+#define SUFFIX _cached
+#define ARG1 cache
+#define ARG1_DECL MemoryRegionCache *cache
+#include "exec/memory_ldst_phys.h.inc"
+
+/**
+ * address_space_cache_init: prepare for repeated access to a physical
+ * memory region
+ *
+ * @cache: #MemoryRegionCache to be filled
+ * @as: #AddressSpace to be accessed
+ * @addr: address within that address space
+ * @len: length of buffer
+ * @is_write: indicates the transfer direction
+ *
+ * Will only work with RAM, and may map a subset of the requested range by
+ * returning a value that is less than @len. On failure, return a negative
+ * errno value.
+ *
+ * Because it only works with RAM, this function can be used for
+ * read-modify-write operations. In this case, is_write should be %true.
+ *
+ * Note that addresses passed to the address_space_*_cached functions
+ * are relative to @addr.
+ */
+int64_t address_space_cache_init(MemoryRegionCache *cache,
+ AddressSpace *as,
+ hwaddr addr,
+ hwaddr len,
+ bool is_write);
+
+/**
+ * address_space_cache_init_empty: Initialize empty #MemoryRegionCache
+ *
+ * @cache: The #MemoryRegionCache to operate on.
+ *
+ * Initializes #MemoryRegionCache structure without memory region attached.
+ * Cache initialized this way can only be safely destroyed, but not used.
+ */
+static inline void address_space_cache_init_empty(MemoryRegionCache *cache)
+{
+ cache->mrs.mr = NULL;
+ /* There is no real need to initialize fv, but it makes Coverity happy. */
+ cache->fv = NULL;
+}
+
+/**
+ * address_space_cache_invalidate: complete a write to a #MemoryRegionCache
+ *
+ * @cache: The #MemoryRegionCache to operate on.
+ * @addr: The first physical address that was written, relative to the
+ * address that was passed to @address_space_cache_init.
+ * @access_len: The number of bytes that were written starting at @addr.
+ */
+void address_space_cache_invalidate(MemoryRegionCache *cache,
+ hwaddr addr,
+ hwaddr access_len);
+
+/**
+ * address_space_cache_destroy: free a #MemoryRegionCache
+ *
+ * @cache: The #MemoryRegionCache whose memory should be released.
+ */
+void address_space_cache_destroy(MemoryRegionCache *cache);
+
+/*
+ * Internal functions, part of the implementation of address_space_read_cached
+ * and address_space_write_cached.
+ */
+MemTxResult address_space_read_cached_slow(MemoryRegionCache *cache,
+ hwaddr addr, void *buf, hwaddr len);
+MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache,
+ hwaddr addr, const void *buf,
+ hwaddr len);
+
+/**
+ * address_space_read_cached: read from a cached RAM region
+ *
+ * @cache: Cached region to be addressed
+ * @addr: address relative to the base of the RAM region
+ * @buf: buffer with the data transferred
+ * @len: length of the data transferred
+ */
+static inline MemTxResult
+address_space_read_cached(MemoryRegionCache *cache, hwaddr addr,
+ void *buf, hwaddr len)
+{
+ assert(addr < cache->len && len <= cache->len - addr);
+ fuzz_dma_read_cb(cache->xlat + addr, len, cache->mrs.mr);
+ if (likely(cache->ptr)) {
+ memcpy(buf, cache->ptr + addr, len);
+ return MEMTX_OK;
+ } else {
+ return address_space_read_cached_slow(cache, addr, buf, len);
+ }
+}
+
+/**
+ * address_space_write_cached: write to a cached RAM region
+ *
+ * @cache: Cached region to be addressed
+ * @addr: address relative to the base of the RAM region
+ * @buf: buffer with the data transferred
+ * @len: length of the data transferred
+ */
+static inline MemTxResult
+address_space_write_cached(MemoryRegionCache *cache, hwaddr addr,
+ const void *buf, hwaddr len)
+{
+ assert(addr < cache->len && len <= cache->len - addr);
+ if (likely(cache->ptr)) {
+ memcpy(cache->ptr + addr, buf, len);
+ return MEMTX_OK;
+ } else {
+ return address_space_write_cached_slow(cache, addr, buf, len);
+ }
+}
+
+#endif
diff --git a/system/physmem.c b/system/physmem.c
index 9fe84679cac..fb69cdb57d9 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -53,6 +53,7 @@
#include "qemu/memalign.h"
#include "qemu/memfd.h"
#include "system/memory.h"
+#include "system/memory_cached.h"
#include "system/ioport.h"
#include "system/dma.h"
#include "system/hostmem.h"
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* [PATCH v3 05/25] system/memory: Move *ldst* headers from exec/ to system/ namespace
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 04/25] system/memory: Split MemoryRegionCache API to 'memory_cached.h' Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-24 19:04 ` Manos Pitsidianakis
2025-12-29 0:51 ` Richard Henderson
2025-12-24 15:21 ` [PATCH v3 06/25] system/memory: Inline address_space_stq_internal() Philippe Mathieu-Daudé
` (19 subsequent siblings)
24 siblings, 2 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Keep all system memory APIs under the system/ namespace.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
MAINTAINERS | 1 +
include/system/memory.h | 4 ++--
include/system/memory_cached.h | 10 +++++-----
include/{exec => system}/memory_ldst.h.inc | 0
include/{exec => system}/memory_ldst_cached.h.inc | 0
include/{exec => system}/memory_ldst_phys.h.inc | 0
6 files changed, 8 insertions(+), 7 deletions(-)
rename include/{exec => system}/memory_ldst.h.inc (100%)
rename include/{exec => system}/memory_ldst_cached.h.inc (100%)
rename include/{exec => system}/memory_ldst_phys.h.inc (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index c299b84d418..f984891ac2b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3255,6 +3255,7 @@ S: Supported
F: include/system/ioport.h
F: include/exec/memop.h
F: include/system/memory.h
+F: include/system/memory_ldst*
F: include/system/memory_cached.h
F: include/system/physmem.h
F: include/system/ram_addr.h
diff --git a/include/system/memory.h b/include/system/memory.h
index 692c2f67dd3..2a966397931 100644
--- a/include/system/memory.h
+++ b/include/system/memory.h
@@ -2848,13 +2848,13 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
#define SUFFIX
#define ARG1 as
#define ARG1_DECL AddressSpace *as
-#include "exec/memory_ldst.h.inc"
+#include "system/memory_ldst.h.inc"
#ifndef TARGET_NOT_USING_LEGACY_LDST_PHYS_API
#define SUFFIX
#define ARG1 as
#define ARG1_DECL AddressSpace *as
-#include "exec/memory_ldst_phys.h.inc"
+#include "system/memory_ldst_phys.h.inc"
#endif
void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len);
diff --git a/include/system/memory_cached.h b/include/system/memory_cached.h
index 1a07774b6ad..587e8a1453a 100644
--- a/include/system/memory_cached.h
+++ b/include/system/memory_cached.h
@@ -52,7 +52,7 @@ struct MemoryRegionCache {
#define SUFFIX _cached_slow
#define ARG1 cache
#define ARG1_DECL MemoryRegionCache *cache
-#include "exec/memory_ldst.h.inc"
+#include "system/memory_ldst.h.inc"
/* Inline fast path for direct RAM access. */
static inline uint8_t address_space_ldub_cached(MemoryRegionCache *cache,
@@ -78,18 +78,18 @@ static inline void address_space_stb_cached(MemoryRegionCache *cache,
}
#define ENDIANNESS
-#include "exec/memory_ldst_cached.h.inc"
+#include "system/memory_ldst_cached.h.inc"
#define ENDIANNESS _le
-#include "exec/memory_ldst_cached.h.inc"
+#include "system/memory_ldst_cached.h.inc"
#define ENDIANNESS _be
-#include "exec/memory_ldst_cached.h.inc"
+#include "system/memory_ldst_cached.h.inc"
#define SUFFIX _cached
#define ARG1 cache
#define ARG1_DECL MemoryRegionCache *cache
-#include "exec/memory_ldst_phys.h.inc"
+#include "system/memory_ldst_phys.h.inc"
/**
* address_space_cache_init: prepare for repeated access to a physical
diff --git a/include/exec/memory_ldst.h.inc b/include/system/memory_ldst.h.inc
similarity index 100%
rename from include/exec/memory_ldst.h.inc
rename to include/system/memory_ldst.h.inc
diff --git a/include/exec/memory_ldst_cached.h.inc b/include/system/memory_ldst_cached.h.inc
similarity index 100%
rename from include/exec/memory_ldst_cached.h.inc
rename to include/system/memory_ldst_cached.h.inc
diff --git a/include/exec/memory_ldst_phys.h.inc b/include/system/memory_ldst_phys.h.inc
similarity index 100%
rename from include/exec/memory_ldst_phys.h.inc
rename to include/system/memory_ldst_phys.h.inc
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 05/25] system/memory: Move *ldst* headers from exec/ to system/ namespace
2025-12-24 15:21 ` [PATCH v3 05/25] system/memory: Move *ldst* headers from exec/ to system/ namespace Philippe Mathieu-Daudé
@ 2025-12-24 19:04 ` Manos Pitsidianakis
2025-12-29 0:51 ` Richard Henderson
1 sibling, 0 replies; 62+ messages in thread
From: Manos Pitsidianakis @ 2025-12-24 19:04 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Paolo Bonzini, Pierrick Bouvier, Peter Xu,
Richard Henderson, Anton Johansson, David Hildenbrand
On Wed, Dec 24, 2025 at 5:23 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Keep all system memory APIs under the system/ namespace.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
> MAINTAINERS | 1 +
> include/system/memory.h | 4 ++--
> include/system/memory_cached.h | 10 +++++-----
> include/{exec => system}/memory_ldst.h.inc | 0
> include/{exec => system}/memory_ldst_cached.h.inc | 0
> include/{exec => system}/memory_ldst_phys.h.inc | 0
> 6 files changed, 8 insertions(+), 7 deletions(-)
> rename include/{exec => system}/memory_ldst.h.inc (100%)
> rename include/{exec => system}/memory_ldst_cached.h.inc (100%)
> rename include/{exec => system}/memory_ldst_phys.h.inc (100%)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c299b84d418..f984891ac2b 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -3255,6 +3255,7 @@ S: Supported
> F: include/system/ioport.h
> F: include/exec/memop.h
> F: include/system/memory.h
> +F: include/system/memory_ldst*
> F: include/system/memory_cached.h
> F: include/system/physmem.h
> F: include/system/ram_addr.h
> diff --git a/include/system/memory.h b/include/system/memory.h
> index 692c2f67dd3..2a966397931 100644
> --- a/include/system/memory.h
> +++ b/include/system/memory.h
> @@ -2848,13 +2848,13 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
> #define SUFFIX
> #define ARG1 as
> #define ARG1_DECL AddressSpace *as
> -#include "exec/memory_ldst.h.inc"
> +#include "system/memory_ldst.h.inc"
>
> #ifndef TARGET_NOT_USING_LEGACY_LDST_PHYS_API
> #define SUFFIX
> #define ARG1 as
> #define ARG1_DECL AddressSpace *as
> -#include "exec/memory_ldst_phys.h.inc"
> +#include "system/memory_ldst_phys.h.inc"
> #endif
>
> void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len);
> diff --git a/include/system/memory_cached.h b/include/system/memory_cached.h
> index 1a07774b6ad..587e8a1453a 100644
> --- a/include/system/memory_cached.h
> +++ b/include/system/memory_cached.h
> @@ -52,7 +52,7 @@ struct MemoryRegionCache {
> #define SUFFIX _cached_slow
> #define ARG1 cache
> #define ARG1_DECL MemoryRegionCache *cache
> -#include "exec/memory_ldst.h.inc"
> +#include "system/memory_ldst.h.inc"
>
> /* Inline fast path for direct RAM access. */
> static inline uint8_t address_space_ldub_cached(MemoryRegionCache *cache,
> @@ -78,18 +78,18 @@ static inline void address_space_stb_cached(MemoryRegionCache *cache,
> }
>
> #define ENDIANNESS
> -#include "exec/memory_ldst_cached.h.inc"
> +#include "system/memory_ldst_cached.h.inc"
>
> #define ENDIANNESS _le
> -#include "exec/memory_ldst_cached.h.inc"
> +#include "system/memory_ldst_cached.h.inc"
>
> #define ENDIANNESS _be
> -#include "exec/memory_ldst_cached.h.inc"
> +#include "system/memory_ldst_cached.h.inc"
>
> #define SUFFIX _cached
> #define ARG1 cache
> #define ARG1_DECL MemoryRegionCache *cache
> -#include "exec/memory_ldst_phys.h.inc"
> +#include "system/memory_ldst_phys.h.inc"
>
> /**
> * address_space_cache_init: prepare for repeated access to a physical
> diff --git a/include/exec/memory_ldst.h.inc b/include/system/memory_ldst.h.inc
> similarity index 100%
> rename from include/exec/memory_ldst.h.inc
> rename to include/system/memory_ldst.h.inc
> diff --git a/include/exec/memory_ldst_cached.h.inc b/include/system/memory_ldst_cached.h.inc
> similarity index 100%
> rename from include/exec/memory_ldst_cached.h.inc
> rename to include/system/memory_ldst_cached.h.inc
> diff --git a/include/exec/memory_ldst_phys.h.inc b/include/system/memory_ldst_phys.h.inc
> similarity index 100%
> rename from include/exec/memory_ldst_phys.h.inc
> rename to include/system/memory_ldst_phys.h.inc
> --
> 2.52.0
>
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v3 05/25] system/memory: Move *ldst* headers from exec/ to system/ namespace
2025-12-24 15:21 ` [PATCH v3 05/25] system/memory: Move *ldst* headers from exec/ to system/ namespace Philippe Mathieu-Daudé
2025-12-24 19:04 ` Manos Pitsidianakis
@ 2025-12-29 0:51 ` Richard Henderson
1 sibling, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 0:51 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson, David Hildenbrand
On 12/25/25 02:21, Philippe Mathieu-Daudé wrote:
> Keep all system memory APIs under the system/ namespace.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> MAINTAINERS | 1 +
> include/system/memory.h | 4 ++--
> include/system/memory_cached.h | 10 +++++-----
> include/{exec => system}/memory_ldst.h.inc | 0
> include/{exec => system}/memory_ldst_cached.h.inc | 0
> include/{exec => system}/memory_ldst_phys.h.inc | 0
> 6 files changed, 8 insertions(+), 7 deletions(-)
> rename include/{exec => system}/memory_ldst.h.inc (100%)
> rename include/{exec => system}/memory_ldst_cached.h.inc (100%)
> rename include/{exec => system}/memory_ldst_phys.h.inc (100%)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 06/25] system/memory: Inline address_space_stq_internal()
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 05/25] system/memory: Move *ldst* headers from exec/ to system/ namespace Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-24 15:21 ` [PATCH v3 07/25] system/memory: Define address_space_ldst[W] endian variants via template Philippe Mathieu-Daudé
` (18 subsequent siblings)
24 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
As its name suggests, address_space_stq_internal() is an
internal method which can be inlined like all the other
ones in this file.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
system/memory_ldst.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index b45bfecd137..d5776678edf 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -422,7 +422,7 @@ void glue(address_space_stw_be, SUFFIX)(ARG1_DECL,
DEVICE_BIG_ENDIAN);
}
-static void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
+static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs,
MemTxResult *result, enum device_endian endian)
{
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* [PATCH v3 07/25] system/memory: Define address_space_ldst[W] endian variants via template
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 06/25] system/memory: Inline address_space_stq_internal() Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-24 15:21 ` [PATCH v3 08/25] system/memory: Define address_space_ldst[L] " Philippe Mathieu-Daudé
` (17 subsequent siblings)
24 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Like we do for other LD/ST APIs, use one template to declare and
define all endianness variants of the address_space_ldst[W] methods.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
MAINTAINERS | 2 +
include/system/memory_ldst.h.inc | 21 ++++----
include/system/memory_ldst_endian.h.inc | 25 +++++++++
include/system/memory_ldst_phys.h.inc | 45 ++++------------
include/system/memory_ldst_phys_endian.h.inc | 37 ++++++++++++++
system/memory_ldst.c.inc | 54 +++++---------------
system/memory_ldst_endian.c.inc | 42 +++++++++++++++
7 files changed, 136 insertions(+), 90 deletions(-)
create mode 100644 include/system/memory_ldst_endian.h.inc
create mode 100644 include/system/memory_ldst_phys_endian.h.inc
create mode 100644 system/memory_ldst_endian.c.inc
diff --git a/MAINTAINERS b/MAINTAINERS
index f984891ac2b..18168c0b1eb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3257,6 +3257,7 @@ F: include/exec/memop.h
F: include/system/memory.h
F: include/system/memory_ldst*
F: include/system/memory_cached.h
+F: include/system/memory_ldst*
F: include/system/physmem.h
F: include/system/ram_addr.h
F: include/system/ramblock.h
@@ -3266,6 +3267,7 @@ F: system/ioport.c
F: system/memory.c
F: system/memory_mapping.c
F: system/physmem.c
+F: system/memory_ldst*
F: system/memory-internal.h
F: system/ram-block-attributes.c
F: scripts/coccinelle/memory-region-housekeeping.cocci
diff --git a/include/system/memory_ldst.h.inc b/include/system/memory_ldst.h.inc
index 173164fee3a..73c0366a247 100644
--- a/include/system/memory_ldst.h.inc
+++ b/include/system/memory_ldst.h.inc
@@ -19,24 +19,16 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-uint16_t glue(address_space_lduw, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint32_t glue(address_space_ldl, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stw, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stl, SUFFIX)(ARG1_DECL,
hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stq, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint16_t glue(address_space_lduw_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint16_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint32_t glue(address_space_ldl_le, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint32_t glue(address_space_ldl_be, SUFFIX)(ARG1_DECL,
@@ -47,10 +39,6 @@ uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stw_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stw_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stl_le, SUFFIX)(ARG1_DECL,
hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stl_be, SUFFIX)(ARG1_DECL,
@@ -60,6 +48,15 @@ void glue(address_space_stq_le, SUFFIX)(ARG1_DECL,
void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
+#define ENDIANNESS
+#include "system/memory_ldst_endian.h.inc"
+
+#define ENDIANNESS _le
+#include "system/memory_ldst_endian.h.inc"
+
+#define ENDIANNESS _be
+#include "system/memory_ldst_endian.h.inc"
+
#undef ARG1_DECL
#undef ARG1
#undef SUFFIX
diff --git a/include/system/memory_ldst_endian.h.inc b/include/system/memory_ldst_endian.h.inc
new file mode 100644
index 00000000000..3f216197663
--- /dev/null
+++ b/include/system/memory_ldst_endian.h.inc
@@ -0,0 +1,25 @@
+/*
+ * Physical memory access endian templates
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ * Copyright (c) 2015 Linaro, Inc.
+ * Copyright (c) 2016 Red Hat, Inc.
+ * Copyright (c) 2025 Linaro Ltd.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#define ADDRESS_SPACE_LD(size) \
+ glue(glue(address_space_ld, size), glue(ENDIANNESS, SUFFIX))
+#define ADDRESS_SPACE_ST(size) \
+ glue(glue(address_space_st, size), glue(ENDIANNESS, SUFFIX))
+
+uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
+void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
+ MemTxAttrs attrs, MemTxResult *result);
+
+#undef ADDRESS_SPACE_LD
+#undef ADDRESS_SPACE_ST
+
+#undef ENDIANNESS
diff --git a/include/system/memory_ldst_phys.h.inc b/include/system/memory_ldst_phys.h.inc
index db67de75251..71c2e64ff0f 100644
--- a/include/system/memory_ldst_phys.h.inc
+++ b/include/system/memory_ldst_phys.h.inc
@@ -19,12 +19,6 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-static inline uint16_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_lduw, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline uint32_t glue(ldl_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldl, SUFFIX)(ARG1, addr,
@@ -37,12 +31,6 @@ static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val)
-{
- glue(address_space_stw, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline void glue(stl_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
{
glue(address_space_stl, SUFFIX)(ARG1, addr, val,
@@ -61,18 +49,6 @@ static inline uint8_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline uint16_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_lduw_le, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline uint16_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_lduw_be, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline uint32_t glue(ldl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldl_le, SUFFIX)(ARG1, addr,
@@ -103,18 +79,6 @@ static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val)
-{
- glue(address_space_stw_le, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline void glue(stw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val)
-{
- glue(address_space_stw_be, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline void glue(stl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
{
glue(address_space_stl_le, SUFFIX)(ARG1, addr, val,
@@ -139,6 +103,15 @@ static inline void glue(stq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t va
MEMTXATTRS_UNSPECIFIED, NULL);
}
+#define ENDIANNESS
+#include "system/memory_ldst_phys_endian.h.inc"
+
+#define ENDIANNESS _le
+#include "system/memory_ldst_phys_endian.h.inc"
+
+#define ENDIANNESS _be
+#include "system/memory_ldst_phys_endian.h.inc"
+
#undef ARG1_DECL
#undef ARG1
#undef SUFFIX
diff --git a/include/system/memory_ldst_phys_endian.h.inc b/include/system/memory_ldst_phys_endian.h.inc
new file mode 100644
index 00000000000..25ab52a88d9
--- /dev/null
+++ b/include/system/memory_ldst_phys_endian.h.inc
@@ -0,0 +1,37 @@
+/*
+ * Physical memory access endian templates
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ * Copyright (c) 2015 Linaro, Inc.
+ * Copyright (c) 2016 Red Hat, Inc.
+ * Copyright (c) 2025 Linaro Ltd.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#define LD_PHYS(size) \
+ glue(glue(ld, size), glue(ENDIANNESS, glue(_phys, SUFFIX)))
+#define ADDRESS_SPACE_LD(size) \
+ glue(glue(address_space_ld, size), glue(ENDIANNESS, SUFFIX))
+
+#define ST_PHYS(size) \
+ glue(glue(st, size), glue(ENDIANNESS, glue(_phys, SUFFIX)))
+#define ADDRESS_SPACE_ST(size) \
+ glue(glue(address_space_st, size), glue(ENDIANNESS, SUFFIX))
+
+static inline uint16_t LD_PHYS(uw)(ARG1_DECL, hwaddr addr)
+{
+ return ADDRESS_SPACE_LD(uw)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
+static inline void ST_PHYS(w)(ARG1_DECL, hwaddr addr, uint16_t val)
+{
+ ADDRESS_SPACE_ST(w)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
+#undef LD_PHYS
+#undef ST_PHYS
+#undef ADDRESS_SPACE_LD
+#undef ADDRESS_SPACE_ST
+
+#undef ENDIANNESS
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index d5776678edf..c37a07b4f4a 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -240,27 +240,6 @@ static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
return val;
}
-uint16_t glue(address_space_lduw, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_lduw_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_NATIVE_ENDIAN);
-}
-
-uint16_t glue(address_space_lduw_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_lduw_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_LITTLE_ENDIAN);
-}
-
-uint16_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_lduw_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_BIG_ENDIAN);
-}
-
/* warning: addr must be aligned */
static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint32_t val, MemTxAttrs attrs,
@@ -401,27 +380,6 @@ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
RCU_READ_UNLOCK();
}
-void glue(address_space_stw, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stw_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_NATIVE_ENDIAN);
-}
-
-void glue(address_space_stw_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stw_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_LITTLE_ENDIAN);
-}
-
-void glue(address_space_stw_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stw_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_BIG_ENDIAN);
-}
-
static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs,
MemTxResult *result, enum device_endian endian)
@@ -486,6 +444,18 @@ void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
DEVICE_BIG_ENDIAN);
}
+#define ENDIANNESS
+#define DEVICE_ENDIANNESS DEVICE_NATIVE_ENDIAN
+#include "memory_ldst_endian.c.inc"
+
+#define ENDIANNESS _le
+#define DEVICE_ENDIANNESS DEVICE_LITTLE_ENDIAN
+#include "memory_ldst_endian.c.inc"
+
+#define ENDIANNESS _be
+#define DEVICE_ENDIANNESS DEVICE_BIG_ENDIAN
+#include "memory_ldst_endian.c.inc"
+
#undef ARG1_DECL
#undef ARG1
#undef SUFFIX
diff --git a/system/memory_ldst_endian.c.inc b/system/memory_ldst_endian.c.inc
new file mode 100644
index 00000000000..e1ae44ca232
--- /dev/null
+++ b/system/memory_ldst_endian.c.inc
@@ -0,0 +1,42 @@
+/*
+ * Physical memory access endian templates
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ * Copyright (c) 2015 Linaro, Inc.
+ * Copyright (c) 2016 Red Hat, Inc.
+ * Copyright (c) 2025 Linaro Ltd.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#define ADDRESS_SPACE_LD(size) \
+ glue(glue(address_space_ld, size), glue(ENDIANNESS, SUFFIX))
+#define ADDRESS_SPACE_LD_INTERNAL(size) \
+ glue(glue(address_space_ld, size), glue(_internal, SUFFIX))
+
+#define ADDRESS_SPACE_ST(size) \
+ glue(glue(address_space_st, size), glue(ENDIANNESS, SUFFIX))
+#define ADDRESS_SPACE_ST_INTERNAL(size) \
+ glue(glue(address_space_st, size), glue(_internal, SUFFIX))
+
+uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ return ADDRESS_SPACE_LD_INTERNAL(uw)(ARG1, addr, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
+void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ ADDRESS_SPACE_ST_INTERNAL(w)(ARG1, addr, val, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
+#undef ADDRESS_SPACE_LD
+#undef ADDRESS_SPACE_LD_INTERNAL
+#undef ADDRESS_SPACE_ST
+#undef ADDRESS_SPACE_ST_INTERNAL
+
+#undef ENDIANNESS
+#undef DEVICE_ENDIANNESS
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* [PATCH v3 08/25] system/memory: Define address_space_ldst[L] endian variants via template
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 07/25] system/memory: Define address_space_ldst[W] endian variants via template Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-24 15:21 ` [PATCH v3 09/25] system/memory: Define address_space_ldst[Q] " Philippe Mathieu-Daudé
` (16 subsequent siblings)
24 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Define address_space_ldst[L] endian variants via template.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
include/system/memory_ldst.h.inc | 12 ------
include/system/memory_ldst_endian.h.inc | 4 ++
include/system/memory_ldst_phys.h.inc | 36 -----------------
include/system/memory_ldst_phys_endian.h.inc | 10 +++++
system/memory_ldst.c.inc | 42 --------------------
system/memory_ldst_endian.c.inc | 14 +++++++
6 files changed, 28 insertions(+), 90 deletions(-)
diff --git a/include/system/memory_ldst.h.inc b/include/system/memory_ldst.h.inc
index 73c0366a247..7ccca46f2a9 100644
--- a/include/system/memory_ldst.h.inc
+++ b/include/system/memory_ldst.h.inc
@@ -19,30 +19,18 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-uint32_t glue(address_space_ldl, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stl, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stq, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint32_t glue(address_space_ldl_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint32_t glue(address_space_ldl_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint64_t glue(address_space_ldq_le, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stl_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stl_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stq_le, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
diff --git a/include/system/memory_ldst_endian.h.inc b/include/system/memory_ldst_endian.h.inc
index 3f216197663..845ec3b4ad1 100644
--- a/include/system/memory_ldst_endian.h.inc
+++ b/include/system/memory_ldst_endian.h.inc
@@ -16,8 +16,12 @@
uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
+uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result);
+void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
+ MemTxAttrs attrs, MemTxResult *result);
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_ST
diff --git a/include/system/memory_ldst_phys.h.inc b/include/system/memory_ldst_phys.h.inc
index 71c2e64ff0f..c3c73419e61 100644
--- a/include/system/memory_ldst_phys.h.inc
+++ b/include/system/memory_ldst_phys.h.inc
@@ -19,24 +19,12 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-static inline uint32_t glue(ldl_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldl, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldq, SUFFIX)(ARG1, addr,
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stl_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
-{
- glue(address_space_stl, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline void glue(stq_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
{
glue(address_space_stq, SUFFIX)(ARG1, addr, val,
@@ -49,18 +37,6 @@ static inline uint8_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline uint32_t glue(ldl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldl_le, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline uint32_t glue(ldl_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldl_be, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline uint64_t glue(ldq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldq_le, SUFFIX)(ARG1, addr,
@@ -79,18 +55,6 @@ static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
-{
- glue(address_space_stl_le, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline void glue(stl_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
-{
- glue(address_space_stl_be, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline void glue(stq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
{
glue(address_space_stq_le, SUFFIX)(ARG1, addr, val,
diff --git a/include/system/memory_ldst_phys_endian.h.inc b/include/system/memory_ldst_phys_endian.h.inc
index 25ab52a88d9..1589f34e8e4 100644
--- a/include/system/memory_ldst_phys_endian.h.inc
+++ b/include/system/memory_ldst_phys_endian.h.inc
@@ -24,11 +24,21 @@ static inline uint16_t LD_PHYS(uw)(ARG1_DECL, hwaddr addr)
return ADDRESS_SPACE_LD(uw)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
}
+static inline uint32_t LD_PHYS(l)(ARG1_DECL, hwaddr addr)
+{
+ return ADDRESS_SPACE_LD(l)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
static inline void ST_PHYS(w)(ARG1_DECL, hwaddr addr, uint16_t val)
{
ADDRESS_SPACE_ST(w)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
}
+static inline void ST_PHYS(l)(ARG1_DECL, hwaddr addr, uint32_t val)
+{
+ ADDRESS_SPACE_ST(l)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
#undef LD_PHYS
#undef ST_PHYS
#undef ADDRESS_SPACE_LD
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index c37a07b4f4a..ab2df6e429b 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -67,27 +67,6 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
return val;
}
-uint32_t glue(address_space_ldl, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldl_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_NATIVE_ENDIAN);
-}
-
-uint32_t glue(address_space_ldl_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldl_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_LITTLE_ENDIAN);
-}
-
-uint32_t glue(address_space_ldl_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldl_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_BIG_ENDIAN);
-}
-
/* warning: addr must be aligned */
static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
@@ -284,27 +263,6 @@ static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
RCU_READ_UNLOCK();
}
-void glue(address_space_stl, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stl_internal, SUFFIX)(ARG1, addr, val, attrs,
- result, DEVICE_NATIVE_ENDIAN);
-}
-
-void glue(address_space_stl_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stl_internal, SUFFIX)(ARG1, addr, val, attrs,
- result, DEVICE_LITTLE_ENDIAN);
-}
-
-void glue(address_space_stl_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stl_internal, SUFFIX)(ARG1, addr, val, attrs,
- result, DEVICE_BIG_ENDIAN);
-}
-
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result)
{
diff --git a/system/memory_ldst_endian.c.inc b/system/memory_ldst_endian.c.inc
index e1ae44ca232..5d46524ec4c 100644
--- a/system/memory_ldst_endian.c.inc
+++ b/system/memory_ldst_endian.c.inc
@@ -26,6 +26,13 @@ uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
DEVICE_ENDIANNESS);
}
+uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ return ADDRESS_SPACE_LD_INTERNAL(l)(ARG1, addr, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result)
{
@@ -33,6 +40,13 @@ void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
DEVICE_ENDIANNESS);
}
+void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ ADDRESS_SPACE_ST_INTERNAL(l)(ARG1, addr, val, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_LD_INTERNAL
#undef ADDRESS_SPACE_ST
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* [PATCH v3 09/25] system/memory: Define address_space_ldst[Q] endian variants via template
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 08/25] system/memory: Define address_space_ldst[L] " Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-24 15:21 ` [PATCH v3 10/25] system/memory: Factor address_space_ldst[M]_internal() helper out Philippe Mathieu-Daudé
` (15 subsequent siblings)
24 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Define address_space_ldst[Q] endian variants via template.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
include/system/memory_ldst.h.inc | 17 ++------
include/system/memory_ldst_endian.h.inc | 4 ++
include/system/memory_ldst_phys.h.inc | 36 -----------------
include/system/memory_ldst_phys_endian.h.inc | 10 +++++
system/memory_ldst.c.inc | 42 --------------------
system/memory_ldst_endian.c.inc | 14 +++++++
6 files changed, 31 insertions(+), 92 deletions(-)
diff --git a/include/system/memory_ldst.h.inc b/include/system/memory_ldst.h.inc
index 7ccca46f2a9..dd1fb482eac 100644
--- a/include/system/memory_ldst.h.inc
+++ b/include/system/memory_ldst.h.inc
@@ -19,22 +19,11 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stq, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint64_t glue(address_space_ldq_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
+
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stq_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
+ hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result);
#define ENDIANNESS
#include "system/memory_ldst_endian.h.inc"
diff --git a/include/system/memory_ldst_endian.h.inc b/include/system/memory_ldst_endian.h.inc
index 845ec3b4ad1..f5b6b496be5 100644
--- a/include/system/memory_ldst_endian.h.inc
+++ b/include/system/memory_ldst_endian.h.inc
@@ -18,10 +18,14 @@ uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
+uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
+void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
+ MemTxAttrs attrs, MemTxResult *result);
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_ST
diff --git a/include/system/memory_ldst_phys.h.inc b/include/system/memory_ldst_phys.h.inc
index c3c73419e61..f4c91dc7a91 100644
--- a/include/system/memory_ldst_phys.h.inc
+++ b/include/system/memory_ldst_phys.h.inc
@@ -19,54 +19,18 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldq, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline void glue(stq_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
-{
- glue(address_space_stq, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline uint8_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldub, SUFFIX)(ARG1, addr,
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline uint64_t glue(ldq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldq_le, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline uint64_t glue(ldq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldq_be, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val)
{
glue(address_space_stb, SUFFIX)(ARG1, addr, val,
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
-{
- glue(address_space_stq_le, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline void glue(stq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
-{
- glue(address_space_stq_be, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
#define ENDIANNESS
#include "system/memory_ldst_phys_endian.h.inc"
diff --git a/include/system/memory_ldst_phys_endian.h.inc b/include/system/memory_ldst_phys_endian.h.inc
index 1589f34e8e4..820e9dd1f13 100644
--- a/include/system/memory_ldst_phys_endian.h.inc
+++ b/include/system/memory_ldst_phys_endian.h.inc
@@ -29,6 +29,11 @@ static inline uint32_t LD_PHYS(l)(ARG1_DECL, hwaddr addr)
return ADDRESS_SPACE_LD(l)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
}
+static inline uint64_t LD_PHYS(q)(ARG1_DECL, hwaddr addr)
+{
+ return ADDRESS_SPACE_LD(q)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
static inline void ST_PHYS(w)(ARG1_DECL, hwaddr addr, uint16_t val)
{
ADDRESS_SPACE_ST(w)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
@@ -39,6 +44,11 @@ static inline void ST_PHYS(l)(ARG1_DECL, hwaddr addr, uint32_t val)
ADDRESS_SPACE_ST(l)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
}
+static inline void ST_PHYS(q)(ARG1_DECL, hwaddr addr, uint64_t val)
+{
+ ADDRESS_SPACE_ST(q)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
#undef LD_PHYS
#undef ST_PHYS
#undef ADDRESS_SPACE_LD
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index ab2df6e429b..823fc3a7561 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -115,27 +115,6 @@ static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
return val;
}
-uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldq_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_NATIVE_ENDIAN);
-}
-
-uint64_t glue(address_space_ldq_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldq_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_LITTLE_ENDIAN);
-}
-
-uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldq_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_BIG_ENDIAN);
-}
-
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
@@ -381,27 +360,6 @@ static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
RCU_READ_UNLOCK();
}
-void glue(address_space_stq, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stq_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_NATIVE_ENDIAN);
-}
-
-void glue(address_space_stq_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stq_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_LITTLE_ENDIAN);
-}
-
-void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stq_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_BIG_ENDIAN);
-}
-
#define ENDIANNESS
#define DEVICE_ENDIANNESS DEVICE_NATIVE_ENDIAN
#include "memory_ldst_endian.c.inc"
diff --git a/system/memory_ldst_endian.c.inc b/system/memory_ldst_endian.c.inc
index 5d46524ec4c..791d041b15d 100644
--- a/system/memory_ldst_endian.c.inc
+++ b/system/memory_ldst_endian.c.inc
@@ -33,6 +33,13 @@ uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
DEVICE_ENDIANNESS);
}
+uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ return ADDRESS_SPACE_LD_INTERNAL(q)(ARG1, addr, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result)
{
@@ -47,6 +54,13 @@ void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
DEVICE_ENDIANNESS);
}
+void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ ADDRESS_SPACE_ST_INTERNAL(q)(ARG1, addr, val, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_LD_INTERNAL
#undef ADDRESS_SPACE_ST
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* [PATCH v3 10/25] system/memory: Factor address_space_ldst[M]_internal() helper out
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 09/25] system/memory: Define address_space_ldst[Q] " Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-24 15:21 ` [PATCH v3 11/25] system/memory: Pass device_endian argument as MemOp bit Philippe Mathieu-Daudé
` (14 subsequent siblings)
24 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
All the LD/ST[W,L,Q] variants use the same template, only
modifying the access size used. Unify as a single pair of
LD/ST methods taking a MemOp argument. Thus use the 'm'
suffix for MemOp.
Keep the pre-existing "warning: addr must be aligned" comment.
We leave the wonder about why we aren't asserting alignment
for later.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
system/memory_ldst.c.inc | 298 +++++++++------------------------------
1 file changed, 63 insertions(+), 235 deletions(-)
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index 823fc3a7561..39b3930bf50 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -20,39 +20,43 @@
*/
/* warning: addr must be aligned */
-static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
- enum device_endian endian)
+static inline
+uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
+ hwaddr addr,
+ MemTxAttrs attrs,
+ MemTxResult *result,
+ enum device_endian endian)
{
+ const unsigned size = memop_size(mop);
uint8_t *ptr;
uint64_t val;
MemoryRegion *mr;
- hwaddr l = 4;
+ hwaddr l = size;
hwaddr addr1;
MemTxResult r;
bool release_lock = false;
RCU_READ_LOCK();
mr = TRANSLATE(addr, &addr1, &l, false, attrs);
- if (l < 4 || !memory_access_is_direct(mr, false, attrs)) {
+ if (l < size || !memory_access_is_direct(mr, false, attrs)) {
release_lock |= prepare_mmio_access(mr);
/* I/O case */
r = memory_region_dispatch_read(mr, addr1, &val,
- MO_32 | devend_memop(endian), attrs);
+ mop | devend_memop(endian), attrs);
} else {
/* RAM case */
- fuzz_dma_read_cb(addr, 4, mr);
+ fuzz_dma_read_cb(addr, size, mr);
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
switch (endian) {
case DEVICE_LITTLE_ENDIAN:
- val = ldl_le_p(ptr);
+ val = ldn_le_p(ptr, size);
break;
case DEVICE_BIG_ENDIAN:
- val = ldl_be_p(ptr);
+ val = ldn_be_p(ptr, size);
break;
default:
- val = ldl_p(ptr);
+ val = ldn_p(ptr, size);
break;
}
r = MEMTX_OK;
@@ -67,87 +71,30 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
return val;
}
+/* warning: addr must be aligned */
+static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
+ enum device_endian endian)
+{
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_32, addr,
+ attrs, result, endian);
+}
+
/* warning: addr must be aligned */
static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
enum device_endian endian)
{
- uint8_t *ptr;
- uint64_t val;
- MemoryRegion *mr;
- hwaddr l = 8;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, false, attrs);
- if (l < 8 || !memory_access_is_direct(mr, false, attrs)) {
- release_lock |= prepare_mmio_access(mr);
-
- /* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val,
- MO_64 | devend_memop(endian), attrs);
- } else {
- /* RAM case */
- fuzz_dma_read_cb(addr, 8, mr);
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
- val = ldq_le_p(ptr);
- break;
- case DEVICE_BIG_ENDIAN:
- val = ldq_be_p(ptr);
- break;
- default:
- val = ldq_p(ptr);
- break;
- }
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
- return val;
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_64, addr,
+ attrs, result, endian);
}
-uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
+uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result)
{
- uint8_t *ptr;
- uint64_t val;
- MemoryRegion *mr;
- hwaddr l = 1;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, false, attrs);
- if (!memory_access_is_direct(mr, false, attrs)) {
- release_lock |= prepare_mmio_access(mr);
-
- /* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val, MO_8, attrs);
- } else {
- /* RAM case */
- fuzz_dma_read_cb(addr, 1, mr);
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- val = ldub_p(ptr);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
- return val;
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_8, addr,
+ attrs, result,
+ DEVICE_NATIVE_ENDIAN);
}
/* warning: addr must be aligned */
@@ -155,37 +102,47 @@ static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
enum device_endian endian)
{
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_16, addr,
+ attrs, result, endian);
+}
+
+/* warning: addr must be aligned */
+static inline
+void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
+ hwaddr addr, uint64_t val,
+ MemTxAttrs attrs,
+ MemTxResult *result,
+ enum device_endian endian)
+{
+ const unsigned size = memop_size(mop);
uint8_t *ptr;
- uint64_t val;
MemoryRegion *mr;
- hwaddr l = 2;
+ hwaddr l = size;
hwaddr addr1;
MemTxResult r;
bool release_lock = false;
RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, false, attrs);
- if (l < 2 || !memory_access_is_direct(mr, false, attrs)) {
+ mr = TRANSLATE(addr, &addr1, &l, true, attrs);
+ if (l < size || !memory_access_is_direct(mr, true, attrs)) {
release_lock |= prepare_mmio_access(mr);
-
- /* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val,
- MO_16 | devend_memop(endian), attrs);
+ r = memory_region_dispatch_write(mr, addr1, val,
+ mop | devend_memop(endian), attrs);
} else {
/* RAM case */
- fuzz_dma_read_cb(addr, 2, mr);
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
switch (endian) {
case DEVICE_LITTLE_ENDIAN:
- val = lduw_le_p(ptr);
+ stn_le_p(ptr, size, val);
break;
case DEVICE_BIG_ENDIAN:
- val = lduw_be_p(ptr);
+ stn_be_p(ptr, size, val);
break;
default:
- val = lduw_p(ptr);
+ stn_p(ptr, size, val);
break;
}
+ invalidate_and_set_dirty(mr, addr1, size);
r = MEMTX_OK;
}
if (result) {
@@ -195,7 +152,6 @@ static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
bql_unlock();
}
RCU_READ_UNLOCK();
- return val;
}
/* warning: addr must be aligned */
@@ -203,74 +159,16 @@ static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint32_t val, MemTxAttrs attrs,
MemTxResult *result, enum device_endian endian)
{
- uint8_t *ptr;
- MemoryRegion *mr;
- hwaddr l = 4;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, true, attrs);
- if (l < 4 || !memory_access_is_direct(mr, true, attrs)) {
- release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val,
- MO_32 | devend_memop(endian), attrs);
- } else {
- /* RAM case */
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
- stl_le_p(ptr, val);
- break;
- case DEVICE_BIG_ENDIAN:
- stl_be_p(ptr, val);
- break;
- default:
- stl_p(ptr, val);
- break;
- }
- invalidate_and_set_dirty(mr, addr1, 4);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
+ glue(address_space_stm_internal, SUFFIX)(ARG1, MO_32, addr, val,
+ attrs, result, endian);
}
-void glue(address_space_stb, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result)
+void glue(address_space_stb, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val,
+ MemTxAttrs attrs, MemTxResult *result)
{
- uint8_t *ptr;
- MemoryRegion *mr;
- hwaddr l = 1;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, true, attrs);
- if (!memory_access_is_direct(mr, true, attrs)) {
- release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val, MO_8, attrs);
- } else {
- /* RAM case */
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- stb_p(ptr, val);
- invalidate_and_set_dirty(mr, addr1, 1);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
+ glue(address_space_stm_internal, SUFFIX)(ARG1, MO_8, addr, val,
+ attrs, result,
+ DEVICE_NATIVE_ENDIAN);
}
/* warning: addr must be aligned */
@@ -278,86 +176,16 @@ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint16_t val, MemTxAttrs attrs,
MemTxResult *result, enum device_endian endian)
{
- uint8_t *ptr;
- MemoryRegion *mr;
- hwaddr l = 2;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, true, attrs);
- if (l < 2 || !memory_access_is_direct(mr, true, attrs)) {
- release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val,
- MO_16 | devend_memop(endian), attrs);
- } else {
- /* RAM case */
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
- stw_le_p(ptr, val);
- break;
- case DEVICE_BIG_ENDIAN:
- stw_be_p(ptr, val);
- break;
- default:
- stw_p(ptr, val);
- break;
- }
- invalidate_and_set_dirty(mr, addr1, 2);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
+ glue(address_space_stm_internal, SUFFIX)(ARG1, MO_16, addr, val,
+ attrs, result, endian);
}
static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs,
MemTxResult *result, enum device_endian endian)
{
- uint8_t *ptr;
- MemoryRegion *mr;
- hwaddr l = 8;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, true, attrs);
- if (l < 8 || !memory_access_is_direct(mr, true, attrs)) {
- release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val,
- MO_64 | devend_memop(endian), attrs);
- } else {
- /* RAM case */
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
- stq_le_p(ptr, val);
- break;
- case DEVICE_BIG_ENDIAN:
- stq_be_p(ptr, val);
- break;
- default:
- stq_p(ptr, val);
- break;
- }
- invalidate_and_set_dirty(mr, addr1, 8);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
+ glue(address_space_stm_internal, SUFFIX)(ARG1, MO_64, addr, val,
+ attrs, result, endian);
}
#define ENDIANNESS
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* [PATCH v3 11/25] system/memory: Pass device_endian argument as MemOp bit
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 10/25] system/memory: Factor address_space_ldst[M]_internal() helper out Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-28 11:08 ` Paolo Bonzini
2025-12-24 15:21 ` [PATCH v3 12/25] system/memory: Directly call address_space_ldst[M]_internal() helper Philippe Mathieu-Daudé
` (13 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Use the MemOp argument to hold both the access size and
its endianness.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
system/memory_ldst.c.inc | 86 ++++++++++++---------------------
system/memory_ldst_endian.c.inc | 26 +++++-----
2 files changed, 44 insertions(+), 68 deletions(-)
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index 39b3930bf50..5c8299e0cdc 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -24,8 +24,7 @@ static inline
uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
hwaddr addr,
MemTxAttrs attrs,
- MemTxResult *result,
- enum device_endian endian)
+ MemTxResult *result)
{
const unsigned size = memop_size(mop);
uint8_t *ptr;
@@ -42,22 +41,15 @@ uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
release_lock |= prepare_mmio_access(mr);
/* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val,
- mop | devend_memop(endian), attrs);
+ r = memory_region_dispatch_read(mr, addr1, &val, mop, attrs);
} else {
/* RAM case */
fuzz_dma_read_cb(addr, size, mr);
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
+ if ((mop & MO_BSWAP) == MO_LE) {
val = ldn_le_p(ptr, size);
- break;
- case DEVICE_BIG_ENDIAN:
+ } else {
val = ldn_be_p(ptr, size);
- break;
- default:
- val = ldn_p(ptr, size);
- break;
}
r = MEMTX_OK;
}
@@ -73,37 +65,33 @@ uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
/* warning: addr must be aligned */
static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
- enum device_endian endian)
+ MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_32, addr,
- attrs, result, endian);
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_32, addr,
+ attrs, result);
}
/* warning: addr must be aligned */
static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
- enum device_endian endian)
+ MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_64, addr,
- attrs, result, endian);
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_64, addr,
+ attrs, result);
}
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_8, addr,
- attrs, result,
- DEVICE_NATIVE_ENDIAN);
+ attrs, result);
}
/* warning: addr must be aligned */
static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
- enum device_endian endian)
+ MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_16, addr,
- attrs, result, endian);
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_16, addr,
+ attrs, result);
}
/* warning: addr must be aligned */
@@ -111,8 +99,7 @@ static inline
void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
hwaddr addr, uint64_t val,
MemTxAttrs attrs,
- MemTxResult *result,
- enum device_endian endian)
+ MemTxResult *result)
{
const unsigned size = memop_size(mop);
uint8_t *ptr;
@@ -126,21 +113,14 @@ void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
mr = TRANSLATE(addr, &addr1, &l, true, attrs);
if (l < size || !memory_access_is_direct(mr, true, attrs)) {
release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val,
- mop | devend_memop(endian), attrs);
+ r = memory_region_dispatch_write(mr, addr1, val, mop, attrs);
} else {
/* RAM case */
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
+ if ((mop & MO_BSWAP) == MO_LE) {
stn_le_p(ptr, size, val);
- break;
- case DEVICE_BIG_ENDIAN:
+ } else {
stn_be_p(ptr, size, val);
- break;
- default:
- stn_p(ptr, size, val);
- break;
}
invalidate_and_set_dirty(mr, addr1, size);
r = MEMTX_OK;
@@ -156,48 +136,44 @@ void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
/* warning: addr must be aligned */
static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs,
- MemTxResult *result, enum device_endian endian)
+ MemOp mop, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
{
- glue(address_space_stm_internal, SUFFIX)(ARG1, MO_32, addr, val,
- attrs, result, endian);
+ glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_32, addr, val,
+ attrs, result);
}
void glue(address_space_stb, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val,
MemTxAttrs attrs, MemTxResult *result)
{
glue(address_space_stm_internal, SUFFIX)(ARG1, MO_8, addr, val,
- attrs, result,
- DEVICE_NATIVE_ENDIAN);
+ attrs, result);
}
/* warning: addr must be aligned */
static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs,
- MemTxResult *result, enum device_endian endian)
+ MemOp mop, hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
{
- glue(address_space_stm_internal, SUFFIX)(ARG1, MO_16, addr, val,
- attrs, result, endian);
+ glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_16, addr, val,
+ attrs, result);
}
static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs,
- MemTxResult *result, enum device_endian endian)
+ MemOp mop, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
{
- glue(address_space_stm_internal, SUFFIX)(ARG1, MO_64, addr, val,
- attrs, result, endian);
+ glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_64, addr, val,
+ attrs, result);
}
#define ENDIANNESS
-#define DEVICE_ENDIANNESS DEVICE_NATIVE_ENDIAN
+#define MO_ENDIAN (target_big_endian() ? MO_BE : MO_LE)
#include "memory_ldst_endian.c.inc"
#define ENDIANNESS _le
-#define DEVICE_ENDIANNESS DEVICE_LITTLE_ENDIAN
+#define MO_ENDIAN MO_LE
#include "memory_ldst_endian.c.inc"
#define ENDIANNESS _be
-#define DEVICE_ENDIANNESS DEVICE_BIG_ENDIAN
+#define MO_ENDIAN MO_BE
#include "memory_ldst_endian.c.inc"
#undef ARG1_DECL
diff --git a/system/memory_ldst_endian.c.inc b/system/memory_ldst_endian.c.inc
index 791d041b15d..9cf36017135 100644
--- a/system/memory_ldst_endian.c.inc
+++ b/system/memory_ldst_endian.c.inc
@@ -22,43 +22,43 @@
uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
- return ADDRESS_SPACE_LD_INTERNAL(uw)(ARG1, addr, attrs, result,
- DEVICE_ENDIANNESS);
+ return ADDRESS_SPACE_LD_INTERNAL(uw)(ARG1, MO_ENDIAN,
+ addr, attrs, result);
}
uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
- return ADDRESS_SPACE_LD_INTERNAL(l)(ARG1, addr, attrs, result,
- DEVICE_ENDIANNESS);
+ return ADDRESS_SPACE_LD_INTERNAL(l)(ARG1, MO_ENDIAN,
+ addr, attrs, result);
}
uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
- return ADDRESS_SPACE_LD_INTERNAL(q)(ARG1, addr, attrs, result,
- DEVICE_ENDIANNESS);
+ return ADDRESS_SPACE_LD_INTERNAL(q)(ARG1, MO_ENDIAN,
+ addr, attrs, result);
}
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result)
{
- ADDRESS_SPACE_ST_INTERNAL(w)(ARG1, addr, val, attrs, result,
- DEVICE_ENDIANNESS);
+ ADDRESS_SPACE_ST_INTERNAL(w)(ARG1, MO_ENDIAN,
+ addr, val, attrs, result);
}
void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result)
{
- ADDRESS_SPACE_ST_INTERNAL(l)(ARG1, addr, val, attrs, result,
- DEVICE_ENDIANNESS);
+ ADDRESS_SPACE_ST_INTERNAL(l)(ARG1, MO_ENDIAN,
+ addr, val, attrs, result);
}
void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
MemTxAttrs attrs, MemTxResult *result)
{
- ADDRESS_SPACE_ST_INTERNAL(q)(ARG1, addr, val, attrs, result,
- DEVICE_ENDIANNESS);
+ ADDRESS_SPACE_ST_INTERNAL(q)(ARG1, MO_ENDIAN,
+ addr, val, attrs, result);
}
#undef ADDRESS_SPACE_LD
@@ -67,4 +67,4 @@ void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
#undef ADDRESS_SPACE_ST_INTERNAL
#undef ENDIANNESS
-#undef DEVICE_ENDIANNESS
+#undef MO_ENDIAN
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 11/25] system/memory: Pass device_endian argument as MemOp bit
2025-12-24 15:21 ` [PATCH v3 11/25] system/memory: Pass device_endian argument as MemOp bit Philippe Mathieu-Daudé
@ 2025-12-28 11:08 ` Paolo Bonzini
0 siblings, 0 replies; 62+ messages in thread
From: Paolo Bonzini @ 2025-12-28 11:08 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, David Hildenbrand
[-- Attachment #1: Type: text/plain, Size: 10592 bytes --]
Il mer 24 dic 2025, 16:24 Philippe Mathieu-Daudé <philmd@linaro.org> ha
scritto:
> - switch (endian) {
> - case DEVICE_LITTLE_ENDIAN:
> + if ((mop & MO_BSWAP) == MO_LE) {
> val = ldn_le_p(ptr, size);
> - break;
> - case DEVICE_BIG_ENDIAN:
> + } else {
> val = ldn_be_p(ptr, size);
> - break;
> - default:
> - val = ldn_p(ptr, size);
> - break;
> }
>
This is an example in which you could use ldn_he_p as a memcpy, followed by
the bswap if mop & MO_BSWAP. It would be closer to how MemOp bits are
defined.
Paolo
r = MEMTX_OK;
> }
> @@ -73,37 +65,33 @@ uint64_t glue(address_space_ldm_internal,
> SUFFIX)(ARG1_DECL, MemOp mop,
>
> /* warning: addr must be aligned */
> static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
> - hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
> - enum device_endian endian)
> + MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
> {
> - return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_32, addr,
> - attrs, result,
> endian);
> + return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_32,
> addr,
> + attrs, result);
> }
>
> /* warning: addr must be aligned */
> static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
> - hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
> - enum device_endian endian)
> + MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
> {
> - return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_64, addr,
> - attrs, result,
> endian);
> + return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_64,
> addr,
> + attrs, result);
> }
>
> uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, hwaddr addr,
> MemTxAttrs attrs, MemTxResult
> *result)
> {
> return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_8, addr,
> - attrs, result,
> - DEVICE_NATIVE_ENDIAN);
> + attrs, result);
> }
>
> /* warning: addr must be aligned */
> static inline uint16_t glue(address_space_lduw_internal,
> SUFFIX)(ARG1_DECL,
> - hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
> - enum device_endian endian)
> + MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
> {
> - return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_16, addr,
> - attrs, result,
> endian);
> + return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_16,
> addr,
> + attrs, result);
> }
>
> /* warning: addr must be aligned */
> @@ -111,8 +99,7 @@ static inline
> void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
> hwaddr addr, uint64_t val,
> MemTxAttrs attrs,
> - MemTxResult *result,
> - enum device_endian endian)
> + MemTxResult *result)
> {
> const unsigned size = memop_size(mop);
> uint8_t *ptr;
> @@ -126,21 +113,14 @@ void glue(address_space_stm_internal,
> SUFFIX)(ARG1_DECL, MemOp mop,
> mr = TRANSLATE(addr, &addr1, &l, true, attrs);
> if (l < size || !memory_access_is_direct(mr, true, attrs)) {
> release_lock |= prepare_mmio_access(mr);
> - r = memory_region_dispatch_write(mr, addr1, val,
> - mop | devend_memop(endian),
> attrs);
> + r = memory_region_dispatch_write(mr, addr1, val, mop, attrs);
> } else {
> /* RAM case */
> ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
> - switch (endian) {
> - case DEVICE_LITTLE_ENDIAN:
> + if ((mop & MO_BSWAP) == MO_LE) {
> stn_le_p(ptr, size, val);
> - break;
> - case DEVICE_BIG_ENDIAN:
> + } else {
> stn_be_p(ptr, size, val);
> - break;
> - default:
> - stn_p(ptr, size, val);
> - break;
> }
> invalidate_and_set_dirty(mr, addr1, size);
> r = MEMTX_OK;
> @@ -156,48 +136,44 @@ void glue(address_space_stm_internal,
> SUFFIX)(ARG1_DECL, MemOp mop,
>
> /* warning: addr must be aligned */
> static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
> - hwaddr addr, uint32_t val, MemTxAttrs attrs,
> - MemTxResult *result, enum device_endian endian)
> + MemOp mop, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult
> *result)
> {
> - glue(address_space_stm_internal, SUFFIX)(ARG1, MO_32, addr, val,
> - attrs, result, endian);
> + glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_32, addr, val,
> + attrs, result);
> }
>
> void glue(address_space_stb, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val,
> MemTxAttrs attrs, MemTxResult
> *result)
> {
> glue(address_space_stm_internal, SUFFIX)(ARG1, MO_8, addr, val,
> - attrs, result,
> - DEVICE_NATIVE_ENDIAN);
> + attrs, result);
> }
>
> /* warning: addr must be aligned */
> static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
> - hwaddr addr, uint16_t val, MemTxAttrs attrs,
> - MemTxResult *result, enum device_endian endian)
> + MemOp mop, hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult
> *result)
> {
> - glue(address_space_stm_internal, SUFFIX)(ARG1, MO_16, addr, val,
> - attrs, result, endian);
> + glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_16, addr, val,
> + attrs, result);
> }
>
> static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
> - hwaddr addr, uint64_t val, MemTxAttrs attrs,
> - MemTxResult *result, enum device_endian endian)
> + MemOp mop, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult
> *result)
> {
> - glue(address_space_stm_internal, SUFFIX)(ARG1, MO_64, addr, val,
> - attrs, result, endian);
> + glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_64, addr, val,
> + attrs, result);
> }
>
> #define ENDIANNESS
> -#define DEVICE_ENDIANNESS DEVICE_NATIVE_ENDIAN
> +#define MO_ENDIAN (target_big_endian() ? MO_BE : MO_LE)
> #include "memory_ldst_endian.c.inc"
>
> #define ENDIANNESS _le
> -#define DEVICE_ENDIANNESS DEVICE_LITTLE_ENDIAN
> +#define MO_ENDIAN MO_LE
> #include "memory_ldst_endian.c.inc"
>
> #define ENDIANNESS _be
> -#define DEVICE_ENDIANNESS DEVICE_BIG_ENDIAN
> +#define MO_ENDIAN MO_BE
> #include "memory_ldst_endian.c.inc"
>
> #undef ARG1_DECL
> diff --git a/system/memory_ldst_endian.c.inc
> b/system/memory_ldst_endian.c.inc
> index 791d041b15d..9cf36017135 100644
> --- a/system/memory_ldst_endian.c.inc
> +++ b/system/memory_ldst_endian.c.inc
> @@ -22,43 +22,43 @@
> uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
> MemTxAttrs attrs, MemTxResult *result)
> {
> - return ADDRESS_SPACE_LD_INTERNAL(uw)(ARG1, addr, attrs, result,
> - DEVICE_ENDIANNESS);
> + return ADDRESS_SPACE_LD_INTERNAL(uw)(ARG1, MO_ENDIAN,
> + addr, attrs, result);
> }
>
> uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
> MemTxAttrs attrs, MemTxResult *result)
> {
> - return ADDRESS_SPACE_LD_INTERNAL(l)(ARG1, addr, attrs, result,
> - DEVICE_ENDIANNESS);
> + return ADDRESS_SPACE_LD_INTERNAL(l)(ARG1, MO_ENDIAN,
> + addr, attrs, result);
> }
>
> uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
> MemTxAttrs attrs, MemTxResult *result)
> {
> - return ADDRESS_SPACE_LD_INTERNAL(q)(ARG1, addr, attrs, result,
> - DEVICE_ENDIANNESS);
> + return ADDRESS_SPACE_LD_INTERNAL(q)(ARG1, MO_ENDIAN,
> + addr, attrs, result);
> }
>
> void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
> MemTxAttrs attrs, MemTxResult *result)
> {
> - ADDRESS_SPACE_ST_INTERNAL(w)(ARG1, addr, val, attrs, result,
> - DEVICE_ENDIANNESS);
> + ADDRESS_SPACE_ST_INTERNAL(w)(ARG1, MO_ENDIAN,
> + addr, val, attrs, result);
> }
>
> void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
> MemTxAttrs attrs, MemTxResult *result)
> {
> - ADDRESS_SPACE_ST_INTERNAL(l)(ARG1, addr, val, attrs, result,
> - DEVICE_ENDIANNESS);
> + ADDRESS_SPACE_ST_INTERNAL(l)(ARG1, MO_ENDIAN,
> + addr, val, attrs, result);
> }
>
> void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
> MemTxAttrs attrs, MemTxResult *result)
> {
> - ADDRESS_SPACE_ST_INTERNAL(q)(ARG1, addr, val, attrs, result,
> - DEVICE_ENDIANNESS);
> + ADDRESS_SPACE_ST_INTERNAL(q)(ARG1, MO_ENDIAN,
> + addr, val, attrs, result);
> }
>
> #undef ADDRESS_SPACE_LD
> @@ -67,4 +67,4 @@ void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr,
> uint64_t val,
> #undef ADDRESS_SPACE_ST_INTERNAL
>
> #undef ENDIANNESS
> -#undef DEVICE_ENDIANNESS
> +#undef MO_ENDIAN
> --
> 2.52.0
>
>
[-- Attachment #2: Type: text/html, Size: 13020 bytes --]
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 12/25] system/memory: Directly call address_space_ldst[M]_internal() helper
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 11/25] system/memory: Pass device_endian argument as MemOp bit Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-29 0:54 ` Richard Henderson
2025-12-24 15:21 ` [PATCH v3 13/25] system/memory: Introduce LD/ST helpers with @n suffix (variable size) Philippe Mathieu-Daudé
` (12 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Inline internal address_space_ld/st[L,D,Q] helpers,
directly calling address_space_ldst[M]_internal().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/memory_ldst.c.inc | 47 ---------------------------------
system/memory_ldst_endian.c.inc | 12 ++++-----
2 files changed, 6 insertions(+), 53 deletions(-)
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index 5c8299e0cdc..20a2784e234 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -63,22 +63,6 @@ uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
return val;
}
-/* warning: addr must be aligned */
-static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_32, addr,
- attrs, result);
-}
-
-/* warning: addr must be aligned */
-static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_64, addr,
- attrs, result);
-}
-
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
@@ -86,14 +70,6 @@ uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, hwaddr addr,
attrs, result);
}
-/* warning: addr must be aligned */
-static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_16, addr,
- attrs, result);
-}
-
/* warning: addr must be aligned */
static inline
void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
@@ -134,14 +110,6 @@ void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
RCU_READ_UNLOCK();
}
-/* warning: addr must be aligned */
-static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_32, addr, val,
- attrs, result);
-}
-
void glue(address_space_stb, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val,
MemTxAttrs attrs, MemTxResult *result)
{
@@ -149,21 +117,6 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val,
attrs, result);
}
-/* warning: addr must be aligned */
-static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_16, addr, val,
- attrs, result);
-}
-
-static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_64, addr, val,
- attrs, result);
-}
-
#define ENDIANNESS
#define MO_ENDIAN (target_big_endian() ? MO_BE : MO_LE)
#include "memory_ldst_endian.c.inc"
diff --git a/system/memory_ldst_endian.c.inc b/system/memory_ldst_endian.c.inc
index 9cf36017135..fb933de11f8 100644
--- a/system/memory_ldst_endian.c.inc
+++ b/system/memory_ldst_endian.c.inc
@@ -22,42 +22,42 @@
uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
- return ADDRESS_SPACE_LD_INTERNAL(uw)(ARG1, MO_ENDIAN,
+ return ADDRESS_SPACE_LD_INTERNAL(m)(ARG1, MO_ENDIAN | MO_16,
addr, attrs, result);
}
uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
- return ADDRESS_SPACE_LD_INTERNAL(l)(ARG1, MO_ENDIAN,
+ return ADDRESS_SPACE_LD_INTERNAL(m)(ARG1, MO_ENDIAN | MO_32,
addr, attrs, result);
}
uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
- return ADDRESS_SPACE_LD_INTERNAL(q)(ARG1, MO_ENDIAN,
+ return ADDRESS_SPACE_LD_INTERNAL(m)(ARG1, MO_ENDIAN | MO_64,
addr, attrs, result);
}
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result)
{
- ADDRESS_SPACE_ST_INTERNAL(w)(ARG1, MO_ENDIAN,
+ ADDRESS_SPACE_ST_INTERNAL(m)(ARG1, MO_ENDIAN | MO_16,
addr, val, attrs, result);
}
void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result)
{
- ADDRESS_SPACE_ST_INTERNAL(l)(ARG1, MO_ENDIAN,
+ ADDRESS_SPACE_ST_INTERNAL(m)(ARG1, MO_ENDIAN | MO_32,
addr, val, attrs, result);
}
void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
MemTxAttrs attrs, MemTxResult *result)
{
- ADDRESS_SPACE_ST_INTERNAL(q)(ARG1, MO_ENDIAN,
+ ADDRESS_SPACE_ST_INTERNAL(m)(ARG1, MO_ENDIAN | MO_64,
addr, val, attrs, result);
}
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 12/25] system/memory: Directly call address_space_ldst[M]_internal() helper
2025-12-24 15:21 ` [PATCH v3 12/25] system/memory: Directly call address_space_ldst[M]_internal() helper Philippe Mathieu-Daudé
@ 2025-12-29 0:54 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 0:54 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson, David Hildenbrand
On 12/25/25 02:21, Philippe Mathieu-Daudé wrote:
> Inline internal address_space_ld/st[L,D,Q] helpers,
> directly calling address_space_ldst[M]_internal().
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> system/memory_ldst.c.inc | 47 ---------------------------------
> system/memory_ldst_endian.c.inc | 12 ++++-----
> 2 files changed, 6 insertions(+), 53 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 13/25] system/memory: Introduce LD/ST helpers with @n suffix (variable size)
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 12/25] system/memory: Directly call address_space_ldst[M]_internal() helper Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-28 11:16 ` Paolo Bonzini
2025-12-24 15:21 ` [PATCH v3 14/25] system/memory: Use explicit endianness in ram_device::read/write() Philippe Mathieu-Daudé
` (11 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Introduce load/store helpers taking an unsigned size argument.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
docs/devel/loads-stores.rst | 10 ++++++----
include/system/memory_ldst_endian.h.inc | 4 ++++
system/memory_ldst_endian.c.inc | 14 ++++++++++++++
3 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst
index c906c6509ee..8db6285538e 100644
--- a/docs/devel/loads-stores.rst
+++ b/docs/devel/loads-stores.rst
@@ -375,6 +375,7 @@ succeeded using a MemTxResult return code.
- ``w`` : 16 bits
- ``l`` : 32 bits
- ``q`` : 64 bits
+ - ``n`` : size in bytes
``endian``
- ``le`` : little endian
@@ -384,8 +385,8 @@ The ``_{endian}`` suffix is omitted for byte accesses.
Regexes for git grep:
- ``\<address_space_\(read\|write\|rw\)\>``
- - ``\<address_space_ldu\?[bwql]\(_[lb]e\)\?\>``
- - ``\<address_space_st[bwql]\(_[lb]e\)\?\>``
+ - ``\<address_space_ldu\?[bwlqn]\(_[lb]e\)\?\>``
+ - ``\<address_space_st[bwlqn]\(_[lb]e\)\?\>``
``address_space_write_rom``
~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -431,6 +432,7 @@ device doing the access has no way to report such an error.
- ``w`` : 16 bits
- ``l`` : 32 bits
- ``q`` : 64 bits
+ - ``n`` : size in bytes
``endian``
- ``le`` : little endian
@@ -439,8 +441,8 @@ device doing the access has no way to report such an error.
The ``_{endian}_`` infix is omitted for byte accesses.
Regexes for git grep:
- - ``\<ldu\?[bwlq]\(_[bl]e\)\?_phys\>``
- - ``\<st[bwlq]\(_[bl]e\)\?_phys\>``
+ - ``\<ldu\?[bwlqn]\(_[bl]e\)\?_phys\>``
+ - ``\<st[bwlqn]\(_[bl]e\)\?_phys\>``
``cpu_physical_memory_*``
~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/include/system/memory_ldst_endian.h.inc b/include/system/memory_ldst_endian.h.inc
index f5b6b496be5..77850f1a18d 100644
--- a/include/system/memory_ldst_endian.h.inc
+++ b/include/system/memory_ldst_endian.h.inc
@@ -20,12 +20,16 @@ uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
+uint64_t ADDRESS_SPACE_LD(n)(ARG1_DECL, unsigned size, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
MemTxAttrs attrs, MemTxResult *result);
+void ADDRESS_SPACE_ST(n)(ARG1_DECL, unsigned size, hwaddr addr, uint64_t val,
+ MemTxAttrs attrs, MemTxResult *result);
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_ST
diff --git a/system/memory_ldst_endian.c.inc b/system/memory_ldst_endian.c.inc
index fb933de11f8..4ff050027f5 100644
--- a/system/memory_ldst_endian.c.inc
+++ b/system/memory_ldst_endian.c.inc
@@ -40,6 +40,13 @@ uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
addr, attrs, result);
}
+uint64_t ADDRESS_SPACE_LD(n)(ARG1_DECL, unsigned size, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ return ADDRESS_SPACE_LD_INTERNAL(m)(ARG1, MO_ENDIAN | size_memop(size),
+ addr, attrs, result);
+}
+
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result)
{
@@ -61,6 +68,13 @@ void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
addr, val, attrs, result);
}
+void ADDRESS_SPACE_ST(n)(ARG1_DECL, unsigned size, hwaddr addr, uint64_t val,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ ADDRESS_SPACE_ST_INTERNAL(m)(ARG1, MO_ENDIAN | size_memop(size),
+ addr, val, attrs, result);
+}
+
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_LD_INTERNAL
#undef ADDRESS_SPACE_ST
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 13/25] system/memory: Introduce LD/ST helpers with @n suffix (variable size)
2025-12-24 15:21 ` [PATCH v3 13/25] system/memory: Introduce LD/ST helpers with @n suffix (variable size) Philippe Mathieu-Daudé
@ 2025-12-28 11:16 ` Paolo Bonzini
0 siblings, 0 replies; 62+ messages in thread
From: Paolo Bonzini @ 2025-12-28 11:16 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, David Hildenbrand
[-- Attachment #1: Type: text/plain, Size: 4803 bytes --]
Il mer 24 dic 2025, 16:24 Philippe Mathieu-Daudé <philmd@linaro.org> ha
scritto:
> Introduce load/store helpers taking an unsigned size argument.
>
Are they used anywhere (or do you have plans)?
Overall I like the introduction of MemOp! But host endianness should be the
basis of everything else instead of something to shun.
Paolo
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> docs/devel/loads-stores.rst | 10 ++++++----
> include/system/memory_ldst_endian.h.inc | 4 ++++
> system/memory_ldst_endian.c.inc | 14 ++++++++++++++
> 3 files changed, 24 insertions(+), 4 deletions(-)
>
> diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst
> index c906c6509ee..8db6285538e 100644
> --- a/docs/devel/loads-stores.rst
> +++ b/docs/devel/loads-stores.rst
> @@ -375,6 +375,7 @@ succeeded using a MemTxResult return code.
> - ``w`` : 16 bits
> - ``l`` : 32 bits
> - ``q`` : 64 bits
> + - ``n`` : size in bytes
>
> ``endian``
> - ``le`` : little endian
> @@ -384,8 +385,8 @@ The ``_{endian}`` suffix is omitted for byte accesses.
>
> Regexes for git grep:
> - ``\<address_space_\(read\|write\|rw\)\>``
> - - ``\<address_space_ldu\?[bwql]\(_[lb]e\)\?\>``
> - - ``\<address_space_st[bwql]\(_[lb]e\)\?\>``
> + - ``\<address_space_ldu\?[bwlqn]\(_[lb]e\)\?\>``
> + - ``\<address_space_st[bwlqn]\(_[lb]e\)\?\>``
>
> ``address_space_write_rom``
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~
> @@ -431,6 +432,7 @@ device doing the access has no way to report such an
> error.
> - ``w`` : 16 bits
> - ``l`` : 32 bits
> - ``q`` : 64 bits
> + - ``n`` : size in bytes
>
> ``endian``
> - ``le`` : little endian
> @@ -439,8 +441,8 @@ device doing the access has no way to report such an
> error.
> The ``_{endian}_`` infix is omitted for byte accesses.
>
> Regexes for git grep:
> - - ``\<ldu\?[bwlq]\(_[bl]e\)\?_phys\>``
> - - ``\<st[bwlq]\(_[bl]e\)\?_phys\>``
> + - ``\<ldu\?[bwlqn]\(_[bl]e\)\?_phys\>``
> + - ``\<st[bwlqn]\(_[bl]e\)\?_phys\>``
>
> ``cpu_physical_memory_*``
> ~~~~~~~~~~~~~~~~~~~~~~~~~
> diff --git a/include/system/memory_ldst_endian.h.inc
> b/include/system/memory_ldst_endian.h.inc
> index f5b6b496be5..77850f1a18d 100644
> --- a/include/system/memory_ldst_endian.h.inc
> +++ b/include/system/memory_ldst_endian.h.inc
> @@ -20,12 +20,16 @@ uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
> MemTxAttrs attrs, MemTxResult *result);
> uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
> MemTxAttrs attrs, MemTxResult *result);
> +uint64_t ADDRESS_SPACE_LD(n)(ARG1_DECL, unsigned size, hwaddr addr,
> + MemTxAttrs attrs, MemTxResult *result);
> void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
> MemTxAttrs attrs, MemTxResult *result);
> void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
> MemTxAttrs attrs, MemTxResult *result);
> void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
> MemTxAttrs attrs, MemTxResult *result);
> +void ADDRESS_SPACE_ST(n)(ARG1_DECL, unsigned size, hwaddr addr, uint64_t
> val,
> + MemTxAttrs attrs, MemTxResult *result);
>
> #undef ADDRESS_SPACE_LD
> #undef ADDRESS_SPACE_ST
> diff --git a/system/memory_ldst_endian.c.inc
> b/system/memory_ldst_endian.c.inc
> index fb933de11f8..4ff050027f5 100644
> --- a/system/memory_ldst_endian.c.inc
> +++ b/system/memory_ldst_endian.c.inc
> @@ -40,6 +40,13 @@ uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
> addr, attrs, result);
> }
>
> +uint64_t ADDRESS_SPACE_LD(n)(ARG1_DECL, unsigned size, hwaddr addr,
> + MemTxAttrs attrs, MemTxResult *result)
> +{
> + return ADDRESS_SPACE_LD_INTERNAL(m)(ARG1, MO_ENDIAN |
> size_memop(size),
> + addr, attrs, result);
> +}
> +
> void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
> MemTxAttrs attrs, MemTxResult *result)
> {
> @@ -61,6 +68,13 @@ void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr,
> uint64_t val,
> addr, val, attrs, result);
> }
>
> +void ADDRESS_SPACE_ST(n)(ARG1_DECL, unsigned size, hwaddr addr, uint64_t
> val,
> + MemTxAttrs attrs, MemTxResult *result)
> +{
> + ADDRESS_SPACE_ST_INTERNAL(m)(ARG1, MO_ENDIAN | size_memop(size),
> + addr, val, attrs, result);
> +}
> +
> #undef ADDRESS_SPACE_LD
> #undef ADDRESS_SPACE_LD_INTERNAL
> #undef ADDRESS_SPACE_ST
> --
> 2.52.0
>
>
[-- Attachment #2: Type: text/html, Size: 6074 bytes --]
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 14/25] system/memory: Use explicit endianness in ram_device::read/write()
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (12 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 13/25] system/memory: Introduce LD/ST helpers with @n suffix (variable size) Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-28 11:12 ` Paolo Bonzini
2025-12-24 15:21 ` [PATCH v3 15/25] system: Allow restricting the legacy ld/st_phys() 'native-endian' API Philippe Mathieu-Daudé
` (10 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Replace the ldn_he_p/stn_he_p() calls by their explicit endianness
variants. Duplicate the MemoryRegionOps, using one entry for BIG
and another for LITTLE endianness. Select the proper MemoryRegionOps
in memory_region_init_ram_device_ptr().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/memory.c | 68 ++++++++++++++++++++++++++++++++++---------------
1 file changed, 48 insertions(+), 20 deletions(-)
diff --git a/system/memory.c b/system/memory.c
index 8b84661ae36..5bcdeaf0bee 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -1361,41 +1361,69 @@ const MemoryRegionOps unassigned_mem_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static uint64_t memory_region_ram_device_read(void *opaque,
- hwaddr addr, unsigned size)
+static uint64_t memory_region_ram_device_read_le(void *opaque,
+ hwaddr addr, unsigned size)
{
MemoryRegion *mr = opaque;
- uint64_t data = ldn_he_p(mr->ram_block->host + addr, size);
+ uint64_t data = ldn_le_p(mr->ram_block->host + addr, size);
trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
return data;
}
-static void memory_region_ram_device_write(void *opaque, hwaddr addr,
- uint64_t data, unsigned size)
+static uint64_t memory_region_ram_device_read_be(void *opaque,
+ hwaddr addr, unsigned size)
+{
+ MemoryRegion *mr = opaque;
+ uint64_t data = ldn_be_p(mr->ram_block->host + addr, size);
+
+ trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
+
+ return data;
+}
+
+static void memory_region_ram_device_write_le(void *opaque, hwaddr addr,
+ uint64_t data, unsigned size)
{
MemoryRegion *mr = opaque;
trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
- stn_he_p(mr->ram_block->host + addr, size, data);
+ stn_le_p(mr->ram_block->host + addr, size, data);
}
-static const MemoryRegionOps ram_device_mem_ops = {
- .read = memory_region_ram_device_read,
- .write = memory_region_ram_device_write,
- .endianness = HOST_BIG_ENDIAN ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN,
- .valid = {
- .min_access_size = 1,
- .max_access_size = 8,
- .unaligned = true,
- },
- .impl = {
- .min_access_size = 1,
- .max_access_size = 8,
- .unaligned = true,
+static void memory_region_ram_device_write_be(void *opaque, hwaddr addr,
+ uint64_t data, unsigned size)
+{
+ MemoryRegion *mr = opaque;
+
+ trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
+
+ stn_be_p(mr->ram_block->host + addr, size, data);
+}
+
+static const MemoryRegionOps ram_device_mem_ops[2] = {
+ [0 ... 1] = {
+ .valid = {
+ .min_access_size = 1,
+ .max_access_size = 8,
+ .unaligned = true,
+ },
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 8,
+ .unaligned = true,
+ },
},
+
+ [0].endianness = DEVICE_LITTLE_ENDIAN,
+ [0].read = memory_region_ram_device_read_le,
+ [0].write = memory_region_ram_device_write_le,
+
+ [1].endianness = DEVICE_BIG_ENDIAN,
+ [1].read = memory_region_ram_device_read_be,
+ [1].write = memory_region_ram_device_write_be,
};
bool memory_region_access_valid(MemoryRegion *mr,
@@ -1712,7 +1740,7 @@ void memory_region_init_ram_device_ptr(MemoryRegion *mr,
mr->ram = true;
mr->terminates = true;
mr->ram_device = true;
- mr->ops = &ram_device_mem_ops;
+ mr->ops = &ram_device_mem_ops[HOST_BIG_ENDIAN];
mr->opaque = mr;
mr->destructor = memory_region_destructor_ram;
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 14/25] system/memory: Use explicit endianness in ram_device::read/write()
2025-12-24 15:21 ` [PATCH v3 14/25] system/memory: Use explicit endianness in ram_device::read/write() Philippe Mathieu-Daudé
@ 2025-12-28 11:12 ` Paolo Bonzini
2025-12-28 16:01 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 62+ messages in thread
From: Paolo Bonzini @ 2025-12-28 11:12 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, David Hildenbrand
[-- Attachment #1: Type: text/plain, Size: 4702 bytes --]
Il mer 24 dic 2025, 16:24 Philippe Mathieu-Daudé <philmd@linaro.org> ha
scritto:
> Replace the ldn_he_p/stn_he_p() calls by their explicit endianness
> variants. Duplicate the MemoryRegionOps, using one entry for BIG
> and another for LITTLE endianness. Select the proper MemoryRegionOps
> in memory_region_init_ram_device_ptr().
>
This extra complication makes no sense to me. You're introducing dead code
and dead data, because only one of the MemoryRegionOps will be ever used on
a given host.
Given this example and the ATI one, I would really prefer to keep _he_
functions around and use them whenever you're reading from host memory as
in this case.
Paolo
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> system/memory.c | 68 ++++++++++++++++++++++++++++++++++---------------
> 1 file changed, 48 insertions(+), 20 deletions(-)
>
> diff --git a/system/memory.c b/system/memory.c
> index 8b84661ae36..5bcdeaf0bee 100644
> --- a/system/memory.c
> +++ b/system/memory.c
> @@ -1361,41 +1361,69 @@ const MemoryRegionOps unassigned_mem_ops = {
> .endianness = DEVICE_NATIVE_ENDIAN,
> };
>
> -static uint64_t memory_region_ram_device_read(void *opaque,
> - hwaddr addr, unsigned size)
> +static uint64_t memory_region_ram_device_read_le(void *opaque,
> + hwaddr addr, unsigned
> size)
> {
> MemoryRegion *mr = opaque;
> - uint64_t data = ldn_he_p(mr->ram_block->host + addr, size);
> + uint64_t data = ldn_le_p(mr->ram_block->host + addr, size);
>
> trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data,
> size);
>
> return data;
> }
>
> -static void memory_region_ram_device_write(void *opaque, hwaddr addr,
> - uint64_t data, unsigned size)
> +static uint64_t memory_region_ram_device_read_be(void *opaque,
> + hwaddr addr, unsigned
> size)
> +{
> + MemoryRegion *mr = opaque;
> + uint64_t data = ldn_be_p(mr->ram_block->host + addr, size);
> +
> + trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data,
> size);
> +
> + return data;
> +}
> +
> +static void memory_region_ram_device_write_le(void *opaque, hwaddr addr,
> + uint64_t data, unsigned
> size)
> {
> MemoryRegion *mr = opaque;
>
> trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data,
> size);
>
> - stn_he_p(mr->ram_block->host + addr, size, data);
> + stn_le_p(mr->ram_block->host + addr, size, data);
> }
>
> -static const MemoryRegionOps ram_device_mem_ops = {
> - .read = memory_region_ram_device_read,
> - .write = memory_region_ram_device_write,
> - .endianness = HOST_BIG_ENDIAN ? DEVICE_BIG_ENDIAN :
> DEVICE_LITTLE_ENDIAN,
> - .valid = {
> - .min_access_size = 1,
> - .max_access_size = 8,
> - .unaligned = true,
> - },
> - .impl = {
> - .min_access_size = 1,
> - .max_access_size = 8,
> - .unaligned = true,
> +static void memory_region_ram_device_write_be(void *opaque, hwaddr addr,
> + uint64_t data, unsigned
> size)
> +{
> + MemoryRegion *mr = opaque;
> +
> + trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data,
> size);
> +
> + stn_be_p(mr->ram_block->host + addr, size, data);
> +}
> +
> +static const MemoryRegionOps ram_device_mem_ops[2] = {
> + [0 ... 1] = {
> + .valid = {
> + .min_access_size = 1,
> + .max_access_size = 8,
> + .unaligned = true,
> + },
> + .impl = {
> + .min_access_size = 1,
> + .max_access_size = 8,
> + .unaligned = true,
> + },
> },
> +
> + [0].endianness = DEVICE_LITTLE_ENDIAN,
> + [0].read = memory_region_ram_device_read_le,
> + [0].write = memory_region_ram_device_write_le,
> +
> + [1].endianness = DEVICE_BIG_ENDIAN,
> + [1].read = memory_region_ram_device_read_be,
> + [1].write = memory_region_ram_device_write_be,
> };
>
> bool memory_region_access_valid(MemoryRegion *mr,
> @@ -1712,7 +1740,7 @@ void memory_region_init_ram_device_ptr(MemoryRegion
> *mr,
> mr->ram = true;
> mr->terminates = true;
> mr->ram_device = true;
> - mr->ops = &ram_device_mem_ops;
> + mr->ops = &ram_device_mem_ops[HOST_BIG_ENDIAN];
> mr->opaque = mr;
> mr->destructor = memory_region_destructor_ram;
>
> --
> 2.52.0
>
>
[-- Attachment #2: Type: text/html, Size: 6050 bytes --]
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v3 14/25] system/memory: Use explicit endianness in ram_device::read/write()
2025-12-28 11:12 ` Paolo Bonzini
@ 2025-12-28 16:01 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-28 16:01 UTC (permalink / raw)
To: Paolo Bonzini
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, David Hildenbrand
On 28/12/25 12:12, Paolo Bonzini wrote:
>
>
> Il mer 24 dic 2025, 16:24 Philippe Mathieu-Daudé <philmd@linaro.org
> <mailto:philmd@linaro.org>> ha scritto:
>
> Replace the ldn_he_p/stn_he_p() calls by their explicit endianness
> variants. Duplicate the MemoryRegionOps, using one entry for BIG
> and another for LITTLE endianness. Select the proper MemoryRegionOps
> in memory_region_init_ram_device_ptr().
>
>
> This extra complication makes no sense to me. You're introducing dead
> code and dead data, because only one of the MemoryRegionOps will be ever
> used on a given host.
>
> Given this example and the ATI one, I would really prefer to keep _he_
> functions around and use them whenever you're reading from host memory
> as in this case.
Ack, patch dropped.
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 15/25] system: Allow restricting the legacy ld/st_phys() 'native-endian' API
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (13 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 14/25] system/memory: Use explicit endianness in ram_device::read/write() Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-24 19:11 ` Manos Pitsidianakis
2025-12-29 0:58 ` Richard Henderson
2025-12-24 15:21 ` [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() " Philippe Mathieu-Daudé
` (9 subsequent siblings)
24 siblings, 2 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Guard the native endian APIs we want to remove by surrounding
them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
Since all targets can check the definition, do not poison it.
Once a target gets cleaned we'll set the definition in the
target config, then the target won't be able to use the legacy
API anymore.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/system/memory_ldst_phys.h.inc | 2 ++
scripts/make-config-poison.sh | 1 +
2 files changed, 3 insertions(+)
diff --git a/include/system/memory_ldst_phys.h.inc b/include/system/memory_ldst_phys.h.inc
index f4c91dc7a91..66bbd3061c2 100644
--- a/include/system/memory_ldst_phys.h.inc
+++ b/include/system/memory_ldst_phys.h.inc
@@ -31,8 +31,10 @@ static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val)
MEMTXATTRS_UNSPECIFIED, NULL);
}
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
#define ENDIANNESS
#include "system/memory_ldst_phys_endian.h.inc"
+#endif /* TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API */
#define ENDIANNESS _le
#include "system/memory_ldst_phys_endian.h.inc"
diff --git a/scripts/make-config-poison.sh b/scripts/make-config-poison.sh
index 937357b3531..b4d61e8bc9e 100755
--- a/scripts/make-config-poison.sh
+++ b/scripts/make-config-poison.sh
@@ -11,6 +11,7 @@ exec sed -n \
-e '/CONFIG_USER_ONLY/d' \
-e '/CONFIG_SOFTMMU/d' \
-e '/TARGET_NOT_USING_LEGACY_LDST_PHYS_API/d' \
+ -e '/TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API/d' \
-e '/^#define / {' \
-e 's///' \
-e 's/ .*//' \
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 15/25] system: Allow restricting the legacy ld/st_phys() 'native-endian' API
2025-12-24 15:21 ` [PATCH v3 15/25] system: Allow restricting the legacy ld/st_phys() 'native-endian' API Philippe Mathieu-Daudé
@ 2025-12-24 19:11 ` Manos Pitsidianakis
2025-12-29 0:58 ` Richard Henderson
1 sibling, 0 replies; 62+ messages in thread
From: Manos Pitsidianakis @ 2025-12-24 19:11 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Paolo Bonzini, Pierrick Bouvier, Peter Xu,
Richard Henderson, Anton Johansson, David Hildenbrand
On Wed, Dec 24, 2025 at 5:24 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Guard the native endian APIs we want to remove by surrounding
> them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>
> Since all targets can check the definition, do not poison it.
>
> Once a target gets cleaned we'll set the definition in the
> target config, then the target won't be able to use the legacy
> API anymore.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
> include/system/memory_ldst_phys.h.inc | 2 ++
> scripts/make-config-poison.sh | 1 +
> 2 files changed, 3 insertions(+)
>
> diff --git a/include/system/memory_ldst_phys.h.inc b/include/system/memory_ldst_phys.h.inc
> index f4c91dc7a91..66bbd3061c2 100644
> --- a/include/system/memory_ldst_phys.h.inc
> +++ b/include/system/memory_ldst_phys.h.inc
> @@ -31,8 +31,10 @@ static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val)
> MEMTXATTRS_UNSPECIFIED, NULL);
> }
>
> +#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
> #define ENDIANNESS
> #include "system/memory_ldst_phys_endian.h.inc"
> +#endif /* TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API */
>
> #define ENDIANNESS _le
> #include "system/memory_ldst_phys_endian.h.inc"
> diff --git a/scripts/make-config-poison.sh b/scripts/make-config-poison.sh
> index 937357b3531..b4d61e8bc9e 100755
> --- a/scripts/make-config-poison.sh
> +++ b/scripts/make-config-poison.sh
> @@ -11,6 +11,7 @@ exec sed -n \
> -e '/CONFIG_USER_ONLY/d' \
> -e '/CONFIG_SOFTMMU/d' \
> -e '/TARGET_NOT_USING_LEGACY_LDST_PHYS_API/d' \
> + -e '/TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API/d' \
> -e '/^#define / {' \
> -e 's///' \
> -e 's/ .*//' \
> --
> 2.52.0
>
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v3 15/25] system: Allow restricting the legacy ld/st_phys() 'native-endian' API
2025-12-24 15:21 ` [PATCH v3 15/25] system: Allow restricting the legacy ld/st_phys() 'native-endian' API Philippe Mathieu-Daudé
2025-12-24 19:11 ` Manos Pitsidianakis
@ 2025-12-29 0:58 ` Richard Henderson
1 sibling, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 0:58 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson, David Hildenbrand
On 12/25/25 02:21, Philippe Mathieu-Daudé wrote:
> Guard the native endian APIs we want to remove by surrounding
> them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>
> Since all targets can check the definition, do not poison it.
>
> Once a target gets cleaned we'll set the definition in the
> target config, then the target won't be able to use the legacy
> API anymore.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> include/system/memory_ldst_phys.h.inc | 2 ++
> scripts/make-config-poison.sh | 1 +
> 2 files changed, 3 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (14 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 15/25] system: Allow restricting the legacy ld/st_phys() 'native-endian' API Philippe Mathieu-Daudé
@ 2025-12-24 15:21 ` Philippe Mathieu-Daudé
2025-12-27 8:56 ` Paolo Bonzini
2025-12-24 15:22 ` [PATCH v3 17/25] system: Allow restricting legacy address_space_ldst() native-endian API Philippe Mathieu-Daudé
` (8 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé
Guard the native endian APIs we want to remove by surrounding
them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
Once a target gets cleaned we'll set the definition in the
target config, then the target won't be able to use the legacy
API anymore.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/qemu/bswap.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index 65a1b3634f4..d1c889e7bc9 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -412,7 +412,9 @@ static inline void stq_be_p(void *ptr, uint64_t v)
} \
}
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
DO_STN_LDN_P(he)
+#endif
DO_STN_LDN_P(le)
DO_STN_LDN_P(be)
@@ -423,6 +425,7 @@ DO_STN_LDN_P(be)
#undef le_bswaps
#undef be_bswaps
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
/* Return ld{word}_{le,be}_p following target endianness. */
#define LOAD_IMPL(word, args...) \
@@ -494,4 +497,6 @@ static inline void stn_p(void *ptr, int sz, uint64_t v)
#undef STORE_IMPL
+#endif /* TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API */
+
#endif /* BSWAP_H */
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-24 15:21 ` [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() " Philippe Mathieu-Daudé
@ 2025-12-27 8:56 ` Paolo Bonzini
2025-12-27 15:51 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 62+ messages in thread
From: Paolo Bonzini @ 2025-12-27 8:56 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson
[-- Attachment #1: Type: text/plain, Size: 1845 bytes --]
Il mer 24 dic 2025, 16:24 Philippe Mathieu-Daudé <philmd@linaro.org> ha
scritto:
> Guard the native endian APIs we want to remove by surrounding
> them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>
> Once a target gets cleaned we'll set the definition in the
> target config, then the target won't be able to use the legacy
> API anymore.
>
Host endianness APIs are fine and are used when talking to the kernel.
These functions that take a void* should not be included in
TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API.
(And also they are the same for all targets so they don't get in the way of
the single binary effort).
If the only change needed in the series is to drop this patch, don't bother
with reposting.
Paolo
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/qemu/bswap.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
> index 65a1b3634f4..d1c889e7bc9 100644
> --- a/include/qemu/bswap.h
> +++ b/include/qemu/bswap.h
> @@ -412,7 +412,9 @@ static inline void stq_be_p(void *ptr, uint64_t v)
> } \
> }
>
> +#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
> DO_STN_LDN_P(he)
> +#endif
> DO_STN_LDN_P(le)
> DO_STN_LDN_P(be)
>
> @@ -423,6 +425,7 @@ DO_STN_LDN_P(be)
> #undef le_bswaps
> #undef be_bswaps
>
> +#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
>
> /* Return ld{word}_{le,be}_p following target endianness. */
> #define LOAD_IMPL(word, args...) \
> @@ -494,4 +497,6 @@ static inline void stn_p(void *ptr, int sz, uint64_t v)
>
> #undef STORE_IMPL
>
> +#endif /* TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API */
> +
> #endif /* BSWAP_H */
> --
> 2.52.0
>
>
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^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-27 8:56 ` Paolo Bonzini
@ 2025-12-27 15:51 ` Philippe Mathieu-Daudé
2025-12-27 20:34 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-27 15:51 UTC (permalink / raw)
To: Paolo Bonzini
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson
On 27/12/25 09:56, Paolo Bonzini wrote:
>
>
> Il mer 24 dic 2025, 16:24 Philippe Mathieu-Daudé <philmd@linaro.org
> <mailto:philmd@linaro.org>> ha scritto:
>
> Guard the native endian APIs we want to remove by surrounding
> them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>
> Once a target gets cleaned we'll set the definition in the
> target config, then the target won't be able to use the legacy
> API anymore.
>
>
> Host endianness APIs are fine and are used when talking to the kernel.
> These functions that take a void* should not be included in
> TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API.
>
> (And also they are the same for all targets so they don't get in the way
> of the single binary effort).
Indeed they don't get in the way: I'm trying to have clearer APIs where
everything is explicit. Anyway I can live keeping this for now.
> If the only change needed in the series is to drop this patch, don't
> bother with reposting.
OK, thanks.
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-27 15:51 ` Philippe Mathieu-Daudé
@ 2025-12-27 20:34 ` Philippe Mathieu-Daudé
2025-12-28 10:44 ` Paolo Bonzini
0 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-27 20:34 UTC (permalink / raw)
To: Paolo Bonzini
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson
On 27/12/25 16:51, Philippe Mathieu-Daudé wrote:
> On 27/12/25 09:56, Paolo Bonzini wrote:
>>
>>
>> Il mer 24 dic 2025, 16:24 Philippe Mathieu-Daudé <philmd@linaro.org
>> <mailto:philmd@linaro.org>> ha scritto:
>>
>> Guard the native endian APIs we want to remove by surrounding
>> them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>>
>> Once a target gets cleaned we'll set the definition in the
>> target config, then the target won't be able to use the legacy
>> API anymore.
>>
>>
>> Host endianness APIs are fine and are used when talking to the kernel.
>> These functions that take a void* should not be included in
>> TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API.
>>
>> (And also they are the same for all targets so they don't get in the
>> way of the single binary effort).
>
> Indeed they don't get in the way: I'm trying to have clearer APIs where
> everything is explicit. Anyway I can live keeping this for now.
I guess remembering my reasoning was:
1/ we can not have "guest native" endianness in single binary
2/ host endianness is only useful with "guest native" one,
otherwise if you know the guest endianness, you can just
use an explicit cpu_to_$endian method.
3/ thus once guest native endianness is gone there is no
usefulness of "host endianness", better to remove instead
of wondering "in which endianness is my host" and let the
compiler do better than us all possible optimisations.
I felt confident it was coherent because, except the ATI single
one-line case [*] which I believe is not the best implementation,
the rest of my series proved this API is easily removable, the
resulting code ending easier to understand IMHO.
I surely missed something and would like to be pointed at it,
so maybe I can revisit my approach.
[*]
https://lore.kernel.org/qemu-devel/1cdc2735-d9e0-27c1-90e3-e250bb73cad6@eik.bme.hu/
>
>> If the only change needed in the series is to drop this patch, don't
>> bother with reposting.
>
> OK, thanks.
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-27 20:34 ` Philippe Mathieu-Daudé
@ 2025-12-28 10:44 ` Paolo Bonzini
2025-12-28 15:14 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 62+ messages in thread
From: Paolo Bonzini @ 2025-12-28 10:44 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson
[-- Attachment #1: Type: text/plain, Size: 1327 bytes --]
Il sab 27 dic 2025, 21:34 Philippe Mathieu-Daudé <philmd@linaro.org> ha
scritto:
> 1/ we can not have "guest native" endianness in single binary
> 2/ host endianness is only useful with "guest native" one,
> otherwise if you know the guest endianness, you can just
> use an explicit cpu_to_$endian method.
>
Host endianness is useful when not talking to the guest at all—e.g. for
sockets or kernel APIs.
*_he_* functions are basically just memcpy in that they support unaligned
accesses; plus stn_he_p has the advantage of taking a value unlike memcpy
which takes a pointer.
Perhaps the source of the confusion is that they are in bswap.h but they
(quite obviously since it's host endianness) never swap?
I felt confident it was coherent because, except the ATI single
> one-line case [*] which I believe is not the best implementation,
> the rest of my series proved this API is easily removable, the
> resulting code ending easier to understand IMHO.
>
It's easily removable because most of the time accesses are in guest
endianness, or aligned, but the replacement for *_he_* functions is not
picking a specific endianness; it's a normal pointer store. These are not
super common but especially in hw/display/ you can find them. stn_he_p is
the right choice for ATI.
Paolo
[-- Attachment #2: Type: text/html, Size: 2131 bytes --]
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-28 10:44 ` Paolo Bonzini
@ 2025-12-28 15:14 ` Philippe Mathieu-Daudé
2025-12-28 15:38 ` Paolo Bonzini
0 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-28 15:14 UTC (permalink / raw)
To: Paolo Bonzini
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson
On 28/12/25 11:44, Paolo Bonzini wrote:
>
>
> Il sab 27 dic 2025, 21:34 Philippe Mathieu-Daudé <philmd@linaro.org
> <mailto:philmd@linaro.org>> ha scritto:
>
> 1/ we can not have "guest native" endianness in single binary
> 2/ host endianness is only useful with "guest native" one,
> otherwise if you know the guest endianness, you can just
> use an explicit cpu_to_$endian method.
>
>
> Host endianness is useful when not talking to the guest at all—e.g. for
> sockets or kernel APIs.
>
> *_he_* functions are basically just memcpy in that they support
> unaligned accesses; plus stn_he_p has the advantage of taking a value
> unlike memcpy which takes a pointer.
I see.
> Perhaps the source of the confusion is that they are in bswap.h but they
> (quite obviously since it's host endianness) never swap?
Hmm, maybe not well named API then.
> I felt confident it was coherent because, except the ATI single
> one-line case [*] which I believe is not the best implementation,
> the rest of my series proved this API is easily removable, the
> resulting code ending easier to understand IMHO.
>
>
> It's easily removable because most of the time accesses are in guest
> endianness, or aligned, but the replacement for *_he_* functions is not
> picking a specific endianness; it's a normal pointer store. These are
> not super common but especially in hw/display/ you can find them.
> stn_he_p is the right choice for ATI.
OK. Let's consider the following patches removed then:
- 03/25 system: Use explicit endianness in subpage_ops::read/write()
- 14/25 system: Use explicit endianness in ram_device::read/write()
- 16/25 system: Allow restricting legacy ld/st_he() 'native-endian' API
All the series I posted this week build fine without them.
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-28 15:14 ` Philippe Mathieu-Daudé
@ 2025-12-28 15:38 ` Paolo Bonzini
2025-12-28 16:00 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 62+ messages in thread
From: Paolo Bonzini @ 2025-12-28 15:38 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson
[-- Attachment #1: Type: text/plain, Size: 1101 bytes --]
Il dom 28 dic 2025, 16:14 Philippe Mathieu-Daudé <philmd@linaro.org> ha
scritto:
> > Perhaps the source of the confusion is that they are in bswap.h but they
> > (quite obviously since it's host endianness) never swap?
>
> Hmm, maybe not well named API then.
>
The name is fine, the placement maybe a bit less; they could be moved out
of bswap.h but it's not really necessary to do it now.
OK. Let's consider the following patches removed then:
>
> - 03/25 system: Use explicit endianness in subpage_ops::read/write()
> - 14/25 system: Use explicit endianness in ram_device::read/write()
> - 16/25 system: Allow restricting legacy ld/st_he() 'native-endian' API
>
> All the series I posted this week build fine without them.
>
Great, the other change I suggested was about the handling of MO_BSWAP but
it can be done separately.
If you don't want to repost and prefer to drop patch 14, we will also
remove DEVICE_NATIVE_ENDIAN from subpages in a second step, for example by
using "HOST_BIG_ENDIAN ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN" as in
the ram_device ops.
[-- Attachment #2: Type: text/html, Size: 1826 bytes --]
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-28 15:38 ` Paolo Bonzini
@ 2025-12-28 16:00 ` Philippe Mathieu-Daudé
2025-12-28 16:20 ` Paolo Bonzini
0 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-28 16:00 UTC (permalink / raw)
To: Paolo Bonzini
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson
On 28/12/25 16:38, Paolo Bonzini wrote:
>
>
> Il dom 28 dic 2025, 16:14 Philippe Mathieu-Daudé <philmd@linaro.org
> <mailto:philmd@linaro.org>> ha scritto:
>
> > Perhaps the source of the confusion is that they are in bswap.h
> but they
> > (quite obviously since it's host endianness) never swap?
>
> Hmm, maybe not well named API then.
>
>
> The name is fine, the placement maybe a bit less; they could be moved
> out of bswap.h but it's not really necessary to do it now.
Indeed not needed now, but already done to figure this API ;) This
helped me to understand what we don't need is "DO_STN_LDN_P(he)"
because this is a convoluted expansion to a plain memcpy().
> OK. Let's consider the following patches removed then:
>
> - 03/25 system: Use explicit endianness in subpage_ops::read/write()
> - 14/25 system: Use explicit endianness in ram_device::read/write()
> - 16/25 system: Allow restricting legacy ld/st_he() 'native-endian' API
>
> All the series I posted this week build fine without them.
>
>
> Great, the other change I suggested was about the handling of MO_BSWAP
> but it can be done separately.
This request is not ignored, but I plan to address it on top to keep
current changes simple enough.
>
> If you don't want to repost and prefer to drop patch 14, we will also
> remove DEVICE_NATIVE_ENDIAN from subpages in a second step, for example
> by using "HOST_BIG_ENDIAN ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN" as
> in the ram_device ops.
Yeah, that would even be smth like "DEVICE_ENDIANNESS_IS_IRRELEVANT", as
we call directly the ld/st_unaligned helpers. I'll think about that later.
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-28 16:00 ` Philippe Mathieu-Daudé
@ 2025-12-28 16:20 ` Paolo Bonzini
2025-12-28 16:24 ` Philippe Mathieu-Daudé
2025-12-28 17:19 ` Peter Maydell
0 siblings, 2 replies; 62+ messages in thread
From: Paolo Bonzini @ 2025-12-28 16:20 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson
[-- Attachment #1: Type: text/plain, Size: 2253 bytes --]
Il dom 28 dic 2025, 17:00 Philippe Mathieu-Daudé <philmd@linaro.org> ha
scritto:
> On 28/12/25 16:38, Paolo Bonzini wrote:
> >
> >
> > Il dom 28 dic 2025, 16:14 Philippe Mathieu-Daudé <philmd@linaro.org
> > <mailto:philmd@linaro.org>> ha scritto:
> >
> > > Perhaps the source of the confusion is that they are in bswap.h
> > but they
> > > (quite obviously since it's host endianness) never swap?
> >
> > Hmm, maybe not well named API then.
> >
> >
> > The name is fine, the placement maybe a bit less; they could be moved
> > out of bswap.h but it's not really necessary to do it now.
>
> Indeed not needed now, but already done to figure this API ;) This
> helped me to understand what we don't need is "DO_STN_LDN_P(he)"
> because this is a convoluted expansion to a plain memcpy().
>
Without having seen your code, I will note that the simple conversion to
memcpy() only works for little endian hosts. On big endian, you also need
to adjust the first byte, like
memcpy(p, ((uint8_t*)&val) + sizeof(val) - n, n);
And likewise for ldn_he_p. (Apologize if you had noticed it, just trying to
avoid a possible round trip over the holidays!)
Paolo
> > OK. Let's consider the following patches removed then:
> >
> > - 03/25 system: Use explicit endianness in subpage_ops::read/write()
> > - 14/25 system: Use explicit endianness in ram_device::read/write()
> > - 16/25 system: Allow restricting legacy ld/st_he() 'native-endian'
> API
> >
> > All the series I posted this week build fine without them.
> >
> >
> > Great, the other change I suggested was about the handling of MO_BSWAP
> > but it can be done separately.
>
> This request is not ignored, but I plan to address it on top to keep
> current changes simple enough.
>
> >
> > If you don't want to repost and prefer to drop patch 14, we will also
> > remove DEVICE_NATIVE_ENDIAN from subpages in a second step, for example
> > by using "HOST_BIG_ENDIAN ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN" as
> > in the ram_device ops.
>
> Yeah, that would even be smth like "DEVICE_ENDIANNESS_IS_IRRELEVANT", as
> we call directly the ld/st_unaligned helpers. I'll think about that later.
>
>
[-- Attachment #2: Type: text/html, Size: 3415 bytes --]
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-28 16:20 ` Paolo Bonzini
@ 2025-12-28 16:24 ` Philippe Mathieu-Daudé
2025-12-28 17:19 ` Peter Maydell
1 sibling, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-28 16:24 UTC (permalink / raw)
To: Paolo Bonzini
Cc: qemu-devel, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson
On 28/12/25 17:20, Paolo Bonzini wrote:
> Il dom 28 dic 2025, 17:00 Philippe Mathieu-Daudé <philmd@linaro.org
> <mailto:philmd@linaro.org>> ha scritto:
>
> On 28/12/25 16:38, Paolo Bonzini wrote:
> >
> >
> > Il dom 28 dic 2025, 16:14 Philippe Mathieu-Daudé
> <philmd@linaro.org <mailto:philmd@linaro.org>
> > <mailto:philmd@linaro.org <mailto:philmd@linaro.org>>> ha scritto:
> >
> > > Perhaps the source of the confusion is that they are in
> bswap.h
> > but they
> > > (quite obviously since it's host endianness) never swap?
> >
> > Hmm, maybe not well named API then.
> >
> >
> > The name is fine, the placement maybe a bit less; they could be
> moved
> > out of bswap.h but it's not really necessary to do it now.
>
> Indeed not needed now, but already done to figure this API ;) This
> helped me to understand what we don't need is "DO_STN_LDN_P(he)"
> because this is a convoluted expansion to a plain memcpy().
>
>
> Without having seen your code, I will note that the simple conversion to
> memcpy() only works for little endian hosts. On big endian, you also
> need to adjust the first byte, like
>
> memcpy(p, ((uint8_t*)&val) + sizeof(val) - n, n);
Thanks, this is exactly what I had in mind for few replacements.
>
> And likewise for ldn_he_p. (Apologize if you had noticed it, just trying
> to avoid a possible round trip over the holidays!)
Thanks for your review and help :)
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-28 16:20 ` Paolo Bonzini
2025-12-28 16:24 ` Philippe Mathieu-Daudé
@ 2025-12-28 17:19 ` Peter Maydell
2025-12-28 20:15 ` Paolo Bonzini
1 sibling, 1 reply; 62+ messages in thread
From: Peter Maydell @ 2025-12-28 17:19 UTC (permalink / raw)
To: Paolo Bonzini
Cc: Philippe Mathieu-Daudé, qemu-devel, Pierrick Bouvier,
Peter Xu, Richard Henderson, Manos Pitsidianakis, Anton Johansson
On Sun, 28 Dec 2025 at 16:20, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> Il dom 28 dic 2025, 17:00 Philippe Mathieu-Daudé <philmd@linaro.org> ha scritto:
>>
>> On 28/12/25 16:38, Paolo Bonzini wrote:
>> >
>> >
>> > Il dom 28 dic 2025, 16:14 Philippe Mathieu-Daudé <philmd@linaro.org
>> > <mailto:philmd@linaro.org>> ha scritto:
>> >
>> > > Perhaps the source of the confusion is that they are in bswap.h
>> > but they
>> > > (quite obviously since it's host endianness) never swap?
>> >
>> > Hmm, maybe not well named API then.
>> >
>> >
>> > The name is fine, the placement maybe a bit less; they could be moved
>> > out of bswap.h but it's not really necessary to do it now.
>>
>> Indeed not needed now, but already done to figure this API ;) This
>> helped me to understand what we don't need is "DO_STN_LDN_P(he)"
>> because this is a convoluted expansion to a plain memcpy().
>
>
> Without having seen your code, I will note that the simple conversion to memcpy() only works for little endian hosts. On big endian, you also need to adjust the first byte, like
>
> memcpy(p, ((uint8_t*)&val) + sizeof(val) - n, n);
>
> And likewise for ldn_he_p. (Apologize if you had noticed it, just trying to avoid a possible round trip over the holidays!)
But an inline memcpy() is hard to read and easy to get wrong:
we have a pointer-cast and some pointer arithmetic going on here.
What we want is to express our intent: "I am doing a load/store
of N bytes which are in the host byte order and which might not
be aligned". That's what the _he_p() functions are all for.
thanks
-- PMM
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() 'native-endian' API
2025-12-28 17:19 ` Peter Maydell
@ 2025-12-28 20:15 ` Paolo Bonzini
0 siblings, 0 replies; 62+ messages in thread
From: Paolo Bonzini @ 2025-12-28 20:15 UTC (permalink / raw)
To: Peter Maydell
Cc: Philippe Mathieu-Daudé, qemu-devel, Pierrick Bouvier,
Peter Xu, Richard Henderson, Manos Pitsidianakis, Anton Johansson
[-- Attachment #1: Type: text/plain, Size: 550 bytes --]
Il dom 28 dic 2025, 18:19 Peter Maydell <peter.maydell@linaro.org> ha
scritto:
> But an inline memcpy() is hard to read and easy to get wrong:
> we have a pointer-cast and some pointer arithmetic going on here.
> What we want is to express our intent: "I am doing a load/store
> of N bytes which are in the host byte order and which might not
> be aligned". That's what the _he_p() functions are all for.
>
Yes, I think (hope :)) that Phil wants to define ldn_he_p/stn_he_p as a
memcpy instead of a switch statement.
Paolo
> thanks
> -- PMM
>
>
[-- Attachment #2: Type: text/html, Size: 1242 bytes --]
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 17/25] system: Allow restricting legacy address_space_ldst() native-endian API
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (15 preceding siblings ...)
2025-12-24 15:21 ` [PATCH v3 16/25] system: Allow restricting the legacy ld/st_he() " Philippe Mathieu-Daudé
@ 2025-12-24 15:22 ` Philippe Mathieu-Daudé
2025-12-29 1:05 ` Richard Henderson
2025-12-24 15:22 ` [PATCH v3 18/25] system: Allow restricting the legacy cpu_ld/st() 'native-endian' API Philippe Mathieu-Daudé
` (7 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:22 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Guard the native endian APIs we want to remove by surrounding
them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
Once a target gets cleaned we'll set the definition in the
target config, then the target won't be able to use the legacy
API anymore.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/system/memory_cached.h | 2 ++
include/system/memory_ldst.h.inc | 2 ++
system/memory_ldst.c.inc | 2 ++
3 files changed, 6 insertions(+)
diff --git a/include/system/memory_cached.h b/include/system/memory_cached.h
index 587e8a1453a..e46658400d9 100644
--- a/include/system/memory_cached.h
+++ b/include/system/memory_cached.h
@@ -77,8 +77,10 @@ static inline void address_space_stb_cached(MemoryRegionCache *cache,
}
}
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
#define ENDIANNESS
#include "system/memory_ldst_cached.h.inc"
+#endif
#define ENDIANNESS _le
#include "system/memory_ldst_cached.h.inc"
diff --git a/include/system/memory_ldst.h.inc b/include/system/memory_ldst.h.inc
index dd1fb482eac..896550bdd65 100644
--- a/include/system/memory_ldst.h.inc
+++ b/include/system/memory_ldst.h.inc
@@ -25,8 +25,10 @@ uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result);
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
#define ENDIANNESS
#include "system/memory_ldst_endian.h.inc"
+#endif /* TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API */
#define ENDIANNESS _le
#include "system/memory_ldst_endian.h.inc"
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index 20a2784e234..e4b76d26dd9 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -117,9 +117,11 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val,
attrs, result);
}
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
#define ENDIANNESS
#define MO_ENDIAN (target_big_endian() ? MO_BE : MO_LE)
#include "memory_ldst_endian.c.inc"
+#endif /* TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API */
#define ENDIANNESS _le
#define MO_ENDIAN MO_LE
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 17/25] system: Allow restricting legacy address_space_ldst() native-endian API
2025-12-24 15:22 ` [PATCH v3 17/25] system: Allow restricting legacy address_space_ldst() native-endian API Philippe Mathieu-Daudé
@ 2025-12-29 1:05 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 1:05 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson, David Hildenbrand
On 12/25/25 02:22, Philippe Mathieu-Daudé wrote:
> Guard the native endian APIs we want to remove by surrounding
> them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>
> Once a target gets cleaned we'll set the definition in the
> target config, then the target won't be able to use the legacy
> API anymore.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> include/system/memory_cached.h | 2 ++
> include/system/memory_ldst.h.inc | 2 ++
> system/memory_ldst.c.inc | 2 ++
> 3 files changed, 6 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 18/25] system: Allow restricting the legacy cpu_ld/st() 'native-endian' API
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (16 preceding siblings ...)
2025-12-24 15:22 ` [PATCH v3 17/25] system: Allow restricting legacy address_space_ldst() native-endian API Philippe Mathieu-Daudé
@ 2025-12-24 15:22 ` Philippe Mathieu-Daudé
2025-12-29 1:06 ` Richard Henderson
2025-12-24 15:22 ` [PATCH v3 19/25] system: Allow restricting the legacy translator_ld() " Philippe Mathieu-Daudé
` (6 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:22 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé
Guard the native endian APIs we want to remove by surrounding
them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
Once a target gets cleaned we'll set the definition in the
target config, then the target won't be able to use the legacy
API anymore.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/accel/tcg/cpu-ldst.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/accel/tcg/cpu-ldst.h b/include/accel/tcg/cpu-ldst.h
index 0de7f5eaa6b..a5711bc15a6 100644
--- a/include/accel/tcg/cpu-ldst.h
+++ b/include/accel/tcg/cpu-ldst.h
@@ -428,6 +428,7 @@ cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val)
cpu_stq_le_data_ra(env, addr, val, 0);
}
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
#if TARGET_BIG_ENDIAN
# define cpu_lduw_data cpu_lduw_be_data
# define cpu_ldsw_data cpu_ldsw_be_data
@@ -501,5 +502,6 @@ static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
MemOpIdx oi = make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true));
return cpu_ldq_code_mmu(env, addr, oi, 0);
}
+#endif /* TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API */
#endif /* ACCEL_TCG_CPU_LDST_H */
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 18/25] system: Allow restricting the legacy cpu_ld/st() 'native-endian' API
2025-12-24 15:22 ` [PATCH v3 18/25] system: Allow restricting the legacy cpu_ld/st() 'native-endian' API Philippe Mathieu-Daudé
@ 2025-12-29 1:06 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 1:06 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson
On 12/25/25 02:22, Philippe Mathieu-Daudé wrote:
> Guard the native endian APIs we want to remove by surrounding
> them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>
> Once a target gets cleaned we'll set the definition in the
> target config, then the target won't be able to use the legacy
> API anymore.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/accel/tcg/cpu-ldst.h | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 19/25] system: Allow restricting the legacy translator_ld() 'native-endian' API
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (17 preceding siblings ...)
2025-12-24 15:22 ` [PATCH v3 18/25] system: Allow restricting the legacy cpu_ld/st() 'native-endian' API Philippe Mathieu-Daudé
@ 2025-12-24 15:22 ` Philippe Mathieu-Daudé
2025-12-29 1:07 ` Richard Henderson
2025-12-24 15:22 ` [PATCH v3 20/25] system: Allow restricting the legacy tswap() " Philippe Mathieu-Daudé
` (5 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:22 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé
Guard the native endian APIs we want to remove by surrounding
them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
Once a target gets cleaned we'll set the definition in the
target config, then the target won't be able to use the legacy
API anymore.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/exec/translator.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/exec/translator.h b/include/exec/translator.h
index 3c326555696..8d343627bd9 100644
--- a/include/exec/translator.h
+++ b/include/exec/translator.h
@@ -188,7 +188,8 @@ uint32_t translator_ldl_end(CPUArchState *env, DisasContextBase *db,
uint64_t translator_ldq_end(CPUArchState *env, DisasContextBase *db,
vaddr pc, MemOp endian);
-#ifdef COMPILING_PER_TARGET
+#if !defined(TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API) \
+ && defined(COMPILING_PER_TARGET)
static inline uint16_t
translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
{
@@ -227,7 +228,7 @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
{
return translator_ldq_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP));
}
-#endif /* COMPILING_PER_TARGET */
+#endif /* !TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API && COMPILING_PER_TARGET */
/**
* translator_fake_ld - fake instruction load
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 19/25] system: Allow restricting the legacy translator_ld() 'native-endian' API
2025-12-24 15:22 ` [PATCH v3 19/25] system: Allow restricting the legacy translator_ld() " Philippe Mathieu-Daudé
@ 2025-12-29 1:07 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 1:07 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson
On 12/25/25 02:22, Philippe Mathieu-Daudé wrote:
> Guard the native endian APIs we want to remove by surrounding
> them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>
> Once a target gets cleaned we'll set the definition in the
> target config, then the target won't be able to use the legacy
> API anymore.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/exec/translator.h | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/include/exec/translator.h b/include/exec/translator.h
> index 3c326555696..8d343627bd9 100644
> --- a/include/exec/translator.h
> +++ b/include/exec/translator.h
> @@ -188,7 +188,8 @@ uint32_t translator_ldl_end(CPUArchState *env, DisasContextBase *db,
> uint64_t translator_ldq_end(CPUArchState *env, DisasContextBase *db,
> vaddr pc, MemOp endian);
>
> -#ifdef COMPILING_PER_TARGET
> +#if !defined(TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API) \
> + && defined(COMPILING_PER_TARGET)
> static inline uint16_t
> translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
> {
> @@ -227,7 +228,7 @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
> {
> return translator_ldq_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP));
> }
> -#endif /* COMPILING_PER_TARGET */
> +#endif /* !TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API && COMPILING_PER_TARGET */
>
> /**
> * translator_fake_ld - fake instruction load
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 20/25] system: Allow restricting the legacy tswap() 'native-endian' API
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (18 preceding siblings ...)
2025-12-24 15:22 ` [PATCH v3 19/25] system: Allow restricting the legacy translator_ld() " Philippe Mathieu-Daudé
@ 2025-12-24 15:22 ` Philippe Mathieu-Daudé
2025-12-29 1:10 ` Richard Henderson
2025-12-24 15:22 ` [PATCH v3 21/25] system: Allow restricting the legacy MO_TE* 'native-endian' definitions Philippe Mathieu-Daudé
` (4 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:22 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé
Guard the native endian APIs we want to remove by surrounding
them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
Once a target gets cleaned we'll set the definition in the
target config, then the target won't be able to use the legacy
API anymore.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/exec/tswap.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/exec/tswap.h b/include/exec/tswap.h
index 72219e2c431..9e94fa0021c 100644
--- a/include/exec/tswap.h
+++ b/include/exec/tswap.h
@@ -21,6 +21,8 @@
#define target_needs_bswap() (HOST_BIG_ENDIAN != target_big_endian())
#endif /* COMPILING_PER_TARGET */
+#if defined(CONFIG_USER_ONLY) \
+ || !defined(TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API)
static inline uint16_t tswap16(uint16_t s)
{
if (target_needs_bswap()) {
@@ -68,5 +70,6 @@ static inline void tswap64s(uint64_t *s)
*s = bswap64(*s);
}
}
+#endif
#endif /* TSWAP_H */
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 20/25] system: Allow restricting the legacy tswap() 'native-endian' API
2025-12-24 15:22 ` [PATCH v3 20/25] system: Allow restricting the legacy tswap() " Philippe Mathieu-Daudé
@ 2025-12-29 1:10 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 1:10 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson
On 12/25/25 02:22, Philippe Mathieu-Daudé wrote:
> Guard the native endian APIs we want to remove by surrounding
> them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>
> Once a target gets cleaned we'll set the definition in the
> target config, then the target won't be able to use the legacy
> API anymore.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/exec/tswap.h | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 21/25] system: Allow restricting the legacy MO_TE* 'native-endian' definitions
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (19 preceding siblings ...)
2025-12-24 15:22 ` [PATCH v3 20/25] system: Allow restricting the legacy tswap() " Philippe Mathieu-Daudé
@ 2025-12-24 15:22 ` Philippe Mathieu-Daudé
2025-12-29 1:12 ` Richard Henderson
2025-12-24 15:22 ` [PATCH v3 22/25] system: Allow restricting the legacy DEVICE_NATIVE_ENDIAN definition Philippe Mathieu-Daudé
` (3 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:22 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Guard the native endian definitions we want to remove by surrounding
them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
Once a target gets cleaned we'll set the definition in the
target config, then the target won't be able to use the legacy
API anymore.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/exec/memop.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/exec/memop.h b/include/exec/memop.h
index 799b5b42218..4aaa6a0ab02 100644
--- a/include/exec/memop.h
+++ b/include/exec/memop.h
@@ -36,11 +36,13 @@ typedef enum MemOp {
MO_BE = MO_BSWAP,
#endif
#ifdef COMPILING_PER_TARGET
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
#if TARGET_BIG_ENDIAN
MO_TE = MO_BE,
#else
MO_TE = MO_LE,
#endif
+#endif
#endif
/*
@@ -150,6 +152,7 @@ typedef enum MemOp {
MO_BESQ = MO_BE | MO_SQ,
#ifdef COMPILING_PER_TARGET
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
MO_TEUW = MO_TE | MO_UW,
MO_TEUL = MO_TE | MO_UL,
MO_TEUQ = MO_TE | MO_UQ,
@@ -157,6 +160,7 @@ typedef enum MemOp {
MO_TESW = MO_TE | MO_SW,
MO_TESL = MO_TE | MO_SL,
MO_TESQ = MO_TE | MO_SQ,
+#endif
#endif
MO_SSIZE = MO_SIZE | MO_SIGN,
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 21/25] system: Allow restricting the legacy MO_TE* 'native-endian' definitions
2025-12-24 15:22 ` [PATCH v3 21/25] system: Allow restricting the legacy MO_TE* 'native-endian' definitions Philippe Mathieu-Daudé
@ 2025-12-29 1:12 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 1:12 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson, David Hildenbrand
On 12/25/25 02:22, Philippe Mathieu-Daudé wrote:
> Guard the native endian definitions we want to remove by surrounding
> them with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>
> Once a target gets cleaned we'll set the definition in the
> target config, then the target won't be able to use the legacy
> API anymore.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> include/exec/memop.h | 4 ++++
> 1 file changed, 4 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 22/25] system: Allow restricting the legacy DEVICE_NATIVE_ENDIAN definition
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (20 preceding siblings ...)
2025-12-24 15:22 ` [PATCH v3 21/25] system: Allow restricting the legacy MO_TE* 'native-endian' definitions Philippe Mathieu-Daudé
@ 2025-12-24 15:22 ` Philippe Mathieu-Daudé
2025-12-29 1:14 ` Richard Henderson
2025-12-24 15:22 ` [PATCH v3 23/25] tests/qtest: Remove unnecessary 'qemu/bswap.h' include Philippe Mathieu-Daudé
` (2 subsequent siblings)
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:22 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
Guard the native endian definition we want to remove by surrounding
it with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
Once a target gets cleaned we'll set the definition in the target
config, then the target won't be able to use the legacy API anymore.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/exec/cpu-common.h | 2 ++
system/memory-internal.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index e0be4ee2b8f..f4961a20911 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -39,7 +39,9 @@ void tcg_iommu_init_notifier_list(CPUState *cpu);
void tcg_iommu_free_notifier_list(CPUState *cpu);
enum device_endian {
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
DEVICE_NATIVE_ENDIAN,
+#endif
DEVICE_BIG_ENDIAN,
DEVICE_LITTLE_ENDIAN,
};
diff --git a/system/memory-internal.h b/system/memory-internal.h
index 46f758fa7e4..5f0524756eb 100644
--- a/system/memory-internal.h
+++ b/system/memory-internal.h
@@ -41,9 +41,11 @@ void mtree_print_dispatch(struct AddressSpaceDispatch *d,
/* returns true if end is big endian. */
static inline bool devend_big_endian(enum device_endian end)
{
+#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
if (end == DEVICE_NATIVE_ENDIAN) {
return target_big_endian();
}
+#endif
return end == DEVICE_BIG_ENDIAN;
}
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 22/25] system: Allow restricting the legacy DEVICE_NATIVE_ENDIAN definition
2025-12-24 15:22 ` [PATCH v3 22/25] system: Allow restricting the legacy DEVICE_NATIVE_ENDIAN definition Philippe Mathieu-Daudé
@ 2025-12-29 1:14 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 1:14 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson, David Hildenbrand
On 12/25/25 02:22, Philippe Mathieu-Daudé wrote:
> Guard the native endian definition we want to remove by surrounding
> it with TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API #ifdef'ry.
>
> Once a target gets cleaned we'll set the definition in the target
> config, then the target won't be able to use the legacy API anymore.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/exec/cpu-common.h | 2 ++
> system/memory-internal.h | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
> index e0be4ee2b8f..f4961a20911 100644
> --- a/include/exec/cpu-common.h
> +++ b/include/exec/cpu-common.h
> @@ -39,7 +39,9 @@ void tcg_iommu_init_notifier_list(CPUState *cpu);
> void tcg_iommu_free_notifier_list(CPUState *cpu);
>
> enum device_endian {
> +#ifndef TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API
> DEVICE_NATIVE_ENDIAN,
> +#endif
> DEVICE_BIG_ENDIAN,
> DEVICE_LITTLE_ENDIAN,
> };
For cross-target compatibility, you surely need the enumerators to stay unchanged.
Add "= 1" to DEVICE_BIG_ENDIAN?
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 23/25] tests/qtest: Remove unnecessary 'qemu/bswap.h' include
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (21 preceding siblings ...)
2025-12-24 15:22 ` [PATCH v3 22/25] system: Allow restricting the legacy DEVICE_NATIVE_ENDIAN definition Philippe Mathieu-Daudé
@ 2025-12-24 15:22 ` Philippe Mathieu-Daudé
2025-12-24 15:55 ` Cédric Le Goater
` (2 more replies)
2025-12-24 15:22 ` [PATCH v3 24/25] system/ioport: Declare x86-specific I/O port in little-endian order Philippe Mathieu-Daudé
2025-12-24 15:22 ` [PATCH v3 25/25] system/ioport: Do not open-code address_space_ld/st_le() methods Philippe Mathieu-Daudé
24 siblings, 3 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:22 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Jamin Lin, Andrew Jeffery, Joel Stanley, Fabiano Rosas,
Laurent Vivier, Gerd Hoffmann, Nicholas Piggin, Aditya Gupta,
Glenn Miles, Gautam Menghani, Marc-André Lureau, Ani Sinha,
qemu-arm, qemu-ppc
None of these files use API declared in "qemu/bswap.h",
remove the unnecessary inclusion.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
tests/qtest/pnv-xive2-common.h | 1 -
tests/qtest/aspeed_smc-test.c | 1 -
tests/qtest/ast2700-smc-test.c | 1 -
tests/qtest/libqos/fw_cfg.c | 1 -
tests/qtest/libqos/i2c-omap.c | 1 -
tests/qtest/pnv-spi-seeprom-test.c | 1 -
tests/qtest/vmcoreinfo-test.c | 1 -
7 files changed, 7 deletions(-)
diff --git a/tests/qtest/pnv-xive2-common.h b/tests/qtest/pnv-xive2-common.h
index 2077c05ebc7..3b842274243 100644
--- a/tests/qtest/pnv-xive2-common.h
+++ b/tests/qtest/pnv-xive2-common.h
@@ -15,7 +15,6 @@
#define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
#define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be)) | \
PPC_BIT32(bs))
-#include "qemu/bswap.h"
#include "hw/intc/pnv_xive2_regs.h"
#include "hw/ppc/xive_regs.h"
#include "hw/ppc/xive2_regs.h"
diff --git a/tests/qtest/aspeed_smc-test.c b/tests/qtest/aspeed_smc-test.c
index 50a87e62500..39af1df0ed7 100644
--- a/tests/qtest/aspeed_smc-test.c
+++ b/tests/qtest/aspeed_smc-test.c
@@ -24,7 +24,6 @@
*/
#include "qemu/osdep.h"
-#include "qemu/bswap.h"
#include "libqtest-single.h"
#include "qemu/bitops.h"
#include "aspeed-smc-utils.h"
diff --git a/tests/qtest/ast2700-smc-test.c b/tests/qtest/ast2700-smc-test.c
index 62d538d8a3a..33fc47230ee 100644
--- a/tests/qtest/ast2700-smc-test.c
+++ b/tests/qtest/ast2700-smc-test.c
@@ -7,7 +7,6 @@
*/
#include "qemu/osdep.h"
-#include "qemu/bswap.h"
#include "libqtest-single.h"
#include "qemu/bitops.h"
#include "aspeed-smc-utils.h"
diff --git a/tests/qtest/libqos/fw_cfg.c b/tests/qtest/libqos/fw_cfg.c
index 0ab3959171b..8611f648c14 100644
--- a/tests/qtest/libqos/fw_cfg.c
+++ b/tests/qtest/libqos/fw_cfg.c
@@ -17,7 +17,6 @@
#include "malloc-pc.h"
#include "libqos-malloc.h"
#include "../libqtest.h"
-#include "qemu/bswap.h"
#include "hw/nvram/fw_cfg.h"
void qfw_cfg_select(QFWCFG *fw_cfg, uint16_t key)
diff --git a/tests/qtest/libqos/i2c-omap.c b/tests/qtest/libqos/i2c-omap.c
index 6f98f54820b..71f70c64f85 100644
--- a/tests/qtest/libqos/i2c-omap.c
+++ b/tests/qtest/libqos/i2c-omap.c
@@ -10,7 +10,6 @@
#include "i2c.h"
-#include "qemu/bswap.h"
#include "../libqtest.h"
enum OMAPI2CRegisters {
diff --git a/tests/qtest/pnv-spi-seeprom-test.c b/tests/qtest/pnv-spi-seeprom-test.c
index 8033261758b..44e0b92730b 100644
--- a/tests/qtest/pnv-spi-seeprom-test.c
+++ b/tests/qtest/pnv-spi-seeprom-test.c
@@ -7,7 +7,6 @@
*/
#include "qemu/osdep.h"
#include "libqtest.h"
-#include "qemu/bswap.h"
#include "hw/ssi/pnv_spi_regs.h"
#include "pnv-xscom.h"
diff --git a/tests/qtest/vmcoreinfo-test.c b/tests/qtest/vmcoreinfo-test.c
index dcf3b5ae058..0110dcceffa 100644
--- a/tests/qtest/vmcoreinfo-test.c
+++ b/tests/qtest/vmcoreinfo-test.c
@@ -16,7 +16,6 @@
#include "libqtest.h"
#include "standard-headers/linux/qemu_fw_cfg.h"
#include "libqos/fw_cfg.h"
-#include "qemu/bswap.h"
#include "hw/misc/vmcoreinfo.h"
static void test_vmcoreinfo_write_basic(void)
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 23/25] tests/qtest: Remove unnecessary 'qemu/bswap.h' include
2025-12-24 15:22 ` [PATCH v3 23/25] tests/qtest: Remove unnecessary 'qemu/bswap.h' include Philippe Mathieu-Daudé
@ 2025-12-24 15:55 ` Cédric Le Goater
2025-12-24 19:11 ` Manos Pitsidianakis
2025-12-29 1:15 ` Richard Henderson
2 siblings, 0 replies; 62+ messages in thread
From: Cédric Le Goater @ 2025-12-24 15:55 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Peter Maydell, Steven Lee,
Troy Lee, Jamin Lin, Andrew Jeffery, Joel Stanley, Fabiano Rosas,
Laurent Vivier, Gerd Hoffmann, Nicholas Piggin, Aditya Gupta,
Glenn Miles, Gautam Menghani, Marc-André Lureau, Ani Sinha,
qemu-arm, qemu-ppc
On 12/24/25 16:22, Philippe Mathieu-Daudé wrote:
> None of these files use API declared in "qemu/bswap.h",
> remove the unnecessary inclusion.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
> ---
> tests/qtest/pnv-xive2-common.h | 1 -
> tests/qtest/aspeed_smc-test.c | 1 -
> tests/qtest/ast2700-smc-test.c | 1 -
> tests/qtest/libqos/fw_cfg.c | 1 -
> tests/qtest/libqos/i2c-omap.c | 1 -
> tests/qtest/pnv-spi-seeprom-test.c | 1 -
> tests/qtest/vmcoreinfo-test.c | 1 -
> 7 files changed, 7 deletions(-)
>
> diff --git a/tests/qtest/pnv-xive2-common.h b/tests/qtest/pnv-xive2-common.h
> index 2077c05ebc7..3b842274243 100644
> --- a/tests/qtest/pnv-xive2-common.h
> +++ b/tests/qtest/pnv-xive2-common.h
> @@ -15,7 +15,6 @@
> #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
> #define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be)) | \
> PPC_BIT32(bs))
> -#include "qemu/bswap.h"
> #include "hw/intc/pnv_xive2_regs.h"
> #include "hw/ppc/xive_regs.h"
> #include "hw/ppc/xive2_regs.h"
> diff --git a/tests/qtest/aspeed_smc-test.c b/tests/qtest/aspeed_smc-test.c
> index 50a87e62500..39af1df0ed7 100644
> --- a/tests/qtest/aspeed_smc-test.c
> +++ b/tests/qtest/aspeed_smc-test.c
> @@ -24,7 +24,6 @@
> */
>
> #include "qemu/osdep.h"
> -#include "qemu/bswap.h"
> #include "libqtest-single.h"
> #include "qemu/bitops.h"
> #include "aspeed-smc-utils.h"
> diff --git a/tests/qtest/ast2700-smc-test.c b/tests/qtest/ast2700-smc-test.c
> index 62d538d8a3a..33fc47230ee 100644
> --- a/tests/qtest/ast2700-smc-test.c
> +++ b/tests/qtest/ast2700-smc-test.c
> @@ -7,7 +7,6 @@
> */
>
> #include "qemu/osdep.h"
> -#include "qemu/bswap.h"
> #include "libqtest-single.h"
> #include "qemu/bitops.h"
> #include "aspeed-smc-utils.h"
> diff --git a/tests/qtest/libqos/fw_cfg.c b/tests/qtest/libqos/fw_cfg.c
> index 0ab3959171b..8611f648c14 100644
> --- a/tests/qtest/libqos/fw_cfg.c
> +++ b/tests/qtest/libqos/fw_cfg.c
> @@ -17,7 +17,6 @@
> #include "malloc-pc.h"
> #include "libqos-malloc.h"
> #include "../libqtest.h"
> -#include "qemu/bswap.h"
> #include "hw/nvram/fw_cfg.h"
>
> void qfw_cfg_select(QFWCFG *fw_cfg, uint16_t key)
> diff --git a/tests/qtest/libqos/i2c-omap.c b/tests/qtest/libqos/i2c-omap.c
> index 6f98f54820b..71f70c64f85 100644
> --- a/tests/qtest/libqos/i2c-omap.c
> +++ b/tests/qtest/libqos/i2c-omap.c
> @@ -10,7 +10,6 @@
> #include "i2c.h"
>
>
> -#include "qemu/bswap.h"
> #include "../libqtest.h"
>
> enum OMAPI2CRegisters {
> diff --git a/tests/qtest/pnv-spi-seeprom-test.c b/tests/qtest/pnv-spi-seeprom-test.c
> index 8033261758b..44e0b92730b 100644
> --- a/tests/qtest/pnv-spi-seeprom-test.c
> +++ b/tests/qtest/pnv-spi-seeprom-test.c
> @@ -7,7 +7,6 @@
> */
> #include "qemu/osdep.h"
> #include "libqtest.h"
> -#include "qemu/bswap.h"
> #include "hw/ssi/pnv_spi_regs.h"
> #include "pnv-xscom.h"
>
> diff --git a/tests/qtest/vmcoreinfo-test.c b/tests/qtest/vmcoreinfo-test.c
> index dcf3b5ae058..0110dcceffa 100644
> --- a/tests/qtest/vmcoreinfo-test.c
> +++ b/tests/qtest/vmcoreinfo-test.c
> @@ -16,7 +16,6 @@
> #include "libqtest.h"
> #include "standard-headers/linux/qemu_fw_cfg.h"
> #include "libqos/fw_cfg.h"
> -#include "qemu/bswap.h"
> #include "hw/misc/vmcoreinfo.h"
>
> static void test_vmcoreinfo_write_basic(void)
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v3 23/25] tests/qtest: Remove unnecessary 'qemu/bswap.h' include
2025-12-24 15:22 ` [PATCH v3 23/25] tests/qtest: Remove unnecessary 'qemu/bswap.h' include Philippe Mathieu-Daudé
2025-12-24 15:55 ` Cédric Le Goater
@ 2025-12-24 19:11 ` Manos Pitsidianakis
2025-12-29 1:15 ` Richard Henderson
2 siblings, 0 replies; 62+ messages in thread
From: Manos Pitsidianakis @ 2025-12-24 19:11 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Paolo Bonzini, Pierrick Bouvier, Peter Xu,
Richard Henderson, Anton Johansson, Cédric Le Goater,
Peter Maydell, Steven Lee, Troy Lee, Jamin Lin, Andrew Jeffery,
Joel Stanley, Fabiano Rosas, Laurent Vivier, Gerd Hoffmann,
Nicholas Piggin, Aditya Gupta, Glenn Miles, Gautam Menghani,
Marc-André Lureau, Ani Sinha, qemu-arm, qemu-ppc
On Wed, Dec 24, 2025 at 5:25 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> None of these files use API declared in "qemu/bswap.h",
> remove the unnecessary inclusion.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
> tests/qtest/pnv-xive2-common.h | 1 -
> tests/qtest/aspeed_smc-test.c | 1 -
> tests/qtest/ast2700-smc-test.c | 1 -
> tests/qtest/libqos/fw_cfg.c | 1 -
> tests/qtest/libqos/i2c-omap.c | 1 -
> tests/qtest/pnv-spi-seeprom-test.c | 1 -
> tests/qtest/vmcoreinfo-test.c | 1 -
> 7 files changed, 7 deletions(-)
>
> diff --git a/tests/qtest/pnv-xive2-common.h b/tests/qtest/pnv-xive2-common.h
> index 2077c05ebc7..3b842274243 100644
> --- a/tests/qtest/pnv-xive2-common.h
> +++ b/tests/qtest/pnv-xive2-common.h
> @@ -15,7 +15,6 @@
> #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
> #define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be)) | \
> PPC_BIT32(bs))
> -#include "qemu/bswap.h"
> #include "hw/intc/pnv_xive2_regs.h"
> #include "hw/ppc/xive_regs.h"
> #include "hw/ppc/xive2_regs.h"
> diff --git a/tests/qtest/aspeed_smc-test.c b/tests/qtest/aspeed_smc-test.c
> index 50a87e62500..39af1df0ed7 100644
> --- a/tests/qtest/aspeed_smc-test.c
> +++ b/tests/qtest/aspeed_smc-test.c
> @@ -24,7 +24,6 @@
> */
>
> #include "qemu/osdep.h"
> -#include "qemu/bswap.h"
> #include "libqtest-single.h"
> #include "qemu/bitops.h"
> #include "aspeed-smc-utils.h"
> diff --git a/tests/qtest/ast2700-smc-test.c b/tests/qtest/ast2700-smc-test.c
> index 62d538d8a3a..33fc47230ee 100644
> --- a/tests/qtest/ast2700-smc-test.c
> +++ b/tests/qtest/ast2700-smc-test.c
> @@ -7,7 +7,6 @@
> */
>
> #include "qemu/osdep.h"
> -#include "qemu/bswap.h"
> #include "libqtest-single.h"
> #include "qemu/bitops.h"
> #include "aspeed-smc-utils.h"
> diff --git a/tests/qtest/libqos/fw_cfg.c b/tests/qtest/libqos/fw_cfg.c
> index 0ab3959171b..8611f648c14 100644
> --- a/tests/qtest/libqos/fw_cfg.c
> +++ b/tests/qtest/libqos/fw_cfg.c
> @@ -17,7 +17,6 @@
> #include "malloc-pc.h"
> #include "libqos-malloc.h"
> #include "../libqtest.h"
> -#include "qemu/bswap.h"
> #include "hw/nvram/fw_cfg.h"
>
> void qfw_cfg_select(QFWCFG *fw_cfg, uint16_t key)
> diff --git a/tests/qtest/libqos/i2c-omap.c b/tests/qtest/libqos/i2c-omap.c
> index 6f98f54820b..71f70c64f85 100644
> --- a/tests/qtest/libqos/i2c-omap.c
> +++ b/tests/qtest/libqos/i2c-omap.c
> @@ -10,7 +10,6 @@
> #include "i2c.h"
>
>
> -#include "qemu/bswap.h"
> #include "../libqtest.h"
>
> enum OMAPI2CRegisters {
> diff --git a/tests/qtest/pnv-spi-seeprom-test.c b/tests/qtest/pnv-spi-seeprom-test.c
> index 8033261758b..44e0b92730b 100644
> --- a/tests/qtest/pnv-spi-seeprom-test.c
> +++ b/tests/qtest/pnv-spi-seeprom-test.c
> @@ -7,7 +7,6 @@
> */
> #include "qemu/osdep.h"
> #include "libqtest.h"
> -#include "qemu/bswap.h"
> #include "hw/ssi/pnv_spi_regs.h"
> #include "pnv-xscom.h"
>
> diff --git a/tests/qtest/vmcoreinfo-test.c b/tests/qtest/vmcoreinfo-test.c
> index dcf3b5ae058..0110dcceffa 100644
> --- a/tests/qtest/vmcoreinfo-test.c
> +++ b/tests/qtest/vmcoreinfo-test.c
> @@ -16,7 +16,6 @@
> #include "libqtest.h"
> #include "standard-headers/linux/qemu_fw_cfg.h"
> #include "libqos/fw_cfg.h"
> -#include "qemu/bswap.h"
> #include "hw/misc/vmcoreinfo.h"
>
> static void test_vmcoreinfo_write_basic(void)
> --
> 2.52.0
>
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v3 23/25] tests/qtest: Remove unnecessary 'qemu/bswap.h' include
2025-12-24 15:22 ` [PATCH v3 23/25] tests/qtest: Remove unnecessary 'qemu/bswap.h' include Philippe Mathieu-Daudé
2025-12-24 15:55 ` Cédric Le Goater
2025-12-24 19:11 ` Manos Pitsidianakis
@ 2025-12-29 1:15 ` Richard Henderson
2 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 1:15 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson, Cédric Le Goater, Peter Maydell, Steven Lee,
Troy Lee, Jamin Lin, Andrew Jeffery, Joel Stanley, Fabiano Rosas,
Laurent Vivier, Gerd Hoffmann, Nicholas Piggin, Aditya Gupta,
Glenn Miles, Gautam Menghani, Marc-André Lureau, Ani Sinha,
qemu-arm, qemu-ppc
On 12/25/25 02:22, Philippe Mathieu-Daudé wrote:
> None of these files use API declared in "qemu/bswap.h",
> remove the unnecessary inclusion.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> tests/qtest/pnv-xive2-common.h | 1 -
> tests/qtest/aspeed_smc-test.c | 1 -
> tests/qtest/ast2700-smc-test.c | 1 -
> tests/qtest/libqos/fw_cfg.c | 1 -
> tests/qtest/libqos/i2c-omap.c | 1 -
> tests/qtest/pnv-spi-seeprom-test.c | 1 -
> tests/qtest/vmcoreinfo-test.c | 1 -
> 7 files changed, 7 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 24/25] system/ioport: Declare x86-specific I/O port in little-endian order
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (22 preceding siblings ...)
2025-12-24 15:22 ` [PATCH v3 23/25] tests/qtest: Remove unnecessary 'qemu/bswap.h' include Philippe Mathieu-Daudé
@ 2025-12-24 15:22 ` Philippe Mathieu-Daudé
2025-12-26 20:43 ` Fabiano Rosas
2025-12-29 1:16 ` Richard Henderson
2025-12-24 15:22 ` [PATCH v3 25/25] system/ioport: Do not open-code address_space_ld/st_le() methods Philippe Mathieu-Daudé
24 siblings, 2 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:22 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand, Fabiano Rosas, Laurent Vivier
X86 in/out port (related to ISA bus) uses little endianness:
- enforce little endianness in x86 cpu_in/out() accessors,
- serialize QTest in/out port accesses as little-endian.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/ioport.c | 10 +++++-----
tests/qtest/endianness-test.c | 10 ++++++----
tests/qtest/libqtest.c | 13 +++++++++----
3 files changed, 20 insertions(+), 13 deletions(-)
diff --git a/system/ioport.c b/system/ioport.c
index 4f96e9119fc..35ad256c940 100644
--- a/system/ioport.c
+++ b/system/ioport.c
@@ -55,7 +55,7 @@ static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val,
const MemoryRegionOps unassigned_io_ops = {
.read = unassigned_io_read,
.write = unassigned_io_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
void cpu_outb(uint32_t addr, uint8_t val)
@@ -70,7 +70,7 @@ void cpu_outw(uint32_t addr, uint16_t val)
uint8_t buf[2];
trace_cpu_out(addr, 'w', val);
- stw_p(buf, val);
+ stw_le_p(buf, val);
address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
buf, 2);
}
@@ -80,7 +80,7 @@ void cpu_outl(uint32_t addr, uint32_t val)
uint8_t buf[4];
trace_cpu_out(addr, 'l', val);
- stl_p(buf, val);
+ stl_le_p(buf, val);
address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
buf, 4);
}
@@ -101,7 +101,7 @@ uint16_t cpu_inw(uint32_t addr)
uint16_t val;
address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 2);
- val = lduw_p(buf);
+ val = lduw_le_p(buf);
trace_cpu_in(addr, 'w', val);
return val;
}
@@ -112,7 +112,7 @@ uint32_t cpu_inl(uint32_t addr)
uint32_t val;
address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 4);
- val = ldl_p(buf);
+ val = ldl_le_p(buf);
trace_cpu_in(addr, 'l', val);
return val;
}
diff --git a/tests/qtest/endianness-test.c b/tests/qtest/endianness-test.c
index 222d116fae2..2b2f92099d0 100644
--- a/tests/qtest/endianness-test.c
+++ b/tests/qtest/endianness-test.c
@@ -65,8 +65,9 @@ static uint16_t isa_inw(QTestState *qts, const TestCase *test, uint16_t addr)
value = qtest_inw(qts, addr);
} else {
value = qtest_readw(qts, test->isa_base + addr);
+ value = test->bswap ? bswap16(value) : value;
}
- return test->bswap ? bswap16(value) : value;
+ return value;
}
static uint32_t isa_inl(QTestState *qts, const TestCase *test, uint16_t addr)
@@ -76,8 +77,9 @@ static uint32_t isa_inl(QTestState *qts, const TestCase *test, uint16_t addr)
value = qtest_inl(qts, addr);
} else {
value = qtest_readl(qts, test->isa_base + addr);
+ value = test->bswap ? bswap32(value) : value;
}
- return test->bswap ? bswap32(value) : value;
+ return value;
}
static void isa_outb(QTestState *qts, const TestCase *test, uint16_t addr,
@@ -93,10 +95,10 @@ static void isa_outb(QTestState *qts, const TestCase *test, uint16_t addr,
static void isa_outw(QTestState *qts, const TestCase *test, uint16_t addr,
uint16_t value)
{
- value = test->bswap ? bswap16(value) : value;
if (test->isa_base == -1) {
qtest_outw(qts, addr, value);
} else {
+ value = test->bswap ? bswap16(value) : value;
qtest_writew(qts, test->isa_base + addr, value);
}
}
@@ -104,10 +106,10 @@ static void isa_outw(QTestState *qts, const TestCase *test, uint16_t addr,
static void isa_outl(QTestState *qts, const TestCase *test, uint16_t addr,
uint32_t value)
{
- value = test->bswap ? bswap32(value) : value;
if (test->isa_base == -1) {
qtest_outl(qts, addr, value);
} else {
+ value = test->bswap ? bswap32(value) : value;
qtest_writel(qts, test->isa_base + addr, value);
}
}
diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c
index 622464e3656..132aa511375 100644
--- a/tests/qtest/libqtest.c
+++ b/tests/qtest/libqtest.c
@@ -31,6 +31,7 @@
#include "libqtest.h"
#include "libqmp.h"
#include "qemu/accel.h"
+#include "qemu/bswap.h"
#include "qemu/ctype.h"
#include "qemu/cutils.h"
#include "qemu/exit-with-parent.h"
@@ -1190,12 +1191,12 @@ void qtest_outb(QTestState *s, uint16_t addr, uint8_t value)
void qtest_outw(QTestState *s, uint16_t addr, uint16_t value)
{
- qtest_out(s, "outw", addr, value);
+ qtest_out(s, "outw", addr, qtest_big_endian(s) ? bswap16(value) : value);
}
void qtest_outl(QTestState *s, uint16_t addr, uint32_t value)
{
- qtest_out(s, "outl", addr, value);
+ qtest_out(s, "outl", addr, qtest_big_endian(s) ? bswap32(value) : value);
}
static uint32_t qtest_in(QTestState *s, const char *cmd, uint16_t addr)
@@ -1220,12 +1221,16 @@ uint8_t qtest_inb(QTestState *s, uint16_t addr)
uint16_t qtest_inw(QTestState *s, uint16_t addr)
{
- return qtest_in(s, "inw", addr);
+ uint16_t v = qtest_in(s, "inw", addr);
+
+ return qtest_big_endian(s) ? bswap16(v) : v;
}
uint32_t qtest_inl(QTestState *s, uint16_t addr)
{
- return qtest_in(s, "inl", addr);
+ uint32_t v = qtest_in(s, "inl", addr);
+
+ return qtest_big_endian(s) ? bswap32(v) : v;
}
static void qtest_write(QTestState *s, const char *cmd, uint64_t addr,
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 24/25] system/ioport: Declare x86-specific I/O port in little-endian order
2025-12-24 15:22 ` [PATCH v3 24/25] system/ioport: Declare x86-specific I/O port in little-endian order Philippe Mathieu-Daudé
@ 2025-12-26 20:43 ` Fabiano Rosas
2025-12-29 1:16 ` Richard Henderson
1 sibling, 0 replies; 62+ messages in thread
From: Fabiano Rosas @ 2025-12-26 20:43 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand, Laurent Vivier
Philippe Mathieu-Daudé <philmd@linaro.org> writes:
> X86 in/out port (related to ISA bus) uses little endianness:
> - enforce little endianness in x86 cpu_in/out() accessors,
> - serialize QTest in/out port accesses as little-endian.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v3 24/25] system/ioport: Declare x86-specific I/O port in little-endian order
2025-12-24 15:22 ` [PATCH v3 24/25] system/ioport: Declare x86-specific I/O port in little-endian order Philippe Mathieu-Daudé
2025-12-26 20:43 ` Fabiano Rosas
@ 2025-12-29 1:16 ` Richard Henderson
1 sibling, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 1:16 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson, David Hildenbrand, Fabiano Rosas, Laurent Vivier
On 12/25/25 02:22, Philippe Mathieu-Daudé wrote:
> X86 in/out port (related to ISA bus) uses little endianness:
> - enforce little endianness in x86 cpu_in/out() accessors,
> - serialize QTest in/out port accesses as little-endian.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> system/ioport.c | 10 +++++-----
> tests/qtest/endianness-test.c | 10 ++++++----
> tests/qtest/libqtest.c | 13 +++++++++----
> 3 files changed, 20 insertions(+), 13 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v3 25/25] system/ioport: Do not open-code address_space_ld/st_le() methods
2025-12-24 15:21 [PATCH v3 00/25] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (23 preceding siblings ...)
2025-12-24 15:22 ` [PATCH v3 24/25] system/ioport: Declare x86-specific I/O port in little-endian order Philippe Mathieu-Daudé
@ 2025-12-24 15:22 ` Philippe Mathieu-Daudé
2025-12-29 1:17 ` Richard Henderson
24 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-24 15:22 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Richard Henderson,
Manos Pitsidianakis, Anton Johansson, Philippe Mathieu-Daudé,
David Hildenbrand
When a variable size is known, prefer the address_space_ld/st()
API. Keep address_space_read/write() for blobs.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/ioport.c | 32 ++++++++++++--------------------
1 file changed, 12 insertions(+), 20 deletions(-)
diff --git a/system/ioport.c b/system/ioport.c
index 35ad256c940..5cc71906b9f 100644
--- a/system/ioport.c
+++ b/system/ioport.c
@@ -61,58 +61,50 @@ const MemoryRegionOps unassigned_io_ops = {
void cpu_outb(uint32_t addr, uint8_t val)
{
trace_cpu_out(addr, 'b', val);
- address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
- &val, 1);
+ address_space_stb(&address_space_io, addr, val,
+ MEMTXATTRS_UNSPECIFIED, NULL);
}
void cpu_outw(uint32_t addr, uint16_t val)
{
- uint8_t buf[2];
-
trace_cpu_out(addr, 'w', val);
- stw_le_p(buf, val);
- address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
- buf, 2);
+ address_space_stw_le(&address_space_io, addr, val,
+ MEMTXATTRS_UNSPECIFIED, NULL);
}
void cpu_outl(uint32_t addr, uint32_t val)
{
- uint8_t buf[4];
-
trace_cpu_out(addr, 'l', val);
- stl_le_p(buf, val);
- address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
- buf, 4);
+ address_space_stl_le(&address_space_io, addr, val,
+ MEMTXATTRS_UNSPECIFIED, NULL);
}
uint8_t cpu_inb(uint32_t addr)
{
uint8_t val;
- address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
- &val, 1);
+ val = address_space_ldub(&address_space_io, addr,
+ MEMTXATTRS_UNSPECIFIED, NULL);
trace_cpu_in(addr, 'b', val);
return val;
}
uint16_t cpu_inw(uint32_t addr)
{
- uint8_t buf[2];
uint16_t val;
- address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 2);
- val = lduw_le_p(buf);
+ val = address_space_lduw_le(&address_space_io, addr,
+ MEMTXATTRS_UNSPECIFIED, NULL);
trace_cpu_in(addr, 'w', val);
return val;
}
uint32_t cpu_inl(uint32_t addr)
{
- uint8_t buf[4];
uint32_t val;
- address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 4);
- val = ldl_le_p(buf);
+ val = address_space_ldl_le(&address_space_io, addr,
+ MEMTXATTRS_UNSPECIFIED, NULL);
trace_cpu_in(addr, 'l', val);
return val;
}
--
2.52.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v3 25/25] system/ioport: Do not open-code address_space_ld/st_le() methods
2025-12-24 15:22 ` [PATCH v3 25/25] system/ioport: Do not open-code address_space_ld/st_le() methods Philippe Mathieu-Daudé
@ 2025-12-29 1:17 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-12-29 1:17 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Pierrick Bouvier, Peter Xu, Manos Pitsidianakis,
Anton Johansson, David Hildenbrand
On 12/25/25 02:22, Philippe Mathieu-Daudé wrote:
> When a variable size is known, prefer the address_space_ld/st()
> API. Keep address_space_read/write() for blobs.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> system/ioport.c | 32 ++++++++++++--------------------
> 1 file changed, 12 insertions(+), 20 deletions(-)
I was just thinking that patch 24 could be improved. Thanks!
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 62+ messages in thread