From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Pratyush Yadav <pratyush@kernel.org>
Cc: Tudor Ambarus <tudor.ambarus@linaro.org>,
Michael Walle <mwalle@kernel.org>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Steam Lin <STLin2@winbond.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] mtd: spi-nor: winbond: Add support for w25q01jv
Date: Wed, 15 Jan 2025 20:10:39 +0100 [thread overview]
Message-ID: <87zfjrlwpc.fsf@bootlin.com> (raw)
In-Reply-To: <mafs08qrc5g44.fsf@kernel.org> (Pratyush Yadav's message of "Wed, 15 Jan 2025 14:03:23 +0000")
Hello Pratyush,
> Okay, I am confused because you said earlier that:
>
>> The bug that has been experienced followed this sequence:
>> - send the write enable command (non-volatile)
>> - wait for the ready/busy bit, ie. wait for the WEL bit to be set
>> because it is non-volatile write
>> - active die is ready, (but idle die is not!)
>> - enter 4-byte address mode, only the die that is ready processes the
>> command.
>
> Which says the WEL bit being set itself is racy. What I understand from
> that is one die is ready to take writes and the other is not. Now when
> you try to write the SR to enable 4B mode, it would only work on the die
> that got the WEL set. The other one ignores it and stays in 3B mode. Do
> I understand this correctly? To fix this you need to wait after the
> write enable, before you initiate the write SR operation.
Actually I think you're right. The thing is, Winbond WEL bit are
non-volatile by default, whereas you were assuming it would be. Maybe
the proper fix is to do both?
- Using the volatile 'write enable'
and
- Making sure we wait after the (other) commands tampering with all dies.
Thanks,
Miquèl
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Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Pratyush Yadav <pratyush@kernel.org>
Cc: Tudor Ambarus <tudor.ambarus@linaro.org>,
Michael Walle <mwalle@kernel.org>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Steam Lin <STLin2@winbond.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] mtd: spi-nor: winbond: Add support for w25q01jv
Date: Wed, 15 Jan 2025 20:10:39 +0100 [thread overview]
Message-ID: <87zfjrlwpc.fsf@bootlin.com> (raw)
In-Reply-To: <mafs08qrc5g44.fsf@kernel.org> (Pratyush Yadav's message of "Wed, 15 Jan 2025 14:03:23 +0000")
Hello Pratyush,
> Okay, I am confused because you said earlier that:
>
>> The bug that has been experienced followed this sequence:
>> - send the write enable command (non-volatile)
>> - wait for the ready/busy bit, ie. wait for the WEL bit to be set
>> because it is non-volatile write
>> - active die is ready, (but idle die is not!)
>> - enter 4-byte address mode, only the die that is ready processes the
>> command.
>
> Which says the WEL bit being set itself is racy. What I understand from
> that is one die is ready to take writes and the other is not. Now when
> you try to write the SR to enable 4B mode, it would only work on the die
> that got the WEL set. The other one ignores it and stays in 3B mode. Do
> I understand this correctly? To fix this you need to wait after the
> write enable, before you initiate the write SR operation.
Actually I think you're right. The thing is, Winbond WEL bit are
non-volatile by default, whereas you were assuming it would be. Maybe
the proper fix is to do both?
- Using the volatile 'write enable'
and
- Making sure we wait after the (other) commands tampering with all dies.
Thanks,
Miquèl
next prev parent reply other threads:[~2025-01-15 19:10 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-24 16:47 [PATCH 0/2] mtd: spi-nor: winbond: Add support for flashes with several dies Miquel Raynal
2024-12-24 16:47 ` Miquel Raynal
2024-12-24 16:47 ` [PATCH 1/2] mtd: spi-nor: winbond: Add support for w25q01jv Miquel Raynal
2024-12-24 16:47 ` Miquel Raynal
2024-12-24 21:15 ` Pratyush Yadav
2024-12-24 21:15 ` Pratyush Yadav
2024-12-30 10:31 ` Miquel Raynal
2024-12-30 10:31 ` Miquel Raynal
2025-01-13 14:08 ` Pratyush Yadav
2025-01-13 14:08 ` Pratyush Yadav
2025-01-14 11:07 ` Miquel Raynal
2025-01-14 11:07 ` Miquel Raynal
2025-01-15 14:03 ` Pratyush Yadav
2025-01-15 14:03 ` Pratyush Yadav
2025-01-15 19:10 ` Miquel Raynal [this message]
2025-01-15 19:10 ` Miquel Raynal
2025-01-15 20:05 ` Pratyush Yadav
2025-01-15 20:05 ` Pratyush Yadav
2025-01-20 12:47 ` Miquel Raynal
2025-01-20 12:47 ` Miquel Raynal
2025-01-20 14:21 ` Pratyush Yadav
2025-01-20 14:21 ` Pratyush Yadav
2025-01-08 18:22 ` Miquel Raynal
2025-01-08 18:22 ` Miquel Raynal
2025-01-09 16:14 ` Miquel Raynal
2025-01-09 16:14 ` Miquel Raynal
2025-01-13 13:40 ` Pratyush Yadav
2025-01-13 13:40 ` Pratyush Yadav
2024-12-24 16:47 ` [PATCH 2/2] mtd: spi-nor: winbond: Add support for w25q02jv Miquel Raynal
2024-12-24 16:47 ` Miquel Raynal
2024-12-24 21:16 ` Pratyush Yadav
2024-12-24 21:16 ` Pratyush Yadav
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