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From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Joey Gouly <joey.gouly@arm.com>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Subject: Re: [PATCH 2/2] KVM: arm64: Move FGT value configuration to vCPU state
Date: Fri, 17 Mar 2023 16:48:26 +0000	[thread overview]
Message-ID: <87zg8bgw85.wl-maz@kernel.org> (raw)
In-Reply-To: <855e60de-56c0-4500-a8ce-d79ffb0ed19d@sirena.org.uk>

On Fri, 17 Mar 2023 13:49:44 +0000,
Mark Brown <broonie@kernel.org> wrote:
> 
> On Fri, Mar 17, 2023 at 09:02:32AM +0000, Marc Zyngier wrote:
> > Mark Brown <broonie@kernel.org> wrote:
> 
> > > +	vcpu->arch.hfgrtr_el2 = 0;
> > > +	vcpu->arch.hfgwtr_el2 = 0;
> 
> > Although this looks completely innocent, this actually have the effect
> > of trapping the SMPRI_EL1 and TPIDR2_EL0 registers, something that is
> > self documented in the current code, and that completely disappears
> > with this patch.
> 
> > This needs documenting by enumerating the sysregs that get trapped.
> 
> That's an awful lot of registers with the fine grained traps, and when
> extended to cover HFHxTR2 there's a bunch of RES0 bits intended for
> future traps.  It feels a bit unmanagable.  I'd have expected something
> more along the lines of "enable all traps other than...".  The pattern
> seemed to be more to have an explicit initialiser for the bits that are
> set (eg, with CPACR_EL1) which was why I didn't put anything explicit. 

"an awful lot of registers" is exactly 3 registers as of ARMv8.8/9.3
that have a disable-trapping-when-set pattern. Maybe more in 9.4 and
up, but if people can be bothered to write the tools/sysreg file, they
can also document what gets implicitly trapped.

This also outlines that ACCDATA_EL1 gets trapped while it wasn't
explicitly trapped before, and that we don't have a handler for it.

So we need an extensive documentation of what the 0 value covers, no
ifs no buts.

	M.

-- 
Without deviation from the norm, progress is not possible.

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Joey Gouly <joey.gouly@arm.com>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Subject: Re: [PATCH 2/2] KVM: arm64: Move FGT value configuration to vCPU state
Date: Fri, 17 Mar 2023 16:48:26 +0000	[thread overview]
Message-ID: <87zg8bgw85.wl-maz@kernel.org> (raw)
In-Reply-To: <855e60de-56c0-4500-a8ce-d79ffb0ed19d@sirena.org.uk>

On Fri, 17 Mar 2023 13:49:44 +0000,
Mark Brown <broonie@kernel.org> wrote:
> 
> On Fri, Mar 17, 2023 at 09:02:32AM +0000, Marc Zyngier wrote:
> > Mark Brown <broonie@kernel.org> wrote:
> 
> > > +	vcpu->arch.hfgrtr_el2 = 0;
> > > +	vcpu->arch.hfgwtr_el2 = 0;
> 
> > Although this looks completely innocent, this actually have the effect
> > of trapping the SMPRI_EL1 and TPIDR2_EL0 registers, something that is
> > self documented in the current code, and that completely disappears
> > with this patch.
> 
> > This needs documenting by enumerating the sysregs that get trapped.
> 
> That's an awful lot of registers with the fine grained traps, and when
> extended to cover HFHxTR2 there's a bunch of RES0 bits intended for
> future traps.  It feels a bit unmanagable.  I'd have expected something
> more along the lines of "enable all traps other than...".  The pattern
> seemed to be more to have an explicit initialiser for the bits that are
> set (eg, with CPACR_EL1) which was why I didn't put anything explicit. 

"an awful lot of registers" is exactly 3 registers as of ARMv8.8/9.3
that have a disable-trapping-when-set pattern. Maybe more in 9.4 and
up, but if people can be bothered to write the tools/sysreg file, they
can also document what gets implicitly trapped.

This also outlines that ACCDATA_EL1 gets trapped while it wasn't
explicitly trapped before, and that we don't have a handler for it.

So we need an extensive documentation of what the 0 value covers, no
ifs no buts.

	M.

-- 
Without deviation from the norm, progress is not possible.

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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-03-17 16:48 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-06 16:08 [PATCH 0/2] KVM: arm64: Support for per-guest fine grained traps configuration Mark Brown
2023-03-06 16:08 ` Mark Brown
2023-03-06 16:08 ` [PATCH 1/2] arm64: Add feature detection for fine grained traps Mark Brown
2023-03-06 16:08   ` Mark Brown
2023-03-15 15:34   ` Catalin Marinas
2023-03-15 15:34     ` Catalin Marinas
2023-03-06 16:08 ` [PATCH 2/2] KVM: arm64: Move FGT value configuration to vCPU state Mark Brown
2023-03-06 16:08   ` Mark Brown
2023-03-17  9:02   ` Marc Zyngier
2023-03-17  9:02     ` Marc Zyngier
2023-03-17 13:49     ` Mark Brown
2023-03-17 13:49       ` Mark Brown
2023-03-17 14:06       ` Mark Brown
2023-03-17 14:06         ` Mark Brown
2023-03-17 16:48       ` Marc Zyngier [this message]
2023-03-17 16:48         ` Marc Zyngier
2023-03-17 18:02         ` Mark Brown
2023-03-17 18:02           ` Mark Brown

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