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From: Gregory CLEMENT <gregory.clement@free-electrons.com>
To: Antoine Tenart <antoine.tenart@free-electrons.com>
Cc: herbert@gondor.apana.org.au, davem@davemloft.net,
	jason@lakedaemon.net, andrew@lunn.ch,
	sebastian.hesselbarth@gmail.com, linux-crypto@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	thomas.petazzoni@free-electrons.com, oferh@marvell.com,
	igall@marvell.com, nadavh@marvell.com, robin.murphy@arm.com
Subject: Re: [PATCH v6 2/5] arm64: marvell: dts: fix interrupts in 7k/8k crypto nodes
Date: Wed, 24 May 2017 17:13:16 +0200	[thread overview]
Message-ID: <87zie2uw37.fsf@free-electrons.com> (raw)
In-Reply-To: <20170524141035.21031-3-antoine.tenart@free-electrons.com> (Antoine Tenart's message of "Wed, 24 May 2017 16:10:32 +0200")

Hi Antoine,
 
 On mer., mai 24 2017, Antoine Tenart <antoine.tenart@free-electrons.com> wrote:

> The cryptographic engine nodes have an interrupt which is configured as
> both edge and level, which makes no sense at all. Fix this by
> configuring it the right way (level).
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>

Applied on mvebu/fixes

Thanks,

Gregory
> ---
>  arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 3 +--
>  arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi  | 3 +--
>  2 files changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
> index ac8df5201cd6..b4bc42ece754 100644
> --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
> @@ -231,8 +231,7 @@
>  			cpm_crypto: crypto@800000 {
>  				compatible = "inside-secure,safexcel-eip197";
>  				reg = <0x800000 0x200000>;
> -				interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
> -				| IRQ_TYPE_LEVEL_HIGH)>,
> +				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
> index 7740a75a8230..6e2058847ddc 100644
> --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
> @@ -221,8 +221,7 @@
>  			cps_crypto: crypto@800000 {
>  				compatible = "inside-secure,safexcel-eip197";
>  				reg = <0x800000 0x200000>;
> -				interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
> -				| IRQ_TYPE_LEVEL_HIGH)>,
> +				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
> -- 
> 2.9.4
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: gregory.clement@free-electrons.com (Gregory CLEMENT)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 2/5] arm64: marvell: dts: fix interrupts in 7k/8k crypto nodes
Date: Wed, 24 May 2017 17:13:16 +0200	[thread overview]
Message-ID: <87zie2uw37.fsf@free-electrons.com> (raw)
In-Reply-To: <20170524141035.21031-3-antoine.tenart@free-electrons.com> (Antoine Tenart's message of "Wed, 24 May 2017 16:10:32 +0200")

Hi Antoine,
 
 On mer., mai 24 2017, Antoine Tenart <antoine.tenart@free-electrons.com> wrote:

> The cryptographic engine nodes have an interrupt which is configured as
> both edge and level, which makes no sense at all. Fix this by
> configuring it the right way (level).
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>

Applied on mvebu/fixes

Thanks,

Gregory
> ---
>  arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 3 +--
>  arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi  | 3 +--
>  2 files changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
> index ac8df5201cd6..b4bc42ece754 100644
> --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
> @@ -231,8 +231,7 @@
>  			cpm_crypto: crypto at 800000 {
>  				compatible = "inside-secure,safexcel-eip197";
>  				reg = <0x800000 0x200000>;
> -				interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
> -				| IRQ_TYPE_LEVEL_HIGH)>,
> +				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
> index 7740a75a8230..6e2058847ddc 100644
> --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
> @@ -221,8 +221,7 @@
>  			cps_crypto: crypto at 800000 {
>  				compatible = "inside-secure,safexcel-eip197";
>  				reg = <0x800000 0x200000>;
> -				interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
> -				| IRQ_TYPE_LEVEL_HIGH)>,
> +				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
> -- 
> 2.9.4
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

  reply	other threads:[~2017-05-24 15:13 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-24 14:10 [PATCH v6 0/5] arm64: marvell: add cryptographic engine support for 7k/8k Antoine Tenart
2017-05-24 14:10 ` Antoine Tenart
2017-05-24 14:10 ` [PATCH v6 1/5] Documentation/bindings: Document the SafeXel cryptographic engine driver Antoine Tenart
2017-05-24 14:10   ` Antoine Tenart
2017-06-11  8:53   ` Antoine Tenart
2017-06-11  8:53     ` Antoine Tenart
2017-06-20  3:37     ` Herbert Xu
2017-06-20  3:37       ` Herbert Xu
2017-06-20  6:21       ` Antoine Tenart
2017-06-20  6:21         ` Antoine Tenart
2017-05-24 14:10 ` [PATCH v6 2/5] arm64: marvell: dts: fix interrupts in 7k/8k crypto nodes Antoine Tenart
2017-05-24 14:10   ` Antoine Tenart
2017-05-24 15:13   ` Gregory CLEMENT [this message]
2017-05-24 15:13     ` Gregory CLEMENT
2017-05-24 14:10 ` [PATCH v6 3/5] arm64: marvell: dts: add dma-mask in crypto nodes for 7k/8k Antoine Tenart
2017-05-24 14:10   ` Antoine Tenart
2017-06-13  8:30   ` Gregory CLEMENT
2017-06-13  8:30     ` Gregory CLEMENT
2017-05-24 14:10 ` [PATCH v6 4/5] crypto: inside-secure: add SafeXcel EIP197 crypto engine driver Antoine Tenart
2017-05-24 14:10   ` Antoine Tenart
2017-05-28  5:39   ` PrasannaKumar Muralidharan
2017-05-28  5:39     ` PrasannaKumar Muralidharan
2017-05-29  9:21     ` Antoine Tenart
2017-05-29  9:21       ` Antoine Tenart
2017-05-29  9:42       ` PrasannaKumar Muralidharan
2017-05-29  9:42         ` PrasannaKumar Muralidharan
2017-06-10  4:16   ` Herbert Xu
2017-06-10  4:16     ` Herbert Xu
2017-05-24 14:10 ` [PATCH v6 5/5] MAINTAINERS: add a maintainer for the Inside Secure crypto driver Antoine Tenart
2017-05-24 14:10   ` Antoine Tenart
2017-06-10  4:16   ` Herbert Xu
2017-06-10  4:16     ` Herbert Xu

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