Re: [BXT MIPI PATCH v3 03/14] drm/i915/bxt: Disable DSI PLL for BXT

[Jani Nikula <jani.nikula@intel.com>]

On Tue, 01 Sep 2015, Uma Shankar <uma.shankar@intel.com> wrote:
> From: Shashank Sharma <shashank.sharma@intel.com>
>
> This patch adds two new functions:
> - disable_dsi_pll.
>   BXT DSI disable sequence and registers are
>   different from previous platforms.
> - intel_disable_dsi_pll
>   wrapper function to re-use the same code for
>   multiple platforms. It checks platform type and
>   calls appropriate core pll disable function.
>
> v2: Fixed Jani's review comments.
>
> v3: Rebased on latest drm-nightly branch.
>
> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_dsi.c     |    2 +-
>  drivers/gpu/drm/i915/intel_dsi.h     |    2 +-
>  drivers/gpu/drm/i915/intel_dsi_pll.c |   32 +++++++++++++++++++++++++++++++-
>  3 files changed, 33 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index fb259fb..bac988a 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -553,7 +553,7 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
>  		usleep_range(2000, 2500);
>  	}
>  
> -	vlv_disable_dsi_pll(encoder);
> +	intel_disable_dsi_pll(encoder);
>  }
>  
>  static void intel_dsi_post_disable(struct intel_encoder *encoder)
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
> index 20cfcf07..759983e 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -122,7 +122,7 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
>  }
>  
>  extern void intel_enable_dsi_pll(struct intel_encoder *encoder);
> -extern void vlv_disable_dsi_pll(struct intel_encoder *encoder);
> +extern void intel_disable_dsi_pll(struct intel_encoder *encoder);
>  extern u32 vlv_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp);
>  
>  struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id);
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index 3830a4f..21a2e37 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -267,7 +267,7 @@ static void vlv_enable_dsi_pll(struct intel_encoder *encoder)
>  	DRM_DEBUG_KMS("DSI PLL locked\n");
>  }
>  
> -void vlv_disable_dsi_pll(struct intel_encoder *encoder)
> +static void vlv_disable_dsi_pll(struct intel_encoder *encoder)
>  {
>  	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
>  	u32 tmp;
> @@ -284,6 +284,26 @@ void vlv_disable_dsi_pll(struct intel_encoder *encoder)
>  	mutex_unlock(&dev_priv->sb_lock);
>  }
>  
> +static void bxt_disable_dsi_pll(struct intel_encoder *encoder)
> +{
> +	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
> +	u32 val;
> +
> +	DRM_DEBUG_KMS("\n");
> +
> +	val = I915_READ(BXT_DSI_PLL_ENABLE);
> +	val &= ~BXT_DSI_PLL_DO_ENABLE;
> +	I915_WRITE(BXT_DSI_PLL_ENABLE, val);
> +
> +	/*
> +	 * PLL lock should deassert within 200us.
> +	 * Wait up to 1ms before timing out.
> +	 */
> +	if (wait_for((I915_READ(BXT_DSI_PLL_ENABLE)
> +					& BXT_DSI_PLL_LOCKED) == 0, 1))
> +		DRM_ERROR("Timeout waiting for PLL lock deassertion\n");
> +}
> +
>  static void assert_bpp_mismatch(int pixel_format, int pipe_bpp)
>  {
>  	int bpp;
> @@ -461,3 +481,13 @@ void intel_enable_dsi_pll(struct intel_encoder *encoder)
>  	else if (IS_BROXTON(dev))
>  		bxt_enable_dsi_pll(encoder);
>  }
> +
> +void intel_disable_dsi_pll(struct intel_encoder *encoder)
> +{
> +	struct drm_device *dev = encoder->base.dev;
> +
> +	if (IS_VALLEYVIEW(dev))
> +		vlv_disable_dsi_pll(encoder);
> +	else if (IS_BROXTON(dev))
> +		bxt_disable_dsi_pll(encoder);
> +}
> -- 
> 1.7.9.5
>

-- 
Jani Nikula, Intel Open Source Technology Center
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