Re: [Qemu-devel] [PATCH for-2.5 10/10] tcg: update README about size changing ops

["Alex Bennée" <alex.bennee@linaro.org>]

Aurelien Jarno <aurelien@aurel32.net> writes:

> Cc: Richard Henderson <rth@twiddle.net>
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
> ---
>  tcg/README | 18 +++++++++++++++---
>  1 file changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/tcg/README b/tcg/README
> index 61b3899..a22f251 100644
> --- a/tcg/README
> +++ b/tcg/README
> @@ -466,13 +466,25 @@ On a 32 bit target, all 64 bit operations are converted to 32 bits. A
>  few specific operations must be implemented to allow it (see add2_i32,
>  sub2_i32, brcond2_i32).
>  
> +On a 64 bit target, the values are transfered between 32 and 64-bit
> +registers using the following ops:
> +- trunc_shr_i64_i32
> +- ext_i32_i64
> +- extu_i32_i64
> +
> +They ensure that the values are correctly truncated or extended when
> +moved from a 32-bit to a 64-bit register or vice-versa. Note that the
> +trunc_shr_i64_i32 is an optional op. It is not necessary to implement
> +it if all the following conditions are met:
> +- 64-bit registers can hold 32-bit values
> +- 32-bit values in a 64-bit register do not need to stay zero or
> +  sign extended
> +- all 32-bit TCG ops ignore the high part of 64-bit registers
> +
>  Floating point operations are not supported in this version. A
>  previous incarnation of the code generator had full support of them,
>  but it is better to concentrate on integer operations first.
>  
> -On a 64 bit target, no assumption is made in TCG about the storage of
> -the 32 bit values in 64 bit registers.
> -
>  4.2) Constraints
>  
>  GCC like constraints are used to define the constraints of every

I would include patches to the README with the respective patches that
introduced the changes. It is basically an extended comment ;-)

-- 
Alex Bennée