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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Zhichao Huang <zhichao.huang@linaro.org>
Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org,
	marc.zyngier@arm.com, will.deacon@arm.com,
	huangzhichao@huawei.com
Subject: Re: [PATCH v2 02/11] KVM: arm: rename pm_fake handler to trap_raz_wi
Date: Tue, 09 Jun 2015 11:42:10 +0100	[thread overview]
Message-ID: <87zj496u4d.fsf@linaro.org> (raw)
In-Reply-To: <1433046432-1824-3-git-send-email-zhichao.huang@linaro.org>


Zhichao Huang <zhichao.huang@linaro.org> writes:

> pm_fake doesn't quite describe what the handler does (ignoring writes
> and returning 0 for reads).
>
> As we're about to use it (a lot) in a different context, rename it
> with a (admitedly cryptic) name that make sense for all users.
>
> Signed-off-by: Zhichao Huang <zhichao.huang@linaro.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  arch/arm/kvm/coproc.c | 34 ++++++++++++++++------------------
>  1 file changed, 16 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
> index 2e12760..9d283d9 100644
> --- a/arch/arm/kvm/coproc.c
> +++ b/arch/arm/kvm/coproc.c
> @@ -229,7 +229,7 @@ bool access_vm_reg(struct kvm_vcpu *vcpu,
>   * must always support PMCCNTR (the cycle counter): we just RAZ/WI for
>   * all PM registers, which doesn't crash the guest kernel at least.
>   */
> -static bool pm_fake(struct kvm_vcpu *vcpu,
> +static bool trap_raz_wi(struct kvm_vcpu *vcpu,
>  		    const struct coproc_params *p,
>  		    const struct coproc_reg *r)
>  {
> @@ -239,19 +239,19 @@ static bool pm_fake(struct kvm_vcpu *vcpu,
>  		return read_zero(vcpu, p);
>  }
>  
> -#define access_pmcr pm_fake
> -#define access_pmcntenset pm_fake
> -#define access_pmcntenclr pm_fake
> -#define access_pmovsr pm_fake
> -#define access_pmselr pm_fake
> -#define access_pmceid0 pm_fake
> -#define access_pmceid1 pm_fake
> -#define access_pmccntr pm_fake
> -#define access_pmxevtyper pm_fake
> -#define access_pmxevcntr pm_fake
> -#define access_pmuserenr pm_fake
> -#define access_pmintenset pm_fake
> -#define access_pmintenclr pm_fake
> +#define access_pmcr trap_raz_wi
> +#define access_pmcntenset trap_raz_wi
> +#define access_pmcntenclr trap_raz_wi
> +#define access_pmovsr trap_raz_wi
> +#define access_pmselr trap_raz_wi
> +#define access_pmceid0 trap_raz_wi
> +#define access_pmceid1 trap_raz_wi
> +#define access_pmccntr trap_raz_wi
> +#define access_pmxevtyper trap_raz_wi
> +#define access_pmxevcntr trap_raz_wi
> +#define access_pmuserenr trap_raz_wi
> +#define access_pmintenset trap_raz_wi
> +#define access_pmintenclr trap_raz_wi
>  
>  /* Architected CP15 registers.
>   * CRn denotes the primary register number, but is copied to the CRm in the
> @@ -532,8 +532,7 @@ int kvm_handle_cp14_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
>  	params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf;
>  	params.CRm = 0;
>  
> -	/* raz_wi */
> -	(void)pm_fake(vcpu, &params, NULL);
> +	(void)trap_raz_wi(vcpu, &params, NULL);
>  
>  	/* handled */
>  	kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
> @@ -559,8 +558,7 @@ int kvm_handle_cp14_32(struct kvm_vcpu *vcpu, struct kvm_run *run)
>  	params.Op2 = (kvm_vcpu_get_hsr(vcpu) >> 17) & 0x7;
>  	params.Rt2 = 0;
>  
> -	/* raz_wi */
> -	(void)pm_fake(vcpu, &params, NULL);
> +	(void)trap_raz_wi(vcpu, &params, NULL);
>  
>  	/* handled */
>  	kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));

-- 
Alex Bennée

WARNING: multiple messages have this Message-ID (diff)
From: alex.bennee@linaro.org (Alex Bennée)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 02/11] KVM: arm: rename pm_fake handler to trap_raz_wi
Date: Tue, 09 Jun 2015 11:42:10 +0100	[thread overview]
Message-ID: <87zj496u4d.fsf@linaro.org> (raw)
In-Reply-To: <1433046432-1824-3-git-send-email-zhichao.huang@linaro.org>


Zhichao Huang <zhichao.huang@linaro.org> writes:

> pm_fake doesn't quite describe what the handler does (ignoring writes
> and returning 0 for reads).
>
> As we're about to use it (a lot) in a different context, rename it
> with a (admitedly cryptic) name that make sense for all users.
>
> Signed-off-by: Zhichao Huang <zhichao.huang@linaro.org>

Reviewed-by: Alex Benn?e <alex.bennee@linaro.org>

> ---
>  arch/arm/kvm/coproc.c | 34 ++++++++++++++++------------------
>  1 file changed, 16 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
> index 2e12760..9d283d9 100644
> --- a/arch/arm/kvm/coproc.c
> +++ b/arch/arm/kvm/coproc.c
> @@ -229,7 +229,7 @@ bool access_vm_reg(struct kvm_vcpu *vcpu,
>   * must always support PMCCNTR (the cycle counter): we just RAZ/WI for
>   * all PM registers, which doesn't crash the guest kernel at least.
>   */
> -static bool pm_fake(struct kvm_vcpu *vcpu,
> +static bool trap_raz_wi(struct kvm_vcpu *vcpu,
>  		    const struct coproc_params *p,
>  		    const struct coproc_reg *r)
>  {
> @@ -239,19 +239,19 @@ static bool pm_fake(struct kvm_vcpu *vcpu,
>  		return read_zero(vcpu, p);
>  }
>  
> -#define access_pmcr pm_fake
> -#define access_pmcntenset pm_fake
> -#define access_pmcntenclr pm_fake
> -#define access_pmovsr pm_fake
> -#define access_pmselr pm_fake
> -#define access_pmceid0 pm_fake
> -#define access_pmceid1 pm_fake
> -#define access_pmccntr pm_fake
> -#define access_pmxevtyper pm_fake
> -#define access_pmxevcntr pm_fake
> -#define access_pmuserenr pm_fake
> -#define access_pmintenset pm_fake
> -#define access_pmintenclr pm_fake
> +#define access_pmcr trap_raz_wi
> +#define access_pmcntenset trap_raz_wi
> +#define access_pmcntenclr trap_raz_wi
> +#define access_pmovsr trap_raz_wi
> +#define access_pmselr trap_raz_wi
> +#define access_pmceid0 trap_raz_wi
> +#define access_pmceid1 trap_raz_wi
> +#define access_pmccntr trap_raz_wi
> +#define access_pmxevtyper trap_raz_wi
> +#define access_pmxevcntr trap_raz_wi
> +#define access_pmuserenr trap_raz_wi
> +#define access_pmintenset trap_raz_wi
> +#define access_pmintenclr trap_raz_wi
>  
>  /* Architected CP15 registers.
>   * CRn denotes the primary register number, but is copied to the CRm in the
> @@ -532,8 +532,7 @@ int kvm_handle_cp14_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
>  	params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf;
>  	params.CRm = 0;
>  
> -	/* raz_wi */
> -	(void)pm_fake(vcpu, &params, NULL);
> +	(void)trap_raz_wi(vcpu, &params, NULL);
>  
>  	/* handled */
>  	kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
> @@ -559,8 +558,7 @@ int kvm_handle_cp14_32(struct kvm_vcpu *vcpu, struct kvm_run *run)
>  	params.Op2 = (kvm_vcpu_get_hsr(vcpu) >> 17) & 0x7;
>  	params.Rt2 = 0;
>  
> -	/* raz_wi */
> -	(void)pm_fake(vcpu, &params, NULL);
> +	(void)trap_raz_wi(vcpu, &params, NULL);
>  
>  	/* handled */
>  	kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));

-- 
Alex Benn?e

  reply	other threads:[~2015-06-09 10:42 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-31  4:27 [PATCH v2 00/11] KVM: arm: debug infrastructure support Zhichao Huang
2015-05-31  4:27 ` Zhichao Huang
2015-05-31  4:27 ` [PATCH v2 01/11] KVM: arm: plug guest debug exploit Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-06-01 10:56   ` Marc Zyngier
2015-06-01 10:56     ` Marc Zyngier
2015-06-07 13:40     ` zichao
2015-06-07 13:40       ` zichao
2015-06-09 10:29       ` Marc Zyngier
2015-06-09 10:29         ` Marc Zyngier
2015-06-14 16:08         ` zichao
2015-06-14 16:08           ` zichao
2015-06-14 16:13           ` zichao
2015-06-14 16:13             ` zichao
2015-06-16 16:49             ` Will Deacon
2015-06-16 16:49               ` Will Deacon
2015-05-31  4:27 ` [PATCH v2 02/11] KVM: arm: rename pm_fake handler to trap_raz_wi Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-06-09 10:42   ` Alex Bennée [this message]
2015-06-09 10:42     ` Alex Bennée
2015-05-31  4:27 ` [PATCH v2 03/11] KVM: arm: enable to use the ARM_DSCR_MDBGEN macro from KVM assembly code Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-06-09 13:42   ` Alex Bennée
2015-06-09 13:42     ` Alex Bennée
2015-05-31  4:27 ` [PATCH v2 04/11] KVM: arm: common infrastructure for handling AArch32 CP14/CP15 Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-06-09 10:45   ` Alex Bennée
2015-06-09 10:45     ` Alex Bennée
2015-06-14 16:17     ` zichao
2015-06-14 16:17       ` zichao
2015-05-31  4:27 ` [PATCH v2 05/11] KVM: arm: check ordering of all system register tables Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-06-10 13:52   ` Alex Bennée
2015-06-10 13:52     ` Alex Bennée
2015-06-14 16:18     ` zichao
2015-06-14 16:18       ` zichao
2015-05-31  4:27 ` [PATCH v2 06/11] KVM: arm: add trap handlers for 32-bit debug registers Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-05-31  4:27 ` [PATCH v2 07/11] KVM: arm: add trap handlers for 64-bit " Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-05-31  4:27 ` [PATCH v2 08/11] KVM: arm: implement dirty bit mechanism for " Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-05-31  4:27 ` [PATCH v2 09/11] KVM: arm: disable debug mode if we don't actually need it Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-06-01 10:16   ` Will Deacon
2015-06-01 10:16     ` Will Deacon
2015-06-07 14:08     ` zichao
2015-06-07 14:08       ` zichao
2015-05-31  4:27 ` [PATCH v2 10/11] KVM: arm: implement lazy world switch for debug registers Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang
2015-05-31  4:27 ` [PATCH v2 11/11] KVM: arm: enable trapping of all " Zhichao Huang
2015-05-31  4:27   ` Zhichao Huang

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