From: Johan Jonker <jbx6244@gmail.com>
To: Frank Wunderlich <linux@fw-web.de>, linux-rockchip@lists.infradead.org
Cc: Frank Wunderlich <frank-w@public-files.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Heiko Stuebner <heiko@sntech.de>,
Peter Geis <pgwipeout@gmail.com>,
Michael Riesch <michael.riesch@wolfvision.net>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: rockchip: Add sata nodes to rk356x
Date: Sun, 27 Feb 2022 10:32:51 +0100 [thread overview]
Message-ID: <89f358ac-eafa-3887-2fcb-db952a6161b3@gmail.com> (raw)
In-Reply-To: <20220227082131.131883-1-linux@fw-web.de>
Hi Frank,
Combine your patch in a serie with the ahci-platform.yaml conversion and
include all current CC people and Rockchip list.
Your conversion and DT patch contains lots of errors.
Check your serie before you submit and fix.
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/ata/ahci-platform.yaml
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/ata/ahci-platform.yaml
Add power-domains as a new property after the conversion patch.
Johan
===
make a serie:
conversion ahci-platform.yaml
power-domains patch
rockchip rk356x sata nodes patch
On 2/27/22 09:21, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
>
> RK356x supports up to 3 sata controllers which were compatible with the
> existing snps,dwc-ahci binding.
>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> changes in v2:
> - added sata0 + 1, but have only tested sata2
> ---
> arch/arm64/boot/dts/rockchip/rk356x.dtsi | 45 ++++++++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index 7cdef800cb3c..2e2e73be7417 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -230,6 +230,51 @@ scmi_shmem: sram@0 {
> };
> };
>
> + sata0: sata@fc000000 {
rk3566 has no combphy0
Move to rk3568.dtsi
> + compatible = "snps,dwc-ahci";
> + reg = <0 0xfc000000 0 0x1000>;
> + clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
> + <&cru CLK_SATA0_RXOOB>;
> + clock-names = "sata", "pmalive", "rxoob";
remove
> + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hostc";
remove
> + phys = <&combphy0 PHY_TYPE_SATA>;
> + phy-names = "sata-phy";
> + ports-implemented = <0x1>;
> + power-domains = <&power RK3568_PD_PIPE>;
> + status = "disabled";
> + };
> +
> + sata1: sata@fc400000 {
> + compatible = "snps,dwc-ahci";
> + reg = <0 0xfc400000 0 0x1000>;
> + clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
> + <&cru CLK_SATA1_RXOOB>;
> + clock-names = "sata", "pmalive", "rxoob";
remove
> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hostc";
remove
> + phys = <&combphy1 PHY_TYPE_SATA>;
> + phy-names = "sata-phy";
> + ports-implemented = <0x1>;
> + power-domains = <&power RK3568_PD_PIPE>;
> + status = "disabled";
> + };
> +
> + sata2: sata@fc800000 {
> + compatible = "snps,dwc-ahci";
> + reg = <0 0xfc800000 0 0x1000>;
> + clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
> + <&cru CLK_SATA2_RXOOB>;
> + clock-names = "sata", "pmalive", "rxoob";
remove
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hostc";
remove
> + phys = <&combphy2 PHY_TYPE_SATA>;
> + phy-names = "sata-phy";
> + ports-implemented = <0x1>;
> + power-domains = <&power RK3568_PD_PIPE>;
> + status = "disabled";
> + };
> +
> gic: interrupt-controller@fd400000 {
> compatible = "arm,gic-v3";
> reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Johan Jonker <jbx6244@gmail.com>
To: Frank Wunderlich <linux@fw-web.de>, linux-rockchip@lists.infradead.org
Cc: Frank Wunderlich <frank-w@public-files.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Heiko Stuebner <heiko@sntech.de>,
Peter Geis <pgwipeout@gmail.com>,
Michael Riesch <michael.riesch@wolfvision.net>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: rockchip: Add sata nodes to rk356x
Date: Sun, 27 Feb 2022 10:32:51 +0100 [thread overview]
Message-ID: <89f358ac-eafa-3887-2fcb-db952a6161b3@gmail.com> (raw)
In-Reply-To: <20220227082131.131883-1-linux@fw-web.de>
Hi Frank,
Combine your patch in a serie with the ahci-platform.yaml conversion and
include all current CC people and Rockchip list.
Your conversion and DT patch contains lots of errors.
Check your serie before you submit and fix.
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/ata/ahci-platform.yaml
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/ata/ahci-platform.yaml
Add power-domains as a new property after the conversion patch.
Johan
===
make a serie:
conversion ahci-platform.yaml
power-domains patch
rockchip rk356x sata nodes patch
On 2/27/22 09:21, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
>
> RK356x supports up to 3 sata controllers which were compatible with the
> existing snps,dwc-ahci binding.
>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> changes in v2:
> - added sata0 + 1, but have only tested sata2
> ---
> arch/arm64/boot/dts/rockchip/rk356x.dtsi | 45 ++++++++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index 7cdef800cb3c..2e2e73be7417 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -230,6 +230,51 @@ scmi_shmem: sram@0 {
> };
> };
>
> + sata0: sata@fc000000 {
rk3566 has no combphy0
Move to rk3568.dtsi
> + compatible = "snps,dwc-ahci";
> + reg = <0 0xfc000000 0 0x1000>;
> + clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
> + <&cru CLK_SATA0_RXOOB>;
> + clock-names = "sata", "pmalive", "rxoob";
remove
> + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hostc";
remove
> + phys = <&combphy0 PHY_TYPE_SATA>;
> + phy-names = "sata-phy";
> + ports-implemented = <0x1>;
> + power-domains = <&power RK3568_PD_PIPE>;
> + status = "disabled";
> + };
> +
> + sata1: sata@fc400000 {
> + compatible = "snps,dwc-ahci";
> + reg = <0 0xfc400000 0 0x1000>;
> + clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
> + <&cru CLK_SATA1_RXOOB>;
> + clock-names = "sata", "pmalive", "rxoob";
remove
> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hostc";
remove
> + phys = <&combphy1 PHY_TYPE_SATA>;
> + phy-names = "sata-phy";
> + ports-implemented = <0x1>;
> + power-domains = <&power RK3568_PD_PIPE>;
> + status = "disabled";
> + };
> +
> + sata2: sata@fc800000 {
> + compatible = "snps,dwc-ahci";
> + reg = <0 0xfc800000 0 0x1000>;
> + clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
> + <&cru CLK_SATA2_RXOOB>;
> + clock-names = "sata", "pmalive", "rxoob";
remove
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hostc";
remove
> + phys = <&combphy2 PHY_TYPE_SATA>;
> + phy-names = "sata-phy";
> + ports-implemented = <0x1>;
> + power-domains = <&power RK3568_PD_PIPE>;
> + status = "disabled";
> + };
> +
> gic: interrupt-controller@fd400000 {
> compatible = "arm,gic-v3";
> reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Johan Jonker <jbx6244@gmail.com>
To: Frank Wunderlich <linux@fw-web.de>, linux-rockchip@lists.infradead.org
Cc: Frank Wunderlich <frank-w@public-files.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Heiko Stuebner <heiko@sntech.de>,
Peter Geis <pgwipeout@gmail.com>,
Michael Riesch <michael.riesch@wolfvision.net>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: rockchip: Add sata nodes to rk356x
Date: Sun, 27 Feb 2022 10:32:51 +0100 [thread overview]
Message-ID: <89f358ac-eafa-3887-2fcb-db952a6161b3@gmail.com> (raw)
In-Reply-To: <20220227082131.131883-1-linux@fw-web.de>
Hi Frank,
Combine your patch in a serie with the ahci-platform.yaml conversion and
include all current CC people and Rockchip list.
Your conversion and DT patch contains lots of errors.
Check your serie before you submit and fix.
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/ata/ahci-platform.yaml
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/ata/ahci-platform.yaml
Add power-domains as a new property after the conversion patch.
Johan
===
make a serie:
conversion ahci-platform.yaml
power-domains patch
rockchip rk356x sata nodes patch
On 2/27/22 09:21, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
>
> RK356x supports up to 3 sata controllers which were compatible with the
> existing snps,dwc-ahci binding.
>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> changes in v2:
> - added sata0 + 1, but have only tested sata2
> ---
> arch/arm64/boot/dts/rockchip/rk356x.dtsi | 45 ++++++++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index 7cdef800cb3c..2e2e73be7417 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -230,6 +230,51 @@ scmi_shmem: sram@0 {
> };
> };
>
> + sata0: sata@fc000000 {
rk3566 has no combphy0
Move to rk3568.dtsi
> + compatible = "snps,dwc-ahci";
> + reg = <0 0xfc000000 0 0x1000>;
> + clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
> + <&cru CLK_SATA0_RXOOB>;
> + clock-names = "sata", "pmalive", "rxoob";
remove
> + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hostc";
remove
> + phys = <&combphy0 PHY_TYPE_SATA>;
> + phy-names = "sata-phy";
> + ports-implemented = <0x1>;
> + power-domains = <&power RK3568_PD_PIPE>;
> + status = "disabled";
> + };
> +
> + sata1: sata@fc400000 {
> + compatible = "snps,dwc-ahci";
> + reg = <0 0xfc400000 0 0x1000>;
> + clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
> + <&cru CLK_SATA1_RXOOB>;
> + clock-names = "sata", "pmalive", "rxoob";
remove
> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hostc";
remove
> + phys = <&combphy1 PHY_TYPE_SATA>;
> + phy-names = "sata-phy";
> + ports-implemented = <0x1>;
> + power-domains = <&power RK3568_PD_PIPE>;
> + status = "disabled";
> + };
> +
> + sata2: sata@fc800000 {
> + compatible = "snps,dwc-ahci";
> + reg = <0 0xfc800000 0 0x1000>;
> + clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
> + <&cru CLK_SATA2_RXOOB>;
> + clock-names = "sata", "pmalive", "rxoob";
remove
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hostc";
remove
> + phys = <&combphy2 PHY_TYPE_SATA>;
> + phy-names = "sata-phy";
> + ports-implemented = <0x1>;
> + power-domains = <&power RK3568_PD_PIPE>;
> + status = "disabled";
> + };
> +
> gic: interrupt-controller@fd400000 {
> compatible = "arm,gic-v3";
> reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
next prev parent reply other threads:[~2022-02-27 9:33 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-27 8:21 [PATCH v2] arm64: dts: rockchip: Add sata nodes to rk356x Frank Wunderlich
2022-02-27 8:21 ` Frank Wunderlich
2022-02-27 8:21 ` Frank Wunderlich
2022-02-27 9:32 ` Johan Jonker [this message]
2022-02-27 9:32 ` Johan Jonker
2022-02-27 9:32 ` Johan Jonker
-- strict thread matches above, loose matches on Subject: below --
2022-03-01 21:44 kernel test robot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=89f358ac-eafa-3887-2fcb-db952a6161b3@gmail.com \
--to=jbx6244@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=frank-w@public-files.de \
--cc=heiko@sntech.de \
--cc=krzysztof.kozlowski@canonical.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=linux@fw-web.de \
--cc=michael.riesch@wolfvision.net \
--cc=pgwipeout@gmail.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.