From: timur.kristof@gmail.com
To: Alex Deucher <alexdeucher@gmail.com>,
Alex Deucher <alexander.deucher@amd.com>
Cc: amd-gfx@lists.freedesktop.org, christian.koenig@amd.com
Subject: Re: [PATCH 3/5] drm/amdgpu/sdma5.2: adjust SDMA limits
Date: Sat, 13 Sep 2025 07:27:53 +0200 [thread overview]
Message-ID: <8acbb3b27a933b60b17b06a03454cc171f1cefc8.camel@gmail.com> (raw)
In-Reply-To: <CADnq5_OgyiAZJudNfbx9Xt5uiXAXZV1Pe7d2bZPaaD4RdE0GSQ@mail.gmail.com>
On Fri, 2025-09-12 at 15:38 -0400, Alex Deucher wrote:
> On Thu, Sep 11, 2025 at 2:18 PM Alex Deucher <alexdeucher@gmail.com>
> wrote:
> >
> > On Thu, Sep 11, 2025 at 1:25 PM Alex Deucher
> > <alexander.deucher@amd.com> wrote:
> > >
> > > SDMA 5.2.x has increased transfer limits.
> > >
> > > v2: fix harder, use shifts to make it more obvious
> > >
> > > Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> > > ---
> > > drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 4 ++--
> > > 1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> > > b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> > > index a8e39df29f343..bf227eadbe487 100644
> > > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> > > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> > > @@ -2065,11 +2065,11 @@ static void
> > > sdma_v5_2_emit_fill_buffer(struct amdgpu_ib *ib,
> > > }
> > >
> > > static const struct amdgpu_buffer_funcs sdma_v5_2_buffer_funcs =
> > > {
> > > - .copy_max_bytes = 0x400000,
> > > + .copy_max_bytes = 1 << 30,
> > > .copy_num_dw = 7,
> > > .emit_copy_buffer = sdma_v5_2_emit_copy_buffer,
> > >
> > > - .fill_max_bytes = 0x400000,
> > > + .fill_max_bytes = 1 << 30,
> >
> > The hw docs and PAL differ here. I've asked the hw designers to
> > clarify.
>
> The HW team verified that the hardware supports the extended range
> for
> both copies and fills.
>
> Alex
Hi Alex,
This is still pretty confusing.
According to PAL, only SDMA v6 has the extended range for fills, and it
can do 4 bytes fewer.
Are you sure that PAL is wrong about this?
For reference:
https://github.com/GPUOpen-Drivers/pal/blob/dev/src/core/hw/gfxip/sdma/gfx10/gfx10DmaCmdBuffer.cpp
https://github.com/GPUOpen-Drivers/pal/blob/dev/src/core/hw/gfxip/sdma/gfx12/gfx12DmaCmdBuffer.cpp
MaxCopySize on GFX10: 1 << 22
MaxCopySize on GFX10.3+: 1 << 30
MaxFillSize on GFX10-10.3: (1 << 22 - 1) & ~3
MaxFillSize on GFX11+: (1 << 30 - 1) & ~3
This makes sense because they program the count field in the packet
using the byte count minus four.
Thanks,
Timur
next prev parent reply other threads:[~2025-09-13 5:28 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-11 17:24 [PATCH 1/5] drm/amdgpu/sdma4.0: adjust SDMA limits Alex Deucher
2025-09-11 17:24 ` [PATCH 2/5] drm/amdgpu/sdma4.4: " Alex Deucher
2025-09-11 17:24 ` [PATCH 3/5] drm/amdgpu/sdma5.2: " Alex Deucher
2025-09-11 18:18 ` Alex Deucher
2025-09-12 19:38 ` Alex Deucher
2025-09-13 5:27 ` timur.kristof [this message]
2025-09-15 13:07 ` Alex Deucher
2025-09-15 13:23 ` timur.kristof
2025-09-15 13:25 ` Alex Deucher
2025-09-15 13:26 ` timur.kristof
2025-09-11 17:24 ` [PATCH 4/5] drm/amdgpu/sdma6.0: " Alex Deucher
2025-09-11 17:24 ` [PATCH 5/5] drm/amdgpu/sdma7.0: " Alex Deucher
-- strict thread matches above, loose matches on Subject: below --
2025-09-15 13:31 [PATCH 1/5] drm/amdgpu/sdma4.0: " Alex Deucher
2025-09-15 13:31 ` [PATCH 3/5] drm/amdgpu/sdma5.2: " Alex Deucher
2025-09-11 14:46 [PATCH 1/5] drm/amdgpu/sdma4.0: " Alex Deucher
2025-09-11 14:46 ` [PATCH 3/5] drm/amdgpu/sdma5.2: " Alex Deucher
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