From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: "Christian König" <christian.koenig@amd.com>,
"Matthew Auld" <matthew.auld@intel.com>,
intel-xe@lists.freedesktop.org
Cc: "Matthew Brost" <matthew.brost@intel.com>,
stable@vger.kernel.org,
"Christian König" <ckoenig.leichtzumerken@gmail.com>
Subject: Re: [PATCH v2 3/3] drm/xe: skip p2p for suspected display buffers
Date: Tue, 13 Oct 2026 11:18:21 +0200 [thread overview]
Message-ID: <8d0eb215394e7a285813fe87def6bee358063431.camel@linux.intel.com> (raw)
In-Reply-To: <2fcd10d5-c1f9-47be-9a68-422f9bbd6837@amd.com>
On Tue, 2026-10-13 at 11:10 +0200, Christian König wrote:
> On 10/13/26 10:51, Matthew Auld wrote:
> > On 09/10/2026 14:02, Matthew Auld wrote:
> > > On 09/10/2026 12:38, Christian König wrote:
> > > > On 10/9/26 12:29, Matthew Auld wrote:
> > > > > On 09/10/2026 10:26, Christian König wrote:
> > > > > > On 10/9/26 11:16, Matthew Auld wrote:
> > > > > > > On 08/10/2026 12:17, Matthew Auld wrote:
> > > > > > > > On 08/10/2026 10:55, Christian König wrote:
> > > > > > > > > On 10/8/26 11:46, Matthew Auld wrote:
> > > > > > > > > > On 07/10/2026 19:11, Thomas Hellström wrote:
> > > > > > > > > > > On Wed, 2026-10-07 at 16:36 +0100, Matthew Auld
> > > > > > > > > > > wrote:
> ....
> > > > > > > > > > Perhaps Intel Mesa side should use tt-only for this
> > > > > > > > > > type buffer (?), but since this is a kernel
> > > > > > > > > > regression I was hoping we could fix this on the
> > > > > > > > > > kernel side.
> > > > > > > > > >
> > > > > > > > > > Some questions:
> > > > > > > > > >
> > > > > > > > > > 1. Do you know what is the general story with p2p
> > > > > > > > > > between igpu and dgpu? Is this a legit thing? For
> > > > > > > > > > igpus/APUs, advertising p2p can't be dropped? It
> > > > > > > > > > clearly seems to work though.
> > > > > > > > > >
> > > > > > > > > > 2. If this is legit, do you guys then also prevent
> > > > > > > > > > p2p with display buffers? Are you just doing that
> > > > > > > > > > at the Mesa level, or is there some magic in the
> > > > > > > > > > kernel also?
> > > > > > > > >
> > > > > > > > > If I understand that correctly that the igpu is the
> > > > > > > > > importer and the dgpu is the exporter then yeah
> > > > > > > > > Thomas is right that definately needs to be fixed on
> > > > > > > > > the importer side.
> > > > > > > >
> > > > > > > > Ideas on how do that? Could we do something like
> > > > > > > > allow_peer2peer = false in amdgpu_gem_prime_import() if
> > > > > > > > this is an APU device, or further check if the exporter
> > > > > > > > side is not amdgpu, like APU + Xe?
> > > > > > >
> > > > > > > For example:
> > > > > > > https://gitlab.freedesktop.org/mwa/kernel/-/ commit/7ec86
> > > > > > > c68b42655b4bb85ee90af434a617e7bec8c
> > > > > > >
> > > > > > > Is that something you would accept?
> > > > > >
> > > > > > No, you misunderstood me. Enabling P2P is perfectly fine
> > > > > > for APUs and mandatory for a couple of customer projects.
> > > > > >
> > > > > > The buffer should just be rejected from scanout in the
> > > > > > display code and on the AMDGPU side we already do that if
> > > > > > I'm not completely mistaken.
> > > > >
> > > > > Reporter confirmed seeing the issue in windowed mode also. So
> > > > > I don't think it's just a case of rejecting from scanout?
> > > >
> > > > Then I don't understand what the problem is.
> > > >
> > > > When the dGPU renders and the iGPU displays you have only two
> > > > possibilities, either the dGPU pushes the frames over the bus
> > > > or the iGPU pulls the frames over the bus. Both should be
> > > > equaly slow or fast, so what exactly is the expectation here?
> > >
> > > I assume the AMD APU/iGPU is sampling/reading from the p2p window
> > > buffer every frame.
>
> That is not possible. The HW can't do this and because of this we
> should have a check for that in the DAL/DC code.
>
Couldn't the issue be that the compositor, running on the amd iGPU
blits from the dma-buf rather than scans out from it? And the scanout
is not the shared buffer at all?
/Thomas
next prev parent reply other threads:[~2026-10-13 9:18 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 15:36 [PATCH v2 0/3] sticky TT Matthew Auld
2026-10-07 15:36 ` [PATCH v2 1/3] drm/xe/dma-buf: keep non-p2p imported buffers in system memory Matthew Auld
2026-10-07 15:36 ` [PATCH v2 2/3] drm/xe/vm: make PREFETCH to TT sticky Matthew Auld
2026-10-07 15:36 ` [PATCH v2 3/3] drm/xe: skip p2p for suspected display buffers Matthew Auld
2026-10-07 18:11 ` Thomas Hellström
2026-10-08 9:46 ` Matthew Auld
2026-10-08 9:55 ` Christian König
2026-10-08 11:17 ` Matthew Auld
2026-10-09 9:16 ` Matthew Auld
2026-10-09 9:26 ` Christian König
2026-10-09 10:29 ` Matthew Auld
2026-10-09 11:38 ` Christian König
2026-10-09 13:02 ` Matthew Auld
2026-10-13 8:51 ` Matthew Auld
2026-10-13 9:10 ` Christian König
2026-10-13 9:18 ` Thomas Hellström [this message]
2026-10-13 9:55 ` Christian König
2026-10-13 10:16 ` Thomas Hellström
2026-10-13 11:45 ` Christian König
2026-10-13 12:36 ` Matthew Auld
2026-10-13 9:40 ` Matthew Auld
2026-10-13 11:50 ` Christian König
2026-10-13 13:15 ` Matthew Auld
2026-10-09 13:06 ` Thomas Hellström
2026-10-08 14:40 ` Simon Richter
2026-10-08 16:22 ` Matthew Auld
2026-10-07 15:42 ` ✗ CI.checkpatch: warning for sticky TT (rev2) Patchwork
2026-10-07 15:45 ` ✓ CI.KUnit: success " Patchwork
2026-10-07 16:46 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-07 20:16 ` ✓ Xe.CI.FULL: " Patchwork
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