All of lore.kernel.org
 help / color / mirror / Atom feed
From: William Qiu <william.qiu@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	<devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Ziv Xu <ziv.xu@starfivetech.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC
Date: Mon, 19 Jun 2023 15:27:43 +0800	[thread overview]
Message-ID: <8dba5075-3e30-3edd-e66b-199cffefe708@starfivetech.com> (raw)
In-Reply-To: <e148c599-8521-3264-f994-529ffc18f836@linaro.org>



On 2023/6/6 20:43, Krzysztof Kozlowski wrote:
> On 02/06/2023 10:49, William Qiu wrote:
>> The QSPI controller needs three clock items to work properly on StarFive
>> JH7110 SoC, so there is need to change the maxItems's value to 3. Other
>> platforms do not have this constraint.
>> 
>> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
>> Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
> 
> 
> 
>>  
>> @@ -69,9 +81,6 @@ properties:
>>    interrupts:
>>      maxItems: 1
>>  
>> -  clocks:
>> -    maxItems: 1
> 
> Properties should be defined in top-level properties. Don't remove them
> from here.
> 
> Best regards,
> Krzysztof
> 
Hi Krzysztof,

Sorry for the late reply. I'll fix it in next version.

Best regards,
William

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: William Qiu <william.qiu@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	<devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Ziv Xu <ziv.xu@starfivetech.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC
Date: Mon, 19 Jun 2023 15:27:43 +0800	[thread overview]
Message-ID: <8dba5075-3e30-3edd-e66b-199cffefe708@starfivetech.com> (raw)
In-Reply-To: <e148c599-8521-3264-f994-529ffc18f836@linaro.org>



On 2023/6/6 20:43, Krzysztof Kozlowski wrote:
> On 02/06/2023 10:49, William Qiu wrote:
>> The QSPI controller needs three clock items to work properly on StarFive
>> JH7110 SoC, so there is need to change the maxItems's value to 3. Other
>> platforms do not have this constraint.
>> 
>> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
>> Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
> 
> 
> 
>>  
>> @@ -69,9 +81,6 @@ properties:
>>    interrupts:
>>      maxItems: 1
>>  
>> -  clocks:
>> -    maxItems: 1
> 
> Properties should be defined in top-level properties. Don't remove them
> from here.
> 
> Best regards,
> Krzysztof
> 
Hi Krzysztof,

Sorry for the late reply. I'll fix it in next version.

Best regards,
William

  reply	other threads:[~2023-06-19  7:28 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-02  8:49 [PATCH v2 0/3] Add initialization of clock for StarFive JH7110 SoC William Qiu
2023-06-02  8:49 ` William Qiu
2023-06-02  8:49 ` [PATCH v2 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks " William Qiu
2023-06-02  8:49   ` William Qiu
2023-06-02 18:02   ` Conor Dooley
2023-06-02 18:02     ` Conor Dooley
2023-06-06  3:34     ` William Qiu
2023-06-06  3:34       ` William Qiu
2023-06-06 12:43   ` Krzysztof Kozlowski
2023-06-06 12:43     ` Krzysztof Kozlowski
2023-06-19  7:27     ` William Qiu [this message]
2023-06-19  7:27       ` William Qiu
2023-06-02  8:49 ` [PATCH v2 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI William Qiu
2023-06-02  8:49   ` William Qiu
2023-06-02 12:33   ` kernel test robot
2023-06-02 12:33     ` kernel test robot
2023-06-06  3:32     ` William Qiu
2023-06-06  3:32       ` William Qiu
2023-06-15  7:57   ` kernel test robot
2023-06-02  8:49 ` [PATCH v2 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC William Qiu
2023-06-02  8:49   ` William Qiu
2023-08-04 19:04 ` (subset) [PATCH v2 0/3] Add initialization of clock " Mark Brown
2023-08-04 19:04   ` Mark Brown

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8dba5075-3e30-3edd-e66b-199cffefe708@starfivetech.com \
    --to=william.qiu@starfivetech.com \
    --cc=broonie@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=kernel@esmil.dk \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=robh+dt@kernel.org \
    --cc=ziv.xu@starfivetech.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.