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From: Joel Fernandes <joelagnelf@nvidia.com>
To: "Alexandre Courbot" <acourbot@nvidia.com>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Boqun Feng" <boqun@kernel.org>, "Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Trevor Gross" <tmgross@umich.edu>
Cc: John Hubbard <jhubbard@nvidia.com>,
	Alistair Popple <apopple@nvidia.com>,
	 Timur Tabi <ttabi@nvidia.com>, Zhi Wang <zhiw@nvidia.com>,
	Eliot Courtney <ecourtney@nvidia.com>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-doc@vger.kernel.org,
	rust-for-linux@vger.kernel.org
Subject: Re: [PATCH v2 08/10] gpu: nova-core: convert falcon registers to kernel register macro
Date: Fri, 20 Mar 2026 13:38:25 -0400	[thread overview]
Message-ID: <8f9da1e2-fb86-4653-b702-333fc920af58@nvidia.com> (raw)
In-Reply-To: <20260320-b4-nova-register-v2-8-88fcf103e8d4@nvidia.com>

Hi Alex,

On 3/20/2026 8:19 AM, Alexandre Courbot wrote:
>      /// Reset the controller, select the falcon core, and wait for memory scrubbing to complete.
> @@ -616,9 +462,10 @@ pub(crate) fn reset(&self, bar: &Bar0) -> Result {
>          self.hal.select_core(self, bar)?;
>          self.hal.reset_wait_mem_scrubbing(bar)?;
>  
> -        regs::NV_PFALCON_FALCON_RM::default()
> -            .set_value(bar.read(regs::NV_PMC_BOOT_0).into())
> -            .write(bar, &E::ID);
> +        bar.write(
> +            WithBase::of::<E>(),
> +            regs::NV_PFALCON_FALCON_RM::from(bar.read(regs::NV_PMC_BOOT_0).into_raw()),
> +        );
>  

Overall, I think the series is good improvement but I still feel this part is a
step back in readability, and we should come up with something better. I don't
think there's any chance anyone can memorize this syntax.

What about using a macro to hide the boilerplate?

>          Ok(())
>      }
> @@ -636,25 +483,27 @@ fn pio_wr_imem_slice(&self, bar: &Bar0, load_offsets: FalconPioImemLoadTarget<'_
>              return Err(EINVAL);
>          }
>  
> -        regs::NV_PFALCON_FALCON_IMEMC::default()
> -            .set_secure(load_offsets.secure)
> -            .set_aincw(true)
> -            .set_offs(load_offsets.dst_start)
> -            .write(bar, &E::ID, Self::PIO_PORT);
> +        bar.write(
> +            WithBase::of::<E>().at(Self::PIO_PORT),
> +            regs::NV_PFALCON_FALCON_IMEMC::zeroed()
> +                .with_secure(load_offsets.secure)
> +                .with_aincw(true)
> +                .with_offs(load_offsets.dst_start),
> +        );
And bare minimum, probably the inner:
> +            regs::NV_PFALCON_FALCON_IMEMC::zeroed()
> +                .with_secure(load_offsets.secure)
> +                .with_aincw(true)
> +                .with_offs(load_offsets.dst_start),

Should be assigned to a separate variable for readability. I think otherwise it
is quite unbeatable.

thanks,

-- 
Joel Fernandes


WARNING: multiple messages have this Message-ID (diff)
From: Joel Fernandes <joelagnelf@nvidia.com>
To: "Alexandre Courbot" <acourbot@nvidia.com>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Boqun Feng" <boqun@kernel.org>, "Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Trevor Gross" <tmgross@umich.edu>
Cc: John Hubbard <jhubbard@nvidia.com>,
	Alistair Popple <apopple@nvidia.com>,
	Timur Tabi <ttabi@nvidia.com>, Zhi Wang <zhiw@nvidia.com>,
	Eliot Courtney <ecourtney@nvidia.com>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-doc@vger.kernel.org,
	rust-for-linux@vger.kernel.org
Subject: Re: [PATCH v2 08/10] gpu: nova-core: convert falcon registers to kernel register macro
Date: Fri, 20 Mar 2026 13:38:25 -0400	[thread overview]
Message-ID: <8f9da1e2-fb86-4653-b702-333fc920af58@nvidia.com> (raw)
In-Reply-To: <20260320-b4-nova-register-v2-8-88fcf103e8d4@nvidia.com>

Hi Alex,

On 3/20/2026 8:19 AM, Alexandre Courbot wrote:
>      /// Reset the controller, select the falcon core, and wait for memory scrubbing to complete.
> @@ -616,9 +462,10 @@ pub(crate) fn reset(&self, bar: &Bar0) -> Result {
>          self.hal.select_core(self, bar)?;
>          self.hal.reset_wait_mem_scrubbing(bar)?;
>  
> -        regs::NV_PFALCON_FALCON_RM::default()
> -            .set_value(bar.read(regs::NV_PMC_BOOT_0).into())
> -            .write(bar, &E::ID);
> +        bar.write(
> +            WithBase::of::<E>(),
> +            regs::NV_PFALCON_FALCON_RM::from(bar.read(regs::NV_PMC_BOOT_0).into_raw()),
> +        );
>  

Overall, I think the series is good improvement but I still feel this part is a
step back in readability, and we should come up with something better. I don't
think there's any chance anyone can memorize this syntax.

What about using a macro to hide the boilerplate?

>          Ok(())
>      }
> @@ -636,25 +483,27 @@ fn pio_wr_imem_slice(&self, bar: &Bar0, load_offsets: FalconPioImemLoadTarget<'_
>              return Err(EINVAL);
>          }
>  
> -        regs::NV_PFALCON_FALCON_IMEMC::default()
> -            .set_secure(load_offsets.secure)
> -            .set_aincw(true)
> -            .set_offs(load_offsets.dst_start)
> -            .write(bar, &E::ID, Self::PIO_PORT);
> +        bar.write(
> +            WithBase::of::<E>().at(Self::PIO_PORT),
> +            regs::NV_PFALCON_FALCON_IMEMC::zeroed()
> +                .with_secure(load_offsets.secure)
> +                .with_aincw(true)
> +                .with_offs(load_offsets.dst_start),
> +        );
And bare minimum, probably the inner:
> +            regs::NV_PFALCON_FALCON_IMEMC::zeroed()
> +                .with_secure(load_offsets.secure)
> +                .with_aincw(true)
> +                .with_offs(load_offsets.dst_start),

Should be assigned to a separate variable for readability. I think otherwise it
is quite unbeatable.

thanks,

-- 
Joel Fernandes


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2026-03-20 17:38 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-20 12:19 [PATCH v2 00/10] gpu: nova-core: convert registers to use the kernel register macro Alexandre Courbot
2026-03-20 12:19 ` Alexandre Courbot
2026-03-20 12:19 ` [PATCH v2 01/10] gpu: nova-core: convert PMC registers to " Alexandre Courbot
2026-03-20 12:19   ` Alexandre Courbot
2026-03-20 19:09   ` Gary Guo
2026-03-20 19:09     ` Gary Guo
2026-03-23  1:41   ` Eliot Courtney
2026-03-23  1:41     ` Eliot Courtney
2026-03-20 12:19 ` [PATCH v2 02/10] gpu: nova-core: convert PBUS " Alexandre Courbot
2026-03-20 12:19   ` Alexandre Courbot
2026-03-20 12:19 ` [PATCH v2 03/10] gpu: nova-core: convert PFB " Alexandre Courbot
2026-03-20 12:19   ` Alexandre Courbot
2026-03-20 12:19 ` [PATCH v2 04/10] gpu: nova-core: convert GC6 " Alexandre Courbot
2026-03-20 12:19   ` Alexandre Courbot
2026-03-20 12:19 ` [PATCH v2 05/10] gpu: nova-core: convert FUSE " Alexandre Courbot
2026-03-20 12:19   ` Alexandre Courbot
2026-03-20 12:19 ` [PATCH v2 06/10] gpu: nova-core: convert PDISP " Alexandre Courbot
2026-03-20 12:19   ` Alexandre Courbot
2026-03-20 17:33   ` Joel Fernandes
2026-03-20 17:33     ` Joel Fernandes
2026-03-21  6:19     ` Alexandre Courbot
2026-03-21  6:19       ` Alexandre Courbot
2026-03-20 12:19 ` [PATCH v2 07/10] gpu: nova-core: falcon: introduce `bounded_enum` macro Alexandre Courbot
2026-03-20 12:19   ` Alexandre Courbot
2026-03-20 19:08   ` Gary Guo
2026-03-20 19:08     ` Gary Guo
2026-03-20 12:19 ` [PATCH v2 08/10] gpu: nova-core: convert falcon registers to kernel register macro Alexandre Courbot
2026-03-20 12:19   ` Alexandre Courbot
2026-03-20 17:38   ` Joel Fernandes [this message]
2026-03-20 17:38     ` Joel Fernandes
2026-03-20 19:52     ` John Hubbard
2026-03-20 19:52       ` John Hubbard
2026-03-20 20:07       ` Danilo Krummrich
2026-03-20 20:07         ` Danilo Krummrich
2026-03-20 20:23         ` Gary Guo
2026-03-20 20:23           ` Gary Guo
2026-03-20 20:17       ` Gary Guo
2026-03-20 20:17         ` Gary Guo
2026-03-21  6:16       ` Alexandre Courbot
2026-03-21  6:16         ` Alexandre Courbot
2026-03-20 12:19 ` [PATCH v2 09/10] gpu: nova-core: remove `io::` qualifier to register macro invocations Alexandre Courbot
2026-03-20 12:19   ` Alexandre Courbot
2026-03-23  1:40   ` Eliot Courtney
2026-03-23  1:40     ` Eliot Courtney
2026-03-20 12:19 ` [PATCH v2 10/10] Documentation: nova: remove register abstraction task Alexandre Courbot
2026-03-20 12:19   ` Alexandre Courbot
2026-03-20 19:11 ` [PATCH v2 00/10] gpu: nova-core: convert registers to use the kernel register macro Gary Guo
2026-03-20 19:11   ` Gary Guo

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