Re: [PATCH 3/4] drm/amdgpu: Signal page table fence after gfx vm flush

[Felix Kuehling <felix.kuehling@amd.com>]

On 2023-06-01 15:31, Philip Yang wrote:
> To free page table BOs which are fenced and freed when updating page
> table.
>
> Signed-off-by: Philip Yang <Philip.Yang@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 7 +++++++
>   1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index e0d3e3aa2e31..10d63256d26b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -219,6 +219,13 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
>   			amdgpu_ring_undo(ring);
>   			return r;
>   		}
> +
> +		if (vm) {
> +			/* Signal fence to free page table BO */
> +			dma_fence_signal(vm->pt_fence);
> +			dma_fence_put(vm->pt_fence);
> +			vm->pt_fence = amdgpu_pt_fence_create();
> +		}

I think this is too early. The TLB flush is not done at this point, it's 
only been emitted to the ring but not executed yet. You probably need to 
signal the PT fence in a fence callback from the fence "f" that signals 
when the IB completes.

Regards,
   Felix


>   	}
>   
>   	amdgpu_ring_ib_begin(ring);