From: Marc Zyngier <maz@kernel.org>
To: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Jingoo Han <jingoohan1@gmail.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Rob Herring <robh+dt@kernel.org>,
Masahiro Yamada <yamada.masahiro@socionext.com>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Masami Hiramatsu <masami.hiramatsu@linaro.org>,
Jassi Brar <jaswinder.singh@linaro.org>
Subject: Re: [PATCH v3 1/6] PCI: dwc: Add msi_host_isr() callback
Date: Wed, 03 Jun 2020 12:15:04 +0100 [thread overview]
Message-ID: <95bb3ffbfab4923854e20266c6b0b098@kernel.org> (raw)
In-Reply-To: <1591174481-13975-2-git-send-email-hayashi.kunihiko@socionext.com>
On 2020-06-03 09:54, Kunihiko Hayashi wrote:
> This adds msi_host_isr() callback function support to describe
> SoC-dependent service triggered by MSI.
>
> For example, when AER interrupt is triggered by MSI, the callback
> function
> reads SoC-dependent registers and detects that the interrupt is from
> AER,
> and invoke AER interrupts related to MSI.
>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Jingoo Han <jingoohan1@gmail.com>
> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++----
> drivers/pci/controller/dwc/pcie-designware.h | 1 +
> 2 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
> b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 0a4a5aa..9b628a2 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -112,13 +112,13 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port
> *pp)
> static void dw_chained_msi_isr(struct irq_desc *desc)
> {
> struct irq_chip *chip = irq_desc_get_chip(desc);
> - struct pcie_port *pp;
> + struct pcie_port *pp = irq_desc_get_handler_data(desc);
>
> - chained_irq_enter(chip, desc);
> + if (pp->ops->msi_host_isr)
> + pp->ops->msi_host_isr(pp);
Why is this call outside of the enter/exit guards?
Do you still need to execute the standard handler?
>
> - pp = irq_desc_get_handler_data(desc);
> + chained_irq_enter(chip, desc);
> dw_handle_msi_irq(pp);
> -
> chained_irq_exit(chip, desc);
> }
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h
> b/drivers/pci/controller/dwc/pcie-designware.h
> index 656e00f..e741967 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -170,6 +170,7 @@ struct dw_pcie_host_ops {
> void (*scan_bus)(struct pcie_port *pp);
> void (*set_num_vectors)(struct pcie_port *pp);
> int (*msi_host_init)(struct pcie_port *pp);
> + void (*msi_host_isr)(struct pcie_port *pp);
> };
>
> struct pcie_port {
Thanks,
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: devicetree@vger.kernel.org,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Masami Hiramatsu <masami.hiramatsu@linaro.org>,
Jassi Brar <jaswinder.singh@linaro.org>,
Jingoo Han <jingoohan1@gmail.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Masahiro Yamada <yamada.masahiro@socionext.com>,
Rob Herring <robh+dt@kernel.org>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 1/6] PCI: dwc: Add msi_host_isr() callback
Date: Wed, 03 Jun 2020 12:15:04 +0100 [thread overview]
Message-ID: <95bb3ffbfab4923854e20266c6b0b098@kernel.org> (raw)
In-Reply-To: <1591174481-13975-2-git-send-email-hayashi.kunihiko@socionext.com>
On 2020-06-03 09:54, Kunihiko Hayashi wrote:
> This adds msi_host_isr() callback function support to describe
> SoC-dependent service triggered by MSI.
>
> For example, when AER interrupt is triggered by MSI, the callback
> function
> reads SoC-dependent registers and detects that the interrupt is from
> AER,
> and invoke AER interrupts related to MSI.
>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Jingoo Han <jingoohan1@gmail.com>
> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++----
> drivers/pci/controller/dwc/pcie-designware.h | 1 +
> 2 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
> b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 0a4a5aa..9b628a2 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -112,13 +112,13 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port
> *pp)
> static void dw_chained_msi_isr(struct irq_desc *desc)
> {
> struct irq_chip *chip = irq_desc_get_chip(desc);
> - struct pcie_port *pp;
> + struct pcie_port *pp = irq_desc_get_handler_data(desc);
>
> - chained_irq_enter(chip, desc);
> + if (pp->ops->msi_host_isr)
> + pp->ops->msi_host_isr(pp);
Why is this call outside of the enter/exit guards?
Do you still need to execute the standard handler?
>
> - pp = irq_desc_get_handler_data(desc);
> + chained_irq_enter(chip, desc);
> dw_handle_msi_irq(pp);
> -
> chained_irq_exit(chip, desc);
> }
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h
> b/drivers/pci/controller/dwc/pcie-designware.h
> index 656e00f..e741967 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -170,6 +170,7 @@ struct dw_pcie_host_ops {
> void (*scan_bus)(struct pcie_port *pp);
> void (*set_num_vectors)(struct pcie_port *pp);
> int (*msi_host_init)(struct pcie_port *pp);
> + void (*msi_host_isr)(struct pcie_port *pp);
> };
>
> struct pcie_port {
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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next prev parent reply other threads:[~2020-06-03 11:15 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-03 8:54 [PATCH v3 0/6] PCI: uniphier: Add features for UniPhier PCIe host controller Kunihiko Hayashi
2020-06-03 8:54 ` Kunihiko Hayashi
2020-06-03 8:54 ` [PATCH v3 1/6] PCI: dwc: Add msi_host_isr() callback Kunihiko Hayashi
2020-06-03 8:54 ` Kunihiko Hayashi
2020-06-03 11:15 ` Marc Zyngier [this message]
2020-06-03 11:15 ` Marc Zyngier
2020-06-04 9:43 ` Kunihiko Hayashi
2020-06-04 9:43 ` Kunihiko Hayashi
2020-06-03 8:54 ` [PATCH v3 2/6] PCI: uniphier: Add misc interrupt handler to invoke PME and AER Kunihiko Hayashi
2020-06-03 8:54 ` Kunihiko Hayashi
2020-06-03 11:22 ` Marc Zyngier
2020-06-03 11:22 ` Marc Zyngier
2020-06-04 9:43 ` Kunihiko Hayashi
2020-06-04 9:43 ` Kunihiko Hayashi
2020-06-04 10:11 ` Marc Zyngier
2020-06-04 10:11 ` Marc Zyngier
2020-06-05 2:36 ` Kunihiko Hayashi
2020-06-05 2:36 ` Kunihiko Hayashi
2020-06-03 8:54 ` [PATCH v3 3/6] dt-bindings: PCI: uniphier: Add iATU register description Kunihiko Hayashi
2020-06-03 8:54 ` Kunihiko Hayashi
2020-06-03 8:54 ` [PATCH v3 4/6] PCI: uniphier: Add iATU register support Kunihiko Hayashi
2020-06-03 8:54 ` Kunihiko Hayashi
2020-06-03 8:54 ` [PATCH v3 5/6] PCI: uniphier: Add error message when failed to get phy Kunihiko Hayashi
2020-06-03 8:54 ` Kunihiko Hayashi
2020-06-03 8:54 ` [PATCH v3 6/6] PCI: uniphier: Use devm_platform_ioremap_resource_byname() Kunihiko Hayashi
2020-06-03 8:54 ` Kunihiko Hayashi
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