From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <arikalo@gmail.com>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [PATCH v2 1/6] target/mips: Introduce decode tree bindings for microMIPS ISA
Date: Tue, 26 Nov 2024 14:19:51 +0100 [thread overview]
Message-ID: <95da2038-4d3c-4d05-8d96-494d3fb49a2b@linaro.org> (raw)
In-Reply-To: <20241112172022.88348-2-philmd@linaro.org>
On 12/11/24 18:20, Philippe Mathieu-Daudé wrote:
> From: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
> Introduce the microMIPS decodetree configs for the 16-bit
> and 32-bit instructions.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/mips/tcg/translate.h | 2 ++
> target/mips/tcg/micromips16.decode | 9 +++++++++
> target/mips/tcg/micromips32.decode | 9 +++++++++
> target/mips/tcg/micromips_translate.c | 14 ++++++++++++++
> target/mips/tcg/micromips_translate.c.inc | 6 ++++++
> target/mips/tcg/meson.build | 3 +++
> 6 files changed, 43 insertions(+)
> create mode 100644 target/mips/tcg/micromips16.decode
> create mode 100644 target/mips/tcg/micromips32.decode
> create mode 100644 target/mips/tcg/micromips_translate.c
> diff --git a/target/mips/tcg/micromips_translate.c.inc b/target/mips/tcg/micromips_translate.c.inc
> index c479bec108..f504e15fa7 100644
> --- a/target/mips/tcg/micromips_translate.c.inc
> +++ b/target/mips/tcg/micromips_translate.c.inc
> @@ -3000,6 +3000,9 @@ static int decode_isa_micromips(CPUMIPSState *env, DisasContext *ctx)
> gen_reserved_instruction(ctx);
> return 2;
> }
> + if (decode_isa_micromips32(ctx, ctx->opcode)) {
This call is incorrect, the caller previously called
translator_lduw() so ctx->opcode is incomplete.
> + return 4;
> + }
> break;
> case 1:
> /* POOL16A, POOL16B, POOL16C, LWGP16, POOL16F */
> @@ -3011,6 +3014,9 @@ static int decode_isa_micromips(CPUMIPSState *env, DisasContext *ctx)
> gen_reserved_instruction(ctx);
> return 2;
> }
> + if (decode_isa_micromips16(ctx, ctx->opcode)) {
> + return 2;
> + }
> break;
> }
> }
next prev parent reply other threads:[~2024-11-26 13:20 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-12 17:20 [PATCH v2 0/6] target/mips: Convert nanoMIPS LSA opcode to decodetree Philippe Mathieu-Daudé
2024-11-12 17:20 ` [PATCH v2 1/6] target/mips: Introduce decode tree bindings for microMIPS ISA Philippe Mathieu-Daudé
2024-11-12 18:14 ` Richard Henderson
2024-11-26 13:19 ` Philippe Mathieu-Daudé [this message]
2024-11-12 17:20 ` [PATCH v2 2/6] target/mips: Introduce decode tree bindings for nanoMIPS ISA Philippe Mathieu-Daudé
2024-11-26 13:20 ` Philippe Mathieu-Daudé
2024-11-12 17:20 ` [PATCH v2 3/6] target/mips: Have gen_[d]lsa() callers add 1 to shift amount argument Philippe Mathieu-Daudé
2024-11-12 18:16 ` Richard Henderson
2024-11-12 17:20 ` [PATCH v2 4/6] target/mips: Decode LSA shift amount using decodetree function Philippe Mathieu-Daudé
2024-11-12 18:16 ` Richard Henderson
2024-11-12 17:20 ` [PATCH v2 5/6] target/mips: Convert microMIPS LSA opcode to decodetree Philippe Mathieu-Daudé
2024-11-12 18:17 ` Richard Henderson
2024-11-12 17:20 ` [PATCH v2 6/6] target/mips: Convert nanoMIPS " Philippe Mathieu-Daudé
2024-11-12 18:18 ` Richard Henderson
2024-11-15 15:40 ` [PATCH v2 0/6] " Philippe Mathieu-Daudé
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