Re: [PATCH] riscv: Define TASK_SIZE_MAX for __access_ok()

From: "Arnd Bergmann" <arnd@arndb.de>
To: "Mark Rutland" <mark.rutland@arm.com>
Cc: "Alexandre Ghiti" <alex@ghiti.fr>,
	"David Laight" <David.Laight@aculab.com>,
	"Samuel Holland" <samuel.holland@sifive.com>,
	"Alexandre Ghiti" <alexghiti@rivosinc.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Andrew Morton" <akpm@linux-foundation.org>,
	"Charlie Jenkins" <charlie@rivosinc.com>,
	guoren <guoren@kernel.org>, "Jisheng Zhang" <jszhang@kernel.org>,
	"Kemeng Shi" <shikemeng@huaweicloud.com>,
	"Matthew Wilcox" <willy@infradead.org>,
	"Mike Rapoport" <rppt@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Xiao W Wang" <xiao.w.wang@intel.com>,
	"Yangyu Chen" <cyy@cyyself.name>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] riscv: Define TASK_SIZE_MAX for __access_ok()
Date: Mon, 25 Mar 2024 21:38:20 +0100	[thread overview]
Message-ID: <95eb125d-dd54-42f1-b080-938faca6a8a1@app.fastmail.com> (raw)
In-Reply-To: <ZgHCpgHh1ypSyrtv@FVFF77S0Q05N>

On Mon, Mar 25, 2024, at 19:30, Mark Rutland wrote:
> On Mon, Mar 25, 2024 at 07:02:13PM +0100, Arnd Bergmann wrote:
>> On Mon, Mar 25, 2024, at 17:39, Mark Rutland wrote:
>
>> If an architecture ignores all the top bits of a virtual address,
>> the largest TASK_SIZE would be higher than the smallest (positive,
>> unsigned) PAGE_OFFSET, so you need TASK_SIZE_MAX to be dynamic.
>
> Agreed, but do we even support such architectures within Linux?

Apparently not.

On 32-bit architectures, you often have TASK_SIZE==PAGE_OFFSET,
but not on 64-bit -- either the top few bits in PAGE_OFFSET are
always ones, or the user and kernel page tables are completely
separate.

>> It doesn't look like this is the case on riscv, but I'm not sure
>> about this part.
>
> It looks like riscv is in the same bucket as arm64 and x86 per:
>
>   https://www.kernel.org/doc/html/next/riscv/vm-layout.html
>
> ... which says:
>
> | The RISC-V privileged architecture document states that the 64bit addresses
> | "must have bits 63-48 all equal to bit 47, or else a page-fault exception
> | will occur.": that splits the virtual address space into 2 halves separated
> | by a very big hole, the lower half is where the userspace resides, the upper
> | half is where the RISC-V Linux Kernel resides.

Rihgt. I had even looked in that directory but somehow missed
the vm-layout.rst file.

     Arnd

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