* [PATCH 0/2] serial: mtk: clock rate fixes
@ 2026-07-27 23:24 David Lechner
2026-07-27 23:24 ` [PATCH 1/2] serial: mtk: use ulong for clk_rate David Lechner
2026-07-27 23:24 ` [PATCH 2/2] serial: mtk: guard clk ops on clk.dev David Lechner
0 siblings, 2 replies; 5+ messages in thread
From: David Lechner @ 2026-07-27 23:24 UTC (permalink / raw)
To: Ryder Lee, Weijie Gao, Chunfeng Yun, Igor Belwon, Julien Stephan,
Carlo Caione, GSS_MTK_Uboot_upstream, Tom Rini, Simon Glass
Cc: u-boot, David Lechner, Suhrid Subramaniam
While working on SPL support, we noticed a few bugs in the MediaTek
serial driver related to clock rate handling. Here are the fixes.
Signed-off-by: David Lechner <dlechner@baylibre.com>
---
Suhrid Subramaniam (2):
serial: mtk: use ulong for clk_rate
serial: mtk: guard clk ops on clk.dev
drivers/serial/serial_mtk.c | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
---
base-commit: 5c215cb75c3723cbf77c36cbac3e60b001721c79
change-id: 20260727-serial-mtk-clock-fixes-266e61d2d917
Best regards,
--
David Lechner <dlechner@baylibre.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] serial: mtk: use ulong for clk_rate
2026-07-27 23:24 [PATCH 0/2] serial: mtk: clock rate fixes David Lechner
@ 2026-07-27 23:24 ` David Lechner
2026-07-28 15:57 ` Julien Stephan
2026-07-27 23:24 ` [PATCH 2/2] serial: mtk: guard clk ops on clk.dev David Lechner
1 sibling, 1 reply; 5+ messages in thread
From: David Lechner @ 2026-07-27 23:24 UTC (permalink / raw)
To: Ryder Lee, Weijie Gao, Chunfeng Yun, Igor Belwon, Julien Stephan,
Carlo Caione, GSS_MTK_Uboot_upstream, Tom Rini, Simon Glass
Cc: u-boot, David Lechner, Suhrid Subramaniam
From: Suhrid Subramaniam <suhrid.subramaniam@mediatek.com>
Use ulong for return value of clk_get_rate() in the MediaTek serial
driver.
IS_ERR_VALUE() does a signed 64-bit comparison against the range of
possible error codes. If clk_get_rate() returns an error, assigning this
to a u32 truncates the top 32 bits making the value smaller, defeating
IS_ERR_VALUE() and producing a garbage divisor that hangs the UART.
Fixes: 3b17f2e2c2a9 ("serial: mtk: add support for using dynamic baud clock souce")
Signed-off-by: Suhrid Subramaniam <suhrid.subramaniam@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
---
drivers/serial/serial_mtk.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c
index 01cc415efdd..64b3287f8eb 100644
--- a/drivers/serial/serial_mtk.c
+++ b/drivers/serial/serial_mtk.c
@@ -213,7 +213,7 @@ static int _mtk_serial_pending(struct mtk_serial_priv *priv, bool input)
static int mtk_serial_setbrg(struct udevice *dev, int baudrate)
{
struct mtk_serial_priv *priv = dev_get_priv(dev);
- u32 clk_rate;
+ ulong clk_rate;
clk_rate = clk_get_rate(&priv->clk);
if (IS_ERR_VALUE(clk_rate) || clk_rate == 0)
@@ -266,6 +266,7 @@ static int mtk_serial_of_to_plat(struct udevice *dev)
{
struct mtk_serial_priv *priv = dev_get_priv(dev);
fdt_addr_t addr;
+ ulong clk_rate;
int err;
addr = dev_read_addr(dev);
@@ -282,10 +283,10 @@ static int mtk_serial_of_to_plat(struct udevice *dev)
return -EINVAL;
}
} else {
- err = clk_get_rate(&priv->clk);
- if (IS_ERR_VALUE(err)) {
+ clk_rate = clk_get_rate(&priv->clk);
+ if (IS_ERR_VALUE(clk_rate)) {
dev_err(dev, "invalid baud clock\n");
- return -EINVAL;
+ return (int)clk_rate;
}
}
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] serial: mtk: guard clk ops on clk.dev
2026-07-27 23:24 [PATCH 0/2] serial: mtk: clock rate fixes David Lechner
2026-07-27 23:24 ` [PATCH 1/2] serial: mtk: use ulong for clk_rate David Lechner
@ 2026-07-27 23:24 ` David Lechner
1 sibling, 0 replies; 5+ messages in thread
From: David Lechner @ 2026-07-27 23:24 UTC (permalink / raw)
To: Ryder Lee, Weijie Gao, Chunfeng Yun, Igor Belwon, Julien Stephan,
Carlo Caione, GSS_MTK_Uboot_upstream, Tom Rini, Simon Glass
Cc: u-boot, David Lechner, Suhrid Subramaniam
From: Suhrid Subramaniam <suhrid.subramaniam@mediatek.com>
Check that priv->clk has been populated before trying to use it in the
MediaTek serial driver.
The clock is optional and may not be populated in all cases (in which
case it is expected that there was a fixed clock rate provided.)
Fixes: 3b17f2e2c2a9 ("serial: mtk: add support for using dynamic baud clock souce")
Signed-off-by: Suhrid Subramaniam <suhrid.subramaniam@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
---
drivers/serial/serial_mtk.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c
index 64b3287f8eb..be09100fe7c 100644
--- a/drivers/serial/serial_mtk.c
+++ b/drivers/serial/serial_mtk.c
@@ -215,9 +215,13 @@ static int mtk_serial_setbrg(struct udevice *dev, int baudrate)
struct mtk_serial_priv *priv = dev_get_priv(dev);
ulong clk_rate;
- clk_rate = clk_get_rate(&priv->clk);
- if (IS_ERR_VALUE(clk_rate) || clk_rate == 0)
+ if (priv->clk.dev) {
+ clk_rate = clk_get_rate(&priv->clk);
+ if (IS_ERR_VALUE(clk_rate) || clk_rate == 0)
+ return -EINVAL;
+ } else {
clk_rate = priv->fixed_clk_rate;
+ }
_mtk_serial_setbrg(priv, baudrate, clk_rate);
@@ -255,7 +259,8 @@ static int mtk_serial_probe(struct udevice *dev)
writel(UART_MCRVAL, &priv->regs->mcr);
writel(UART_FCRVAL, &priv->regs->fcr);
- clk_enable(&priv->clk);
+ if (priv->clk.dev)
+ clk_enable(&priv->clk);
if (priv->clk_bus.dev)
clk_enable(&priv->clk_bus);
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] serial: mtk: use ulong for clk_rate
2026-07-27 23:24 ` [PATCH 1/2] serial: mtk: use ulong for clk_rate David Lechner
@ 2026-07-28 15:57 ` Julien Stephan
2026-07-28 16:04 ` David Lechner
0 siblings, 1 reply; 5+ messages in thread
From: Julien Stephan @ 2026-07-28 15:57 UTC (permalink / raw)
To: David Lechner
Cc: Ryder Lee, Weijie Gao, Chunfeng Yun, Igor Belwon, Carlo Caione,
GSS_MTK_Uboot_upstream, Tom Rini, Simon Glass, u-boot,
Suhrid Subramaniam
Le mar. 28 juil. 2026 à 01:25, David Lechner <dlechner@baylibre.com> a écrit :
>
> From: Suhrid Subramaniam <suhrid.subramaniam@mediatek.com>
>
> Use ulong for return value of clk_get_rate() in the MediaTek serial
> driver.
>
> IS_ERR_VALUE() does a signed 64-bit comparison against the range of
> possible error codes. If clk_get_rate() returns an error, assigning this
> to a u32 truncates the top 32 bits making the value smaller, defeating
> IS_ERR_VALUE() and producing a garbage divisor that hangs the UART.
>
> Fixes: 3b17f2e2c2a9 ("serial: mtk: add support for using dynamic baud clock souce")
> Signed-off-by: Suhrid Subramaniam <suhrid.subramaniam@mediatek.com>
> Signed-off-by: David Lechner <dlechner@baylibre.com>
> ---
> drivers/serial/serial_mtk.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c
> index 01cc415efdd..64b3287f8eb 100644
> --- a/drivers/serial/serial_mtk.c
> +++ b/drivers/serial/serial_mtk.c
> @@ -213,7 +213,7 @@ static int _mtk_serial_pending(struct mtk_serial_priv *priv, bool input)
> static int mtk_serial_setbrg(struct udevice *dev, int baudrate)
> {
> struct mtk_serial_priv *priv = dev_get_priv(dev);
> - u32 clk_rate;
> + ulong clk_rate;
>
> clk_rate = clk_get_rate(&priv->clk);
> if (IS_ERR_VALUE(clk_rate) || clk_rate == 0)
> @@ -266,6 +266,7 @@ static int mtk_serial_of_to_plat(struct udevice *dev)
> {
> struct mtk_serial_priv *priv = dev_get_priv(dev);
> fdt_addr_t addr;
> + ulong clk_rate;
> int err;
>
> addr = dev_read_addr(dev);
> @@ -282,10 +283,10 @@ static int mtk_serial_of_to_plat(struct udevice *dev)
> return -EINVAL;
> }
> } else {
> - err = clk_get_rate(&priv->clk);
> - if (IS_ERR_VALUE(err)) {
> + clk_rate = clk_get_rate(&priv->clk);
> + if (IS_ERR_VALUE(clk_rate)) {
> dev_err(dev, "invalid baud clock\n");
> - return -EINVAL;
> + return (int)clk_rate;
Hello David,
This is a functional changes, maybe deserves a separate patch?
Cheers
Julien
> }
> }
>
>
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] serial: mtk: use ulong for clk_rate
2026-07-28 15:57 ` Julien Stephan
@ 2026-07-28 16:04 ` David Lechner
0 siblings, 0 replies; 5+ messages in thread
From: David Lechner @ 2026-07-28 16:04 UTC (permalink / raw)
To: Julien Stephan
Cc: Ryder Lee, Weijie Gao, Chunfeng Yun, Igor Belwon, Carlo Caione,
GSS_MTK_Uboot_upstream, Tom Rini, Simon Glass, u-boot,
Suhrid Subramaniam
On 7/28/26 10:57 AM, Julien Stephan wrote:
> Le mar. 28 juil. 2026 à 01:25, David Lechner <dlechner@baylibre.com> a écrit :
>>
>> From: Suhrid Subramaniam <suhrid.subramaniam@mediatek.com>
>>
>> Use ulong for return value of clk_get_rate() in the MediaTek serial
>> driver.
>>
>> IS_ERR_VALUE() does a signed 64-bit comparison against the range of
>> possible error codes. If clk_get_rate() returns an error, assigning this
>> to a u32 truncates the top 32 bits making the value smaller, defeating
>> IS_ERR_VALUE() and producing a garbage divisor that hangs the UART.
>>
>> Fixes: 3b17f2e2c2a9 ("serial: mtk: add support for using dynamic baud clock souce")
>> Signed-off-by: Suhrid Subramaniam <suhrid.subramaniam@mediatek.com>
>> Signed-off-by: David Lechner <dlechner@baylibre.com>
>> ---
>> drivers/serial/serial_mtk.c | 9 +++++----
>> 1 file changed, 5 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c
>> index 01cc415efdd..64b3287f8eb 100644
>> --- a/drivers/serial/serial_mtk.c
>> +++ b/drivers/serial/serial_mtk.c
>> @@ -213,7 +213,7 @@ static int _mtk_serial_pending(struct mtk_serial_priv *priv, bool input)
>> static int mtk_serial_setbrg(struct udevice *dev, int baudrate)
>> {
>> struct mtk_serial_priv *priv = dev_get_priv(dev);
>> - u32 clk_rate;
>> + ulong clk_rate;
>>
>> clk_rate = clk_get_rate(&priv->clk);
>> if (IS_ERR_VALUE(clk_rate) || clk_rate == 0)
>> @@ -266,6 +266,7 @@ static int mtk_serial_of_to_plat(struct udevice *dev)
>> {
>> struct mtk_serial_priv *priv = dev_get_priv(dev);
>> fdt_addr_t addr;
>> + ulong clk_rate;
>> int err;
>>
>> addr = dev_read_addr(dev);
>> @@ -282,10 +283,10 @@ static int mtk_serial_of_to_plat(struct udevice *dev)
>> return -EINVAL;
>> }
>> } else {
>> - err = clk_get_rate(&priv->clk);
>> - if (IS_ERR_VALUE(err)) {
>> + clk_rate = clk_get_rate(&priv->clk);
>> + if (IS_ERR_VALUE(clk_rate)) {
>> dev_err(dev, "invalid baud clock\n");
>> - return -EINVAL;
>> + return (int)clk_rate;
>
> Hello David,
>
> This is a functional changes, maybe deserves a separate patch?
I checked all users and nothing check for specific return values.
Everything just logs the error or only cares about pass/fail. So
I don't consider it that significant of a change. Maybe I should
have mentioned it in the commit message though.
>
> Cheers
> Julien
>
>> }
>> }
>>
>>
>> --
>> 2.43.0
>>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-07-28 16:04 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2026-07-27 23:24 [PATCH 0/2] serial: mtk: clock rate fixes David Lechner
2026-07-27 23:24 ` [PATCH 1/2] serial: mtk: use ulong for clk_rate David Lechner
2026-07-28 15:57 ` Julien Stephan
2026-07-28 16:04 ` David Lechner
2026-07-27 23:24 ` [PATCH 2/2] serial: mtk: guard clk ops on clk.dev David Lechner
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