From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Conor.Dooley@microchip.com, jassisinghbrar@gmail.com,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org
Cc: Daire.McNamara@microchip.com, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: mailbox: fix the mpfs' reg property
Date: Mon, 8 Aug 2022 10:01:18 +0300 [thread overview]
Message-ID: <9a1f19f5-e17f-d8f6-8010-e399bdd6c6b9@linaro.org> (raw)
In-Reply-To: <04b697b5-d344-0191-f511-c0f8e0c247ef@microchip.com>
On 05/08/2022 15:01, Conor.Dooley@microchip.com wrote:
> On 05/08/2022 13:56, Conor Dooley wrote:
>> The "data" region of the PolarFire SoC's system controller mailbox is
>> not one continuous register space - the system controller's QSPI sits
>> between the control and data registers. Split the "data" reg into two
>> parts: "data" & "control".
>>
>> Fixes: 213556235526 ("dt-bindings: soc/microchip: update syscontroller compatibles")
>
> I omitted the second fixes tag:
> Fixes: ed9543d6f2c4 ("dt-bindings: add bindings for polarfire soc mailbox")
>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>> ---
>> .../bindings/mailbox/microchip,mpfs-mailbox.yaml | 15 +++++++++++----
>> 1 file changed, 11 insertions(+), 4 deletions(-)
>>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
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WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Conor.Dooley@microchip.com, jassisinghbrar@gmail.com,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org
Cc: Daire.McNamara@microchip.com, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: mailbox: fix the mpfs' reg property
Date: Mon, 8 Aug 2022 10:01:18 +0300 [thread overview]
Message-ID: <9a1f19f5-e17f-d8f6-8010-e399bdd6c6b9@linaro.org> (raw)
In-Reply-To: <04b697b5-d344-0191-f511-c0f8e0c247ef@microchip.com>
On 05/08/2022 15:01, Conor.Dooley@microchip.com wrote:
> On 05/08/2022 13:56, Conor Dooley wrote:
>> The "data" region of the PolarFire SoC's system controller mailbox is
>> not one continuous register space - the system controller's QSPI sits
>> between the control and data registers. Split the "data" reg into two
>> parts: "data" & "control".
>>
>> Fixes: 213556235526 ("dt-bindings: soc/microchip: update syscontroller compatibles")
>
> I omitted the second fixes tag:
> Fixes: ed9543d6f2c4 ("dt-bindings: add bindings for polarfire soc mailbox")
>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>> ---
>> .../bindings/mailbox/microchip,mpfs-mailbox.yaml | 15 +++++++++++----
>> 1 file changed, 11 insertions(+), 4 deletions(-)
>>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-08-08 7:01 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-05 12:56 [PATCH 0/3] MPFS mailbox fixes Conor Dooley
2022-08-05 12:56 ` Conor Dooley
2022-08-05 12:56 ` [PATCH 1/3] dt-bindings: mailbox: fix the mpfs' reg property Conor Dooley
2022-08-05 12:56 ` Conor Dooley
2022-08-05 13:01 ` Conor.Dooley
2022-08-05 13:01 ` Conor.Dooley
2022-08-08 7:01 ` Krzysztof Kozlowski [this message]
2022-08-08 7:01 ` Krzysztof Kozlowski
2022-08-05 12:56 ` [PATCH 2/3] mailbox: mpfs: fix handling of the " Conor Dooley
2022-08-05 12:56 ` Conor Dooley
2022-08-05 12:56 ` [PATCH 3/3] mailbox: mpfs: account for mbox offsets while sending Conor Dooley
2022-08-05 12:56 ` Conor Dooley
2022-08-23 18:41 ` [PATCH 0/3] MPFS mailbox fixes Conor.Dooley
2022-08-23 18:41 ` Conor.Dooley
2022-08-23 18:44 ` Jassi Brar
2022-08-23 18:44 ` Jassi Brar
2022-08-23 18:46 ` Conor.Dooley
2022-08-23 18:46 ` Conor.Dooley
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