From: Lucas Tanure <tanure@linux.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: xianwei.zhao@amlogic.com, Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 8/8] dt-bindings: net: ethernet-controller: tabulate who adds the RGMII delays
Date: Thu, 22 Oct 2026 18:48:43 +0100 [thread overview]
Message-ID: <9b5fe9c2-aca1-4460-81fa-826e05e88c1a@linux.com> (raw)
In-Reply-To: <CAFBinCB8203vL6YK3+V2zDhz=qqeAwJoufPM60cD0Vz3s-OS6g@mail.gmail.com>
On 10/10/2026 23:37, Martin Blumenstingl wrote:
> Hi Andrew, Hi Lucas,
>
> On Sat, Oct 10, 2026 at 12:59 PM Lucas Tanure <tanure@linux.com> wrote:
> [...]
>> +# phy-mode tx-internal-delay-ps rx-internal-delay-ps TX delay RX delay
>> +# rgmii - - PCB trace PCB trace
>> +# rgmii-id - - PHY PHY
>> +# rgmii-id present - MAC PHY
>> +# rgmii-id - present PHY MAC
>> +# rgmii-id present present MAC MAC
>> +# rgmii-txid - - PHY PCB trace
>> +# rgmii-txid present - MAC PCB trace
>> +# rgmii-rxid - - PCB trace PHY
>> +# rgmii-rxid - present PCB trace MAC
> We have some boards where the PCB traces result in part (1200ps) of
> the delay needed for RGMII (2000ps).
> The remainder (800ps) has to be added by either PHY or MAC: the
> (RTL8211F) PHY can only generate 0 or 2000ps delay so the MAC has to
> take over.
> For the three boards I have in mind, please see $ git grep
> rx-internal-delay-ps arch/arm64/boot/dts/amlogic/
>
>> +# A property for a clock the PCB already delays is not in this table.
> Can you please explain this sentence (I'm not a native English speaker)?
> How I interpret the sentence: The PCB may add delays but those are
> implicit and not part of the {rx,tx}-internal-delay-ps properties. If
> the delays added by the PCB don't cover the full 2ns requirement then
> either MAC or PHY need to add the remainder, see fine-tuning below.
>
>> +# It is either the fine tuning described next, or a mistake the MAC
>> +# should report as a fatal error.
> How can I differentiate between "fine tuning" and "mistake"?
>
>
> Best regards,
> Martin
The patch is wrong. It assumes a present property moves the 2ns from
the PHY to the MAC, and Andrew's reply on patch 4 says it does not.
I am dropping it in v4.
thanks
Lucas
WARNING: multiple messages have this Message-ID (diff)
From: Lucas Tanure <tanure@linux.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: xianwei.zhao@amlogic.com, Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 8/8] dt-bindings: net: ethernet-controller: tabulate who adds the RGMII delays
Date: Thu, 22 Oct 2026 18:48:43 +0100 [thread overview]
Message-ID: <9b5fe9c2-aca1-4460-81fa-826e05e88c1a@linux.com> (raw)
In-Reply-To: <CAFBinCB8203vL6YK3+V2zDhz=qqeAwJoufPM60cD0Vz3s-OS6g@mail.gmail.com>
On 10/10/2026 23:37, Martin Blumenstingl wrote:
> Hi Andrew, Hi Lucas,
>
> On Sat, Oct 10, 2026 at 12:59 PM Lucas Tanure <tanure@linux.com> wrote:
> [...]
>> +# phy-mode tx-internal-delay-ps rx-internal-delay-ps TX delay RX delay
>> +# rgmii - - PCB trace PCB trace
>> +# rgmii-id - - PHY PHY
>> +# rgmii-id present - MAC PHY
>> +# rgmii-id - present PHY MAC
>> +# rgmii-id present present MAC MAC
>> +# rgmii-txid - - PHY PCB trace
>> +# rgmii-txid present - MAC PCB trace
>> +# rgmii-rxid - - PCB trace PHY
>> +# rgmii-rxid - present PCB trace MAC
> We have some boards where the PCB traces result in part (1200ps) of
> the delay needed for RGMII (2000ps).
> The remainder (800ps) has to be added by either PHY or MAC: the
> (RTL8211F) PHY can only generate 0 or 2000ps delay so the MAC has to
> take over.
> For the three boards I have in mind, please see $ git grep
> rx-internal-delay-ps arch/arm64/boot/dts/amlogic/
>
>> +# A property for a clock the PCB already delays is not in this table.
> Can you please explain this sentence (I'm not a native English speaker)?
> How I interpret the sentence: The PCB may add delays but those are
> implicit and not part of the {rx,tx}-internal-delay-ps properties. If
> the delays added by the PCB don't cover the full 2ns requirement then
> either MAC or PHY need to add the remainder, see fine-tuning below.
>
>> +# It is either the fine tuning described next, or a mistake the MAC
>> +# should report as a fatal error.
> How can I differentiate between "fine tuning" and "mistake"?
>
>
> Best regards,
> Martin
The patch is wrong. It assumes a present property moves the 2ns from
the PHY to the MAC, and Andrew's reply on patch 4 says it does not.
I am dropping it in v4.
thanks
Lucas
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next prev parent reply other threads:[~2026-10-22 17:48 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-10 10:58 [PATCH v3 0/8] Add ethernet support for the Amlogic T7 Lucas Tanure
2026-10-10 10:58 ` Lucas Tanure
2026-10-10 10:58 ` [PATCH v3 1/8] dt-bindings: net: amlogic,meson-dwmac: list the compatible combinations Lucas Tanure
2026-10-10 10:58 ` Lucas Tanure
2026-10-10 22:04 ` Martin Blumenstingl
2026-10-10 22:04 ` Martin Blumenstingl
2026-10-11 14:16 ` Lucas Tanure
2026-10-11 14:16 ` Lucas Tanure
2026-10-11 21:13 ` Conor Dooley
2026-10-11 21:13 ` Conor Dooley
2026-10-22 17:11 ` Lucas Tanure
2026-10-22 17:11 ` Lucas Tanure
2026-10-10 10:58 ` [PATCH v3 2/8] dt-bindings: net: amlogic,meson-dwmac: add amlogic,t7-dwmac Lucas Tanure
2026-10-10 10:58 ` Lucas Tanure
2026-10-10 22:14 ` Martin Blumenstingl
2026-10-10 22:14 ` Martin Blumenstingl
2026-10-11 14:21 ` Lucas Tanure
2026-10-11 14:21 ` Lucas Tanure
2026-10-10 10:58 ` [PATCH v3 3/8] net: stmmac: dwmac-meson8b: add support for the Amlogic T7 Lucas Tanure
2026-10-10 10:58 ` Lucas Tanure
2026-10-10 22:40 ` Martin Blumenstingl
2026-10-10 22:40 ` Martin Blumenstingl
2026-10-10 10:58 ` [PATCH v3 4/8] net: stmmac: dwmac-meson8b: apply the RGMII delays the T7 way Lucas Tanure
2026-10-10 10:58 ` Lucas Tanure
2026-10-10 21:49 ` Martin Blumenstingl
2026-10-10 21:49 ` Martin Blumenstingl
2026-10-22 17:28 ` Lucas Tanure
2026-10-22 17:28 ` Lucas Tanure
2026-10-12 12:30 ` Andrew Lunn
2026-10-12 12:30 ` Andrew Lunn
2026-10-22 17:37 ` Lucas Tanure
2026-10-22 17:37 ` Lucas Tanure
2026-10-10 10:58 ` [PATCH v3 5/8] arm64: dts: amlogic: t7: add the ethernet pinctrl nodes Lucas Tanure
2026-10-10 10:58 ` Lucas Tanure
2026-10-10 10:58 ` [PATCH v3 6/8] arm64: dts: amlogic: t7: add the ethernet controller Lucas Tanure
2026-10-10 10:58 ` Lucas Tanure
2026-10-10 10:58 ` [PATCH v3 7/8] arm64: dts: amlogic: t7: khadas-vim4: enable the ethernet port Lucas Tanure
2026-10-10 10:58 ` Lucas Tanure
2026-10-10 22:00 ` Martin Blumenstingl
2026-10-10 22:00 ` Martin Blumenstingl
2026-10-22 17:40 ` Lucas Tanure
2026-10-22 17:40 ` Lucas Tanure
2026-10-10 10:59 ` [PATCH v3 8/8] dt-bindings: net: ethernet-controller: tabulate who adds the RGMII delays Lucas Tanure
2026-10-10 10:59 ` Lucas Tanure
2026-10-10 22:37 ` Martin Blumenstingl
2026-10-10 22:37 ` Martin Blumenstingl
2026-10-22 17:48 ` Lucas Tanure [this message]
2026-10-22 17:48 ` Lucas Tanure
2026-10-12 19:18 ` Conor Dooley
2026-10-12 19:18 ` Conor Dooley
2026-10-22 17:49 ` Lucas Tanure
2026-10-22 17:49 ` Lucas Tanure
2026-10-13 7:14 ` Jerome Brunet
2026-10-13 7:14 ` Jerome Brunet
2026-10-22 17:50 ` Lucas Tanure
2026-10-22 17:50 ` Lucas Tanure
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