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From: Tony Nguyen <anthony.l.nguyen@intel.com>
To: Ross Lagerwall <ross.lagerwall@citrix.com>, <netdev@vger.kernel.org>
Cc: Javi Merino <javi.merino@kernel.org>, intel-wired-lan@lists.osuosl.org
Subject: Re: [Intel-wired-lan] [PATCH v2] ice: Fix enabling SR-IOV with Xen
Date: Mon, 6 May 2024 14:27:14 -0700	[thread overview]
Message-ID: <9d359843-e7a6-d2bc-cc7c-e7133ba3662e@intel.com> (raw)
In-Reply-To: <20240429124922.2872002-1-ross.lagerwall@citrix.com>



On 4/29/2024 5:49 AM, Ross Lagerwall wrote:
> When the PCI functions are created, Xen is informed about them and
> caches the number of MSI-X entries each function has.  However, the
> number of MSI-X entries is not set until after the hardware has been
> configured and the VFs have been started. This prevents
> PCI-passthrough from working because Xen rejects mapping MSI-X
> interrupts to domains because it thinks the MSI-X interrupts don't
> exist.
> 
> Fix this by moving the call to pci_enable_sriov() later so that the
> number of MSI-X entries is set correctly in hardware by the time Xen
> reads it.
> 

Sorry, I missed this on initial review, but bug fixes should have a 
Fixes: tag

I assume you are targeting this for net, if so, can you mark it as 
'PATCH iwl-net'.

> Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com>
> Signed-off-by: Javi Merino <javi.merino@kernel.org>

Also, sender should be the last sign-off.

Thanks,
Tony

WARNING: multiple messages have this Message-ID (diff)
From: Tony Nguyen <anthony.l.nguyen@intel.com>
To: Ross Lagerwall <ross.lagerwall@citrix.com>, <netdev@vger.kernel.org>
Cc: <intel-wired-lan@lists.osuosl.org>,
	Jesse Brandeburg <jesse.brandeburg@intel.com>,
	Javi Merino <javi.merino@kernel.org>
Subject: Re: [PATCH v2] ice: Fix enabling SR-IOV with Xen
Date: Mon, 6 May 2024 14:27:14 -0700	[thread overview]
Message-ID: <9d359843-e7a6-d2bc-cc7c-e7133ba3662e@intel.com> (raw)
In-Reply-To: <20240429124922.2872002-1-ross.lagerwall@citrix.com>



On 4/29/2024 5:49 AM, Ross Lagerwall wrote:
> When the PCI functions are created, Xen is informed about them and
> caches the number of MSI-X entries each function has.  However, the
> number of MSI-X entries is not set until after the hardware has been
> configured and the VFs have been started. This prevents
> PCI-passthrough from working because Xen rejects mapping MSI-X
> interrupts to domains because it thinks the MSI-X interrupts don't
> exist.
> 
> Fix this by moving the call to pci_enable_sriov() later so that the
> number of MSI-X entries is set correctly in hardware by the time Xen
> reads it.
> 

Sorry, I missed this on initial review, but bug fixes should have a 
Fixes: tag

I assume you are targeting this for net, if so, can you mark it as 
'PATCH iwl-net'.

> Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com>
> Signed-off-by: Javi Merino <javi.merino@kernel.org>

Also, sender should be the last sign-off.

Thanks,
Tony

  parent reply	other threads:[~2024-05-06 21:27 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-29 12:49 [Intel-wired-lan] [PATCH v2] ice: Fix enabling SR-IOV with Xen Ross Lagerwall
2024-04-29 12:49 ` Ross Lagerwall
2024-04-29 13:04 ` [Intel-wired-lan] " Paul Menzel
2024-04-29 13:04   ` Paul Menzel
2024-04-30  9:03   ` Ross Lagerwall
2024-04-30  9:03     ` Ross Lagerwall
2024-05-08  9:23     ` Sergey Temerkhanov
2024-05-08  9:23       ` Sergey Temerkhanov
2024-05-06 21:27 ` Tony Nguyen [this message]
2024-05-06 21:27   ` Tony Nguyen

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