From: Jarkko Nikula <jarkko.nikula@linux.intel.com>
To: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Sanket.Goswami@amd.com, linux-i3c@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/6] i3c: dw: Use IRQF_SHARED flag for dw-i3c-master
Date: Mon, 4 Nov 2024 16:34:22 +0200 [thread overview]
Message-ID: <9eb7c88a-c448-45cc-aeaa-88ab59cdadc5@linux.intel.com> (raw)
In-Reply-To: <20241023055118.1400286-3-Shyam-sundar.S-k@amd.com>
On 10/23/24 8:51 AM, Shyam Sundar S K wrote:
> On AMD platforms, the IRQ lines are shared between two instances of I3C.
> Add IRQF_SHARED flag during the interrupt registration process.
>
> Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
> ---
> drivers/i3c/master/dw-i3c-master.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
> index 1a7c300b6d45..fd58a95ae1c3 100644
> --- a/drivers/i3c/master/dw-i3c-master.c
> +++ b/drivers/i3c/master/dw-i3c-master.c
> @@ -1578,7 +1578,7 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
> writel(INTR_ALL, master->regs + INTR_STATUS);
> irq = platform_get_irq(pdev, 0);
> ret = devm_request_irq(&pdev->dev, irq,
> - dw_i3c_master_irq_handler, 0,
> + dw_i3c_master_irq_handler, IRQF_SHARED,
> dev_name(&pdev->dev), master);
dw_i3c_master_irq_handler() seems to be otherwise ready for shared
interrupts but reminded me it might have a similar issue than
drivers/i2c/busses/i2c-designware-master.c had [1] because both are
runtime PM managed.
To me it looks dw_i3c_master_irq_handler() may incorrectly process
interrupt from other device if register reads return all bits one when
device is suspended. Worth to check.
1. Commit cdbd2f169bf1 ("i2c: designware: Do not process interrupt when
device is suspended")
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WARNING: multiple messages have this Message-ID (diff)
From: Jarkko Nikula <jarkko.nikula@linux.intel.com>
To: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Sanket.Goswami@amd.com, linux-i3c@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/6] i3c: dw: Use IRQF_SHARED flag for dw-i3c-master
Date: Mon, 4 Nov 2024 16:34:22 +0200 [thread overview]
Message-ID: <9eb7c88a-c448-45cc-aeaa-88ab59cdadc5@linux.intel.com> (raw)
In-Reply-To: <20241023055118.1400286-3-Shyam-sundar.S-k@amd.com>
On 10/23/24 8:51 AM, Shyam Sundar S K wrote:
> On AMD platforms, the IRQ lines are shared between two instances of I3C.
> Add IRQF_SHARED flag during the interrupt registration process.
>
> Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
> ---
> drivers/i3c/master/dw-i3c-master.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
> index 1a7c300b6d45..fd58a95ae1c3 100644
> --- a/drivers/i3c/master/dw-i3c-master.c
> +++ b/drivers/i3c/master/dw-i3c-master.c
> @@ -1578,7 +1578,7 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
> writel(INTR_ALL, master->regs + INTR_STATUS);
> irq = platform_get_irq(pdev, 0);
> ret = devm_request_irq(&pdev->dev, irq,
> - dw_i3c_master_irq_handler, 0,
> + dw_i3c_master_irq_handler, IRQF_SHARED,
> dev_name(&pdev->dev), master);
dw_i3c_master_irq_handler() seems to be otherwise ready for shared
interrupts but reminded me it might have a similar issue than
drivers/i2c/busses/i2c-designware-master.c had [1] because both are
runtime PM managed.
To me it looks dw_i3c_master_irq_handler() may incorrectly process
interrupt from other device if register reads return all bits one when
device is suspended. Worth to check.
1. Commit cdbd2f169bf1 ("i2c: designware: Do not process interrupt when
device is suspended")
next prev parent reply other threads:[~2024-11-04 14:54 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-23 5:51 [PATCH v2 0/6] Introduce initial support for the AMD I3C (non-HCI) to DW driver Shyam Sundar S K
2024-10-23 5:51 ` Shyam Sundar S K
2024-10-23 5:51 ` [PATCH v2 1/6] i3c: dw: Add support for AMDI0015 ACPI ID Shyam Sundar S K
2024-10-23 5:51 ` Shyam Sundar S K
2024-10-23 5:51 ` [PATCH v2 2/6] i3c: dw: Use IRQF_SHARED flag for dw-i3c-master Shyam Sundar S K
2024-10-23 5:51 ` Shyam Sundar S K
2024-11-04 14:34 ` Jarkko Nikula [this message]
2024-11-04 14:34 ` Jarkko Nikula
2024-11-06 13:13 ` Shyam Sundar S K
2024-11-06 13:13 ` Shyam Sundar S K
2024-10-23 5:51 ` [PATCH v2 3/6] i3c: master: Add ACPI support to i3c subsystem Shyam Sundar S K
2024-10-23 5:51 ` Shyam Sundar S K
2024-11-04 14:06 ` Jarkko Nikula
2024-11-04 14:06 ` Jarkko Nikula
2024-11-06 14:14 ` Shyam Sundar S K
2024-11-06 14:14 ` Shyam Sundar S K
2024-10-23 5:51 ` [PATCH v2 4/6] i3c: master: Add a routine to include the I3C SPD device Shyam Sundar S K
2024-10-23 5:51 ` Shyam Sundar S K
2024-10-23 5:51 ` [PATCH v2 5/6] i3c: master: Add support for SETAASA CCC Shyam Sundar S K
2024-10-23 5:51 ` Shyam Sundar S K
2024-11-04 15:00 ` Jarkko Nikula
2024-11-04 15:00 ` Jarkko Nikula
2024-11-06 14:17 ` Shyam Sundar S K
2024-11-06 14:17 ` Shyam Sundar S K
2024-10-23 5:51 ` [PATCH v2 6/6] i3c: dw: Add quirk to address OD/PP timing issue on AMD platform Shyam Sundar S K
2024-10-23 5:51 ` Shyam Sundar S K
2024-10-29 15:15 ` [PATCH v2 0/6] Introduce initial support for the AMD I3C (non-HCI) to DW driver Shyam Sundar S K
2024-10-29 15:15 ` Shyam Sundar S K
2024-11-04 13:37 ` Jarkko Nikula
2024-11-04 13:37 ` Jarkko Nikula
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