* [PATCH V5 3/4] ARM: Xilinx: base header files and assembly macros
From: John Linn @ 2011-02-28 21:51 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux, catalin.marinas, glikely,
jamie, arnd
Cc: John Linn
In-Reply-To: <1298929919-510-3-git-send-email-john.linn@xilinx.com>
These are the minimum needed to build the kernel for the new platform.
Signed-off-by: John Linn <john.linn@xilinx.com>
---
V5 Changes
Minor cleanup based on input from Russell King (uncompress.h.).
Minor cleanup based on input from Jamie Iles (uncompress.h.).
Moved to minimal dependencies on CLOCK_TICK_RATE based on input
from Arnd.
V4 Changes
Cleanup based on input from Jamie Iles.
Moved to PLAT_PHYS_OFFSET.
Remove headers file inclusions that weren't needed.
Added use of raw_readl/raw_writel in uncompressor uart code.
Added cpu_relax() in the uncompressor uart code.
V3 Changes
Updates based on Russell Kings' comments
Changed headers to update the license info and remove
the address
Updated the constant to use UL in vmalloc.h
V2 Changes
Updates based on Russell King's comments
moved to using entry-macro-gic.S
moved stuff from hardware.h to xilinx_soc.h
added IOMEM() in io.h to help with typing
Minor updates to IO_SPACE_LIMIT and __io()
Updated addresses to be clear with seperate virtual
and physical addresses
arch/arm/mach-xilinx/include/mach/clkdev.h | 33 +++++++++++++++
arch/arm/mach-xilinx/include/mach/debug-macro.S | 36 ++++++++++++++++
arch/arm/mach-xilinx/include/mach/entry-macro.S | 30 +++++++++++++
arch/arm/mach-xilinx/include/mach/hardware.h | 18 ++++++++
arch/arm/mach-xilinx/include/mach/io.h | 33 +++++++++++++++
arch/arm/mach-xilinx/include/mach/irqs.h | 29 +++++++++++++
arch/arm/mach-xilinx/include/mach/memory.h | 23 ++++++++++
arch/arm/mach-xilinx/include/mach/system.h | 28 ++++++++++++
arch/arm/mach-xilinx/include/mach/timex.h | 23 ++++++++++
arch/arm/mach-xilinx/include/mach/uart.h | 25 +++++++++++
arch/arm/mach-xilinx/include/mach/uncompress.h | 51 +++++++++++++++++++++++
arch/arm/mach-xilinx/include/mach/vmalloc.h | 20 +++++++++
arch/arm/mach-xilinx/include/mach/xilinx_soc.h | 48 +++++++++++++++++++++
13 files changed, 397 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-xilinx/include/mach/clkdev.h
create mode 100644 arch/arm/mach-xilinx/include/mach/debug-macro.S
create mode 100644 arch/arm/mach-xilinx/include/mach/entry-macro.S
create mode 100644 arch/arm/mach-xilinx/include/mach/hardware.h
create mode 100644 arch/arm/mach-xilinx/include/mach/io.h
create mode 100644 arch/arm/mach-xilinx/include/mach/irqs.h
create mode 100644 arch/arm/mach-xilinx/include/mach/memory.h
create mode 100644 arch/arm/mach-xilinx/include/mach/system.h
create mode 100644 arch/arm/mach-xilinx/include/mach/timex.h
create mode 100644 arch/arm/mach-xilinx/include/mach/uart.h
create mode 100644 arch/arm/mach-xilinx/include/mach/uncompress.h
create mode 100644 arch/arm/mach-xilinx/include/mach/vmalloc.h
create mode 100644 arch/arm/mach-xilinx/include/mach/xilinx_soc.h
diff --git a/arch/arm/mach-xilinx/include/mach/clkdev.h b/arch/arm/mach-xilinx/include/mach/clkdev.h
new file mode 100644
index 0000000..5dd1453
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/clkdev.h
@@ -0,0 +1,33 @@
+/*
+ * arch/arm/mach-xilinx/include/mach/clkdev.h
+ *
+ * Copyright (C) 2011 Xilinx, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_CLKDEV_H__
+#define __MACH_CLKDEV_H__
+
+struct clk {
+ unsigned long rate;
+};
+
+static inline int __clk_get(struct clk *clk)
+{
+ return 1;
+}
+
+static inline void __clk_put(struct clk *clk)
+{
+}
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/debug-macro.S b/arch/arm/mach-xilinx/include/mach/debug-macro.S
new file mode 100644
index 0000000..30d3d3d
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/debug-macro.S
@@ -0,0 +1,36 @@
+/* arch/arm/mach-xilinx/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <mach/xilinx_soc.h>
+#include <mach/uart.h>
+
+ .macro addruart, rp, rv
+ ldr \rp, =LL_UART_PADDR @ physical
+ ldr \rv, =LL_UART_VADDR @ virtual
+ .endm
+
+ .macro senduart,rd,rx
+ str \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA
+ .endm
+
+ .macro waituart,rd,rx
+ .endm
+
+ .macro busyuart,rd,rx
+1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register
+ tst \rd, #UART_SR_TXFULL @
+ bne 1002b @ wait if FIFO is full
+ .endm
diff --git a/arch/arm/mach-xilinx/include/mach/entry-macro.S b/arch/arm/mach-xilinx/include/mach/entry-macro.S
new file mode 100644
index 0000000..11a2866
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/entry-macro.S
@@ -0,0 +1,30 @@
+/*
+ * arch/arm/mach-xilinx/include/mach/entry-macro.S
+ *
+ * Low-level IRQ helper macros
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * based on arch/plat-mxc/include/mach/entry-macro.S
+ *
+ * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <mach/hardware.h>
+#include <asm/hardware/entry-macro-gic.S>
+
+ .macro disable_fiq
+ .endm
+
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
diff --git a/arch/arm/mach-xilinx/include/mach/hardware.h b/arch/arm/mach-xilinx/include/mach/hardware.h
new file mode 100644
index 0000000..f9685c4
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/hardware.h
@@ -0,0 +1,18 @@
+/* arch/arm/mach-xilinx/include/mach/hardware.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_HARDWARE_H__
+#define __MACH_HARDWARE_H__
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/io.h b/arch/arm/mach-xilinx/include/mach/io.h
new file mode 100644
index 0000000..ef69e65
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/io.h
@@ -0,0 +1,33 @@
+/* arch/arm/mach-xilinx/include/mach/io.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_IO_H__
+#define __MACH_IO_H__
+
+/* Allow IO space to be anywhere in the memory */
+
+#define IO_SPACE_LIMIT 0xffff
+
+/* IO address mapping macros, nothing special at this time but required */
+
+#ifdef __ASSEMBLER__
+#define IOMEM(x) (x)
+#else
+#define IOMEM(x) ((void __force __iomem *)(x))
+#endif
+
+#define __io(a) __typesafe_io(a)
+#define __mem_pci(a) (a)
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/irqs.h b/arch/arm/mach-xilinx/include/mach/irqs.h
new file mode 100644
index 0000000..47a8162
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/irqs.h
@@ -0,0 +1,29 @@
+/* arch/arm/mach-xilinx/include/mach/irqs.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_IRQS_H
+#define __MACH_IRQS_H
+
+#define ARCH_NR_GPIOS 118
+#define NR_IRQS (128 + ARCH_NR_GPIOS)
+
+/*
+ * GIC Interrupts
+ */
+
+#define IRQ_GIC_SPI_START 32
+#define IRQ_TIMERCOUNTER0 42
+#define IRQ_UART0 59
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/memory.h b/arch/arm/mach-xilinx/include/mach/memory.h
new file mode 100644
index 0000000..b683b0e
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/memory.h
@@ -0,0 +1,23 @@
+/* arch/arm/mach-xilinx/include/mach/memory.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_MEMORY_H__
+#define __MACH_MEMORY_H__
+
+#include <asm/sizes.h>
+
+#define PLAT_PHYS_OFFSET UL(0x0)
+#define MEM_SIZE SZ_256M
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/system.h b/arch/arm/mach-xilinx/include/mach/system.h
new file mode 100644
index 0000000..e8514a0
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/system.h
@@ -0,0 +1,28 @@
+/* arch/arm/mach-xilinx/include/mach/system.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_SYSTEM_H__
+#define __MACH_SYSTEM_H__
+
+static inline void arch_idle(void)
+{
+ cpu_do_idle();
+}
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+ /* Add architecture specific reset processing here */
+}
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/timex.h b/arch/arm/mach-xilinx/include/mach/timex.h
new file mode 100644
index 0000000..e82e653
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/timex.h
@@ -0,0 +1,23 @@
+/* arch/arm/mach-xilinx/include/mach/timex.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_TIMEX_H__
+#define __MACH_TIMEX_H__
+
+/* the following is needed for the system to build but will be removed
+ in the future, the value is not important but won't hurt
+*/
+#define CLOCK_TICK_RATE (100 * HZ)
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/uart.h b/arch/arm/mach-xilinx/include/mach/uart.h
new file mode 100644
index 0000000..7fca361
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/uart.h
@@ -0,0 +1,25 @@
+/* arch/arm/mach-xilinx/include/mach/uart.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_UART_H__
+#define __MACH_UART_H__
+
+#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */
+#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */
+#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */
+
+#define UART_SR_TXFULL 0x00000010 /* TX FIFO full */
+#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/uncompress.h b/arch/arm/mach-xilinx/include/mach/uncompress.h
new file mode 100644
index 0000000..ef7dd81
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/uncompress.h
@@ -0,0 +1,51 @@
+/* arch/arm/mach-xilinx/include/mach/uncompress.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_UNCOMPRESS_H__
+#define __MACH_UNCOMPRESS_H__
+
+#include <linux/io.h>
+#include <asm/processor.h>
+#include <mach/xilinx_soc.h>
+#include <mach/uart.h>
+
+void arch_decomp_setup(void)
+{
+}
+
+static inline void flush(void)
+{
+ /*
+ * Wait while the FIFO is not empty
+ */
+ while (!(__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
+ UART_SR_TXEMPTY))
+ cpu_relax();
+}
+
+#define arch_decomp_wdog()
+
+static void putc(char ch)
+{
+ /*
+ * Wait for room in the FIFO, then write the char into the FIFO
+ */
+ while (__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
+ UART_SR_TXFULL)
+ cpu_relax();
+
+ __raw_writel(ch, IOMEM(LL_UART_PADDR + UART_FIFO_OFFSET));
+}
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/vmalloc.h b/arch/arm/mach-xilinx/include/mach/vmalloc.h
new file mode 100644
index 0000000..aba20a3
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/vmalloc.h
@@ -0,0 +1,20 @@
+/* arch/arm/mach-xilinx/include/mach/vmalloc.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_VMALLOC_H__
+#define __MACH_VMALLOC_H__
+
+#define VMALLOC_END 0xE0000000UL
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/xilinx_soc.h b/arch/arm/mach-xilinx/include/mach/xilinx_soc.h
new file mode 100644
index 0000000..d181c5c
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/xilinx_soc.h
@@ -0,0 +1,48 @@
+/* arch/arm/mach-xilinx/include/mach/xilinx_soc.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_XILINX_SOC_H__
+#define __MACH_XILINX_SOC_H__
+
+#define PERIPHERAL_CLOCK_RATE 2500000
+
+/* For now, all mappings are flat (physical = virtual)
+ */
+#define UART0_PHYS 0xE0000000
+#define UART0_VIRT UART0_PHYS
+
+#define TTC0_PHYS 0xF8001000
+#define TTC0_VIRT TTC0_PHYS
+
+#define PL310_L2CC_PHYS 0xF8F02000
+#define PL310_L2CC_VIRT PL310_L2CC_PHYS
+
+#define SCU_PERIPH_PHYS 0xF8F00000
+#define SCU_PERIPH_VIRT SCU_PERIPH_PHYS
+
+/* The following are intended for the devices that are mapped early */
+
+#define TTC0_BASE IOMEM(TTC0_VIRT)
+#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
+#define SCU_GIC_CPU_BASE (SCU_PERIPH_BASE + 0x100)
+#define SCU_GIC_DIST_BASE (SCU_PERIPH_BASE + 0x1000)
+#define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT)
+
+/*
+ * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical
+ */
+#define LL_UART_PADDR UART0_PHYS
+#define LL_UART_VADDR UART0_VIRT
+
+#endif
--
1.6.2.1
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^ permalink raw reply related
* [PATCH V5 0/4] ARM: Basic Xilinx Support
From: John Linn @ 2011-02-28 21:51 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux, catalin.marinas, glikely,
jamie, arnd
V5
Minor cleanups based on feedback from Russell, Jamie
and Arnd. Nothing big.
This patch set was tested against a tree based on Linus's
current 2.6.38-rcX tree, then Russell's p2v-stable merged in.
Other than the update to mach-types that is missing for the
board, this should merge in easily in the next merge window
is my hope.
I'm making these patches available at git://git.xilinx.com in
linux-2.6-xlnx/arm-mainline.
V4
I incorporated more feedback from Jamie Iles. It was
primariy cleanup with the only significant change
being a move to using raw_read/write in the uncompressor
uart code.
The other changes were minor updates so that the patch
set applies to linux-next.
This patch set is now tested against the linux-next branch
from pub/scm/linux/kernel/git/sfr/linux-next.git.
V3
I incorporated more feedback from Russell King.
Primarily clean up of the license header to remove
the address.
Also minor cleanup of the Kconfig and Makefile for the board
to match the MACH_XILINX entry in the machine ID database.
These changes were tested on 2.6.38-rc4 and rc5.
V2
I incorporated review comments from Russell King and Jamie Iles.
Each patch has V2 comments describing the details. The order of
each patch in the series did change.
Thanks a lot to them for the detailed review as this patch set
is much cleaner and improved (I think anyway).
Thanks for comments from Arnd and Grant also.
This was tested against 2.6.38-rc4.
----
This patch series adds very basic support for the Xilinx ARM platform.
The entire patch set must be used, I only broke it up into logical
pieces to make the review easier (I hope).
I would like to get the review feedback and make any changes, but after
that I need to change mach-xilinx to the real product name. The real
product name is expected to be released by marketing very soon.
There's always the option of keeping mach-xilinx and then only
documenting the product name in the Kconfig. I'm less in favor of that
but it could be ok.
This code has been tested against 2.6.38-rc2, r3, and against head. The
only checkpatch warnings are about volatile in the uncompress.h file
and this method I used seems normal.
Thanks,
John
arch/arm/Kconfig | 14 +
arch/arm/Makefile | 1
arch/arm/mach-xilinx/Kconfig | 14 +
arch/arm/mach-xilinx/Makefile | 9
arch/arm/mach-xilinx/Makefile.boot | 3
arch/arm/mach-xilinx/board_ep107.c | 82 ++++++
arch/arm/mach-xilinx/common.c | 113 +++++++++
arch/arm/mach-xilinx/common.h | 31 ++
arch/arm/mach-xilinx/include/mach/clkdev.h | 33 ++
arch/arm/mach-xilinx/include/mach/debug-macro.S | 36 ++
arch/arm/mach-xilinx/include/mach/entry-macro.S | 30 ++
arch/arm/mach-xilinx/include/mach/hardware.h | 18 +
arch/arm/mach-xilinx/include/mach/io.h | 33 ++
arch/arm/mach-xilinx/include/mach/irqs.h | 29 ++
arch/arm/mach-xilinx/include/mach/memory.h | 23 +
arch/arm/mach-xilinx/include/mach/system.h | 28 ++
arch/arm/mach-xilinx/include/mach/timex.h | 22 +
arch/arm/mach-xilinx/include/mach/uart.h | 25 ++
arch/arm/mach-xilinx/include/mach/uncompress.h | 61 ++++
arch/arm/mach-xilinx/include/mach/vmalloc.h | 20 +
arch/arm/mach-xilinx/include/mach/xilinx_soc.h | 47 +++
arch/arm/mach-xilinx/timer.c | 293 +++++++++++++++++++++++-
arch/arm/mm/Kconfig | 3
23 files changed, 962 insertions(+), 6 deletions(-)
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^ permalink raw reply
* [PATCH V5 4/4] ARM: Xilinx: Adding Xilinx platform infrastructure support
From: John Linn @ 2011-02-28 21:51 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux, catalin.marinas, glikely,
jamie, arnd
Cc: John Linn
In-Reply-To: <1298929919-510-4-git-send-email-john.linn@xilinx.com>
Minimum infrastructure to add the Xilinx machine and allow it to
be selected in the build.
Signed-off-by: John Linn <john.linn@xilinx.com>
---
No updates for V5
V4
Updated to apply against linux-next branch.
No updates for V3
V2 Changes
Updates based on Russell King's comments
Cleanup of the Kconfig
Moved this patch to be last in the patch series
arch/arm/Kconfig | 13 +++++++++++++
arch/arm/Makefile | 1 +
arch/arm/mm/Kconfig | 2 +-
3 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5e15e6b..3983afa 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -891,6 +891,17 @@ config PLAT_SPEAR
help
Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
+config ARCH_XILINX
+ bool "Xilinx ARM Cortex A9 Platform"
+ select CPU_V7
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+ select CLKDEV_LOOKUP
+ select ARM_GIC
+ select ARM_AMBA
+ help
+ Support for Xilinx ARM Cortex A9 Platform
+
endchoice
#
@@ -1025,6 +1036,8 @@ source "arch/arm/mach-vexpress/Kconfig"
source "arch/arm/mach-w90x900/Kconfig"
+source "arch/arm/mach-xilinx/Kconfig"
+
# Definitions to make life easier
config ARCH_ACORN
bool
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 6f7b292..a78ecf2 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -197,6 +197,7 @@ machine-$(CONFIG_MACH_SPEAR300) := spear3xx
machine-$(CONFIG_MACH_SPEAR310) := spear3xx
machine-$(CONFIG_MACH_SPEAR320) := spear3xx
machine-$(CONFIG_MACH_SPEAR600) := spear6xx
+machine-$(CONFIG_ARCH_XILINX) := xilinx
# Platform directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index e4509ba..cb0c570 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -813,7 +813,7 @@ config CACHE_L2X0
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \
ARCH_NOMADIK || ARCH_OMAP4 || ARCH_S5PV310 || ARCH_TEGRA || \
- ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE
+ ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || ARCH_XILINX
default y
select OUTER_CACHE
select OUTER_CACHE_SYNC
--
1.6.2.1
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
^ permalink raw reply related
* [PATCH V5 4/4] ARM: Xilinx: Adding Xilinx platform infrastructure support
From: John Linn @ 2011-02-28 21:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298929919-510-4-git-send-email-john.linn@xilinx.com>
Minimum infrastructure to add the Xilinx machine and allow it to
be selected in the build.
Signed-off-by: John Linn <john.linn@xilinx.com>
---
No updates for V5
V4
Updated to apply against linux-next branch.
No updates for V3
V2 Changes
Updates based on Russell King's comments
Cleanup of the Kconfig
Moved this patch to be last in the patch series
arch/arm/Kconfig | 13 +++++++++++++
arch/arm/Makefile | 1 +
arch/arm/mm/Kconfig | 2 +-
3 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5e15e6b..3983afa 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -891,6 +891,17 @@ config PLAT_SPEAR
help
Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
+config ARCH_XILINX
+ bool "Xilinx ARM Cortex A9 Platform"
+ select CPU_V7
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+ select CLKDEV_LOOKUP
+ select ARM_GIC
+ select ARM_AMBA
+ help
+ Support for Xilinx ARM Cortex A9 Platform
+
endchoice
#
@@ -1025,6 +1036,8 @@ source "arch/arm/mach-vexpress/Kconfig"
source "arch/arm/mach-w90x900/Kconfig"
+source "arch/arm/mach-xilinx/Kconfig"
+
# Definitions to make life easier
config ARCH_ACORN
bool
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 6f7b292..a78ecf2 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -197,6 +197,7 @@ machine-$(CONFIG_MACH_SPEAR300) := spear3xx
machine-$(CONFIG_MACH_SPEAR310) := spear3xx
machine-$(CONFIG_MACH_SPEAR320) := spear3xx
machine-$(CONFIG_MACH_SPEAR600) := spear6xx
+machine-$(CONFIG_ARCH_XILINX) := xilinx
# Platform directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index e4509ba..cb0c570 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -813,7 +813,7 @@ config CACHE_L2X0
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \
ARCH_NOMADIK || ARCH_OMAP4 || ARCH_S5PV310 || ARCH_TEGRA || \
- ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE
+ ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || ARCH_XILINX
default y
select OUTER_CACHE
select OUTER_CACHE_SYNC
--
1.6.2.1
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
^ permalink raw reply related
* [PATCH V5 3/4] ARM: Xilinx: base header files and assembly macros
From: John Linn @ 2011-02-28 21:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298929919-510-3-git-send-email-john.linn@xilinx.com>
These are the minimum needed to build the kernel for the new platform.
Signed-off-by: John Linn <john.linn@xilinx.com>
---
V5 Changes
Minor cleanup based on input from Russell King (uncompress.h.).
Minor cleanup based on input from Jamie Iles (uncompress.h.).
Moved to minimal dependencies on CLOCK_TICK_RATE based on input
from Arnd.
V4 Changes
Cleanup based on input from Jamie Iles.
Moved to PLAT_PHYS_OFFSET.
Remove headers file inclusions that weren't needed.
Added use of raw_readl/raw_writel in uncompressor uart code.
Added cpu_relax() in the uncompressor uart code.
V3 Changes
Updates based on Russell Kings' comments
Changed headers to update the license info and remove
the address
Updated the constant to use UL in vmalloc.h
V2 Changes
Updates based on Russell King's comments
moved to using entry-macro-gic.S
moved stuff from hardware.h to xilinx_soc.h
added IOMEM() in io.h to help with typing
Minor updates to IO_SPACE_LIMIT and __io()
Updated addresses to be clear with seperate virtual
and physical addresses
arch/arm/mach-xilinx/include/mach/clkdev.h | 33 +++++++++++++++
arch/arm/mach-xilinx/include/mach/debug-macro.S | 36 ++++++++++++++++
arch/arm/mach-xilinx/include/mach/entry-macro.S | 30 +++++++++++++
arch/arm/mach-xilinx/include/mach/hardware.h | 18 ++++++++
arch/arm/mach-xilinx/include/mach/io.h | 33 +++++++++++++++
arch/arm/mach-xilinx/include/mach/irqs.h | 29 +++++++++++++
arch/arm/mach-xilinx/include/mach/memory.h | 23 ++++++++++
arch/arm/mach-xilinx/include/mach/system.h | 28 ++++++++++++
arch/arm/mach-xilinx/include/mach/timex.h | 23 ++++++++++
arch/arm/mach-xilinx/include/mach/uart.h | 25 +++++++++++
arch/arm/mach-xilinx/include/mach/uncompress.h | 51 +++++++++++++++++++++++
arch/arm/mach-xilinx/include/mach/vmalloc.h | 20 +++++++++
arch/arm/mach-xilinx/include/mach/xilinx_soc.h | 48 +++++++++++++++++++++
13 files changed, 397 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-xilinx/include/mach/clkdev.h
create mode 100644 arch/arm/mach-xilinx/include/mach/debug-macro.S
create mode 100644 arch/arm/mach-xilinx/include/mach/entry-macro.S
create mode 100644 arch/arm/mach-xilinx/include/mach/hardware.h
create mode 100644 arch/arm/mach-xilinx/include/mach/io.h
create mode 100644 arch/arm/mach-xilinx/include/mach/irqs.h
create mode 100644 arch/arm/mach-xilinx/include/mach/memory.h
create mode 100644 arch/arm/mach-xilinx/include/mach/system.h
create mode 100644 arch/arm/mach-xilinx/include/mach/timex.h
create mode 100644 arch/arm/mach-xilinx/include/mach/uart.h
create mode 100644 arch/arm/mach-xilinx/include/mach/uncompress.h
create mode 100644 arch/arm/mach-xilinx/include/mach/vmalloc.h
create mode 100644 arch/arm/mach-xilinx/include/mach/xilinx_soc.h
diff --git a/arch/arm/mach-xilinx/include/mach/clkdev.h b/arch/arm/mach-xilinx/include/mach/clkdev.h
new file mode 100644
index 0000000..5dd1453
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/clkdev.h
@@ -0,0 +1,33 @@
+/*
+ * arch/arm/mach-xilinx/include/mach/clkdev.h
+ *
+ * Copyright (C) 2011 Xilinx, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_CLKDEV_H__
+#define __MACH_CLKDEV_H__
+
+struct clk {
+ unsigned long rate;
+};
+
+static inline int __clk_get(struct clk *clk)
+{
+ return 1;
+}
+
+static inline void __clk_put(struct clk *clk)
+{
+}
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/debug-macro.S b/arch/arm/mach-xilinx/include/mach/debug-macro.S
new file mode 100644
index 0000000..30d3d3d
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/debug-macro.S
@@ -0,0 +1,36 @@
+/* arch/arm/mach-xilinx/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <mach/xilinx_soc.h>
+#include <mach/uart.h>
+
+ .macro addruart, rp, rv
+ ldr \rp, =LL_UART_PADDR @ physical
+ ldr \rv, =LL_UART_VADDR @ virtual
+ .endm
+
+ .macro senduart,rd,rx
+ str \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA
+ .endm
+
+ .macro waituart,rd,rx
+ .endm
+
+ .macro busyuart,rd,rx
+1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register
+ tst \rd, #UART_SR_TXFULL @
+ bne 1002b @ wait if FIFO is full
+ .endm
diff --git a/arch/arm/mach-xilinx/include/mach/entry-macro.S b/arch/arm/mach-xilinx/include/mach/entry-macro.S
new file mode 100644
index 0000000..11a2866
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/entry-macro.S
@@ -0,0 +1,30 @@
+/*
+ * arch/arm/mach-xilinx/include/mach/entry-macro.S
+ *
+ * Low-level IRQ helper macros
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * based on arch/plat-mxc/include/mach/entry-macro.S
+ *
+ * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <mach/hardware.h>
+#include <asm/hardware/entry-macro-gic.S>
+
+ .macro disable_fiq
+ .endm
+
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
diff --git a/arch/arm/mach-xilinx/include/mach/hardware.h b/arch/arm/mach-xilinx/include/mach/hardware.h
new file mode 100644
index 0000000..f9685c4
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/hardware.h
@@ -0,0 +1,18 @@
+/* arch/arm/mach-xilinx/include/mach/hardware.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_HARDWARE_H__
+#define __MACH_HARDWARE_H__
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/io.h b/arch/arm/mach-xilinx/include/mach/io.h
new file mode 100644
index 0000000..ef69e65
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/io.h
@@ -0,0 +1,33 @@
+/* arch/arm/mach-xilinx/include/mach/io.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_IO_H__
+#define __MACH_IO_H__
+
+/* Allow IO space to be anywhere in the memory */
+
+#define IO_SPACE_LIMIT 0xffff
+
+/* IO address mapping macros, nothing special at this time but required */
+
+#ifdef __ASSEMBLER__
+#define IOMEM(x) (x)
+#else
+#define IOMEM(x) ((void __force __iomem *)(x))
+#endif
+
+#define __io(a) __typesafe_io(a)
+#define __mem_pci(a) (a)
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/irqs.h b/arch/arm/mach-xilinx/include/mach/irqs.h
new file mode 100644
index 0000000..47a8162
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/irqs.h
@@ -0,0 +1,29 @@
+/* arch/arm/mach-xilinx/include/mach/irqs.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_IRQS_H
+#define __MACH_IRQS_H
+
+#define ARCH_NR_GPIOS 118
+#define NR_IRQS (128 + ARCH_NR_GPIOS)
+
+/*
+ * GIC Interrupts
+ */
+
+#define IRQ_GIC_SPI_START 32
+#define IRQ_TIMERCOUNTER0 42
+#define IRQ_UART0 59
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/memory.h b/arch/arm/mach-xilinx/include/mach/memory.h
new file mode 100644
index 0000000..b683b0e
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/memory.h
@@ -0,0 +1,23 @@
+/* arch/arm/mach-xilinx/include/mach/memory.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_MEMORY_H__
+#define __MACH_MEMORY_H__
+
+#include <asm/sizes.h>
+
+#define PLAT_PHYS_OFFSET UL(0x0)
+#define MEM_SIZE SZ_256M
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/system.h b/arch/arm/mach-xilinx/include/mach/system.h
new file mode 100644
index 0000000..e8514a0
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/system.h
@@ -0,0 +1,28 @@
+/* arch/arm/mach-xilinx/include/mach/system.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_SYSTEM_H__
+#define __MACH_SYSTEM_H__
+
+static inline void arch_idle(void)
+{
+ cpu_do_idle();
+}
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+ /* Add architecture specific reset processing here */
+}
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/timex.h b/arch/arm/mach-xilinx/include/mach/timex.h
new file mode 100644
index 0000000..e82e653
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/timex.h
@@ -0,0 +1,23 @@
+/* arch/arm/mach-xilinx/include/mach/timex.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_TIMEX_H__
+#define __MACH_TIMEX_H__
+
+/* the following is needed for the system to build but will be removed
+ in the future, the value is not important but won't hurt
+*/
+#define CLOCK_TICK_RATE (100 * HZ)
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/uart.h b/arch/arm/mach-xilinx/include/mach/uart.h
new file mode 100644
index 0000000..7fca361
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/uart.h
@@ -0,0 +1,25 @@
+/* arch/arm/mach-xilinx/include/mach/uart.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_UART_H__
+#define __MACH_UART_H__
+
+#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */
+#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */
+#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */
+
+#define UART_SR_TXFULL 0x00000010 /* TX FIFO full */
+#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/uncompress.h b/arch/arm/mach-xilinx/include/mach/uncompress.h
new file mode 100644
index 0000000..ef7dd81
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/uncompress.h
@@ -0,0 +1,51 @@
+/* arch/arm/mach-xilinx/include/mach/uncompress.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_UNCOMPRESS_H__
+#define __MACH_UNCOMPRESS_H__
+
+#include <linux/io.h>
+#include <asm/processor.h>
+#include <mach/xilinx_soc.h>
+#include <mach/uart.h>
+
+void arch_decomp_setup(void)
+{
+}
+
+static inline void flush(void)
+{
+ /*
+ * Wait while the FIFO is not empty
+ */
+ while (!(__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
+ UART_SR_TXEMPTY))
+ cpu_relax();
+}
+
+#define arch_decomp_wdog()
+
+static void putc(char ch)
+{
+ /*
+ * Wait for room in the FIFO, then write the char into the FIFO
+ */
+ while (__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
+ UART_SR_TXFULL)
+ cpu_relax();
+
+ __raw_writel(ch, IOMEM(LL_UART_PADDR + UART_FIFO_OFFSET));
+}
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/vmalloc.h b/arch/arm/mach-xilinx/include/mach/vmalloc.h
new file mode 100644
index 0000000..aba20a3
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/vmalloc.h
@@ -0,0 +1,20 @@
+/* arch/arm/mach-xilinx/include/mach/vmalloc.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_VMALLOC_H__
+#define __MACH_VMALLOC_H__
+
+#define VMALLOC_END 0xE0000000UL
+
+#endif
diff --git a/arch/arm/mach-xilinx/include/mach/xilinx_soc.h b/arch/arm/mach-xilinx/include/mach/xilinx_soc.h
new file mode 100644
index 0000000..d181c5c
--- /dev/null
+++ b/arch/arm/mach-xilinx/include/mach/xilinx_soc.h
@@ -0,0 +1,48 @@
+/* arch/arm/mach-xilinx/include/mach/xilinx_soc.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_XILINX_SOC_H__
+#define __MACH_XILINX_SOC_H__
+
+#define PERIPHERAL_CLOCK_RATE 2500000
+
+/* For now, all mappings are flat (physical = virtual)
+ */
+#define UART0_PHYS 0xE0000000
+#define UART0_VIRT UART0_PHYS
+
+#define TTC0_PHYS 0xF8001000
+#define TTC0_VIRT TTC0_PHYS
+
+#define PL310_L2CC_PHYS 0xF8F02000
+#define PL310_L2CC_VIRT PL310_L2CC_PHYS
+
+#define SCU_PERIPH_PHYS 0xF8F00000
+#define SCU_PERIPH_VIRT SCU_PERIPH_PHYS
+
+/* The following are intended for the devices that are mapped early */
+
+#define TTC0_BASE IOMEM(TTC0_VIRT)
+#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
+#define SCU_GIC_CPU_BASE (SCU_PERIPH_BASE + 0x100)
+#define SCU_GIC_DIST_BASE (SCU_PERIPH_BASE + 0x1000)
+#define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT)
+
+/*
+ * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical
+ */
+#define LL_UART_PADDR UART0_PHYS
+#define LL_UART_VADDR UART0_VIRT
+
+#endif
--
1.6.2.1
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^ permalink raw reply related
* [PATCH V5 2/4] ARM: Xilinx: Adding timer support to the platform
From: John Linn @ 2011-02-28 21:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298929919-510-2-git-send-email-john.linn@xilinx.com>
The timer driver supports the Xilinx PS Timer Counter IP.
Signed-off-by: Kiran Sutariya <kiran.sutariya@einfochips.com>
Signed-off-by: John Linn <john.linn@xilinx.com>
---
V5 Changes
Minor cleanup based on input from Jamie Iles for sparse.
Removed CLOCK_TICK_RATE based on input from Arnd.
V4 Changes
Minor cleanup based on input from Jamie Iles.
Got rid of unused mode.
Removed un-needed initialization.
Made interrupt handler setup unconditional.
V3 Changes
Updates based on Russell Kings' comments
Changed headers to update the license info and remove
the address
V2 Changes
The timer code was changed quite a bit based on review inputs. It
got much smaller and cleaner I think.
Updates based on Russell King's comments
minor cleanups for documentation comments
removed the name from the timer structure
removed interrupt for clock source
moved to using clock functions provided in the kernel
for calculating shift/mult values
removed PM code as generic handles it
Updated based on Jamie Iles's comment
cleaned up ENABLE_MASK which was confusing
now using platform_add_devices() from platform code
moved base_addr to void __iomem pointer
removed stop of the event timer in one shot mode
arch/arm/mach-xilinx/Makefile | 2 +-
arch/arm/mach-xilinx/timer.c | 297 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 298 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-xilinx/timer.c
diff --git a/arch/arm/mach-xilinx/Makefile b/arch/arm/mach-xilinx/Makefile
index 19489e7..62787ff 100644
--- a/arch/arm/mach-xilinx/Makefile
+++ b/arch/arm/mach-xilinx/Makefile
@@ -3,5 +3,5 @@
#
# Common support
-obj-y := common.o
+obj-y := common.o timer.o
obj-$(CONFIG_MACH_XILINX_EP107) += board_ep107.o
diff --git a/arch/arm/mach-xilinx/timer.c b/arch/arm/mach-xilinx/timer.c
new file mode 100644
index 0000000..b2a72f0
--- /dev/null
+++ b/arch/arm/mach-xilinx/timer.c
@@ -0,0 +1,297 @@
+/* arch/arm/mach-xilinx/timer.c
+ *
+ * This file contains driver for the Xilinx PS Timer Counter IP.
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * based on arch/mips/kernel/time.c timer driver
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/clocksource.h>
+#include <linux/clockchips.h>
+#include <linux/io.h>
+
+#include <asm/mach/time.h>
+#include <mach/xilinx_soc.h>
+#include "common.h"
+
+/*
+ * This driver configures the 2 16-bit count-up timers as follows:
+ *
+ * T1: Timer 1, clocksource for generic timekeeping
+ * T2: Timer 2, clockevent source for hrtimers
+ * T3: Timer 3, <unused>
+ *
+ * The input frequency to the timer module for emulation is 2.5MHz which is
+ * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
+ * the timers are clocked at 78.125KHz (12.8 us resolution).
+ *
+ * The input frequency to the timer module in silicon will be 200MHz. With the
+ * pre-scaler of 32, the timers are clocked at 6.25MHz (160ns resolution).
+ */
+#define XTTCPSS_CLOCKSOURCE 0 /* Timer 1 as a generic timekeeping */
+#define XTTCPSS_CLOCKEVENT 1 /* Timer 2 as a clock event */
+
+#define XTTCPSS_TIMER_BASE TTC0_BASE
+#define XTTCPCC_EVENT_TIMER_IRQ (IRQ_TIMERCOUNTER0 + 1)
+/*
+ * Timer Register Offset Definitions of Timer 1, Increment base address by 4
+ * and use same offsets for Timer 2
+ */
+#define XTTCPSS_CLK_CNTRL_OFFSET 0x00 /* Clock Control Reg, RW */
+#define XTTCPSS_CNT_CNTRL_OFFSET 0x0C /* Counter Control Reg, RW */
+#define XTTCPSS_COUNT_VAL_OFFSET 0x18 /* Counter Value Reg, RO */
+#define XTTCPSS_INTR_VAL_OFFSET 0x24 /* Interval Count Reg, RW */
+#define XTTCPSS_MATCH_1_OFFSET 0x30 /* Match 1 Value Reg, RW */
+#define XTTCPSS_MATCH_2_OFFSET 0x3C /* Match 2 Value Reg, RW */
+#define XTTCPSS_MATCH_3_OFFSET 0x48 /* Match 3 Value Reg, RW */
+#define XTTCPSS_ISR_OFFSET 0x54 /* Interrupt Status Reg, RO */
+#define XTTCPSS_IER_OFFSET 0x60 /* Interrupt Enable Reg, RW */
+
+#define XTTCPSS_CNT_CNTRL_DISABLE_MASK 0x1
+
+/* Setup the timers to use pre-scaling */
+
+#define TIMER_RATE (PERIPHERAL_CLOCK_RATE / 32)
+
+/**
+ * struct xttcpss_timer - This definition defines local timer structure
+ *
+ * @base_addr: Base address of timer
+ **/
+struct xttcpss_timer {
+ void __iomem *base_addr;
+};
+
+static struct xttcpss_timer timers[2];
+static struct clock_event_device xttcpss_clockevent;
+
+/**
+ * xttcpss_set_interval - Set the timer interval value
+ *
+ * @timer: Pointer to the timer instance
+ * @cycles: Timer interval ticks
+ **/
+static void xttcpss_set_interval(struct xttcpss_timer *timer,
+ unsigned long cycles)
+{
+ u32 ctrl_reg;
+
+ /* Disable the counter, set the counter value and re-enable counter */
+ ctrl_reg = __raw_readl(timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
+ ctrl_reg |= XTTCPSS_CNT_CNTRL_DISABLE_MASK;
+ __raw_writel(ctrl_reg, timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
+
+ __raw_writel(cycles, timer->base_addr + XTTCPSS_INTR_VAL_OFFSET);
+
+ /* Reset the counter (0x10) so that it starts from 0, one-shot
+ mode makes this needed for timing to be right. */
+ ctrl_reg |= 0x10;
+ ctrl_reg &= ~XTTCPSS_CNT_CNTRL_DISABLE_MASK;
+ __raw_writel(ctrl_reg, timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
+}
+
+/**
+ * xttcpss_clock_event_interrupt - Clock event timer interrupt handler
+ *
+ * @irq: IRQ number of the Timer
+ * @dev_id: void pointer to the xttcpss_timer instance
+ *
+ * returns: Always IRQ_HANDLED - success
+ **/
+static irqreturn_t xttcpss_clock_event_interrupt(int irq, void *dev_id)
+{
+ struct clock_event_device *evt = &xttcpss_clockevent;
+ struct xttcpss_timer *timer = dev_id;
+
+ /* Acknowledge the interrupt and call event handler */
+ __raw_writel(__raw_readl(timer->base_addr + XTTCPSS_ISR_OFFSET),
+ timer->base_addr + XTTCPSS_ISR_OFFSET);
+
+ evt->event_handler(evt);
+
+ return IRQ_HANDLED;
+}
+
+static struct irqaction event_timer_irq = {
+ .name = "xttcpss clockevent",
+ .flags = IRQF_DISABLED | IRQF_TIMER,
+ .handler = xttcpss_clock_event_interrupt,
+};
+
+/**
+ * xttcpss_timer_hardware_init - Initialize the timer hardware
+ *
+ * Initialize the hardware to start the clock source, get the clock
+ * event timer ready to use, and hook up the interrupt.
+ **/
+static void __init xttcpss_timer_hardware_init(void)
+{
+ /* Setup the clock source counter to be an incrementing counter
+ * with no interrupt and it rolls over at 0xFFFF. Pre-scale
+ it by 32 also. Let it start running now.
+ */
+ timers[XTTCPSS_CLOCKSOURCE].base_addr = XTTCPSS_TIMER_BASE;
+
+ __raw_writel(0x0, timers[XTTCPSS_CLOCKSOURCE].base_addr +
+ XTTCPSS_IER_OFFSET);
+ __raw_writel(0x9, timers[XTTCPSS_CLOCKSOURCE].base_addr +
+ XTTCPSS_CLK_CNTRL_OFFSET);
+ __raw_writel(0x10, timers[XTTCPSS_CLOCKSOURCE].base_addr +
+ XTTCPSS_CNT_CNTRL_OFFSET);
+
+ /* Setup the clock event timer to be an interval timer which
+ * is prescaled by 32 using the interval interrupt. Leave it
+ * disabled for now.
+ */
+
+ timers[XTTCPSS_CLOCKEVENT].base_addr = XTTCPSS_TIMER_BASE + 4;
+
+ __raw_writel(0x23, timers[XTTCPSS_CLOCKEVENT].base_addr +
+ XTTCPSS_CNT_CNTRL_OFFSET);
+ __raw_writel(0x9, timers[XTTCPSS_CLOCKEVENT].base_addr +
+ XTTCPSS_CLK_CNTRL_OFFSET);
+ __raw_writel(0x1, timers[XTTCPSS_CLOCKEVENT].base_addr +
+ XTTCPSS_IER_OFFSET);
+
+ /* Setup IRQ the clock event timer */
+ event_timer_irq.dev_id = &timers[XTTCPSS_CLOCKEVENT];
+ setup_irq(XTTCPCC_EVENT_TIMER_IRQ, &event_timer_irq);
+}
+
+/**
+ * __raw_readl_cycles - Reads the timer counter register
+ *
+ * returns: Current timer counter register value
+ **/
+static cycle_t __raw_readl_cycles(struct clocksource *cs)
+{
+ struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKSOURCE];
+
+ return (cycle_t)__raw_readl(timer->base_addr +
+ XTTCPSS_COUNT_VAL_OFFSET);
+}
+
+
+/*
+ * Instantiate and initialize the clock source structure
+ */
+static struct clocksource clocksource_xttcpss = {
+ .name = "xttcpss_timer1",
+ .rating = 200, /* Reasonable clock source */
+ .read = __raw_readl_cycles,
+ .mask = CLOCKSOURCE_MASK(16),
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+
+/**
+ * xttcpss_set_next_event - Sets the time interval for next event
+ *
+ * @cycles: Timer interval ticks
+ * @evt: Address of clock event instance
+ *
+ * returns: Always 0 - success
+ **/
+static int xttcpss_set_next_event(unsigned long cycles,
+ struct clock_event_device *evt)
+{
+ struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKEVENT];
+
+ xttcpss_set_interval(timer, cycles);
+ return 0;
+}
+
+/**
+ * xttcpss_set_mode - Sets the mode of timer
+ *
+ * @mode: Mode to be set
+ * @evt: Address of clock event instance
+ **/
+static void xttcpss_set_mode(enum clock_event_mode mode,
+ struct clock_event_device *evt)
+{
+ struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKEVENT];
+ u32 ctrl_reg;
+
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+ xttcpss_set_interval(timer, TIMER_RATE / HZ);
+ break;
+ case CLOCK_EVT_MODE_ONESHOT:
+ case CLOCK_EVT_MODE_UNUSED:
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ ctrl_reg = __raw_readl(timer->base_addr +
+ XTTCPSS_CNT_CNTRL_OFFSET);
+ ctrl_reg |= XTTCPSS_CNT_CNTRL_DISABLE_MASK;
+ __raw_writel(ctrl_reg,
+ timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
+ break;
+ case CLOCK_EVT_MODE_RESUME:
+ ctrl_reg = __raw_readl(timer->base_addr +
+ XTTCPSS_CNT_CNTRL_OFFSET);
+ ctrl_reg &= ~XTTCPSS_CNT_CNTRL_DISABLE_MASK;
+ __raw_writel(ctrl_reg,
+ timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
+ break;
+ }
+}
+
+/*
+ * Instantiate and initialize the clock event structure
+ */
+static struct clock_event_device xttcpss_clockevent = {
+ .name = "xttcpss_timer2",
+ .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+ .set_next_event = xttcpss_set_next_event,
+ .set_mode = xttcpss_set_mode,
+ .rating = 200,
+};
+
+/**
+ * xttcpss_timer_init - Initialize the timer
+ *
+ * Initializes the timer hardware and register the clock source and clock event
+ * timers with Linux kernal timer framework
+ **/
+static void __init xttcpss_timer_init(void)
+{
+ xttcpss_timer_hardware_init();
+ clocksource_register_hz(&clocksource_xttcpss, TIMER_RATE);
+
+ /* Calculate the parameters to allow the clockevent to operate using
+ integer math
+ */
+ clockevents_calc_mult_shift(&xttcpss_clockevent, TIMER_RATE, 4);
+
+ xttcpss_clockevent.max_delta_ns =
+ clockevent_delta2ns(0xfffe, &xttcpss_clockevent);
+ xttcpss_clockevent.min_delta_ns =
+ clockevent_delta2ns(1, &xttcpss_clockevent);
+
+ /* Indicate that clock event can be used on any of the CPUs */
+
+ xttcpss_clockevent.cpumask = cpu_all_mask;
+ clockevents_register_device(&xttcpss_clockevent);
+}
+
+/*
+ * Instantiate and initialize the system timer structure
+ */
+struct sys_timer xttcpss_sys_timer = {
+ .init = xttcpss_timer_init,
+};
--
1.6.2.1
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
^ permalink raw reply related
* [PATCH V5 1/4] ARM: Xilinx: Adding Xilinx board support
From: John Linn @ 2011-02-28 21:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298929919-510-1-git-send-email-john.linn@xilinx.com>
The 1st board support is minimal to get a system up and running
on the Xilinx platform.
Signed-off-by: John Linn <john.linn@xilinx.com>
---
V5 Changes
Minor cleanup based on input from Jamie Iles.
Update to work with code in next merge (PLAT_PHYS_OFFSET).
V4 Changes
Minor cleanup based on input from Jamie Iles.
V3 Changes
Updates based on Russell Kings' comments
Changed headers to update the license info and remove
the address
Changed the name of functions to include "xilinx" in
common.c and common.h
Changed the Kconfig and Makefile to use MACH_XILINX which
matches the machine registered.
V2 Changes
Updates based on Russell King's comments
minor cleanups
cleaned up physical/virtual addresses in early i/o table
arch/arm/mach-xilinx/Kconfig | 14 +++++
arch/arm/mach-xilinx/Makefile | 7 ++
arch/arm/mach-xilinx/Makefile.boot | 3 +
arch/arm/mach-xilinx/board_ep107.c | 85 +++++++++++++++++++++++++++
arch/arm/mach-xilinx/common.c | 114 ++++++++++++++++++++++++++++++++++++
arch/arm/mach-xilinx/common.h | 30 +++++++++
6 files changed, 253 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-xilinx/Kconfig
create mode 100644 arch/arm/mach-xilinx/Makefile
create mode 100644 arch/arm/mach-xilinx/Makefile.boot
create mode 100644 arch/arm/mach-xilinx/board_ep107.c
create mode 100644 arch/arm/mach-xilinx/common.c
create mode 100644 arch/arm/mach-xilinx/common.h
diff --git a/arch/arm/mach-xilinx/Kconfig b/arch/arm/mach-xilinx/Kconfig
new file mode 100644
index 0000000..01181d2
--- /dev/null
+++ b/arch/arm/mach-xilinx/Kconfig
@@ -0,0 +1,14 @@
+if ARCH_XILINX
+
+choice
+ prompt "Board Selection"
+ default MACH_XILINX_EP107
+
+config MACH_XILINX_EP107
+ bool "Xilinx EP107 Board"
+ help
+ Select if you are using a Xilinx EP107 board.
+
+endchoice
+
+endif
diff --git a/arch/arm/mach-xilinx/Makefile b/arch/arm/mach-xilinx/Makefile
new file mode 100644
index 0000000..19489e7
--- /dev/null
+++ b/arch/arm/mach-xilinx/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Common support
+obj-y := common.o
+obj-$(CONFIG_MACH_XILINX_EP107) += board_ep107.o
diff --git a/arch/arm/mach-xilinx/Makefile.boot b/arch/arm/mach-xilinx/Makefile.boot
new file mode 100644
index 0000000..67039c3
--- /dev/null
+++ b/arch/arm/mach-xilinx/Makefile.boot
@@ -0,0 +1,3 @@
+ zreladdr-y := 0x00008000
+params_phys-y := 0x00000100
+initrd_phys-y := 0x00800000
diff --git a/arch/arm/mach-xilinx/board_ep107.c b/arch/arm/mach-xilinx/board_ep107.c
new file mode 100644
index 0000000..f6abe3f
--- /dev/null
+++ b/arch/arm/mach-xilinx/board_ep107.c
@@ -0,0 +1,85 @@
+/* arch/arm/mach-xilinx/board_ep107.c
+ *
+ * This file contains code specific to the Xilinx EP107 board.
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * based on /arch/arm/mach-realview/core.c
+ *
+ * Copyright (C) 1999 - 2003 ARM Limited
+ * Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/clkdev.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/xilinx_soc.h>
+#include <mach/irqs.h>
+#include <mach/memory.h>
+#include "common.h"
+
+/*
+ * Fixed clocks for now
+ */
+
+static struct clk ref50_clk = {
+ .rate = 50000000,
+};
+
+/* Create all the platform devices for the board */
+
+static struct resource uart0[] = {
+ {
+ .start = UART0_PHYS,
+ .end = UART0_PHYS + 0xFFF,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = IRQ_UART0,
+ .end = IRQ_UART0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device uart_device0 = {
+ .name = "xuartpss",
+ .id = 0,
+ .dev = {
+ .platform_data = &ref50_clk.rate,
+ },
+ .resource = uart0,
+ .num_resources = ARRAY_SIZE(uart0),
+};
+
+static struct platform_device *xilinx_pdevices[] __initdata = {
+ &uart_device0,
+};
+
+/**
+ * board_ep107_init - Board specific initialization for the Xilinx EP107 board.
+ *
+ **/
+static void __init board_ep107_init(void)
+{
+ xilinx_system_init();
+ platform_add_devices(&xilinx_pdevices[0], ARRAY_SIZE(xilinx_pdevices));
+}
+
+MACHINE_START(XILINX_EP107, "Xilinx EP107")
+ .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
+ .map_io = xilinx_map_io,
+ .init_irq = xilinx_irq_init,
+ .init_machine = board_ep107_init,
+ .timer = &xttcpss_sys_timer,
+MACHINE_END
diff --git a/arch/arm/mach-xilinx/common.c b/arch/arm/mach-xilinx/common.c
new file mode 100644
index 0000000..83b549d
--- /dev/null
+++ b/arch/arm/mach-xilinx/common.c
@@ -0,0 +1,114 @@
+/* arch/arm/mach-xilinx/common.c
+ *
+ * This file contains common code that is intended to be used across
+ * boards so that it's not replicated.
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/cpumask.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+
+#include <asm/mach/map.h>
+#include <asm/page.h>
+#include <asm/hardware/gic.h>
+#include <asm/hardware/cache-l2x0.h>
+
+#include <mach/xilinx_soc.h>
+#include <mach/clkdev.h>
+#include "common.h"
+
+/*
+ * Clock function infrastructure.
+ */
+int clk_enable(struct clk *clk)
+{
+ return 0;
+}
+
+void clk_disable(struct clk *clk)
+{
+}
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+ return clk->rate;
+}
+
+/**
+ * system_init - System specific initialization, intended to be called from
+ * board specific initialization.
+ *
+ **/
+void __init xilinx_system_init(void)
+{
+#ifdef CONFIG_CACHE_L2X0
+ /*
+ * 64KB way size, 8-way associativity, parity disabled
+ */
+ l2x0_init(PL310_L2CC_BASE, 0x02060000, 0xF0F0FFFF);
+#endif
+}
+
+/**
+ * irq_init - Interrupt controller initialization for the GIC.
+ *
+ **/
+void __init xilinx_irq_init(void)
+{
+ gic_init(0, 29, SCU_GIC_DIST_BASE, SCU_GIC_CPU_BASE);
+}
+
+/* The minimum devices needed to be mapped before the VM system is up and
+ * running include the GIC, UART and Timer Counter.
+ */
+
+static struct map_desc io_desc[] __initdata = {
+ {
+ .virtual = TTC0_VIRT,
+ .pfn = __phys_to_pfn(TTC0_PHYS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = SCU_PERIPH_VIRT,
+ .pfn = __phys_to_pfn(SCU_PERIPH_PHYS),
+ .length = SZ_8K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = PL310_L2CC_VIRT,
+ .pfn = __phys_to_pfn(PL310_L2CC_PHYS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+
+#ifdef CONFIG_DEBUG_LL
+ {
+ .virtual = UART0_VIRT,
+ .pfn = __phys_to_pfn(UART0_PHYS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+#endif
+
+};
+
+/**
+ * map_io - Create memory mappings needed for early I/O.
+ *
+ **/
+void __init xilinx_map_io(void)
+{
+ iotable_init(io_desc, ARRAY_SIZE(io_desc));
+}
diff --git a/arch/arm/mach-xilinx/common.h b/arch/arm/mach-xilinx/common.h
new file mode 100644
index 0000000..71f4ebc
--- /dev/null
+++ b/arch/arm/mach-xilinx/common.h
@@ -0,0 +1,30 @@
+/* arch/arm/mach-xilinx/common.h
+ *
+ * This file contains common function prototypes to avoid externs
+ * in the c files.
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_XILINX_COMMON_H__
+#define __MACH_XILINX_COMMON_H__
+
+#include <linux/init.h>
+#include <asm/mach/time.h>
+
+void __init xilinx_system_init(void);
+void __init xilinx_irq_init(void);
+void __init xilinx_map_io(void);
+
+extern struct sys_timer xttcpss_sys_timer;
+
+#endif
--
1.6.2.1
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
^ permalink raw reply related
* [PATCH V5 0/4] ARM: Basic Xilinx Support
From: John Linn @ 2011-02-28 21:51 UTC (permalink / raw)
To: linux-arm-kernel
V5
Minor cleanups based on feedback from Russell, Jamie
and Arnd. Nothing big.
This patch set was tested against a tree based on Linus's
current 2.6.38-rcX tree, then Russell's p2v-stable merged in.
Other than the update to mach-types that is missing for the
board, this should merge in easily in the next merge window
is my hope.
I'm making these patches available at git://git.xilinx.com in
linux-2.6-xlnx/arm-mainline.
V4
I incorporated more feedback from Jamie Iles. It was
primariy cleanup with the only significant change
being a move to using raw_read/write in the uncompressor
uart code.
The other changes were minor updates so that the patch
set applies to linux-next.
This patch set is now tested against the linux-next branch
from pub/scm/linux/kernel/git/sfr/linux-next.git.
V3
I incorporated more feedback from Russell King.
Primarily clean up of the license header to remove
the address.
Also minor cleanup of the Kconfig and Makefile for the board
to match the MACH_XILINX entry in the machine ID database.
These changes were tested on 2.6.38-rc4 and rc5.
V2
I incorporated review comments from Russell King and Jamie Iles.
Each patch has V2 comments describing the details. The order of
each patch in the series did change.
Thanks a lot to them for the detailed review as this patch set
is much cleaner and improved (I think anyway).
Thanks for comments from Arnd and Grant also.
This was tested against 2.6.38-rc4.
----
This patch series adds very basic support for the Xilinx ARM platform.
The entire patch set must be used, I only broke it up into logical
pieces to make the review easier (I hope).
I would like to get the review feedback and make any changes, but after
that I need to change mach-xilinx to the real product name. The real
product name is expected to be released by marketing very soon.
There's always the option of keeping mach-xilinx and then only
documenting the product name in the Kconfig. I'm less in favor of that
but it could be ok.
This code has been tested against 2.6.38-rc2, r3, and against head. The
only checkpatch warnings are about volatile in the uncompress.h file
and this method I used seems normal.
Thanks,
John
arch/arm/Kconfig | 14 +
arch/arm/Makefile | 1
arch/arm/mach-xilinx/Kconfig | 14 +
arch/arm/mach-xilinx/Makefile | 9
arch/arm/mach-xilinx/Makefile.boot | 3
arch/arm/mach-xilinx/board_ep107.c | 82 ++++++
arch/arm/mach-xilinx/common.c | 113 +++++++++
arch/arm/mach-xilinx/common.h | 31 ++
arch/arm/mach-xilinx/include/mach/clkdev.h | 33 ++
arch/arm/mach-xilinx/include/mach/debug-macro.S | 36 ++
arch/arm/mach-xilinx/include/mach/entry-macro.S | 30 ++
arch/arm/mach-xilinx/include/mach/hardware.h | 18 +
arch/arm/mach-xilinx/include/mach/io.h | 33 ++
arch/arm/mach-xilinx/include/mach/irqs.h | 29 ++
arch/arm/mach-xilinx/include/mach/memory.h | 23 +
arch/arm/mach-xilinx/include/mach/system.h | 28 ++
arch/arm/mach-xilinx/include/mach/timex.h | 22 +
arch/arm/mach-xilinx/include/mach/uart.h | 25 ++
arch/arm/mach-xilinx/include/mach/uncompress.h | 61 ++++
arch/arm/mach-xilinx/include/mach/vmalloc.h | 20 +
arch/arm/mach-xilinx/include/mach/xilinx_soc.h | 47 +++
arch/arm/mach-xilinx/timer.c | 293 +++++++++++++++++++++++-
arch/arm/mm/Kconfig | 3
23 files changed, 962 insertions(+), 6 deletions(-)
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
^ permalink raw reply
* Re: txqueuelen has wrong units; should be time
From: John Heffner @ 2011-02-28 21:51 UTC (permalink / raw)
To: Bill Sommerfeld
Cc: Hagen Paul Pfeifer, Albert Cahalan, Jussi Kivilinna, Eric Dumazet,
Mikael Abrahamsson, linux-kernel, netdev
In-Reply-To: <AANLkTikje6rvjSfEA3CvUjdgFwzk-SBZDdO5kQvi6LZy@mail.gmail.com>
Right... while I generally agree that a fixed-length drop-tail queue
isn't optimal, isn't this problem what the various AQM schemes try to
solve?
-John
On Mon, Feb 28, 2011 at 12:20 PM, Bill Sommerfeld
<wsommerfeld@google.com> wrote:
> On Mon, Feb 28, 2011 at 07:38, Hagen Paul Pfeifer <hagen@jauu.net> wrote:
>> On Sun, 27 Feb 2011 18:33:39 -0500, Albert Cahalan wrote:
>>> I suppose there is a need to allow at least 2 packets despite any
>>> time limits, so that it remains possible to use a traditional modem
>>> even if a huge packet takes several seconds to send.
>>
>> That is a good point! We talk about as we may know every use case of
>> Linux. But this is not true at all. One of my customer for example operates
>> the Linux network stack functionality on top of a proprietary MAC/Driver
>> where the current packet queue characteristic is just fine. The
>> time-drop-approach is unsuitable because the bandwidth can vary in a small
>> amount of time over a great range (0 till max. bandwidth). A sufficient
>> buffering shows up superior in this environment (only IPv{4,6}/UDP).
>
> The tension is between the average queue length and the maximum amount
> of buffering needed. Fixed-sized tail-drop queues -- either long, or
> short -- are not ideal.
>
> My understanding is that the best practice here is that you need
> (bandwidth * path delay) buffering to be available to absorb bursts
> and avoid drops, but you also need to use queue management algorithms
> with ECN or random drop to keep the *average* queue length short;
> unfortunately, researchers are still arguing about the details of the
> second part...
> --
> To unsubscribe from this list: send the line "unsubscribe netdev" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* Re: clustered snapshots status, LVM on shared storage without CLVM?
From: Jonathan Brassow @ 2011-02-28 21:49 UTC (permalink / raw)
To: device-mapper development
In-Reply-To: <20110228212844.GB2173@nik-comp.lan>
A true active/active cluster snapshot is not currently planned. There
is some discussion from time to time about whether it is appropriate
or not, but even this is idle chatter until the new (single-machine)
shared snapshot implementation is completed.
However, you will be able to take snapshots in a cluster in the next
RHEL releases (or if you use upstream sources) if the volume you are
snapshotting is activated exclusively.
It is possible to use LVM in a cluster without CLVM. I don't think it
would be smart though. You are essentially trying to do clvmd's job.
Do you know everything that it does? Are you sure you won't ever make
a mistake?
brassow
On Feb 28, 2011, at 3:28 PM, Nikola Ciprich wrote:
> Hello,
> I'd like to ask, what is the current status of cluster locking
> patches?
> I'm especially interested in clustered snapshots, is there some
> estimate on when I could be suitable for testing and possibly
> closer to production?
> I'd like to use DMLoop on my clustered storage (as well as snapshots
> in general), but with CLVM it's not really possible.
> If the time is not close yet, my second question is - is it
> dangerous to use LVM on top of shared storage without using CLVM?
> If I'll take care to not run lvm commands from more then one node?
> I'll be gratefull for any reply from more more experienced users
> in this area.
> thanks a lot in advance!
> with best regards
> nik
>
>
> --
> -------------------------------------
> Ing. Nikola CIPRICH
> LinuxBox.cz, s.r.o.
> 28. rijna 168, 709 01 Ostrava
>
> tel.: +420 596 603 142
> fax: +420 596 621 273
> mobil: +420 777 093 799
>
> www.linuxbox.cz
>
> mobil servis: +420 737 238 656
> email servis: servis@linuxbox.cz
> -------------------------------------
>
> --
> dm-devel mailing list
> dm-devel@redhat.com
> https://www.redhat.com/mailman/listinfo/dm-devel
^ permalink raw reply
* [U-Boot] Enabling e500 watchdog
From: Felix Radensky @ 2011-02-28 21:47 UTC (permalink / raw)
To: u-boot
Hi,
I'd like to enable watchdog timer in u-boot before
loading the kernel. My platform is custom board
based on Freescale P1011. In linux e500 watchdog
timer works fine. I've copied linux code to enable
watchdog to u-boot, but watchdog reset never triggers.
Is there anything obvious that I'm missing ?
Thanks.
Felix.
^ permalink raw reply
* Re: txqueuelen has wrong units; should be time
From: John Heffner @ 2011-02-28 21:45 UTC (permalink / raw)
To: John W. Linville
Cc: Eric Dumazet, Jussi Kivilinna, Albert Cahalan, Mikael Abrahamsson,
linux-kernel, netdev
In-Reply-To: <20110228165501.GC2515@tuxdriver.com>
On Mon, Feb 28, 2011 at 11:55 AM, John W. Linville
<linville@tuxdriver.com> wrote:
> On Mon, Feb 28, 2011 at 05:48:14PM +0100, Eric Dumazet wrote:
>> Le lundi 28 février 2011 à 11:11 -0500, John W. Linville a écrit :
>> > On Sun, Feb 27, 2011 at 09:07:53PM +0100, Eric Dumazet wrote:
>> >
>> > > Qdisc should return to caller a good indication packet is queued or
>> > > dropped at enqueue() time... not later (aka : never)
>> > >
>> > > Accepting a packet at t0, and dropping it later at t0+limit without
>> > > giving any indication to caller is a problem.
>> >
>> > Can you elaborate on what problem this causes? Is it any worse than
>> > if the packet is dropped at some later hop?
>> >
>> > Is there any API that could report the drop to the sender (at
>> > least a local one) without having to wait for the ack timeout?
>> > Should there be?
>> >
>>
>> Not all protocols have ACKS ;)
>>
>> dev_queue_xmit() returns an error code, some callers use it.
>
> Well, OK -- I agree it is best if you can return the status at
> enqueue time. The question becomes whether or not a dropped frame
> is worse than living with high latency. The answer, of course, still
> seems to be a bit subjective. But, if the admin has determined that
> a link should be low latency...?
Notably, TCP is one caller that uses the error code. The error code
is functionally equivalent to ECN, one of whose great advantages is
reducing delay jitter. If TCP didn't get the error, that would
effectively double the latency for a full window of data, since the
dropped segment would not be retransmitted for an RTT.
-John
^ permalink raw reply
* Errors in booting a new image built
From: julie Sullivan @ 2011-02-28 21:45 UTC (permalink / raw)
To: kernelnewbies
In-Reply-To: <AANLkTingNPfX=JQfa5_9b2CsOyv-MuHK_-84OrH83xKe@mail.gmail.com>
Hi Sada
On Sun, Feb 27, 2011 at 10:03 PM, SADA SIVA REDDY S
<sadasiva.reddy@gmail.com> wrote:
> Hi All,
> ?? I am trying to setup linux development environment.
You could also try Robert P J Day's excellent guide to this (which
uses Ubuntu as an example):
http://crashcourse.ca/introduction-linux-kernel-programming/lesson-1-building-and-running-new-linux-kernel
I use this formula I picked up from his course on my Ubuntu boxes and
it's always worked for me:
$ make
then
$ sudo make modules_install
$ sudo make install
$ sudo update-initramfs -c -k 2.6.35-crash+
$ sudo update-grub
Replace 2.6.35-crash+ with the name of your kernel.
BTW if you want to sign up for Robert's course I can recommend it as I
found it very helpful. Although many of the lessons (like this kernel
installing one) are free (thanks Rob).
I can second Javier's recommendation of "Linux kernel in a nutshell"
which is really a little manual for making and customizing a kernel
(not a guide to the kernel itself as the title suggests). It'll help
you cut out a lot of the crud you don't need in your config and
possibly also help you discover some stuff you didn't know about that
you _do_ want.
Cheers
Julie
^ permalink raw reply
* Re: [PATCH net-2.6] bonding: drop frames received with master's source MAC
From: Nicolas de Pesloüan @ 2011-02-28 21:45 UTC (permalink / raw)
To: Andy Gospodarek
Cc: netdev, David Miller, Herbert Xu, Jay Vosburgh, Jiri Pirko
In-Reply-To: <20110228163255.GJ11864@gospo.rdu.redhat.com>
Le 28/02/2011 17:32, Andy Gospodarek a écrit :
> On Sat, Feb 26, 2011 at 12:08:03AM +0100, Nicolas de Pesloüan wrote:
>> Le 25/02/2011 23:24, Andy Gospodarek a écrit :
> [...]
>>>
>>> I confirmed your suspicion, this breaks ARP monitoring. I would still
>>> welcome other opinions though as I think it would be nice to fix this as
>>> low as possible.
>>
>> Why do you want to fix it earlier that in ndisc_recv_ns drop? Your
>> original idea of silently dropping the frame there seems perfect to me.
>>
>
> Maybe it's just me, but I cannot understand why we want a bunch of extra
> packets floating up into the stack when they may only create issues for
> the recipients of these duplicate frames.
>
> Clearly my original patch needs to be refined so ARP monitoring still
> works, but I would rather fix the issue there than in a higher layer.
Jay explained that the current implementation should already trap those frames, on inactive slaves,
in modes where inactive slaves exist. I agree with him.
What mode are you seeing this problem in? If the current "should drop" logic is leaking, then yes,
we should fix it. But we currently don't see where it is leaking.
Nicolas.
^ permalink raw reply
* [PATCH 6/6] ARM: nmk: update GPIO chained IRQ handler to use EOI in parent chip
From: Russell King - ARM Linux @ 2011-02-28 21:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.00.1102281949050.2701@localhost6.localdomain6>
On Mon, Feb 28, 2011 at 08:16:25PM +0100, Thomas Gleixner wrote:
> So what's the gain of a barebone chained handler over a regular
> interrupt:
>
> - 100 instructions less
> - lack of statistics
We don't want statistics. Don't care how many times we go to look
at the interrupt controller - and actually it's really wrong to count
them in the first place. Counting them means that you double-count
these interrupt events, and the more layers of interrupt controllers
there are the worse that problem gets.
So no, that's a definite argument *for* chained handers.
> - lack of affinity setting via standard interfaces
Don't want affinity for them, as setting their affinity means that
you then end up forcing the affinity for the sub-interrupts too.
How you do cope with the high-level interrupt having affinity to
CPU0 but a lower level interrupt being affine to CPU1 only?
It's non-sensible, and is broken. So no, again this isn't an
argument for not using chained handlers. It's an argument *for*
them.
Sorry, but I think this stuff is right, and chained handlers like
these have their place.
^ permalink raw reply
* [PATCH 2/2] push: better error messages for detached HEAD and "no destination"
From: Matthieu Moy @ 2011-02-28 21:14 UTC (permalink / raw)
To: git, gitster; +Cc: Matthieu Moy
In-Reply-To: <1298927645-2716-1-git-send-email-Matthieu.Moy@imag.fr>
In both cases, give a hint on what to do next. We mention explicitely
"detached HEAD" since this is the keyword to look for in documentations.
Signed-off-by: Matthieu Moy <Matthieu.Moy@imag.fr>
---
builtin/push.c | 12 ++++++++++--
1 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/builtin/push.c b/builtin/push.c
index 210eb36..48fb050 100644
--- a/builtin/push.c
+++ b/builtin/push.c
@@ -69,7 +69,8 @@ static void setup_push_upstream(struct remote *remote)
struct strbuf refspec = STRBUF_INIT;
struct branch *branch = branch_get(NULL);
if (!branch)
- die("You are not currently on a branch.");
+ die("You are not currently on a branch (detached HEAD).\n"
+ "Please, checkout the branch you want to push first or specify it on the command line.");
if (!branch->merge_nr || !branch->merge)
die("The current branch %s has no upstream branch.\n"
"To push the current branch and set the remote as upstream, use\n"
@@ -152,7 +153,14 @@ static int do_push(const char *repo, int flags)
if (!remote) {
if (repo)
die("bad repository '%s'", repo);
- die("No destination configured to push to.");
+ die("No destination configured to push to.\n"
+ "Either specify the URL from the command line or configure a remote repository using\n"
+ "\n"
+ " git remote add <name> <url>\n"
+ "\n"
+ "and then push using the remote name like\n"
+ "\n"
+ " git push <name>\n");
}
if (remote->mirror)
--
1.7.4.1.142.g43604.dirty
^ permalink raw reply related
* [U-Boot] IMX51 EVK Splash Screen
From: Thomas Besemer @ 2011-02-28 21:42 UTC (permalink / raw)
To: u-boot
In-Reply-To: <4D6A5487.8060700@denx.de>
On Sun, Feb 27, 2011 at 5:41 AM, Stefano Babic <sbabic@denx.de> wrote:
>
> On 02/26/2011 07:32 PM, Marek Vasut wrote:
>
> > Hey guys, any update on this matter ? I'm quite interested :)
>
> On my side I am not currently working on this issue...
>
> Best regards,
> Stefano Babic
>
On my end, I had to go back to the FSL SDK version of U-Boot. Reason
is that they
have an extensive patch set that is not in mainstream U-Boot. I ran
into some issues
using current U-Boot, such as a slower boot time, but did not investigate.
If I get a chance in next month or so, I am going to migrate all FSL
SDK U-Boot patches
to the top of the U-Boot tree, and stabilize.
I have not back ported the Splash Screen stuff to the SDK version of U-Boot.
In an ideal world, FSL will start working with current U-Boot, and
post their patch sets back
to mailing list. Would make life easier for all of us.
tom
^ permalink raw reply
* Re: remote's HEAD not detected correctly
From: Jeff King @ 2011-02-28 21:42 UTC (permalink / raw)
To: Shawn Pearce; +Cc: Jeffrey Middleton, git
In-Reply-To: <AANLkTimqTa24QSWACFX9GErt-Tn+wLda1s_AvH7dzEpm@mail.gmail.com>
On Mon, Feb 28, 2011 at 01:01:08PM -0800, Shawn O. Pearce wrote:
> On Mon, Feb 28, 2011 at 12:52, Jeffrey Middleton <jefromi@gmail.com> wrote:
> >
> > So somehow, the clone misses the fact that origin's HEAD is pu, not
> > master, and git remote is only partially aware of this. It looks like
> > this only happens when the two branches in question are pointing to
> > the same commit; perhaps git is trying to guess what HEAD is via the
> > SHA1? I know that ls-remote prints an SHA1, not a refname, for HEAD -
> > is it not actually possible to get that information through a general
> > transport protocol?
>
> Right. The transport protocol doesn't expose the name that a symbolic
> reference points to, only its current value. Thus clients are forced
> to guess by looking for another reference whose current SHA-1 is the
> same. If there is more than one, its taking a best guess.
>
> There have been a few attempts to expand the protocol and include the
> current symbolic reference target name, but thus far it hasn't gotten
> much beyond the idea stage.
It depends on the transport protocol. It actually works over dumb http,
though I suspect that is not getting used much these days. I also
implemented a quick-and-dirty patch for local repositories here:
http://article.gmane.org/gmane.comp.version-control.git/110049
which would make Jeffrey's test pass, but I have a feeling it was just a
simple test case and that he actually cares about real remotes.
-Peff
PS I think the "send-HEAD-explicitly" patch series was here:
http://thread.gmane.org/gmane.comp.version-control.git/102039
I had some complaints at the time, but re-reading it I don't see
anything that would prevent us from revisiting the topic now.
^ permalink raw reply
* Re: 2.6.37 regression: adding main interface to a bridge breaks vlan interface RX
From: Jesse Gross @ 2011-02-28 21:37 UTC (permalink / raw)
To: chriss, Francois Romieu; +Cc: netdev
In-Reply-To: <loom.20110226T120245-774@post.gmane.org>
On Sat, Feb 26, 2011 at 3:51 AM, chriss <mail_to_chriss@gmx.net> wrote:
> Jesse Gross <jesse <at> nicira.com> writes:
>
>>
>> Can you confirm this by running tcpdump -eni br0? I would expect that
>> you see the correct packets but without vlan tags.
>>
>
> Thats correct. i see the packets in br0 without tags and tagged in eth1. thats
> why i added the brouting rule in ebtables to drop it at eth1 and the it apears
> in eth1.3 (untagged)...
Putting a vlan device on eth1 actually affects the behavior of the
driver, which is why that works. I suspect that if you put the vlan
device on both the physical interface and the bridge you would see
packets with tags on the bridge.
Regardless, the solution is to remove the dependency on vlan devices
by converting over to the new vlan model. Francois, any chance that
you might have some time to look at this?
^ permalink raw reply
* Re: WinTV HVR-900 (usb 2040:6500) (model 65008) / no audio but clicking noise
From: AW @ 2011-02-28 21:41 UTC (permalink / raw)
To: linux-media
Hi!
Since I really need analog TV support, I would like to bring this up again...
:-)
Now i hacked the em28xx module,
so that it would try to get the audio data via the em28xx_alsa module...
But that fails in the usb_submit_urb() call in the em28xx_init_audio_isoc()
function, because:
wMaxPacketSize of endpoint 0x83 is 0...
Does someone still know how em28xx_alsa was to be used properly?
Is there some specialist, that could help me?
Markus R. doesnt like to do open src things anymore, or did I misunderstand
that?
Btw: I have an em2882/em2883 chip, which needs to be handled by the em28xx_alsa
module according to this page:
http://www.linuxtv.org/wiki/index.php/Em28xx_devices#em2880.2F2881.2F2883
Here is the em28xx related syslog from my box:
https://bugzilla.redhat.com/attachment.cgi?id=481332
Bye
Arne
^ permalink raw reply
* 2.6.38-rc6: SysRq broken?
From: Alexey Dobriyan @ 2011-02-28 21:40 UTC (permalink / raw)
To: dmitry.torokhov; +Cc: linux-kernel
It just strikes me that SysRq is broken here:
Alt+SysRq+h doesn't print anything
CONFIG_MAGIC_SYSRQ=y
CONFIG_INPUT_EVDEV=y
kernel.sysrq=1
echo h >/proc/sysrq-trigger works
Keyboard is USB one, "Logitech HID compliant keyboard".
^ permalink raw reply
* [PATCH -tip 2/2] x86, traps: Drop nmi_reason_lock until it is really needed
From: Cyrill Gorcunov @ 2011-02-28 21:40 UTC (permalink / raw)
To: Ingo Molnar, Thomas Gleixner
Cc: H. Peter Anvin, Maciej W. Rozycki, Don Zickus, Huang, Ying, lkml
At moment we have only BSP apic configured to listen
for external NMIs. So there is no reason for additional
spinlock since only BSP will receive them.
Though we have UV chips which do enable external NMIs
on all cpus, but since an approach to allow retrieving
NMI reason on BSP only was worked fine previously --
I assume it still remains valid.
Also it's worth to mention that an initial idea of all this
NMI code-path poking was to make BSP hot-unpluggable but
until all others part of kernel is prepared for it (which
might take quite a time to implement) I believe we should not
lock/unlock for nothing.
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
---
arch/x86/kernel/traps.c | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
Index: linux-2.6.git/arch/x86/kernel/traps.c
=====================================================================
--- linux-2.6.git.orig/arch/x86/kernel/traps.c
+++ linux-2.6.git/arch/x86/kernel/traps.c
@@ -84,11 +84,6 @@ EXPORT_SYMBOL_GPL(used_vectors);
static int ignore_nmis;
int unknown_nmi_panic;
-/*
- * Prevent NMI reason port (0x61) being accessed simultaneously, can
- * only be used in NMI handler.
- */
-static DEFINE_RAW_SPINLOCK(nmi_reason_lock);
static inline void conditional_sti(struct pt_regs *regs)
{
@@ -406,9 +401,12 @@ static notrace __kprobes void default_do
if (notify_die(DIE_NMI, "nmi", regs, 0, 2, SIGINT) == NOTIFY_STOP)
return;
- /* Non-CPU-specific NMI: NMI sources can be processed on any CPU */
- raw_spin_lock(&nmi_reason_lock);
- reason = get_nmi_reason();
+ /*
+ * Only BSP is configured to listen and handle external NMIs.
+ * Note this implicitly orders a call to the get_nmi_reason.
+ */
+ if (!smp_processor_id())
+ reason = get_nmi_reason();
if (reason & NMI_REASON_MASK) {
if (reason & NMI_REASON_SERR)
@@ -422,10 +420,8 @@ static notrace __kprobes void default_do
*/
reassert_nmi();
#endif
- raw_spin_unlock(&nmi_reason_lock);
return;
}
- raw_spin_unlock(&nmi_reason_lock);
unknown_nmi_error(reason, regs);
}
--
Cyrill
^ permalink raw reply
* [PATHC -tip 1/2] x86, nmi: Define a name for NMI control port
From: Cyrill Gorcunov @ 2011-02-28 21:40 UTC (permalink / raw)
To: Ingo Molnar, Thomas Gleixner
Cc: H. Peter Anvin, Don Zickus, Huang, Ying, lkml, Maciej W. Rozycki
Also add a comment anout why we need in-out operations.
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
---
arch/x86/include/asm/mach_traps.h | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
Index: linux-2.6.git/arch/x86/include/asm/mach_traps.h
=====================================================================
--- linux-2.6.git.orig/arch/x86/include/asm/mach_traps.h
+++ linux-2.6.git/arch/x86/include/asm/mach_traps.h
@@ -8,6 +8,7 @@
#include <asm/mc146818rtc.h>
#define NMI_REASON_PORT 0x61
+#define NMI_ENABLE_PORT 0x70 /* Real-Time Clock Address Register as well */
#define NMI_REASON_SERR 0x80
#define NMI_REASON_IOCHK 0x40
@@ -30,12 +31,19 @@ static inline void reassert_nmi(void)
old_reg = current_lock_cmos_reg();
else
lock_cmos(0); /* register doesn't matter here */
- outb(0x8f, 0x70);
- inb(0x71); /* dummy */
- outb(0x0f, 0x70);
- inb(0x71); /* dummy */
+
+ /*
+ * This will cause the NMI output to transition low
+ * then high if there are any pending NMI sources. The
+ * CPU's NMI input logic will then register a new NMI.
+ */
+ outb(0x8f, NMI_ENABLE_PORT);
+ inb(0x71); /* dummy */
+ outb(0x0f, NMI_ENABLE_PORT);
+ inb(0x71); /* dummy */
+
if (old_reg >= 0)
- outb(old_reg, 0x70);
+ outb(old_reg, NMI_ENABLE_PORT);
else
unlock_cmos();
}
--
Cyrill
^ permalink raw reply
* Re: [PATCH] zero out delegation in the inode after it has been returned
From: Trond Myklebust @ 2011-02-28 21:39 UTC (permalink / raw)
To: Jim Rees; +Cc: Benny Halevy, linux-nfs, peter honeyman
In-Reply-To: <20110228213103.GA1256@merit.edu>
On Mon, 2011-02-28 at 16:31 -0500, Jim Rees wrote:
> Signed-off-by: Jim Rees <rees@umich.edu>
> ---
> fs/nfs/delegation.c | 2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/fs/nfs/delegation.c b/fs/nfs/delegation.c
> index bbbc6bf..5bc4f7e 100644
> --- a/fs/nfs/delegation.c
> +++ b/fs/nfs/delegation.c
> @@ -176,9 +176,11 @@ void nfs_inode_reclaim_delegation(struct inode *inode, struct rpc_cred *cred,
>
> static int nfs_do_return_delegation(struct inode *inode, struct nfs_delegation *delegation, int issync)
> {
> + struct nfs_inode *nfsi = NFS_I(inode);
> int res = 0;
>
> res = nfs4_proc_delegreturn(inode, delegation->cred, &delegation->stateid, issync);
> + rcu_assign_pointer(nfsi->delegation, NULL);
> nfs_free_delegation(delegation);
> return res;
> }
Big NACK...
nfsi->delegation is released under the appropriate locks well before we
get here. The above line is 100% racy and risks clobbering any new
delegation that has been issued after the delegreturn completed...
Trond
--
Trond Myklebust
Linux NFS client maintainer
NetApp
Trond.Myklebust@netapp.com
www.netapp.com
^ permalink raw reply
* Re: [klibc] [PATCH] build: Define __EXPORTED_HEADER__
From: Mike Waychison @ 2011-02-28 21:38 UTC (permalink / raw)
To: Sam Ravnborg; +Cc: Arnd Bergmann, klibc, linux-kernel
In-Reply-To: <20110228122236.GA1211@merkur.ravnborg.org>
On Mon, Feb 28, 2011 at 4:22 AM, Sam Ravnborg <sam@ravnborg.org> wrote:
> On Mon, Feb 28, 2011 at 01:11:16PM +0100, Arnd Bergmann wrote:
>> On Monday 28 February 2011, Mike Waychison wrote:
>> > How is one expected to test if the files should be rebuild or not?
>> > Forcing a headers_install as part of a build will cause the entire
>> > userland to be rebuilt.
>>
>> How about changing headers_install to only install files that have
>> changed? Make headers_install alreadh knows the list of all files
>> it is installing.
>
> make headers_install already does so. Only changes fiels are updated.
> So I consider this a non-issue.
Aha, I missed this point. I've updated our build to do a
headers_install and things seem to work fine.
Thanks for the pointers :) Please forget about this patch.
^ permalink raw reply
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