* [PATCH v12 05/15] arm64: rqspinlock: Remove private copy of smp_cond_load_acquire_timewait()
From: Ankur Arora @ 2026-06-08 8:04 UTC (permalink / raw)
To: linux-kernel, linux-arch, linux-arm-kernel, linux-pm, bpf
Cc: arnd, catalin.marinas, will, peterz, akpm, mark.rutland, harisokn,
cl, ast, rafael, daniel.lezcano, memxor, zhenglifeng1, xueshuai,
rdunlap, david.laight.linux, broonie, joao.m.martins,
boris.ostrovsky, konrad.wilk, ashok.bhat, Ankur Arora
In-Reply-To: <20260608080440.127491-1-ankur.a.arora@oracle.com>
In preparation for defining smp_cond_load_acquire_timeout(), remove
the private copy. Lacking this, the rqspinlock code falls back to using
smp_cond_load_acquire().
Cc: Kumar Kartikeya Dwivedi <memxor@gmail.com>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: bpf@vger.kernel.org
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Haris Okanovic <harisokn@amazon.com>
Acked-by: Kumar Kartikeya Dwivedi <memxor@gmail.com>
Signed-off-by: Ankur Arora <ankur.a.arora@oracle.com>
---
Notes:
Sashiko mentions that this introduces a bisection hole: this has been
discussed in prior versions and doing it this way seems the cleanest.
---
arch/arm64/include/asm/rqspinlock.h | 85 -----------------------------
1 file changed, 85 deletions(-)
diff --git a/arch/arm64/include/asm/rqspinlock.h b/arch/arm64/include/asm/rqspinlock.h
index 9ea0a74e5892..a385603436e9 100644
--- a/arch/arm64/include/asm/rqspinlock.h
+++ b/arch/arm64/include/asm/rqspinlock.h
@@ -3,91 +3,6 @@
#define _ASM_RQSPINLOCK_H
#include <asm/barrier.h>
-
-/*
- * Hardcode res_smp_cond_load_acquire implementations for arm64 to a custom
- * version based on [0]. In rqspinlock code, our conditional expression involves
- * checking the value _and_ additionally a timeout. However, on arm64, the
- * WFE-based implementation may never spin again if no stores occur to the
- * locked byte in the lock word. As such, we may be stuck forever if
- * event-stream based unblocking is not available on the platform for WFE spin
- * loops (arch_timer_evtstrm_available).
- *
- * Once support for smp_cond_load_acquire_timewait [0] lands, we can drop this
- * copy-paste.
- *
- * While we rely on the implementation to amortize the cost of sampling
- * cond_expr for us, it will not happen when event stream support is
- * unavailable, time_expr check is amortized. This is not the common case, and
- * it would be difficult to fit our logic in the time_expr_ns >= time_limit_ns
- * comparison, hence just let it be. In case of event-stream, the loop is woken
- * up at microsecond granularity.
- *
- * [0]: https://lore.kernel.org/lkml/20250203214911.898276-1-ankur.a.arora@oracle.com
- */
-
-#ifndef smp_cond_load_acquire_timewait
-
-#define smp_cond_time_check_count 200
-
-#define __smp_cond_load_relaxed_spinwait(ptr, cond_expr, time_expr_ns, \
- time_limit_ns) ({ \
- typeof(ptr) __PTR = (ptr); \
- __unqual_scalar_typeof(*ptr) VAL; \
- unsigned int __count = 0; \
- for (;;) { \
- VAL = READ_ONCE(*__PTR); \
- if (cond_expr) \
- break; \
- cpu_relax(); \
- if (__count++ < smp_cond_time_check_count) \
- continue; \
- if ((time_expr_ns) >= (time_limit_ns)) \
- break; \
- __count = 0; \
- } \
- (typeof(*ptr))VAL; \
-})
-
-#define __smp_cond_load_acquire_timewait(ptr, cond_expr, \
- time_expr_ns, time_limit_ns) \
-({ \
- typeof(ptr) __PTR = (ptr); \
- __unqual_scalar_typeof(*ptr) VAL; \
- for (;;) { \
- VAL = smp_load_acquire(__PTR); \
- if (cond_expr) \
- break; \
- __cmpwait_relaxed(__PTR, VAL); \
- if ((time_expr_ns) >= (time_limit_ns)) \
- break; \
- } \
- (typeof(*ptr))VAL; \
-})
-
-#define smp_cond_load_acquire_timewait(ptr, cond_expr, \
- time_expr_ns, time_limit_ns) \
-({ \
- __unqual_scalar_typeof(*ptr) _val; \
- int __wfe = arch_timer_evtstrm_available(); \
- \
- if (likely(__wfe)) { \
- _val = __smp_cond_load_acquire_timewait(ptr, cond_expr, \
- time_expr_ns, \
- time_limit_ns); \
- } else { \
- _val = __smp_cond_load_relaxed_spinwait(ptr, cond_expr, \
- time_expr_ns, \
- time_limit_ns); \
- smp_acquire__after_ctrl_dep(); \
- } \
- (typeof(*ptr))_val; \
-})
-
-#endif
-
-#define res_smp_cond_load_acquire(v, c) smp_cond_load_acquire_timewait(v, c, 0, 1)
-
#include <asm-generic/rqspinlock.h>
#endif /* _ASM_RQSPINLOCK_H */
--
2.31.1
^ permalink raw reply related
* [PATCH v12 00/15] barrier: Add smp_cond_load_{relaxed,acquire}_timeout()
From: Ankur Arora @ 2026-06-08 8:04 UTC (permalink / raw)
To: linux-kernel, linux-arch, linux-arm-kernel, linux-pm, bpf
Cc: arnd, catalin.marinas, will, peterz, akpm, mark.rutland, harisokn,
cl, ast, rafael, daniel.lezcano, memxor, zhenglifeng1, xueshuai,
rdunlap, david.laight.linux, broonie, joao.m.martins,
boris.ostrovsky, konrad.wilk, ashok.bhat, Ankur Arora
Hi,
Main change in this version:
- addressed some review comments from sashiko (see commit notes)
- The one notable change is to the implementation of
smp_cond_load_acquire_timeout() where there was a missed
control dependency in the timeout case.
All the others are minor.
- fixed a low probability race in the kunit test added in v11.
- added a bunch of kunit tests validating the implementation's
use of the clock.
Andrew, if the changes look okay, could we take this in your mm-nomm
tree as before?
The core kernel often uses smp_cond_load_{relaxed,acquire}() to spin
on condition variables with architectural primitives used to avoid
hammering the relevant cachelines.
(This primitive can vary greatly across architectures: on x86 it's a
cpu_relax() to slow down the pipeline. On arm64, this is a __cmpwait()
which waits for a cacheline to change state in a time limited fashion.)
Regardless of architectural details, typical smp_cond_load*() usage
does not allow for termination until the condition change occurs.
Beyond the core kernel, there are cases where it is useful to additionally
terminate on a timeout. Two cases:
- cpuidle poll_idle(): wait for need-resched until the cpuidle polling
duration expires.
- rqspinlock: nested qspinlock acquisition that terminates on timeout
or deadlock.
Accordingly add two interfaces (with their generic and arm64 specific
implementations):
smp_cond_load_relaxed_timeout(ptr, cond_expr, time_expr, timeout)
smp_cond_load_acquire_timeout(ptr, cond_expr, time_expr, timeout)
Also add tif_need_resched_relaxed_wait() which wraps the polling
pattern and its scheduler specific details in poll_idle().
In addition add atomic_cond_read_*_timeout(),
atomic64_cond_read_*_timeout(), and atomic_long wrappers.
Structurally, both the smp_cond_load_*_timeout() interfaces are similar
to smp_cond_load*(), with the addition of a rate-limited time-check.
Usage
==
These interfaces drop straight-forwardly into the rqspinlock logic
since qspinlock already uses smp_cond_load*(), and the time-check
extension can now be used for timeout and deadlock handling.
Using tif_need_resched_relaxed_wait() in poll_idle() removes any
architectural details allowing arm64 to straight-forwardly support
that path.
(However, for efficiency reasons cpuidle/poll_state.c continues to
depend on ARCH_HAS_CPU_RELAX since that is defined on architectures
with an optimized architectural primitive.)
Performance
==
Apart from simplifications due to this change, supporting polling in
cpuidle on arm64 helps improve wakeup latency (needs a few cpuidle/acpi
patches):
# perf stat -r 5 --cpu 4,5 -e task-clock,cycles,instructions,sched:sched_wake_idle_without_ipi \
perf bench sched pipe -l 1000000 -c 4
# No haltpoll (and, no TIF_POLLING_NRFLAG):
Performance counter stats for 'CPU(s) 4,5' (5 runs):
25,229.57 msec task-clock # 2.000 CPUs utilized ( +- 7.75% )
45,821,250,284 cycles # 1.816 GHz ( +- 10.07% )
26,557,496,665 instructions # 0.58 insn per cycle ( +- 0.21% )
0 sched:sched_wake_idle_without_ipi # 0.000 /sec
12.615 +- 0.977 seconds time elapsed ( +- 7.75% )
# Haltpoll:
Performance counter stats for 'CPU(s) 4,5' (5 runs):
15,131.58 msec task-clock # 2.000 CPUs utilized ( +- 10.00% )
34,158,188,839 cycles # 2.257 GHz ( +- 6.91% )
20,824,950,916 instructions # 0.61 insn per cycle ( +- 0.09% )
1,983,822 sched:sched_wake_idle_without_ipi # 131.105 K/sec ( +- 0.78% )
7.566 +- 0.756 seconds time elapsed ( +- 10.00% )
We get improved latency because we don't switch in and out of a
deeper sleep state or from the hypervisor. This also causes us to
execute ~20% fewer instructions.
Haris Okanovic also saw improvement in real workloads due to the
cpuidle changes: "observed 4-6% improvements in memcahed, cassandra,
mysql, and postgresql under certain loads. Other applications likely
benefit too." [12]
Changelog:
v11 [13] (as listed above):
- addressed some review comments from sashiko (see commit notes)
- The one notable change is to the implementation of
smp_cond_load_acquire_timeout() where there was a missed
control dependency in the timeout case.
All the others are minor.
- fixed a low probability race in the kunit test added in v11.
- added a bunch of kunit tests validating the implementation's
use of the clock.
v10 [10]:
- add a comment mentioning that smp_cond_load_relaxed_timeout() might
be using architectural primitives that don't support MMIO.
(David Laight, Catalin Marinas)
- added a kunit test for smp_cond_load_relaxed_timeout() (Andrew
Morton.)
v9 [9]:
- s/@cond/@cond_expr/ (Randy Dunlap)
- Clarify that SMP_TIMEOUT_POLL_COUNT is only around memory
addresses. (David Laight)
- Add the missing config ARCH_HAS_CPU_RELAX in arch/arm64/Kconfig.
(Catalin Marinas).
- Switch to arch_counter_get_cntvct_stable() (via __delay_cycles())
in the cmpwait path instead of using arch_timer_read_counter().
(Catalin Marinas)
v8 [0]:
- Defer evaluation of @time_expr_ns to when we hit the slowpath.
(comment from Alexei Starovoitov).
- Mention that cpu_poll_relax() is better than raw CPU polling
only where ARCH_HAS_CPU_RELAX is defined.
- also define ARCH_HAS_CPU_RELAX for arm64.
(Came out of a discussion with Will Deacon.)
- Split out WFET and WFE handling. I was doing both of these
in a common handler.
(From Will Deacon and in an earlier revision by Catalin Marinas.)
- Add mentions of atomic_cond_read_{relaxed,acquire}(),
atomic_cond_read_{relaxed,acquire}_timeout() in
Documentation/atomic_t.txt.
- Use the BIT() macro to do the checking in tif_bitset_relaxed_wait().
- Cleanup unnecessary assignments, casts etc in poll_idle().
(From Rafael Wysocki.)
- Fixup warnings from kernel build robot
v7 [1]:
- change the interface to separately provide the timeout. This is
useful for supporting WFET and similar primitives which can do
timed waiting (suggested by Arnd Bergmann).
- Adapting rqspinlock code to this changed interface also
necessitated allowing time_expr to fail.
- rqspinlock changes to adapt to the new smp_cond_load_acquire_timeout().
- add WFET support (suggested by Arnd Bergmann).
- add support for atomic-long wrappers.
- add a new scheduler interface tif_need_resched_relaxed_wait() which
encapsulates the polling logic used by poll_idle().
- interface suggested by (Rafael J. Wysocki).
v6 [2]:
- fixup missing timeout parameters in atomic64_cond_read_*_timeout()
- remove a race between setting of TIF_NEED_RESCHED and the call to
smp_cond_load_relaxed_timeout(). This would mean that dev->poll_time_limit
would be set even if we hadn't spent any time waiting.
(The original check compared against local_clock(), which would have been
fine, but I was instead using a cheaper check against _TIF_NEED_RESCHED.)
(Both from meta-CI bot)
v5 [3]:
- use cpu_poll_relax() instead of cpu_relax().
- instead of defining an arm64 specific
smp_cond_load_relaxed_timeout(), just define the appropriate
cpu_poll_relax().
- re-read the target pointer when we exit due to the time-check.
- s/SMP_TIMEOUT_SPIN_COUNT/SMP_TIMEOUT_POLL_COUNT/
(Suggested by Will Deacon)
- add atomic_cond_read_*_timeout() and atomic64_cond_read_*_timeout()
interfaces.
- rqspinlock: use atomic_cond_read_acquire_timeout().
- cpuidle: use smp_cond_load_relaxed_tiemout() for polling.
(Suggested by Catalin Marinas)
- rqspinlock: define SMP_TIMEOUT_POLL_COUNT to be 16k for non arm64
v4 [4]:
- naming change 's/timewait/timeout/'
- resilient spinlocks: get rid of res_smp_cond_load_acquire_waiting()
and fixup use of RES_CHECK_TIMEOUT().
(Both suggested by Catalin Marinas)
v3 [5]:
- further interface simplifications (suggested by Catalin Marinas)
v2 [6]:
- simplified the interface (suggested by Catalin Marinas)
- get rid of wait_policy, and a multitude of constants
- adds a slack parameter
This helped remove a fair amount of duplicated code duplication and in
hindsight unnecessary constants.
v1 [7]:
- add wait_policy (coarse and fine)
- derive spin-count etc at runtime instead of using arbitrary
constants.
Haris Okanovic tested v4 of this series with poll_idle()/haltpoll patches. [8]
Comments appreciated!
Thanks
Ankur
[0] https://lore.kernel.org/lkml/20251215044919.460086-1-ankur.a.arora@oracle.com/
[1] https://lore.kernel.org/lkml/20251028053136.692462-1-ankur.a.arora@oracle.com/
[2] https://lore.kernel.org/lkml/20250911034655.3916002-1-ankur.a.arora@oracle.com/
[3] https://lore.kernel.org/lkml/20250911034655.3916002-1-ankur.a.arora@oracle.com/
[4] https://lore.kernel.org/lkml/20250829080735.3598416-1-ankur.a.arora@oracle.com/
[5] https://lore.kernel.org/lkml/20250627044805.945491-1-ankur.a.arora@oracle.com/
[6] https://lore.kernel.org/lkml/20250502085223.1316925-1-ankur.a.arora@oracle.com/
[7] https://lore.kernel.org/lkml/20250203214911.898276-1-ankur.a.arora@oracle.com/
[8] https://lore.kernel.org/lkml/2cecbf7fb23ee83a4ce027e1be3f46f97efd585c.camel@amazon.com/
[9] https://lore.kernel.org/lkml/20260209023153.2661784-1-ankur.a.arora@oracle.com/
[10] https://lore.kernel.org/lkml/20260316013651.3225328-1-ankur.a.arora@oracle.com/
[11] https://lore.kernel.org/lkml/20230809134837.GM212435@hirez.programming.kicks-ass.net/
[12] https://lore.kernel.org/lkml/c6f3c8d3f1f2e89a9dc7ae22482973b5a51b08cb.camel@amazon.com/
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Kumar Kartikeya Dwivedi <memxor@gmail.com>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: bpf@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-pm@vger.kernel.org
Ankur Arora (15):
asm-generic: barrier: Add smp_cond_load_relaxed_timeout()
arm64: barrier: Support smp_cond_load_relaxed_timeout()
arm64/delay: move some constants out to a separate header
arm64: support WFET in smp_cond_load_relaxed_timeout()
arm64: rqspinlock: Remove private copy of
smp_cond_load_acquire_timewait()
asm-generic: barrier: Add smp_cond_load_acquire_timeout()
atomic: Add atomic_cond_read_*_timeout()
locking/atomic: scripts: build atomic_long_cond_read_*_timeout()
bpf/rqspinlock: switch check_timeout() to a clock interface
bpf/rqspinlock: Use smp_cond_load_acquire_timeout()
sched: add need-resched timed wait interface
cpuidle/poll_state: Wait for need-resched via
tif_need_resched_relaxed_wait()
arm64/delay: enable testing smp_cond_load_relaxed_timeout()
barrier: add tests for smp_cond_load_*_timeout()
barrier: add clock tests for smp_cond_load_relaxed_timeout()
Documentation/atomic_t.txt | 14 +-
arch/arm64/Kconfig | 3 +
arch/arm64/include/asm/barrier.h | 23 ++++
arch/arm64/include/asm/cmpxchg.h | 62 +++++++--
arch/arm64/include/asm/delay-const.h | 28 ++++
arch/arm64/include/asm/rqspinlock.h | 85 ------------
arch/arm64/lib/delay.c | 17 +--
drivers/clocksource/arm_arch_timer.c | 2 +
drivers/cpuidle/poll_state.c | 21 +--
drivers/soc/qcom/rpmh-rsc.c | 8 +-
include/asm-generic/barrier.h | 97 ++++++++++++++
include/linux/atomic.h | 10 ++
include/linux/atomic/atomic-long.h | 18 ++-
include/linux/sched/idle.h | 29 +++++
kernel/bpf/rqspinlock.c | 77 +++++++----
lib/Kconfig.debug | 10 ++
lib/tests/Makefile | 1 +
lib/tests/barrier-timeout-test.c | 185 +++++++++++++++++++++++++++
scripts/atomic/gen-atomic-long.sh | 16 ++-
19 files changed, 528 insertions(+), 178 deletions(-)
create mode 100644 arch/arm64/include/asm/delay-const.h
create mode 100644 lib/tests/barrier-timeout-test.c
--
2.31.1
^ permalink raw reply
* [PATCH v12 06/15] asm-generic: barrier: Add smp_cond_load_acquire_timeout()
From: Ankur Arora @ 2026-06-08 8:04 UTC (permalink / raw)
To: linux-kernel, linux-arch, linux-arm-kernel, linux-pm, bpf
Cc: arnd, catalin.marinas, will, peterz, akpm, mark.rutland, harisokn,
cl, ast, rafael, daniel.lezcano, memxor, zhenglifeng1, xueshuai,
rdunlap, david.laight.linux, broonie, joao.m.martins,
boris.ostrovsky, konrad.wilk, ashok.bhat, Ankur Arora
In-Reply-To: <20260608080440.127491-1-ankur.a.arora@oracle.com>
Add the acquire variant of smp_cond_load_relaxed_timeout(). This
reuses the relaxed variant, with additional LOAD->LOAD ordering
via smp_acquire__after_ctrl_dep().
To ensure that the necessary control dependency on the dereference
of @ptr exists (which does not in the timeout path), introduce
an empty evaluation of the cond_expr branch.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: linux-arch@vger.kernel.org
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Haris Okanovic <harisokn@amazon.com>
Tested-by: Haris Okanovic <harisokn@amazon.com>
Signed-off-by: Ankur Arora <ankur.a.arora@oracle.com>
---
Notes:
Sashiko notes [1] that there's a missed control dependency in the
timeout path. Fix that by forcing evaluation of the cond_expr branch.
Catalin, Haris: I've kept your R-by on this. Please let me know if
you aren't okay with this change.
[1] https://sashiko.dev/#/patchset/20260408122538.3610871-1-ankur.a.arora%40oracle.com
---
include/asm-generic/barrier.h | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
index c56df9513a08..0ab26e98842c 100644
--- a/include/asm-generic/barrier.h
+++ b/include/asm-generic/barrier.h
@@ -342,6 +342,34 @@ do { \
})
#endif
+/**
+ * smp_cond_load_acquire_timeout() - (Spin) wait for cond with ACQUIRE ordering
+ * until a timeout expires.
+ * @ptr: pointer to the variable to wait on.
+ * @cond_expr: boolean expression to wait for.
+ * @time_expr_ns: monotonic expression that evaluates to time in ns or,
+ * on failure, returns a negative value.
+ * @timeout_ns: timeout value in ns
+ * (Both of the above are assumed to be compatible with s64.)
+ *
+ * Equivalent to using smp_cond_load_acquire() on the condition variable with
+ * a timeout.
+ */
+#ifndef smp_cond_load_acquire_timeout
+#define smp_cond_load_acquire_timeout(ptr, cond_expr, \
+ time_expr_ns, timeout_ns) \
+({ \
+ __unqual_scalar_typeof(*(ptr)) VAL; \
+ VAL = smp_cond_load_relaxed_timeout(ptr, cond_expr, \
+ time_expr_ns, \
+ timeout_ns); \
+ if (cond_expr) \
+ barrier(); \
+ smp_acquire__after_ctrl_dep(); \
+ (typeof(*(ptr)))VAL; \
+})
+#endif
+
/*
* pmem_wmb() ensures that all stores for which the modification
* are written to persistent storage by preceding instructions have
--
2.31.1
^ permalink raw reply related
* [PATCH v12 04/15] arm64: support WFET in smp_cond_load_relaxed_timeout()
From: Ankur Arora @ 2026-06-08 8:04 UTC (permalink / raw)
To: linux-kernel, linux-arch, linux-arm-kernel, linux-pm, bpf
Cc: arnd, catalin.marinas, will, peterz, akpm, mark.rutland, harisokn,
cl, ast, rafael, daniel.lezcano, memxor, zhenglifeng1, xueshuai,
rdunlap, david.laight.linux, broonie, joao.m.martins,
boris.ostrovsky, konrad.wilk, ashok.bhat, Ankur Arora
In-Reply-To: <20260608080440.127491-1-ankur.a.arora@oracle.com>
To handle WFET use __cmpwait_timeout() similarly to __cmpwait(). These
call out to the respective __cmpwait_case_timeout_##sz(),
__cmpwait_case_##sz() functions.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ankur Arora <ankur.a.arora@oracle.com>
---
Notes:
Does not address sashiko [1] comments on:
- timeout overshoot: intentional, not meant to be a precise
interface.
- range edge cases: as mentioned before, better addressed in
code review.
- loadable kernel modules using this will fail to build: niche
interface, not worth fixing unless necessary.
[1] https://sashiko.dev/#/patchset/20260408122538.3610871-1-ankur.a.arora%40oracle.com
---
arch/arm64/include/asm/barrier.h | 8 +++--
arch/arm64/include/asm/cmpxchg.h | 62 +++++++++++++++++++++++++-------
2 files changed, 55 insertions(+), 15 deletions(-)
diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h
index 6190e178db51..fbd71cd4ef4e 100644
--- a/arch/arm64/include/asm/barrier.h
+++ b/arch/arm64/include/asm/barrier.h
@@ -224,8 +224,8 @@ do { \
extern bool arch_timer_evtstrm_available(void);
/*
- * In the common case, cpu_poll_relax() sits waiting in __cmpwait_relaxed()
- * for the ptr value to change.
+ * In the common case, cpu_poll_relax() sits waiting in __cmpwait_relaxed()/
+ * __cmpwait_relaxed_timeout() for the ptr value to change.
*
* Since this period is reasonably long, choose SMP_TIMEOUT_POLL_COUNT
* to be 1, so smp_cond_load_{relaxed,acquire}_timeout() does a
@@ -234,7 +234,9 @@ extern bool arch_timer_evtstrm_available(void);
#define SMP_TIMEOUT_POLL_COUNT 1
#define cpu_poll_relax(ptr, val, timeout_ns) do { \
- if (arch_timer_evtstrm_available()) \
+ if (alternative_has_cap_unlikely(ARM64_HAS_WFXT)) \
+ __cmpwait_relaxed_timeout(ptr, val, timeout_ns); \
+ else if (arch_timer_evtstrm_available()) \
__cmpwait_relaxed(ptr, val); \
else \
cpu_relax(); \
diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
index 6cf3cd6873f5..9e4cdc9e41d1 100644
--- a/arch/arm64/include/asm/cmpxchg.h
+++ b/arch/arm64/include/asm/cmpxchg.h
@@ -12,6 +12,7 @@
#include <asm/barrier.h>
#include <asm/lse.h>
+#include <asm/delay-const.h>
/*
* We need separate acquire parameters for ll/sc and lse, since the full
@@ -212,7 +213,8 @@ __CMPXCHG_GEN(_mb)
#define __CMPWAIT_CASE(w, sfx, sz) \
static inline void __cmpwait_case_##sz(volatile void *ptr, \
- unsigned long val) \
+ unsigned long val, \
+ u64 __maybe_unused timeout_ns) \
{ \
unsigned long tmp; \
\
@@ -235,20 +237,52 @@ __CMPWAIT_CASE( , , 64);
#undef __CMPWAIT_CASE
-#define __CMPWAIT_GEN(sfx) \
-static __always_inline void __cmpwait##sfx(volatile void *ptr, \
- unsigned long val, \
- int size) \
+#define __CMPWAIT_TIMEOUT_CASE(w, sfx, sz) \
+static inline void __cmpwait_case_timeout_##sz(volatile void *ptr, \
+ unsigned long val, \
+ u64 timeout_ns) \
+{ \
+ unsigned long tmp; \
+ u64 ecycles = __delay_cycles() + \
+ NSECS_TO_CYCLES(timeout_ns); \
+ asm volatile( \
+ " sevl\n" \
+ " wfe\n" \
+ " ldxr" #sfx "\t%" #w "[tmp], %[v]\n" \
+ " eor %" #w "[tmp], %" #w "[tmp], %" #w "[val]\n" \
+ " cbnz %" #w "[tmp], 2f\n" \
+ " msr s0_3_c1_c0_0, %[ecycles]\n" \
+ "2:" \
+ : [tmp] "=&r" (tmp), [v] "+Q" (*(u##sz *)ptr) \
+ : [val] "r" (val), [ecycles] "r" (ecycles)); \
+}
+
+__CMPWAIT_TIMEOUT_CASE(w, b, 8);
+__CMPWAIT_TIMEOUT_CASE(w, h, 16);
+__CMPWAIT_TIMEOUT_CASE(w, , 32);
+__CMPWAIT_TIMEOUT_CASE( , , 64);
+
+#undef __CMPWAIT_TIMEOUT_CASE
+
+#define __CMPWAIT_GEN(timeout, sfx) \
+static __always_inline void __cmpwait##timeout##sfx(volatile void *ptr, \
+ unsigned long val, \
+ u64 timeout_ns, \
+ int size) \
{ \
switch (size) { \
case 1: \
- return __cmpwait_case##sfx##_8(ptr, (u8)val); \
+ return __cmpwait_case##timeout##sfx##_8(ptr, (u8)val, \
+ timeout_ns); \
case 2: \
- return __cmpwait_case##sfx##_16(ptr, (u16)val); \
+ return __cmpwait_case##timeout##sfx##_16(ptr, (u16)val, \
+ timeout_ns); \
case 4: \
- return __cmpwait_case##sfx##_32(ptr, val); \
+ return __cmpwait_case##timeout##sfx##_32(ptr, val, \
+ timeout_ns); \
case 8: \
- return __cmpwait_case##sfx##_64(ptr, val); \
+ return __cmpwait_case##timeout##sfx##_64(ptr, val, \
+ timeout_ns); \
default: \
BUILD_BUG(); \
} \
@@ -256,11 +290,15 @@ static __always_inline void __cmpwait##sfx(volatile void *ptr, \
unreachable(); \
}
-__CMPWAIT_GEN()
+__CMPWAIT_GEN( , )
+__CMPWAIT_GEN(_timeout, )
#undef __CMPWAIT_GEN
-#define __cmpwait_relaxed(ptr, val) \
- __cmpwait((ptr), (unsigned long)(val), sizeof(*(ptr)))
+#define __cmpwait_relaxed_timeout(ptr, val, timeout_ns) \
+ __cmpwait_timeout((ptr), (unsigned long)(val), timeout_ns, sizeof(*(ptr)))
+
+#define __cmpwait_relaxed(ptr, val) \
+ __cmpwait((ptr), (unsigned long)(val), 0, sizeof(*(ptr)))
#endif /* __ASM_CMPXCHG_H */
--
2.31.1
^ permalink raw reply related
* [PATCH v12 01/15] asm-generic: barrier: Add smp_cond_load_relaxed_timeout()
From: Ankur Arora @ 2026-06-08 8:04 UTC (permalink / raw)
To: linux-kernel, linux-arch, linux-arm-kernel, linux-pm, bpf
Cc: arnd, catalin.marinas, will, peterz, akpm, mark.rutland, harisokn,
cl, ast, rafael, daniel.lezcano, memxor, zhenglifeng1, xueshuai,
rdunlap, david.laight.linux, broonie, joao.m.martins,
boris.ostrovsky, konrad.wilk, ashok.bhat, Ankur Arora
In-Reply-To: <20260608080440.127491-1-ankur.a.arora@oracle.com>
Add smp_cond_load_relaxed_timeout(), which extends
smp_cond_load_relaxed() to allow waiting for a duration.
We loop around waiting for the condition variable to change while
peridically doing a time-check. The loop uses cpu_poll_relax() to slow
down the busy-wait, which, unless overridden by the architecture
code, amounts to a cpu_relax().
Note that there are two ways for the time-check to fail: the timeout
case or, @time_expr_ns returning an invalid value (negative or zero).
The second failure mode allows for clocks attached to the clock-domain
of @cond_expr -- which might cease to operate meaningfully once some
state internal to @cond_expr has changed -- to fail.
Evaluation of @time_expr_ns: in the fastpath we want to keep the
performance close to smp_cond_load_relaxed(). So defer evaluation
of the potentially costly @time_expr_ns to the slowpath.
This also means that there will always be some hardware dependent
duration that has passed in cpu_poll_relax() iterations at the time
of first evaluation. Additionally cpu_poll_relax() is not guaranteed
to return at timeout boundary. In sum, expect timeout overshoot when
we exit due to expiration of the timeout.
The number of spin iterations before time-check, SMP_TIMEOUT_POLL_COUNT
is chosen to be 200 by default. With a cpu_poll_relax() iteration
taking ~20-30 cycles (measured on a variety of x86 platforms), we
expect a time-check every ~4000-6000 cycles.
The outer limit of the overshoot is double that when working with the
parameters above. This might be higher or lower depending on the
implementation of cpu_poll_relax() across architectures.
Lastly, config option ARCH_HAS_CPU_RELAX indicates availability of a
cpu_poll_relax() that is cheaper than polling. This might be relevant
for cases with a long timeout.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: linux-arch@vger.kernel.org
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ankur Arora <ankur.a.arora@oracle.com>
---
Note: addresses a few Sashiko comments from [1].
We leave unaddressed a couple of potential timeout range issues (around
S64_MAX, or during early boot). I had proposed a version earlier that
would address those in [2]. Since then, however, I've come to the view
that these issues are best handled in code review instead of
overcomplicating the implementation.
[1] https://sashiko.dev/#/patchset/20260408122538.3610871-1-ankur.a.arora%40oracle.com
[2] https://lore.kernel.org/lkml/874iklm1uy.fsf@oracle.com/
---
include/asm-generic/barrier.h | 69 +++++++++++++++++++++++++++++++++++
1 file changed, 69 insertions(+)
diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
index d4f581c1e21d..c56df9513a08 100644
--- a/include/asm-generic/barrier.h
+++ b/include/asm-generic/barrier.h
@@ -273,6 +273,75 @@ do { \
})
#endif
+/*
+ * Number of times we iterate in the loop before doing the time check.
+ * Note that the iteration count assumes that the loop condition is
+ * relatively cheap.
+ */
+#ifndef SMP_TIMEOUT_POLL_COUNT
+#define SMP_TIMEOUT_POLL_COUNT 200
+#endif
+
+/*
+ * Platforms with ARCH_HAS_CPU_RELAX have a cpu_poll_relax() implementation
+ * that is expected to be cheaper (lower power) than pure polling.
+ */
+#ifndef cpu_poll_relax
+#define cpu_poll_relax(ptr, val, timeout_ns) cpu_relax()
+#endif
+
+/**
+ * smp_cond_load_relaxed_timeout() - (Spin) wait for cond with no ordering
+ * guarantees until a timeout expires.
+ * @ptr: pointer to the variable to wait on.
+ * @cond_expr: boolean expression to wait for.
+ * @time_expr_ns: expression that evaluates to monotonic time (in ns) or,
+ * on failure, returns a negative value.
+ * @timeout_ns: timeout value in ns
+ * Both of the above are assumed to be compatible with s64; the signed
+ * value is used to handle the failure case in @time_expr_ns.
+ *
+ * Equivalent to using READ_ONCE() on the condition variable.
+ *
+ * Callers that expect to wait for prolonged durations might want
+ * to take into account the availability of ARCH_HAS_CPU_RELAX.
+ *
+ * Note that @ptr is expected to point to a memory address. Using this
+ * interface with MMIO will be slower (since SMP_TIMEOUT_POLL_COUNT is
+ * tuned for memory) and might also break in interesting architecture
+ * dependent ways.
+ */
+#ifndef smp_cond_load_relaxed_timeout
+#define smp_cond_load_relaxed_timeout(ptr, cond_expr, \
+ time_expr_ns, timeout_ns) \
+({ \
+ typeof(ptr) __PTR = (ptr); \
+ __unqual_scalar_typeof(*(ptr)) VAL; \
+ u32 __count = 0, __spin = SMP_TIMEOUT_POLL_COUNT; \
+ s64 __timeout = (s64)timeout_ns; \
+ s64 __time_now, __time_end = 0; \
+ \
+ for (;;) { \
+ VAL = READ_ONCE(*__PTR); \
+ if (cond_expr) \
+ break; \
+ cpu_poll_relax(__PTR, VAL, (u64)__timeout); \
+ if (++__count < __spin) \
+ continue; \
+ __time_now = (s64)(time_expr_ns); \
+ if (unlikely(__time_end == 0)) \
+ __time_end = __time_now + __timeout; \
+ __timeout = __time_end - __time_now; \
+ if (__time_now <= 0 || __timeout <= 0) { \
+ VAL = READ_ONCE(*__PTR); \
+ break; \
+ } \
+ __count = 0; \
+ } \
+ (typeof(*(ptr)))VAL; \
+})
+#endif
+
/*
* pmem_wmb() ensures that all stores for which the modification
* are written to persistent storage by preceding instructions have
--
2.31.1
^ permalink raw reply related
* [PATCH v12 02/15] arm64: barrier: Support smp_cond_load_relaxed_timeout()
From: Ankur Arora @ 2026-06-08 8:04 UTC (permalink / raw)
To: linux-kernel, linux-arch, linux-arm-kernel, linux-pm, bpf
Cc: arnd, catalin.marinas, will, peterz, akpm, mark.rutland, harisokn,
cl, ast, rafael, daniel.lezcano, memxor, zhenglifeng1, xueshuai,
rdunlap, david.laight.linux, broonie, joao.m.martins,
boris.ostrovsky, konrad.wilk, ashok.bhat, Ankur Arora
In-Reply-To: <20260608080440.127491-1-ankur.a.arora@oracle.com>
Support waiting in smp_cond_load_relaxed_timeout() via
__cmpwait_relaxed(). To ensure that we wake from waiting in
WFE periodically and don't block forever if there are no stores
to ptr, this path is only used when the event-stream is enabled.
Note that when using __cmpwait_relaxed() we ignore the timeout
value, allowing an overshoot by up to the event-stream period.
And, in the unlikely event that the event-stream is unavailable,
fallback to spin-waiting.
Also set SMP_TIMEOUT_POLL_COUNT to 1 so we do the time-check in
each iteration of smp_cond_load_relaxed_timeout().
And finally define ARCH_HAS_CPU_RELAX to indicate that we have
an optimized implementation of cpu_poll_relax().
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Suggested-by: Will Deacon <will@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ankur Arora <ankur.a.arora@oracle.com>
---
Notes: Doesn't address sashiko comments [1]:
- event stream being disabled or broken: the event stream being
disabled is not a production use case; doesn't make sense to
add a fastpath check for this.
- arch_timer_evtstrm_available() isn't exported. On arm64, this
means that smp_cond_load_relaxed_timeout() won't be available
to modules: tight now the use of this interface (and others of
this ilk) is fairly limited. Not worth solving until there's a
use case.
[1] https://sashiko.dev/#/patchset/20260408122538.3610871-1-ankur.a.arora%40oracle.com
---
arch/arm64/Kconfig | 3 +++
arch/arm64/include/asm/barrier.h | 21 +++++++++++++++++++++
2 files changed, 24 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index fe60738e5943..fa676428ec3f 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1606,6 +1606,9 @@ config ARCH_SUPPORTS_CRASH_DUMP
config ARCH_DEFAULT_CRASH_DUMP
def_bool y
+config ARCH_HAS_CPU_RELAX
+ def_bool y
+
config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
def_bool CRASH_RESERVE
diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h
index 9495c4441a46..6190e178db51 100644
--- a/arch/arm64/include/asm/barrier.h
+++ b/arch/arm64/include/asm/barrier.h
@@ -12,6 +12,7 @@
#include <linux/kasan-checks.h>
#include <asm/alternative-macros.h>
+#include <asm/vdso/processor.h>
#define __nops(n) ".rept " #n "\nnop\n.endr\n"
#define nops(n) asm volatile(__nops(n))
@@ -219,6 +220,26 @@ do { \
(typeof(*ptr))VAL; \
})
+/* Re-declared here to avoid include dependency. */
+extern bool arch_timer_evtstrm_available(void);
+
+/*
+ * In the common case, cpu_poll_relax() sits waiting in __cmpwait_relaxed()
+ * for the ptr value to change.
+ *
+ * Since this period is reasonably long, choose SMP_TIMEOUT_POLL_COUNT
+ * to be 1, so smp_cond_load_{relaxed,acquire}_timeout() does a
+ * time-check in each iteration.
+ */
+#define SMP_TIMEOUT_POLL_COUNT 1
+
+#define cpu_poll_relax(ptr, val, timeout_ns) do { \
+ if (arch_timer_evtstrm_available()) \
+ __cmpwait_relaxed(ptr, val); \
+ else \
+ cpu_relax(); \
+} while (0)
+
#include <asm-generic/barrier.h>
#endif /* __ASSEMBLER__ */
--
2.31.1
^ permalink raw reply related
* Re: [PATCH v2 01/11] test: Create a common file for image utilities
From: Mattijs Korpershoek @ 2026-06-08 8:04 UTC (permalink / raw)
To: Simon Glass, u-boot
Cc: Simon Glass, Heinrich Schuchardt, Jerome Forissier, Kory Maincent,
Kuan-Wei Chiu, Marek Vasut, Martin Schwan, Mattijs Korpershoek,
Neil Armstrong, Peng Fan, Philip Molloy, Quentin Schulz,
Raymond Mao, Stefan Roese, Tom Rini, Yao Zi
In-Reply-To: <20260523085455.750591-2-sjg@chromium.org>
Hi Simon,
Thank you for the patch.
On Sat, May 23, 2026 at 02:54, Simon Glass <sjg@chromium.org> wrote:
> Move mkdir_cond(), copy_partition(), and make_extlinux_disk() to a
> common module which can be used by the rest of the image-creation code.
>
> Add myself as a maintainer for this new directory, and the test/py
> framework itself.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v2:
> - Rename the setup_extlinux_image() helper to make_extlinux_disk()
>
> MAINTAINERS | 5 +++
> test/py/img/common.py | 86 ++++++++++++++++++++++++++++++++++++++++
> test/py/tests/test_ut.py | 77 ++---------------------------------
> 3 files changed, 94 insertions(+), 74 deletions(-)
> create mode 100644 test/py/img/common.py
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 0dcc7243124..d33ea42116c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1829,6 +1829,11 @@ M: Liviu Dudau <liviu.dudau@foss.arm.com>
> S: Maintained
> F: drivers/video/tda19988.c
>
> +TEST FRAMEWORK (PYTHON)
> +M: Simon Glass <sjg@chromium.org>
Add a S: line here as well, otherwise get_maintainers.pl reports this as
"unknown"
$ ./scripts/get_maintainer.pl -f test/py
Simon Glass <sjg@chromium.org> (unknown:TEST FRAMEWORK (PYTHON),commit_signer:51/90=57%,authored:42/90=47%)
When S: line is present:
$ ./scripts/get_maintainer.pl -f test/py
Simon Glass <sjg@chromium.org> (maintainer:TEST FRAMEWORK (PYTHON),commit_signer:51/90=57%,authored:42/90=47%)
With the above change:
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
> +F: test/py
> +F: test/py/img
> +
> TI LP5562 LED DRIVER
> M: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
> S: Supported
> diff --git a/test/py/img/common.py b/test/py/img/common.py
> new file mode 100644
> index 00000000000..301b6c840d4
> --- /dev/null
> +++ b/test/py/img/common.py
> @@ -0,0 +1,86 @@
^ permalink raw reply
* Re: [PATCH v3] checkpatch: Check WQ_PERCPU or WQ_UNBOUND presence in alloc_workqueue() users
From: Marco Crivellari @ 2026-06-08 8:04 UTC (permalink / raw)
To: Joe Perches
Cc: linux-kernel, Andy Whitcroft, Dwaipayan Ray, Lukas Bulwahn,
Tejun Heo, Frederic Weisbecker, Sebastian Andrzej Siewior,
Michal Hocko, Breno Leitao
In-Reply-To: <70d52d972aaf1e76836db9d8b93276d578e1df3a.camel@perches.com>
On Sat, Jun 6, 2026 at 3:22 AM Joe Perches <joe@perches.com> wrote:
>
> On Fri, 2026-06-05 at 09:43 +0200, Marco Crivellari wrote:
> > The workqueue API introduced a new flag, WQ_PERCPU, that has to be used when
> > WQ_UNBOUND is not present. One of these flags must be present, but not
> > both of them.
> []
> > Signed-off-by: Marco Crivellari <[marco.crivellari@suse.com](mailto:marco.crivellari@suse.com)>
> > ---
> > Changes in v3:
> > - code aligned to open parens
>
> Not so.
Aha, thanks, I will send a new version.
--
Marco Crivellari
SUSE Labs
^ permalink raw reply
* Re: [PATCH v2] dt-bindings: misc: qcom,fastrpc: Add Maili FastRPC compatible
From: Krzysztof Kozlowski @ 2026-06-08 8:04 UTC (permalink / raw)
To: Yijie Yang
Cc: Srinivas Kandagatla, Amol Maheshwari, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-msm, dri-devel,
devicetree, linux-kernel
In-Reply-To: <20260602-fastrpc-v2-1-67a55e22427b@oss.qualcomm.com>
On Tue, Jun 02, 2026 at 02:51:08PM +0800, Yijie Yang wrote:
> Document compatible string for the FastRPC interface on the Qualcomm Maili
> SoC, which is compatible with the Qualcomm Kaanapali FastRPC and can
> fallback to Kaanapali.
>
> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH] video: fbdev: remove skeletonfb example driver with no remaining purpose
From: Geert Uytterhoeven @ 2026-06-08 8:03 UTC (permalink / raw)
To: Ethan Nelson-Moore; +Cc: linux-fbdev, Helge Deller
In-Reply-To: <20260607015840.11006-1-enelsonmoore@gmail.com>
Hi Ethan,
On Sun, 7 Jun 2026 at 03:58, Ethan Nelson-Moore <enelsonmoore@gmail.com> wrote:
> The skeletonfb driver is intended to serve as an example for writing
> new framebuffer drivers. However, new framebuffer drivers are no longer
> accepted into the kernel because DRM has obsoleted fbdev, so it no
> longer has a purpose. In spite of this, it continues to be updated to
> reflect fbdev API changes, wasting maintainers' time. Remove it.
>
> Signed-off-by: Ethan Nelson-Moore <enelsonmoore@gmail.com>
Thanks for your patch!
Makes sense, as we still have vfb.c, which can actually be built.
Perhaps some of the comments and/or kerneldoc should be moved
elsewhere, so it is preserved?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* Re: [PATCH v5 04/10] media: imx219: Make control handler ops for PIXEL_RATE NULL
From: Laurent Pinchart @ 2026-06-08 8:03 UTC (permalink / raw)
To: Jacopo Mondi
Cc: Sakari Ailus, linux-media, hans, Prabhakar, Kate Hsuan,
Dave Stevenson, Tommaso Merciai, Benjamin Mugnier,
Sylvain Petinot, Christophe JAILLET, Julien Massot,
Naushir Patuck, Yan, Dongcheng, Stefan Klug, Mirela Rabulea,
André Apitzsch, Heimir Thor Sverrisson, Kieran Bingham,
Mehdi Djait, Ricardo Ribalda Delgado, Hans de Goede,
Tomi Valkeinen, David Plowman, Yu, Ong Hock, Ng, Khai Wen,
Jai Luthra, Rishikesh Donadkar
In-Reply-To: <aiZ0a3nGqp6N7GD3@zed>
On Mon, Jun 08, 2026 at 09:53:17AM +0200, Jacopo Mondi wrote:
> Hi Laurent
> sorry if I reply in place of Sakari but I got this fresh
Thanks :-)
> On Mon, Jun 08, 2026 at 10:36:53AM +0300, Laurent Pinchart wrote:
> > On Mon, Jun 08, 2026 at 12:53:50AM +0300, Sakari Ailus wrote:
> > > The PIXEL_RATE control exists to convey the value to the userspace and has
> > > no configuration that would need to be programmed to the sensor. Make the
> > > control handler ops for the PIXEL_RATE control NULL and avoid a warning
> > > (as well as returning an error) from the driver.
> >
> > I thought the standard way to handle pixel rate being read only was to
> > set the V4L2_CTRL_FLAG_READ_ONLY flag, like we do for e.g.
> > V4L2_CID_LINK_FREQ. Is that not correct ?
>
> PIXEL_RATE is RO by default
>
> drivers/media/v4l2-core/v4l2-ctrls-defs.c: case V4L2_CID_PIXEL_RATE:
> drivers/media/v4l2-core/v4l2-ctrls-defs.c- *type = V4L2_CTRL_TYPE_INTEGER64;
> drivers/media/v4l2-core/v4l2-ctrls-defs.c- *flags |= V4L2_CTRL_FLAG_READ_ONLY;
> drivers/media/v4l2-core/v4l2-ctrls-defs.c- break;
>
> The purpose of setting the ctrl_ops member to NULL is to avoid having
> to handle RO controls in the driver implementation of .s_ctrl().
Shouldn't the V4L2 control framework avoid .s_ctrl() calls for read-only
controls ? I thought it did already.
> > > Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
> > > ---
> > > drivers/media/i2c/imx219.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c
> > > index e681f80f9e3e..86683fe8a79e 100644
> > > --- a/drivers/media/i2c/imx219.c
> > > +++ b/drivers/media/i2c/imx219.c
> > > @@ -556,7 +556,7 @@ static int imx219_init_controls(struct imx219 *imx219)
> > > return ret;
> > >
> > > /* By default, PIXEL_RATE is read only */
> > > - imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
> > > + imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, NULL,
> > > V4L2_CID_PIXEL_RATE,
> > > imx219_get_pixel_rate(imx219),
> > > imx219_get_pixel_rate(imx219), 1,
--
Regards,
Laurent Pinchart
^ permalink raw reply
* [tip: x86/msr] x86/msr: Switch rdmsrl_on_cpu() user to rdmsrq_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: Juergen Gross, Ingo Molnar, Dave Hansen, K Prateek Nayak,
Huang Rui, Mario Limonciello, x86, linux-kernel
In-Reply-To: <20260608051741.3207435-2-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: e2f659dd80a8567a0dad2d45b965ef351aeb88bf
Gitweb: https://git.kernel.org/tip/e2f659dd80a8567a0dad2d45b965ef351aeb88bf
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:31 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:36 +02:00
x86/msr: Switch rdmsrl_on_cpu() user to rdmsrq_on_cpu()
rdmsrl_on_cpu() is a deprecated synonym for rdmsrq_on_cpu().
Switch its only user to rdmsrq_on_cpu().
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: K Prateek Nayak <kprateek.nayak@amd.com>
Cc: Huang Rui <ray.huang@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Link: https://patch.msgid.link/20260608051741.3207435-2-jgross@suse.com
---
drivers/cpufreq/amd-pstate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 62b5d99..7847cf3 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -476,7 +476,7 @@ static int msr_init_perf(struct amd_cpudata *cpudata)
if (ret)
return ret;
- ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &cppc_req);
+ ret = rdmsrq_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &cppc_req);
if (ret)
return ret;
^ permalink raw reply related
* [tip: x86/msr] x86/msr: Switch rdmsr_on_cpu() users to rdmsrq_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: K Prateek Nayak, Juergen Gross, Ingo Molnar, Dave Hansen,
Rafael J. Wysocki, Viresh Kumar, Guenter Roeck, Daniel Lezcano,
x86, linux-kernel
In-Reply-To: <20260608051741.3207435-4-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: 40b57cfbd29ec71a7a401d1836fe5c94a6f2e230
Gitweb: https://git.kernel.org/tip/40b57cfbd29ec71a7a401d1836fe5c94a6f2e230
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:33 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:49 +02:00
x86/msr: Switch rdmsr_on_cpu() users to rdmsrq_on_cpu()
In order to prepare retiring rdmsr_on_cpu() switch rdmsr_on_cpu() users
to rdmsrq_on_cpu().
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Rafael J. Wysocki <rafael@kernel.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Daniel Lezcano <daniel.lezcano@kernel.org>
Link: https://patch.msgid.link/20260608051741.3207435-4-jgross@suse.com
---
arch/x86/include/asm/msr.h | 2 +-
arch/x86/kernel/cpu/mce/amd.c | 6 ++--
arch/x86/kernel/cpu/mce/inject.c | 8 ++---
drivers/cpufreq/amd_freq_sensitivity.c | 6 +---
drivers/cpufreq/p4-clockmod.c | 32 +++++++++----------
drivers/cpufreq/speedstep-centrino.c | 27 ++++++++--------
drivers/hwmon/coretemp.c | 12 +++----
drivers/thermal/intel/x86_pkg_temp_thermal.c | 25 +++++++--------
8 files changed, 58 insertions(+), 60 deletions(-)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index fddadbc..d5985d6 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -292,7 +292,7 @@ static inline int wrmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
static inline void rdmsr_on_cpus(const struct cpumask *m, u32 msr_no,
struct msr __percpu *msrs)
{
- rdmsr_on_cpu(0, msr_no, raw_cpu_ptr(&msrs->l), raw_cpu_ptr(&msrs->h));
+ rdmsrq_on_cpu(0, msr_no, raw_cpu_ptr(&msrs->q));
}
static inline void wrmsr_on_cpus(const struct cpumask *m, u32 msr_no,
struct msr __percpu *msrs)
diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index 6605a02..1305d9a 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -969,13 +969,13 @@ store_threshold_limit(struct threshold_block *b, const char *buf, size_t size)
static ssize_t show_error_count(struct threshold_block *b, char *buf)
{
- u32 lo, hi;
+ struct msr val;
/* CPU might be offline by now */
- if (rdmsr_on_cpu(b->cpu, b->address, &lo, &hi))
+ if (rdmsrq_on_cpu(b->cpu, b->address, &val.q))
return -ENODEV;
- return sprintf(buf, "%u\n", ((hi & THRESHOLD_MAX) -
+ return sprintf(buf, "%u\n", ((val.h & THRESHOLD_MAX) -
(THRESHOLD_MAX - b->threshold_limit)));
}
diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inject.c
index d02c4f5..bee9c35 100644
--- a/arch/x86/kernel/cpu/mce/inject.c
+++ b/arch/x86/kernel/cpu/mce/inject.c
@@ -316,18 +316,18 @@ static struct notifier_block inject_nb = {
*/
static int toggle_hw_mce_inject(unsigned int cpu, bool enable)
{
- u32 l, h;
+ struct msr val;
int err;
- err = rdmsr_on_cpu(cpu, MSR_K7_HWCR, &l, &h);
+ err = rdmsrq_on_cpu(cpu, MSR_K7_HWCR, &val.q);
if (err) {
pr_err("%s: error reading HWCR\n", __func__);
return err;
}
- enable ? (l |= BIT(18)) : (l &= ~BIT(18));
+ enable ? (val.l |= BIT(18)) : (val.l &= ~BIT(18));
- err = wrmsr_on_cpu(cpu, MSR_K7_HWCR, l, h);
+ err = wrmsr_on_cpu(cpu, MSR_K7_HWCR, val.l, val.h);
if (err)
pr_err("%s: error writing HWCR\n", __func__);
diff --git a/drivers/cpufreq/amd_freq_sensitivity.c b/drivers/cpufreq/amd_freq_sensitivity.c
index 13fed4b..739d54d 100644
--- a/drivers/cpufreq/amd_freq_sensitivity.c
+++ b/drivers/cpufreq/amd_freq_sensitivity.c
@@ -51,10 +51,8 @@ static unsigned int amd_powersave_bias_target(struct cpufreq_policy *policy,
if (!policy->freq_table)
return freq_next;
- rdmsr_on_cpu(policy->cpu, MSR_AMD64_FREQ_SENSITIVITY_ACTUAL,
- &actual.l, &actual.h);
- rdmsr_on_cpu(policy->cpu, MSR_AMD64_FREQ_SENSITIVITY_REFERENCE,
- &reference.l, &reference.h);
+ rdmsrq_on_cpu(policy->cpu, MSR_AMD64_FREQ_SENSITIVITY_ACTUAL, &actual.q);
+ rdmsrq_on_cpu(policy->cpu, MSR_AMD64_FREQ_SENSITIVITY_REFERENCE, &reference.q);
actual.h &= 0x00ffffff;
reference.h &= 0x00ffffff;
diff --git a/drivers/cpufreq/p4-clockmod.c b/drivers/cpufreq/p4-clockmod.c
index 69c1923..d96e8b6 100644
--- a/drivers/cpufreq/p4-clockmod.c
+++ b/drivers/cpufreq/p4-clockmod.c
@@ -51,24 +51,24 @@ static unsigned int cpufreq_p4_get(unsigned int cpu);
static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
{
- u32 l, h;
+ struct msr val;
if ((newstate > DC_DISABLE) || (newstate == DC_RESV))
return -EINVAL;
- rdmsr_on_cpu(cpu, MSR_IA32_THERM_STATUS, &l, &h);
+ rdmsrq_on_cpu(cpu, MSR_IA32_THERM_STATUS, &val.q);
- if (l & 0x01)
+ if (val.l & 0x01)
pr_debug("CPU#%d currently thermal throttled\n", cpu);
if (has_N44_O17_errata[cpu] &&
(newstate == DC_25PT || newstate == DC_DFLT))
newstate = DC_38PT;
- rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h);
+ rdmsrq_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &val.q);
if (newstate == DC_DISABLE) {
pr_debug("CPU#%d disabling modulation\n", cpu);
- wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, l & ~(1<<4), h);
+ wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, val.l & ~(1<<4), val.h);
} else {
pr_debug("CPU#%d setting duty cycle to %d%%\n",
cpu, ((125 * newstate) / 10));
@@ -77,9 +77,9 @@ static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
* bits 3-1 : duty cycle
* bit 0 : reserved
*/
- l = (l & ~14);
- l = l | (1<<4) | ((newstate & 0x7)<<1);
- wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, l, h);
+ val.l = (val.l & ~14);
+ val.l = val.l | (1<<4) | ((newstate & 0x7)<<1);
+ wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, val.l, val.h);
}
return 0;
@@ -205,18 +205,18 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
static unsigned int cpufreq_p4_get(unsigned int cpu)
{
- u32 l, h;
+ struct msr val;
- rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h);
+ rdmsrq_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &val.q);
- if (l & 0x10) {
- l = l >> 1;
- l &= 0x7;
+ if (val.l & 0x10) {
+ val.l = val.l >> 1;
+ val.l &= 0x7;
} else
- l = DC_DISABLE;
+ val.l = DC_DISABLE;
- if (l != DC_DISABLE)
- return stock_freq * l / 8;
+ if (val.l != DC_DISABLE)
+ return stock_freq * val.l / 8;
return stock_freq;
}
diff --git a/drivers/cpufreq/speedstep-centrino.c b/drivers/cpufreq/speedstep-centrino.c
index 3e6e85a..cefee19 100644
--- a/drivers/cpufreq/speedstep-centrino.c
+++ b/drivers/cpufreq/speedstep-centrino.c
@@ -322,11 +322,11 @@ static unsigned extract_clock(unsigned msr, unsigned int cpu, int failsafe)
/* Return the current CPU frequency in kHz */
static unsigned int get_cur_freq(unsigned int cpu)
{
- unsigned l, h;
+ struct msr val;
unsigned clock_freq;
- rdmsr_on_cpu(cpu, MSR_IA32_PERF_STATUS, &l, &h);
- clock_freq = extract_clock(l, cpu, 0);
+ rdmsrq_on_cpu(cpu, MSR_IA32_PERF_STATUS, &val.q);
+ clock_freq = extract_clock(val.l, cpu, 0);
if (unlikely(clock_freq == 0)) {
/*
@@ -335,8 +335,8 @@ static unsigned int get_cur_freq(unsigned int cpu)
* P-state transition (like TM2). Get the last freq set
* in PERF_CTL.
*/
- rdmsr_on_cpu(cpu, MSR_IA32_PERF_CTL, &l, &h);
- clock_freq = extract_clock(l, cpu, 1);
+ rdmsrq_on_cpu(cpu, MSR_IA32_PERF_CTL, &val.q);
+ clock_freq = extract_clock(val.l, cpu, 1);
}
return clock_freq;
}
@@ -417,7 +417,8 @@ static void centrino_cpu_exit(struct cpufreq_policy *policy)
*/
static int centrino_target(struct cpufreq_policy *policy, unsigned int index)
{
- unsigned int msr, oldmsr = 0, h = 0, cpu = policy->cpu;
+ unsigned int msr, cpu = policy->cpu;
+ struct msr oldmsr = { .q = 0 };
int retval = 0;
unsigned int j, first_cpu;
struct cpufreq_frequency_table *op_points;
@@ -459,22 +460,22 @@ static int centrino_target(struct cpufreq_policy *policy, unsigned int index)
msr = op_points->driver_data;
if (first_cpu) {
- rdmsr_on_cpu(good_cpu, MSR_IA32_PERF_CTL, &oldmsr, &h);
- if (msr == (oldmsr & 0xffff)) {
+ rdmsrq_on_cpu(good_cpu, MSR_IA32_PERF_CTL, &oldmsr.q);
+ if (msr == (oldmsr.l & 0xffff)) {
pr_debug("no change needed - msr was and needs "
- "to be %x\n", oldmsr);
+ "to be %x\n", oldmsr.l);
retval = 0;
goto out;
}
first_cpu = 0;
/* all but 16 LSB are reserved, treat them with care */
- oldmsr &= ~0xffff;
+ oldmsr.l &= ~0xffff;
msr &= 0xffff;
- oldmsr |= msr;
+ oldmsr.l |= msr;
}
- wrmsr_on_cpu(good_cpu, MSR_IA32_PERF_CTL, oldmsr, h);
+ wrmsr_on_cpu(good_cpu, MSR_IA32_PERF_CTL, oldmsr.l, oldmsr.h);
if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY)
break;
@@ -490,7 +491,7 @@ static int centrino_target(struct cpufreq_policy *policy, unsigned int index)
*/
for_each_cpu(j, covered_cpus)
- wrmsr_on_cpu(j, MSR_IA32_PERF_CTL, oldmsr, h);
+ wrmsr_on_cpu(j, MSR_IA32_PERF_CTL, oldmsr.l, oldmsr.h);
}
retval = 0;
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 6a0d947..1259c78 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -356,15 +356,15 @@ static ssize_t show_label(struct device *dev,
static ssize_t show_crit_alarm(struct device *dev,
struct device_attribute *devattr, char *buf)
{
- u32 eax, edx;
+ struct msr val;
struct temp_data *tdata = container_of(devattr, struct temp_data,
sd_attrs[ATTR_CRIT_ALARM]);
mutex_lock(&tdata->update_lock);
- rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
+ rdmsrq_on_cpu(tdata->cpu, tdata->status_reg, &val.q);
mutex_unlock(&tdata->update_lock);
- return sprintf(buf, "%d\n", (eax >> 5) & 1);
+ return sprintf(buf, "%d\n", (val.l >> 5) & 1);
}
static ssize_t show_tjmax(struct device *dev,
@@ -398,7 +398,7 @@ static ssize_t show_ttarget(struct device *dev,
static ssize_t show_temp(struct device *dev,
struct device_attribute *devattr, char *buf)
{
- u32 eax, edx;
+ struct msr val;
struct temp_data *tdata = container_of(devattr, struct temp_data, sd_attrs[ATTR_TEMP]);
int tjmax;
@@ -407,14 +407,14 @@ static ssize_t show_temp(struct device *dev,
tjmax = get_tjmax(tdata, dev);
/* Check whether the time interval has elapsed */
if (time_after(jiffies, tdata->last_updated + HZ)) {
- rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
+ rdmsrq_on_cpu(tdata->cpu, tdata->status_reg, &val.q);
/*
* Ignore the valid bit. In all observed cases the register
* value is either low or zero if the valid bit is 0.
* Return it instead of reporting an error which doesn't
* really help at all.
*/
- tdata->temp = tjmax - ((eax >> 16) & 0xff) * 1000;
+ tdata->temp = tjmax - ((val.l >> 16) & 0xff) * 1000;
tdata->last_updated = jiffies;
}
diff --git a/drivers/thermal/intel/x86_pkg_temp_thermal.c b/drivers/thermal/intel/x86_pkg_temp_thermal.c
index 5401097..2e7de8c 100644
--- a/drivers/thermal/intel/x86_pkg_temp_thermal.c
+++ b/drivers/thermal/intel/x86_pkg_temp_thermal.c
@@ -125,8 +125,9 @@ sys_set_trip_temp(struct thermal_zone_device *tzd,
{
struct zone_device *zonedev = thermal_zone_device_priv(tzd);
unsigned int trip_index = THERMAL_TRIP_PRIV_TO_INT(trip->priv);
- u32 l, h, mask, shift, intr;
+ u32 mask, shift, intr;
int tj_max, val, ret;
+ struct msr v;
if (temp == THERMAL_TEMP_INVALID)
temp = 0;
@@ -141,8 +142,7 @@ sys_set_trip_temp(struct thermal_zone_device *tzd,
if (trip_index >= MAX_NUMBER_OF_TRIPS || val < 0 || val > 0x7f)
return -EINVAL;
- ret = rdmsr_on_cpu(zonedev->cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT,
- &l, &h);
+ ret = rdmsrq_on_cpu(zonedev->cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &v.q);
if (ret < 0)
return ret;
@@ -155,20 +155,19 @@ sys_set_trip_temp(struct thermal_zone_device *tzd,
shift = THERM_SHIFT_THRESHOLD0;
intr = THERM_INT_THRESHOLD0_ENABLE;
}
- l &= ~mask;
+ v.l &= ~mask;
/*
* When users space sets a trip temperature == 0, which is indication
* that, it is no longer interested in receiving notifications.
*/
if (!temp) {
- l &= ~intr;
+ v.l &= ~intr;
} else {
- l |= val << shift;
- l |= intr;
+ v.l |= val << shift;
+ v.l |= intr;
}
- return wrmsr_on_cpu(zonedev->cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT,
- l, h);
+ return wrmsr_on_cpu(zonedev->cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, v.l, v.h);
}
/* Thermal zone callback registry */
@@ -277,7 +276,8 @@ static int pkg_temp_thermal_trips_init(int cpu, int tj_max,
struct thermal_trip *trips, int num_trips)
{
unsigned long thres_reg_value;
- u32 mask, shift, eax, edx;
+ u32 mask, shift;
+ struct msr val;
int ret, i;
for (i = 0; i < num_trips; i++) {
@@ -290,12 +290,11 @@ static int pkg_temp_thermal_trips_init(int cpu, int tj_max,
shift = THERM_SHIFT_THRESHOLD0;
}
- ret = rdmsr_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT,
- &eax, &edx);
+ ret = rdmsrq_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &val.q);
if (ret < 0)
return ret;
- thres_reg_value = (eax & mask) >> shift;
+ thres_reg_value = (val.l & mask) >> shift;
trips[i].temperature = thres_reg_value ?
tj_max - thres_reg_value * 1000 : THERMAL_TEMP_INVALID;
^ permalink raw reply related
* [tip: x86/msr] x86/msr: Remove rdmsrl_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: K Prateek Nayak, Juergen Gross, Ingo Molnar, Dave Hansen,
H. Peter Anvin, x86, linux-kernel
In-Reply-To: <20260608051741.3207435-3-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: a83db17073f0ecb265f0038aa425343dd2de25ec
Gitweb: https://git.kernel.org/tip/a83db17073f0ecb265f0038aa425343dd2de25ec
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:32 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:49 +02:00
x86/msr: Remove rdmsrl_on_cpu()
rdmsrl_on_cpu() has no users left. Delete it.
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Link: https://patch.msgid.link/20260608051741.3207435-3-jgross@suse.com
---
arch/x86/include/asm/msr.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 9c2ea29..fddadbc 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -329,7 +329,6 @@ static inline int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
/* Compatibility wrappers: */
#define rdmsrl(msr, val) rdmsrq(msr, val)
#define wrmsrl(msr, val) wrmsrq(msr, val)
-#define rdmsrl_on_cpu(cpu, msr, q) rdmsrq_on_cpu(cpu, msr, q)
#endif /* __ASSEMBLER__ */
#endif /* _ASM_X86_MSR_H */
^ permalink raw reply related
* [tip: x86/msr] x86/msr: Remove rdmsr_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: K Prateek Nayak, Juergen Gross, Ingo Molnar, Dave Hansen,
H. Peter Anvin, x86, linux-kernel
In-Reply-To: <20260608051741.3207435-5-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: 5ad93d5cd69392e35b6d3e4dcfc5d07c2b4afa4b
Gitweb: https://git.kernel.org/tip/5ad93d5cd69392e35b6d3e4dcfc5d07c2b4afa4b
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:34 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:49 +02:00
x86/msr: Remove rdmsr_on_cpu()
rdmsr_on_cpu() has no users left. Delete it.
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Link: https://patch.msgid.link/20260608051741.3207435-5-jgross@suse.com
---
arch/x86/include/asm/msr.h | 6 ------
arch/x86/lib/msr-smp.c | 16 ----------------
2 files changed, 22 deletions(-)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index d5985d6..22f914f 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -256,7 +256,6 @@ int msr_set_bit(u32 msr, u8 bit);
int msr_clear_bit(u32 msr, u8 bit);
#ifdef CONFIG_SMP
-int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
int wrmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
@@ -269,11 +268,6 @@ int wrmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
#else /* CONFIG_SMP */
-static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
-{
- rdmsr(msr_no, *l, *h);
- return 0;
-}
static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
{
wrmsr(msr_no, l, h);
diff --git a/arch/x86/lib/msr-smp.c b/arch/x86/lib/msr-smp.c
index b8f6341..65658e8 100644
--- a/arch/x86/lib/msr-smp.c
+++ b/arch/x86/lib/msr-smp.c
@@ -31,22 +31,6 @@ static void __wrmsr_on_cpu(void *info)
wrmsr(rv->msr_no, reg->l, reg->h);
}
-int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
-{
- int err;
- struct msr_info rv;
-
- memset(&rv, 0, sizeof(rv));
-
- rv.msr_no = msr_no;
- err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1);
- *l = rv.reg.l;
- *h = rv.reg.h;
-
- return err;
-}
-EXPORT_SYMBOL(rdmsr_on_cpu);
-
int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
{
int err;
^ permalink raw reply related
* Re: [PATCH v13 13/22] KVM: selftests: Set first memory region as shared if guest_memfd
From: Binbin Wu @ 2026-06-08 8:03 UTC (permalink / raw)
To: Lisa Wang
Cc: Andrew Jones, Ackerley Tng, Chao Gao, Chenyi Qiang, Dave Hansen,
Erdem Aktas, Ira Weiny, Isaku Yamahata, Kiryl Shutsemau,
linux-kselftest, Paolo Bonzini, Pratik R. Sampat, Reinette Chatre,
Rick Edgecombe, Roger Wang, Ryan Afranji, Sagi Shahar,
Sean Christopherson, Shuah Khan, Oliver Upton,
Jeremiah McReynolds, kvm, linux-coco, linux-kernel, x86
In-Reply-To: <20260521-tdx-selftests-v13-v13-13-6983ae4c3a4d@google.com>
On 5/22/2026 7:16 AM, Lisa Wang wrote:
> Set the initial state of the first memory region as shared if it is
> backed by guest_memfd, so that the KVM selftest framework functions can
> populate mmap()-ed guest_memfd memory the same way memory from other
> memory providers are populated.
>
> For CoCo VMs, pages that need to be private are explicitly set to
> private before executing the VM.
>
> Signed-off-by: Lisa Wang <wyihan@google.com>
> ---
> tools/testing/selftests/kvm/lib/kvm_util.c | 16 ++++++++++------
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/tools/testing/selftests/kvm/lib/kvm_util.c b/tools/testing/selftests/kvm/lib/kvm_util.c
> index 9a29540fff40..1bab7d76a59c 100644
> --- a/tools/testing/selftests/kvm/lib/kvm_util.c
> +++ b/tools/testing/selftests/kvm/lib/kvm_util.c
> @@ -484,8 +484,10 @@ struct kvm_vm *__vm_create(struct vm_shape shape, u32 nr_runnable_vcpus,
> u64 nr_pages = vm_nr_pages_required(shape.mode, nr_runnable_vcpus,
> nr_extra_pages);
> struct userspace_mem_region *slot0;
> + u64 gmem_flags = 0;
> struct kvm_vm *vm;
> - int i, flags;
> + int flags = 0;
> + int i;
>
> kvm_set_files_rlimit(nr_runnable_vcpus);
>
> @@ -495,14 +497,16 @@ struct kvm_vm *__vm_create(struct vm_shape shape, u32 nr_runnable_vcpus,
> vm = ____vm_create(shape);
>
> /*
> - * Force GUEST_MEMFD for the primary memory region if necessary, e.g.
> - * for CoCo VMs that require GUEST_MEMFD backed private memory.
> + * Force GUEST_MEMFD for the primary memory region if necessary, and
> + * initialize it as shared so the selftest framework can populate it
> + * exactly like other memory providers.
> */
> - flags = 0;
> - if (is_guest_memfd_required(shape))
> + if (is_guest_memfd_required(shape)) {
> flags |= KVM_MEM_GUEST_MEMFD;
> + gmem_flags |= GUEST_MEMFD_FLAG_INIT_SHARED;
> + }
>
> - vm_userspace_mem_region_add(vm, VM_MEM_SRC_ANONYMOUS, 0, 0, nr_pages, flags);
> + vm_mem_add(vm, VM_MEM_SRC_ANONYMOUS, 0, 0, nr_pages, flags, -1, 0, gmem_flags);
The build failed due to this:
lib/kvm_util.c: In function ‘__vm_create’:
lib/kvm_util.c:507:9: error: too many arguments to function ‘vm_mem_add’
507 | vm_mem_add(vm, VM_MEM_SRC_ANONYMOUS, 0, 0, nr_pages, flags, -1, 0, gmem_flags);
| ^~~~~~~~~~
In file included from lib/kvm_util.c:9:
include/kvm_util.h:714:6: note: declared here
714 | void vm_mem_add(struct kvm_vm *vm, enum vm_mem_backing_src_type src_type,
| ^~~~~~~~~~
lib/kvm_util.c: At top level:
cc1: note: unrecognized command-line option ‘-Wno-gnu-variable-sized-type-not-at-end’ may have been intended to silence earlier diagnostics
It seems the patch set doesn't wire gmem_flags parameter to vm_mem_add().
> for (i = 0; i < NR_MEM_REGIONS; i++)
> vm->memslots[i] = 0;
>
>
^ permalink raw reply
* [tip: x86/msr] x86/msr: Switch wrmsr_on_cpu() users to wrmsrq_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: K Prateek Nayak, Juergen Gross, Ingo Molnar, Dave Hansen,
Viresh Kumar, Rafael J. Wysocki, Daniel Lezcano, x86,
linux-kernel
In-Reply-To: <20260608051741.3207435-6-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: 35971831aa5e0d40046e54422f2ba04734617109
Gitweb: https://git.kernel.org/tip/35971831aa5e0d40046e54422f2ba04734617109
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:35 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:49 +02:00
x86/msr: Switch wrmsr_on_cpu() users to wrmsrq_on_cpu()
In order to prepare retiring wrmsr_on_cpu() switch wrmsr_on_cpu() users
to wrmsrq_on_cpu().
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Rafael J. Wysocki <rafael@kernel.org>
Cc: Daniel Lezcano <daniel.lezcano@kernel.org>
Link: https://patch.msgid.link/20260608051741.3207435-6-jgross@suse.com
---
arch/x86/events/intel/ds.c | 11 ++++-------
arch/x86/include/asm/msr.h | 2 +-
arch/x86/kernel/cpu/mce/inject.c | 2 +-
drivers/cpufreq/p4-clockmod.c | 4 ++--
drivers/cpufreq/speedstep-centrino.c | 4 ++--
drivers/thermal/intel/x86_pkg_temp_thermal.c | 2 +-
6 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 7f0d515..5b9c013 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -780,9 +780,7 @@ void init_debug_store_on_cpu(int cpu)
if (!ds)
return;
- wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA,
- (u32)((u64)(unsigned long)ds),
- (u32)((u64)(unsigned long)ds >> 32));
+ wrmsrq_on_cpu(cpu, MSR_IA32_DS_AREA, (u64)(unsigned long)ds);
}
void fini_debug_store_on_cpu(int cpu)
@@ -790,7 +788,7 @@ void fini_debug_store_on_cpu(int cpu)
if (!per_cpu(cpu_hw_events, cpu).ds)
return;
- wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA, 0, 0);
+ wrmsrq_on_cpu(cpu, MSR_IA32_DS_AREA, 0);
}
static DEFINE_PER_CPU(void *, insn_buffer);
@@ -1095,8 +1093,7 @@ void init_arch_pebs_on_cpu(int cpu)
* contiguous physical buffer (__alloc_pages_node() with order)
*/
arch_pebs_base = virt_to_phys(cpuc->pebs_vaddr) | PEBS_BUFFER_SHIFT;
- wrmsr_on_cpu(cpu, MSR_IA32_PEBS_BASE, (u32)arch_pebs_base,
- (u32)(arch_pebs_base >> 32));
+ wrmsrq_on_cpu(cpu, MSR_IA32_PEBS_BASE, arch_pebs_base);
x86_pmu.pebs_active = 1;
}
@@ -1105,7 +1102,7 @@ inline void fini_arch_pebs_on_cpu(int cpu)
if (!x86_pmu.arch_pebs)
return;
- wrmsr_on_cpu(cpu, MSR_IA32_PEBS_BASE, 0, 0);
+ wrmsrq_on_cpu(cpu, MSR_IA32_PEBS_BASE, 0);
}
/*
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 22f914f..6e0d7a6 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -291,7 +291,7 @@ static inline void rdmsr_on_cpus(const struct cpumask *m, u32 msr_no,
static inline void wrmsr_on_cpus(const struct cpumask *m, u32 msr_no,
struct msr __percpu *msrs)
{
- wrmsr_on_cpu(0, msr_no, raw_cpu_read(msrs->l), raw_cpu_read(msrs->h));
+ wrmsrq_on_cpu(0, msr_no, raw_cpu_read(msrs->q));
}
static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
u32 *l, u32 *h)
diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inject.c
index bee9c35..6d30e77 100644
--- a/arch/x86/kernel/cpu/mce/inject.c
+++ b/arch/x86/kernel/cpu/mce/inject.c
@@ -327,7 +327,7 @@ static int toggle_hw_mce_inject(unsigned int cpu, bool enable)
enable ? (val.l |= BIT(18)) : (val.l &= ~BIT(18));
- err = wrmsr_on_cpu(cpu, MSR_K7_HWCR, val.l, val.h);
+ err = wrmsrq_on_cpu(cpu, MSR_K7_HWCR, val.q);
if (err)
pr_err("%s: error writing HWCR\n", __func__);
diff --git a/drivers/cpufreq/p4-clockmod.c b/drivers/cpufreq/p4-clockmod.c
index d96e8b6..c1690aa 100644
--- a/drivers/cpufreq/p4-clockmod.c
+++ b/drivers/cpufreq/p4-clockmod.c
@@ -68,7 +68,7 @@ static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
rdmsrq_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &val.q);
if (newstate == DC_DISABLE) {
pr_debug("CPU#%d disabling modulation\n", cpu);
- wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, val.l & ~(1<<4), val.h);
+ wrmsrq_on_cpu(cpu, MSR_IA32_THERM_CONTROL, val.q & ~(1ULL << 4));
} else {
pr_debug("CPU#%d setting duty cycle to %d%%\n",
cpu, ((125 * newstate) / 10));
@@ -79,7 +79,7 @@ static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
*/
val.l = (val.l & ~14);
val.l = val.l | (1<<4) | ((newstate & 0x7)<<1);
- wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, val.l, val.h);
+ wrmsrq_on_cpu(cpu, MSR_IA32_THERM_CONTROL, val.q);
}
return 0;
diff --git a/drivers/cpufreq/speedstep-centrino.c b/drivers/cpufreq/speedstep-centrino.c
index cefee19..9237ed8 100644
--- a/drivers/cpufreq/speedstep-centrino.c
+++ b/drivers/cpufreq/speedstep-centrino.c
@@ -475,7 +475,7 @@ static int centrino_target(struct cpufreq_policy *policy, unsigned int index)
oldmsr.l |= msr;
}
- wrmsr_on_cpu(good_cpu, MSR_IA32_PERF_CTL, oldmsr.l, oldmsr.h);
+ wrmsrq_on_cpu(good_cpu, MSR_IA32_PERF_CTL, oldmsr.q);
if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY)
break;
@@ -491,7 +491,7 @@ static int centrino_target(struct cpufreq_policy *policy, unsigned int index)
*/
for_each_cpu(j, covered_cpus)
- wrmsr_on_cpu(j, MSR_IA32_PERF_CTL, oldmsr.l, oldmsr.h);
+ wrmsrq_on_cpu(j, MSR_IA32_PERF_CTL, oldmsr.q);
}
retval = 0;
diff --git a/drivers/thermal/intel/x86_pkg_temp_thermal.c b/drivers/thermal/intel/x86_pkg_temp_thermal.c
index 2e7de8c..144603c 100644
--- a/drivers/thermal/intel/x86_pkg_temp_thermal.c
+++ b/drivers/thermal/intel/x86_pkg_temp_thermal.c
@@ -167,7 +167,7 @@ sys_set_trip_temp(struct thermal_zone_device *tzd,
v.l |= intr;
}
- return wrmsr_on_cpu(zonedev->cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, v.l, v.h);
+ return wrmsrq_on_cpu(zonedev->cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, v.q);
}
/* Thermal zone callback registry */
^ permalink raw reply related
* [PATCH v1 2/2] drm/panel-edp: Add BOE NV116WH2-M30, BOE NT116WHM-N21, BOE NV116FH1-M31, BOE NV116FH1-M30
From: Terry Hsiao @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-kernel
Cc: Douglas Anderson, Neil Armstrong, Jessica Zhang,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Simona Vetter, dri-devel, Terry Hsiao
In-Reply-To: <20260608080310.15126-1-terry_hsiao@compal.corp-partner.google.com>
The raw EDIDs for each panel:
BOE NV116WH2-M30
00 ff ff ff ff ff ff 00 09 e5 6e 38 00 00 00 00
0a 24 01 04 95 1a 0e 78 03 0b 55 9a 5f 58 95 28
1e 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 96 1d 56 c8 50 00 26 30 30 20
36 00 00 90 10 00 00 1a b9 13 56 c8 50 00 26 30
30 20 36 00 00 90 10 00 00 1a 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02
00 0d 40 ff 0a 3c 7d 0f 0c 17 7d 00 00 00 00 80
BOE NT116WHM-N21
00 ff ff ff ff ff ff 00 09 e5 79 38 00 00 00 00
08 24 01 04 95 1a 0e 78 03 3a d5 95 5c 58 94 29
24 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 38 1d 56 c8 50 00 1c 30 30 20
36 00 00 90 10 00 00 1a 7b 13 56 c8 50 00 1c 30
30 20 36 00 00 90 10 00 00 1a 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02
00 0d 40 ff 0a 3c 7d 0f 0c 17 7d 00 00 00 00 7a
BOE NV116FH1-M31
00 ff ff ff ff ff ff 00 09 e5 8b 38 01 ff 00 00
0c 24 01 04 a5 1a 0e 78 03 50 d5 9c 55 52 8f 27
15 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 9a 36 80 a0 70 38 28 40 30 20
35 00 00 90 10 00 00 1a 67 24 80 a0 70 38 28 40
30 20 35 00 00 90 10 00 00 1a 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02
00 0d 36 ff 0a 3c 96 0f 0b 1a 96 00 00 00 01 cd
70 20 79 02 00 20 00 0c 9a 0e 00 8b 38 00 00 00
00 0c 1a 00 21 01 1d 03 0a a2 05 80 07 38 04 88
c2 39 55 1e 15 8f 7a 32 15 02 35 54 b0 5c b0 5c
00 36 12 78 22 00 14 ff 21 02 85 7f 07 9f 00 2f
00 1f 00 37 04 27 00 02 00 04 00 81 00 15 74 1a
00 00 03 00 28 3c 00 00 53 5a 53 5a 3c 00 00 00
00 00 00 2b 00 06 27 00 28 3b 00 00 2e 00 06 80
4b b0 5c b0 5c 00 00 00 00 00 00 00 00 00 89 90
BOE NV116FH1-M30
00 ff ff ff ff ff ff 00 09 e5 8c 38 01 ff 00 00
0c 24 01 04 a5 1a 0e 78 03 50 d5 9c 55 52 8f 27
15 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 9a 36 80 a0 70 38 28 40 30 20
35 00 00 90 10 00 00 1a 67 24 80 a0 70 38 28 40
30 20 35 00 00 90 10 00 00 1a 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02
00 0d 36 ff 0a 3c 96 0f 0b 1a 96 00 00 00 01 cc
70 20 79 02 00 20 00 0c 9a 0e 00 8c 38 00 00 00
00 0c 1a 00 21 01 1d 03 0a a2 05 80 07 38 04 88
c2 39 55 1e 15 8f 7a 32 15 02 35 54 b0 5c b0 5c
00 36 12 78 22 00 14 ff 21 02 85 7f 07 9f 00 2f
00 1f 00 37 04 27 00 02 00 04 00 81 00 15 74 1a
00 00 03 00 28 3c 00 00 53 5a 53 5a 3c 00 00 00
00 00 00 2b 00 06 27 00 28 3b 00 00 2e 00 06 80
4b b0 5c b0 5c 00 00 00 00 00 00 00 00 00 88 90
Signed-off-by: Terry Hsiao <terry_hsiao@compal.corp-partner.google.com>
---
drivers/gpu/drm/panel/panel-edp.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
index 44922896e743..42f5031c4382 100644
--- a/drivers/gpu/drm/panel/panel-edp.c
+++ b/drivers/gpu/drm/panel/panel-edp.c
@@ -2039,6 +2039,10 @@ static const struct edp_panel_entry edp_panels[] = {
EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d73, &delay_200_500_e80, "NE140WUM-N6S"),
EDP_PANEL_ENTRY('B', 'O', 'E', 0x0db3, &delay_200_500_e80, "NV153WUM-N42"),
EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ddf, &delay_200_500_e80, "NV116WHM-T01"),
+ EDP_PANEL_ENTRY('B', 'O', 'E', 0x386e, &delay_200_500_e80, "NV116WH2-M30"),
+ EDP_PANEL_ENTRY('B', 'O', 'E', 0x3879, &delay_200_500_e80, "NT116WHM-N21"),
+ EDP_PANEL_ENTRY('B', 'O', 'E', 0x388b, &delay_200_500_e80, "NV116FH1-M31"),
+ EDP_PANEL_ENTRY('B', 'O', 'E', 0x388c, &delay_200_500_e80, "NV116FH1-M30"),
EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2"),
EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2"),
--
2.34.1
^ permalink raw reply related
* [tip: x86/msr] x86/msr: Remove wrmsr_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: K Prateek Nayak, Juergen Gross, Ingo Molnar, Dave Hansen,
H. Peter Anvin, x86, linux-kernel
In-Reply-To: <20260608051741.3207435-7-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: 97a6561aca552a942298429b9904825c2c862285
Gitweb: https://git.kernel.org/tip/97a6561aca552a942298429b9904825c2c862285
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:36 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:49 +02:00
x86/msr: Remove wrmsr_on_cpu()
wrmsr_on_cpu() has no users left. Delete it.
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Link: https://patch.msgid.link/20260608051741.3207435-7-jgross@suse.com
---
arch/x86/include/asm/msr.h | 6 ------
arch/x86/lib/msr-smp.c | 16 ----------------
2 files changed, 22 deletions(-)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 6e0d7a6..0205643 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -256,7 +256,6 @@ int msr_set_bit(u32 msr, u8 bit);
int msr_clear_bit(u32 msr, u8 bit);
#ifdef CONFIG_SMP
-int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
int wrmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs);
@@ -268,11 +267,6 @@ int wrmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
#else /* CONFIG_SMP */
-static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
-{
- wrmsr(msr_no, l, h);
- return 0;
-}
static inline int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
{
rdmsrq(msr_no, *q);
diff --git a/arch/x86/lib/msr-smp.c b/arch/x86/lib/msr-smp.c
index 65658e8..a434c80 100644
--- a/arch/x86/lib/msr-smp.c
+++ b/arch/x86/lib/msr-smp.c
@@ -46,22 +46,6 @@ int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
}
EXPORT_SYMBOL(rdmsrq_on_cpu);
-int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
-{
- int err;
- struct msr_info rv;
-
- memset(&rv, 0, sizeof(rv));
-
- rv.msr_no = msr_no;
- rv.reg.l = l;
- rv.reg.h = h;
- err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1);
-
- return err;
-}
-EXPORT_SYMBOL(wrmsr_on_cpu);
-
int wrmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
{
int err;
^ permalink raw reply related
* [tip: x86/msr] x86/msr: Switch rdmsr_safe_on_cpu() users to rdmsrq_safe_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: K Prateek Nayak, Juergen Gross, Ingo Molnar, Dave Hansen,
Guenter Roeck, Rafael J. Wysocki, Daniel Lezcano, x86,
linux-kernel
In-Reply-To: <20260608051741.3207435-9-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: 91660aae2f864850f5e5494f6548ce3e534e6d4c
Gitweb: https://git.kernel.org/tip/91660aae2f864850f5e5494f6548ce3e534e6d4c
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:38 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:49 +02:00
x86/msr: Switch rdmsr_safe_on_cpu() users to rdmsrq_safe_on_cpu()
In order to prepare retiring rdmsr_safe_on_cpu() switch
rdmsr_safe_on_cpu() users to rdmsrq_safe_on_cpu().
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Rafael J. Wysocki <rafael@kernel.org>
Cc: Daniel Lezcano <daniel.lezcano@kernel.org>
Link: https://patch.msgid.link/20260608051741.3207435-9-jgross@suse.com
---
arch/x86/kernel/msr.c | 4 +--
drivers/hwmon/coretemp.c | 32 +++++++++++-----------
drivers/hwmon/via-cputemp.c | 16 +++++------
drivers/thermal/intel/intel_tcc.c | 43 +++++++++++++++---------------
4 files changed, 48 insertions(+), 47 deletions(-)
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 4469c78..6033431 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -53,7 +53,7 @@ static ssize_t msr_read(struct file *file, char __user *buf,
size_t count, loff_t *ppos)
{
u32 __user *tmp = (u32 __user *) buf;
- u32 data[2];
+ u64 data;
u32 reg = *ppos;
int cpu = iminor(file_inode(file));
int err = 0;
@@ -63,7 +63,7 @@ static ssize_t msr_read(struct file *file, char __user *buf,
return -EINVAL; /* Invalid chunk size */
for (; count; count -= 8) {
- err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]);
+ err = rdmsrq_safe_on_cpu(cpu, reg, &data);
if (err)
break;
if (copy_to_user(tmp, &data, 8)) {
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 1259c78..70711a7 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -169,7 +169,7 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
int tjmax_ee = 85000;
int usemsr_ee = 1;
int err;
- u32 eax, edx;
+ u64 val;
int i;
u16 devfn = PCI_DEVFN(0, 0);
struct pci_dev *host_bridge = pci_get_domain_bus_and_slot(0, 0, devfn);
@@ -220,14 +220,14 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
* http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
* For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
*/
- err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
+ err = rdmsrq_safe_on_cpu(id, 0x17, &val);
if (err) {
dev_warn(dev,
"Unable to access MSR 0x17, assuming desktop"
" CPU\n");
usemsr_ee = 0;
} else if (c->x86_vfm < INTEL_CORE2_PENRYN &&
- !(eax & 0x10000000)) {
+ !(val & 0x10000000)) {
/*
* Trust bit 28 up to Penryn, I could not find any
* documentation on that; if you happen to know
@@ -235,8 +235,8 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
*/
usemsr_ee = 0;
} else {
- /* Platform ID bits 52:50 (EDX starts at bit 32) */
- platform_id = (edx >> 18) & 0x7;
+ /* Platform ID bits 52:50 */
+ platform_id = (val >> 50) & 0x7;
/*
* Mobile Penryn CPU seems to be platform ID 7 or 5
@@ -255,12 +255,12 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
}
if (usemsr_ee) {
- err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
+ err = rdmsrq_safe_on_cpu(id, 0xee, &val);
if (err) {
dev_warn(dev,
"Unable to access MSR 0xEE, for Tjmax, left"
" at default\n");
- } else if (eax & 0x40000000) {
+ } else if (val & 0x40000000) {
tjmax = tjmax_ee;
}
} else if (tjmax == 100000) {
@@ -278,7 +278,7 @@ static int get_tjmax(struct temp_data *tdata, struct device *dev)
{
struct cpuinfo_x86 *c = &cpu_data(tdata->cpu);
int err;
- u32 eax, edx;
+ u64 msrval;
u32 val;
/* use static tjmax once it is set */
@@ -289,11 +289,11 @@ static int get_tjmax(struct temp_data *tdata, struct device *dev)
* A new feature of current Intel(R) processors, the
* IA32_TEMPERATURE_TARGET contains the TjMax value
*/
- err = rdmsr_safe_on_cpu(tdata->cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
+ err = rdmsrq_safe_on_cpu(tdata->cpu, MSR_IA32_TEMPERATURE_TARGET, &msrval);
if (err) {
dev_warn_once(dev, "Unable to read TjMax from CPU %u\n", tdata->cpu);
} else {
- val = (eax >> 16) & 0xff;
+ val = (msrval >> 16) & 0xff;
if (val)
return val * 1000;
}
@@ -314,7 +314,7 @@ static int get_tjmax(struct temp_data *tdata, struct device *dev)
static int get_ttarget(struct temp_data *tdata, struct device *dev)
{
- u32 eax, edx;
+ u64 val;
int tjmax, ttarget_offset, ret;
/*
@@ -324,14 +324,14 @@ static int get_ttarget(struct temp_data *tdata, struct device *dev)
if (tdata->tjmax)
return -ENODEV;
- ret = rdmsr_safe_on_cpu(tdata->cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
+ ret = rdmsrq_safe_on_cpu(tdata->cpu, MSR_IA32_TEMPERATURE_TARGET, &val);
if (ret)
return ret;
- tjmax = (eax >> 16) & 0xff;
+ tjmax = (val >> 16) & 0xff;
/* Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. */
- ttarget_offset = (eax >> 8) & 0xff;
+ ttarget_offset = (val >> 8) & 0xff;
return (tjmax - ttarget_offset) * 1000;
}
@@ -560,7 +560,7 @@ static int create_core_data(struct platform_device *pdev, unsigned int cpu,
struct temp_data *tdata;
struct platform_data *pdata = platform_get_drvdata(pdev);
struct cpuinfo_x86 *c = &cpu_data(cpu);
- u32 eax, edx;
+ u64 val;
int err;
if (!housekeeping_cpu(cpu, HK_TYPE_MISC))
@@ -571,7 +571,7 @@ static int create_core_data(struct platform_device *pdev, unsigned int cpu,
return -ENOMEM;
/* Test if we can access the status register */
- err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
+ err = rdmsrq_safe_on_cpu(cpu, tdata->status_reg, &val);
if (err)
goto err;
diff --git a/drivers/hwmon/via-cputemp.c b/drivers/hwmon/via-cputemp.c
index a5c03ed..ec42120 100644
--- a/drivers/hwmon/via-cputemp.c
+++ b/drivers/hwmon/via-cputemp.c
@@ -65,28 +65,28 @@ static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct via_cputemp_data *data = dev_get_drvdata(dev);
- u32 eax, edx;
+ u64 val;
int err;
- err = rdmsr_safe_on_cpu(data->id, data->msr_temp, &eax, &edx);
+ err = rdmsrq_safe_on_cpu(data->id, data->msr_temp, &val);
if (err)
return -EAGAIN;
- return sprintf(buf, "%lu\n", ((unsigned long)eax & 0xffffff) * 1000);
+ return sprintf(buf, "%lu\n", ((unsigned long)val & 0xffffff) * 1000);
}
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct via_cputemp_data *data = dev_get_drvdata(dev);
- u32 eax, edx;
+ u64 val;
int err;
- err = rdmsr_safe_on_cpu(data->id, data->msr_vid, &eax, &edx);
+ err = rdmsrq_safe_on_cpu(data->id, data->msr_vid, &val);
if (err)
return -EAGAIN;
- return sprintf(buf, "%d\n", vid_from_reg(~edx & 0x7f, data->vrm));
+ return sprintf(buf, "%d\n", vid_from_reg(~(val >> 32) & 0x7f, data->vrm));
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, SHOW_TEMP);
@@ -112,7 +112,7 @@ static int via_cputemp_probe(struct platform_device *pdev)
struct via_cputemp_data *data;
struct cpuinfo_x86 *c = &cpu_data(pdev->id);
int err;
- u32 eax, edx;
+ u64 val;
data = devm_kzalloc(&pdev->dev, sizeof(struct via_cputemp_data),
GFP_KERNEL);
@@ -143,7 +143,7 @@ static int via_cputemp_probe(struct platform_device *pdev)
}
/* test if we can access the TEMPERATURE MSR */
- err = rdmsr_safe_on_cpu(data->id, data->msr_temp, &eax, &edx);
+ err = rdmsrq_safe_on_cpu(data->id, data->msr_temp, &val);
if (err) {
dev_err(&pdev->dev,
"Unable to access TEMPERATURE MSR, giving up\n");
diff --git a/drivers/thermal/intel/intel_tcc.c b/drivers/thermal/intel/intel_tcc.c
index ab61fb1..c6772a5 100644
--- a/drivers/thermal/intel/intel_tcc.c
+++ b/drivers/thermal/intel/intel_tcc.c
@@ -181,17 +181,17 @@ static u32 get_temp_mask(bool pkg)
*/
int intel_tcc_get_tjmax(int cpu)
{
- u32 low, high;
+ struct msr msrval;
int val, err;
if (cpu < 0)
- err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &low, &high);
+ err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &msrval.l, &msrval.h);
else
- err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high);
+ err = rdmsrq_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &msrval.q);
if (err)
return err;
- val = (low >> 16) & 0xff;
+ val = (msrval.l >> 16) & 0xff;
return val ? val : -ENODATA;
}
@@ -208,17 +208,17 @@ EXPORT_SYMBOL_NS_GPL(intel_tcc_get_tjmax, "INTEL_TCC");
*/
int intel_tcc_get_offset(int cpu)
{
- u32 low, high;
+ struct msr val;
int err;
if (cpu < 0)
- err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &low, &high);
+ err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &val.l, &val.h);
else
- err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high);
+ err = rdmsrq_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &val.q);
if (err)
return err;
- return (low >> 24) & intel_tcc_temp_masks.tcc_offset;
+ return (val.l >> 24) & intel_tcc_temp_masks.tcc_offset;
}
EXPORT_SYMBOL_NS_GPL(intel_tcc_get_offset, "INTEL_TCC");
@@ -235,7 +235,7 @@ EXPORT_SYMBOL_NS_GPL(intel_tcc_get_offset, "INTEL_TCC");
int intel_tcc_set_offset(int cpu, int offset)
{
- u32 low, high;
+ struct msr val;
int err;
if (!intel_tcc_temp_masks.tcc_offset)
@@ -245,23 +245,23 @@ int intel_tcc_set_offset(int cpu, int offset)
return -EINVAL;
if (cpu < 0)
- err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &low, &high);
+ err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &val.l, &val.h);
else
- err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high);
+ err = rdmsrq_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &val.q);
if (err)
return err;
/* MSR Locked */
- if (low & BIT(31))
+ if (val.l & BIT(31))
return -EPERM;
- low &= ~(intel_tcc_temp_masks.tcc_offset << 24);
- low |= offset << 24;
+ val.l &= ~(intel_tcc_temp_masks.tcc_offset << 24);
+ val.l |= offset << 24;
if (cpu < 0)
- return wrmsr_safe(MSR_IA32_TEMPERATURE_TARGET, low, high);
+ return wrmsr_safe(MSR_IA32_TEMPERATURE_TARGET, val.l, val.h);
else
- return wrmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, low, high);
+ return wrmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, val.l, val.h);
}
EXPORT_SYMBOL_NS_GPL(intel_tcc_set_offset, "INTEL_TCC");
@@ -279,7 +279,8 @@ EXPORT_SYMBOL_NS_GPL(intel_tcc_set_offset, "INTEL_TCC");
int intel_tcc_get_temp(int cpu, int *temp, bool pkg)
{
u32 msr = pkg ? MSR_IA32_PACKAGE_THERM_STATUS : MSR_IA32_THERM_STATUS;
- u32 low, high, mask;
+ u32 mask;
+ struct msr val;
int tjmax, err;
tjmax = intel_tcc_get_tjmax(cpu);
@@ -287,19 +288,19 @@ int intel_tcc_get_temp(int cpu, int *temp, bool pkg)
return tjmax;
if (cpu < 0)
- err = rdmsr_safe(msr, &low, &high);
+ err = rdmsr_safe(msr, &val.l, &val.h);
else
- err = rdmsr_safe_on_cpu(cpu, msr, &low, &high);
+ err = rdmsrq_safe_on_cpu(cpu, msr, &val.q);
if (err)
return err;
/* Temperature is beyond the valid thermal sensor range */
- if (!(low & BIT(31)))
+ if (!(val.l & BIT(31)))
return -ENODATA;
mask = get_temp_mask(pkg);
- *temp = tjmax - ((low >> 16) & mask);
+ *temp = tjmax - ((val.l >> 16) & mask);
return 0;
}
^ permalink raw reply related
* [tip: x86/msr] x86/msr: Don't use rdmsr_safe_on_cpu() in rdmsrq_safe_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: K Prateek Nayak, Juergen Gross, Ingo Molnar, Dave Hansen,
H. Peter Anvin, x86, linux-kernel
In-Reply-To: <20260608051741.3207435-8-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: dfaf45fba11642893ed3d28c1aa9f516330147f1
Gitweb: https://git.kernel.org/tip/dfaf45fba11642893ed3d28c1aa9f516330147f1
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:37 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:49 +02:00
x86/msr: Don't use rdmsr_safe_on_cpu() in rdmsrq_safe_on_cpu()
In order to prepare removal of rdmsr_safe_on_cpu(), don't use it in
rdmsrq_safe_on_cpu(), but replace it with open coding it.
This will create a nearly verbatim copy of the same code, but this is
only temporary until rdmsr_safe_on_cpu() is removed.
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Link: https://patch.msgid.link/20260608051741.3207435-8-jgross@suse.com
---
arch/x86/lib/msr-smp.c | 17 ++++++++++++++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/x86/lib/msr-smp.c b/arch/x86/lib/msr-smp.c
index a434c80..f3c75b6 100644
--- a/arch/x86/lib/msr-smp.c
+++ b/arch/x86/lib/msr-smp.c
@@ -190,11 +190,22 @@ EXPORT_SYMBOL(wrmsrq_safe_on_cpu);
int rdmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
{
- u32 low, high;
+ struct msr_info_completion rv;
+ call_single_data_t csd;
int err;
- err = rdmsr_safe_on_cpu(cpu, msr_no, &low, &high);
- *q = (u64)high << 32 | low;
+ INIT_CSD(&csd, __rdmsr_safe_on_cpu, &rv);
+
+ memset(&rv, 0, sizeof(rv));
+ init_completion(&rv.done);
+ rv.msr.msr_no = msr_no;
+
+ err = smp_call_function_single_async(cpu, &csd);
+ if (!err) {
+ wait_for_completion(&rv.done);
+ err = rv.msr.err;
+ }
+ *q = rv.msr.reg.q;
return err;
}
^ permalink raw reply related
* [tip: x86/msr] x86/msr: Remove rdmsr_safe_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: K Prateek Nayak, Juergen Gross, Ingo Molnar, Dave Hansen,
H. Peter Anvin, x86, linux-kernel
In-Reply-To: <20260608051741.3207435-10-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: d2eb65a9aa061a3ee1f42bc0cdfe9ecffaf267fb
Gitweb: https://git.kernel.org/tip/d2eb65a9aa061a3ee1f42bc0cdfe9ecffaf267fb
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:39 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:49 +02:00
x86/msr: Remove rdmsr_safe_on_cpu()
rdmsr_safe_on_cpu() has no users left. Delete it.
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Link: https://patch.msgid.link/20260608051741.3207435-10-jgross@suse.com
---
arch/x86/include/asm/msr.h | 6 ------
arch/x86/lib/msr-smp.c | 24 ------------------------
2 files changed, 30 deletions(-)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 0205643..b0bf1a7 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -260,7 +260,6 @@ int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
int wrmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs);
void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs);
-int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
int rdmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
int wrmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
@@ -287,11 +286,6 @@ static inline void wrmsr_on_cpus(const struct cpumask *m, u32 msr_no,
{
wrmsrq_on_cpu(0, msr_no, raw_cpu_read(msrs->q));
}
-static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
- u32 *l, u32 *h)
-{
- return rdmsr_safe(msr_no, l, h);
-}
static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
{
return wrmsr_safe(msr_no, l, h);
diff --git a/arch/x86/lib/msr-smp.c b/arch/x86/lib/msr-smp.c
index f3c75b6..f58e0ba 100644
--- a/arch/x86/lib/msr-smp.c
+++ b/arch/x86/lib/msr-smp.c
@@ -132,30 +132,6 @@ static void __wrmsr_safe_on_cpu(void *info)
rv->err = wrmsr_safe(rv->msr_no, rv->reg.l, rv->reg.h);
}
-int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
-{
- struct msr_info_completion rv;
- call_single_data_t csd;
- int err;
-
- INIT_CSD(&csd, __rdmsr_safe_on_cpu, &rv);
-
- memset(&rv, 0, sizeof(rv));
- init_completion(&rv.done);
- rv.msr.msr_no = msr_no;
-
- err = smp_call_function_single_async(cpu, &csd);
- if (!err) {
- wait_for_completion(&rv.done);
- err = rv.msr.err;
- }
- *l = rv.msr.reg.l;
- *h = rv.msr.reg.h;
-
- return err;
-}
-EXPORT_SYMBOL(rdmsr_safe_on_cpu);
-
int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
{
int err;
^ permalink raw reply related
* [PATCH v1 1/2] drm/panel-edp: Add AUO B116XAT04.3, CMN N116BCP-EA2, CSW MNB601LS1-8
From: Terry Hsiao @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-kernel
Cc: Douglas Anderson, Neil Armstrong, Jessica Zhang,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Simona Vetter, dri-devel, Terry Hsiao
In-Reply-To: <20260608080310.15126-1-terry_hsiao@compal.corp-partner.google.com>
The raw EDIDs for each panel:
AUO B116XAT04.3
00 ff ff ff ff ff ff 00 06 af c0 29 01 ff 00 00
00 24 01 04 95 1a 0e 78 03 9e a5 96 59 58 96 28
1b 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 ce 1d 56 ea 50 00 1a 30 30 20
46 00 00 90 10 00 00 18 df 13 56 ea 50 00 1a 30
30 20 46 00 00 90 10 00 00 18 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02
00 10 48 ff 0f 3c 7d 0d 0b 16 7d 00 00 20 01 d6
70 20 79 02 00 20 00 0c 10 d8 b1 c0 29 00 00 00
00 00 1a 00 21 01 1d 01 0a a0 05 56 05 00 03 88
68 59 59 8d 85 96 87 62 1b 02 35 54 00 80 00 80
00 80 11 78 22 00 14 0b 2a 01 84 55 05 e9 00 2f
80 1f 00 ff 02 19 00 03 00 05 00 2b 00 0c 27 00
28 3b 00 00 27 00 28 3b 00 00 2e 00 06 00 80 00
80 00 80 81 00 15 74 1a 00 00 03 01 28 3c 00 00
80 2b 80 2b 3c 00 00 00 00 00 00 00 00 00 2e 90
CMN N116BCP-EA2
00 ff ff ff ff ff ff 00 0d ae 6d 11 00 00 00 00
02 24 01 04 95 1a 0e 78 03 67 75 98 59 53 90 27
1c 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 da 1d 56 e2 50 00 20 30 30 20
a6 00 00 90 10 00 00 1a e7 13 56 e2 50 00 20 30
30 20 a6 00 00 90 10 00 00 1a 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02
00 0c 47 ff 08 3c 7d 0d 0a 15 7d 00 00 00 00 04
CSW MNB601LS1-8
00 ff ff ff ff ff ff 00 0e 77 0d 11 00 00 00 00
13 24 01 04 a5 1a 0e 78 03 a1 35 9b 5e 58 91 25
1c 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 09 1e 56 dc 50 00 28 30 30 20
36 00 00 90 10 00 00 1a 06 14 56 dc 50 00 28 30
30 20 36 00 00 90 10 00 00 1a 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02
00 0c 3d ff 0c 3c 7d 0e 0b 17 7d 00 00 00 00 01
Signed-off-by: Terry Hsiao <terry_hsiao@compal.corp-partner.google.com>
---
drivers/gpu/drm/panel/panel-edp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
index aa27d6cd932e..44922896e743 100644
--- a/drivers/gpu/drm/panel/panel-edp.c
+++ b/drivers/gpu/drm/panel/panel-edp.c
@@ -1934,6 +1934,7 @@ static const struct edp_panel_entry edp_panels[] = {
EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"),
EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1"),
EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5"),
+ EDP_PANEL_ENTRY('A', 'U', 'O', 0x29c0, &delay_200_500_e50, "B116XAT04.3"),
EDP_PANEL_ENTRY('A', 'U', 'O', 0x30ed, &delay_200_500_e50, "G156HAN03.0"),
EDP_PANEL_ENTRY('A', 'U', 'O', 0x3c9f, &delay_200_500_e50, "B140HAK03.5"),
EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"),
@@ -2060,6 +2061,7 @@ static const struct edp_panel_entry edp_panels[] = {
EDP_PANEL_ENTRY('C', 'M', 'N', 0x1161, &delay_200_500_e80, "N116BCP-EA2"),
EDP_PANEL_ENTRY('C', 'M', 'N', 0x1163, &delay_200_500_e80_d50, "N116BCJ-EAK"),
EDP_PANEL_ENTRY('C', 'M', 'N', 0x1169, &delay_200_500_e80_d50, "N116BCN-EA1"),
+ EDP_PANEL_ENTRY('C', 'M', 'N', 0x116d, &delay_200_500_e80_d50, "N116BCP-EA2"),
EDP_PANEL_ENTRY('C', 'M', 'N', 0x117a, &delay_200_500_e80_d50, "N116BCL-EAK"),
EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"),
EDP_PANEL_ENTRY('C', 'M', 'N', 0x124c, &delay_200_500_e80_d50, "N122JCA-ENK"),
@@ -2086,6 +2088,7 @@ static const struct edp_panel_entry edp_panels[] = {
EDP_PANEL_ENTRY('C', 'S', 'W', 0x1103, &delay_200_500_e80_d50, "MNB601LS1-3"),
EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50_d100, "MNB601LS1-4"),
EDP_PANEL_ENTRY('C', 'S', 'W', 0x110a, &delay_200_500_e50, "PNB601LS1-2"),
+ EDP_PANEL_ENTRY('C', 'S', 'W', 0x110d, &delay_200_500_e50, "MNB601LS1-8"),
EDP_PANEL_ENTRY('C', 'S', 'W', 0x143f, &delay_200_500_e50, "MNE007QS3-6"),
EDP_PANEL_ENTRY('C', 'S', 'W', 0x1448, &delay_200_500_e50, "MNE007QS3-7"),
EDP_PANEL_ENTRY('C', 'S', 'W', 0x144b, &delay_200_500_e80, "MNE001BS1-4"),
--
2.34.1
^ permalink raw reply related
* [tip: x86/msr] x86/msr: Switch wrmsr_safe_on_cpu() users to wrmsrq_safe_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: K Prateek Nayak, Juergen Gross, Ingo Molnar, Dave Hansen,
Rafael J. Wysocki, Daniel Lezcano, x86, linux-kernel
In-Reply-To: <20260608051741.3207435-11-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: 840b4014346442647354ad12a894d6d4ae3cb510
Gitweb: https://git.kernel.org/tip/840b4014346442647354ad12a894d6d4ae3cb510
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:40 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:49 +02:00
x86/msr: Switch wrmsr_safe_on_cpu() users to wrmsrq_safe_on_cpu()
In order to prepare retiring wrmsr_safe_on_cpu() switch
wrmsr_safe_on_cpu() users to wrmsrq_safe_on_cpu().
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Rafael J. Wysocki <rafael@kernel.org>
Cc: Daniel Lezcano <daniel.lezcano@kernel.org>
Link: https://patch.msgid.link/20260608051741.3207435-11-jgross@suse.com
---
arch/x86/kernel/msr.c | 4 ++--
drivers/thermal/intel/intel_tcc.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 6033431..34bdb75 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -109,7 +109,7 @@ static ssize_t msr_write(struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
const u32 __user *tmp = (const u32 __user *)buf;
- u32 data[2];
+ u64 data;
u32 reg = *ppos;
int cpu = iminor(file_inode(file));
int err = 0;
@@ -134,7 +134,7 @@ static ssize_t msr_write(struct file *file, const char __user *buf,
add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
- err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]);
+ err = wrmsrq_safe_on_cpu(cpu, reg, data);
if (err)
break;
diff --git a/drivers/thermal/intel/intel_tcc.c b/drivers/thermal/intel/intel_tcc.c
index c6772a5..59f70bb 100644
--- a/drivers/thermal/intel/intel_tcc.c
+++ b/drivers/thermal/intel/intel_tcc.c
@@ -261,7 +261,7 @@ int intel_tcc_set_offset(int cpu, int offset)
if (cpu < 0)
return wrmsr_safe(MSR_IA32_TEMPERATURE_TARGET, val.l, val.h);
else
- return wrmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, val.l, val.h);
+ return wrmsrq_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, val.q);
}
EXPORT_SYMBOL_NS_GPL(intel_tcc_set_offset, "INTEL_TCC");
^ permalink raw reply related
* [tip: x86/msr] x86/msr: Remove wrmsr_safe_on_cpu()
From: tip-bot2 for Juergen Gross @ 2026-06-08 8:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: K Prateek Nayak, Juergen Gross, Ingo Molnar, Dave Hansen,
H. Peter Anvin, x86, linux-kernel
In-Reply-To: <20260608051741.3207435-12-jgross@suse.com>
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: cdd2c4133ad2f5b655fa47ac43e6bcaa5b48434d
Gitweb: https://git.kernel.org/tip/cdd2c4133ad2f5b655fa47ac43e6bcaa5b48434d
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Mon, 08 Jun 2026 07:17:41 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Mon, 08 Jun 2026 10:01:49 +02:00
x86/msr: Remove wrmsr_safe_on_cpu()
wrmsr_safe_on_cpu() has no users left. Delete it.
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Link: https://patch.msgid.link/20260608051741.3207435-12-jgross@suse.com
---
arch/x86/include/asm/msr.h | 5 -----
arch/x86/lib/msr-smp.c | 16 ----------------
2 files changed, 21 deletions(-)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index b0bf1a7..77dc747 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -260,7 +260,6 @@ int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
int wrmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs);
void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs);
-int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
int rdmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
int wrmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
@@ -286,10 +285,6 @@ static inline void wrmsr_on_cpus(const struct cpumask *m, u32 msr_no,
{
wrmsrq_on_cpu(0, msr_no, raw_cpu_read(msrs->q));
}
-static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
-{
- return wrmsr_safe(msr_no, l, h);
-}
static inline int rdmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
{
return rdmsrq_safe(msr_no, q);
diff --git a/arch/x86/lib/msr-smp.c b/arch/x86/lib/msr-smp.c
index f58e0ba..0c66277 100644
--- a/arch/x86/lib/msr-smp.c
+++ b/arch/x86/lib/msr-smp.c
@@ -132,22 +132,6 @@ static void __wrmsr_safe_on_cpu(void *info)
rv->err = wrmsr_safe(rv->msr_no, rv->reg.l, rv->reg.h);
}
-int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
-{
- int err;
- struct msr_info rv;
-
- memset(&rv, 0, sizeof(rv));
-
- rv.msr_no = msr_no;
- rv.reg.l = l;
- rv.reg.h = h;
- err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1);
-
- return err ? err : rv.err;
-}
-EXPORT_SYMBOL(wrmsr_safe_on_cpu);
-
int wrmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
{
int err;
^ permalink raw reply related
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