* [U-Boot] [PATCH v8 08/10] nds32: standalone support
From: Macpaul Lin @ 2011-04-11 2:47 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1302490025-22060-1-git-send-email-macpaul@andestech.com>
Add standalone program related support for nds32 architecture.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
---
examples/standalone/nds32.lds | 64 +++++++++++++++++++++++++++++++++++++
examples/standalone/stubs.c | 17 +++++++++-
examples/standalone/x86-testapp.c | 12 +++++++
3 files changed, 92 insertions(+), 1 deletions(-)
create mode 100644 examples/standalone/nds32.lds
diff --git a/examples/standalone/nds32.lds b/examples/standalone/nds32.lds
new file mode 100644
index 0000000..c2ac107
--- /dev/null
+++ b/examples/standalone/nds32.lds
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
+ * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-nds32", "elf32-nds32", "elf32-nds32")
+OUTPUT_ARCH(nds32)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+
+ .got : {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ }
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ __bss_end = .;
+
+ . = ALIGN(4);
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) }
+
+ _end = .;
+
+ . = 0x02000000;
+ .u_boot_ohci_data_st : { *(.u_boot_ohci_data_st) }
+}
diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c
index 2d2e709..b711926 100644
--- a/examples/standalone/stubs.c
+++ b/examples/standalone/stubs.c
@@ -167,8 +167,23 @@ gd_t *global_data;
" jmp %%g1\n" \
" nop\n" \
: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "g1" );
-
+#elif defined(CONFIG_NDS32)
+/*
+ * r16 holds the pointer to the global_data. gp is call clobbered.
+ * not support reduced register (16 GPR).
+ */
+#define EXPORT_FUNC(x) \
+ asm volatile ( \
+" .globl " #x "\n" \
+#x ":\n" \
+" lwi $r16, [$gp + (%0)]\n" \
+" lwi $r16, [$r16 + (%1)]\n" \
+" jr $r16\n" \
+ : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "$r16");
#else
+/*" addi $sp, $sp, -24\n" \
+" br $r16\n" \*/
+
#error stubs definition missing for this architecture
#endif
diff --git a/examples/standalone/x86-testapp.c b/examples/standalone/x86-testapp.c
index e8603d9..a4ac6f8 100644
--- a/examples/standalone/x86-testapp.c
+++ b/examples/standalone/x86-testapp.c
@@ -52,6 +52,16 @@ asm volatile ( \
" lw $25, %1($25)\n" \
" jr $25\n" \
: : "i"(offsetof(xxx_t, pfunc)), "i"(XF_ ## x * sizeof(void *)) : "t9");
+#elif defined(__nds32__)
+#define EXPORT_FUNC(x) \
+asm volatile ( \
+" .globl mon_" #x "\n" \
+"mon_" #x ":\n" \
+" lwi $r16, [$gp + (%0)]\n" \
+" lwi $r16, [$r16 + (%1)]\n" \
+" jr $r16\n" \
+ : : "i"(offsetof(xxx_t, pfunc)), "i"(XF_ ## x * sizeof(void *)) : "$r16");
+
#else
#error [No stub code for this arch]
#endif
@@ -72,6 +82,8 @@ int main(void)
register volatile xxx_t *pq asm("r8");
#elif defined(__mips__)
register volatile xxx_t *pq asm("k0");
+#elif defined(__nds32__)
+ register volatile xxx_t *pq asm("$r16");
#endif
char buf[32];
--
1.7.3.5
^ permalink raw reply related
* [U-Boot] [PATCH v8 09/10] nds32: common bdinfo, bootm, image support
From: Macpaul Lin @ 2011-04-11 2:47 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1302490025-22060-1-git-send-email-macpaul@andestech.com>
Add support of NDS32 to common commands bdinfo, bootm, and image format.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
---
common/cmd_bdinfo.c | 28 +++++++++++++++++++++++++++-
common/cmd_bootm.c | 2 ++
common/image.c | 1 +
include/image.h | 5 +++++
4 files changed, 35 insertions(+), 1 deletions(-)
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index bba7374..908091d 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -411,13 +411,39 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
return 0;
}
+#elif defined(CONFIG_NDS32)
+
+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ int i;
+ bd_t *bd = gd->bd;
+
+ print_num("arch_number", bd->bi_arch_number);
+ print_num("env_t", (ulong)bd->bi_env);
+ print_num("boot_params", (ulong)bd->bi_boot_params);
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
+ print_num("DRAM bank", i);
+ print_num("-> start", bd->bi_dram[i].start);
+ print_num("-> size", bd->bi_dram[i].size);
+ }
+
+#if defined(CONFIG_CMD_NET)
+ print_eth(0);
+ printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
+#endif
+ printf("baudrate = %d bps\n", bd->bi_baudrate);
+
+ return 0;
+}
+
#else
#error "a case for this architecture does not exist!"
#endif
static void print_num(const char *name, ulong value)
{
- printf ("%-12s= 0x%08lX\n", name, value);
+ printf("%-12s= 0x%08lX\n", name, value);
}
#if !(defined(CONFIG_ARM) || defined(CONFIG_M68K)) || defined(CONFIG_CMD_NET)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 18019d6..59fbc45 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -187,6 +187,8 @@ void arch_preboot_os(void) __attribute__((weak, alias("__arch_preboot_os")));
#define IH_INITRD_ARCH IH_ARCH_SH
#elif defined(__sparc__)
#define IH_INITRD_ARCH IH_ARCH_SPARC
+#elif defined(__nds32__)
+ #define IH_INITRD_ARCH IH_ARCH_NDS32
#else
# error Unknown CPU type
#endif
diff --git a/common/image.c b/common/image.c
index f63a2ff..afe5957 100644
--- a/common/image.c
+++ b/common/image.c
@@ -93,6 +93,7 @@ static const table_entry_t uimage_arch[] = {
{ IH_ARCH_SPARC64, "sparc64", "SPARC 64 Bit", },
{ IH_ARCH_BLACKFIN, "blackfin", "Blackfin", },
{ IH_ARCH_AVR32, "avr32", "AVR32", },
+ { IH_ARCH_NDS32, "nds32", "NDS32", },
{ -1, "", "", },
};
diff --git a/include/image.h b/include/image.h
index 005e0d2..1a2be5e 100644
--- a/include/image.h
+++ b/include/image.h
@@ -106,6 +106,7 @@
#define IH_ARCH_BLACKFIN 16 /* Blackfin */
#define IH_ARCH_AVR32 17 /* AVR32 */
#define IH_ARCH_ST200 18 /* STMicroelectronics ST200 */
+#define IH_ARCH_NDS32 19 /* ANDES Technology - NDS32 */
/*
* Image Types
@@ -504,6 +505,8 @@ static inline int image_check_target_arch (const image_header_t *hdr)
if (!image_check_arch (hdr, IH_ARCH_SH))
#elif defined(__sparc__)
if (!image_check_arch (hdr, IH_ARCH_SPARC))
+#elif defined(__nds32__)
+ if (!image_check_arch(hdr, IH_ARCH_NDS32))
#else
# error Unknown CPU type
#endif
@@ -656,6 +659,8 @@ static inline int fit_image_check_target_arch (const void *fdt, int node)
if (!fit_image_check_arch (fdt, node, IH_ARCH_SH))
#elif defined(__sparc__)
if (!fit_image_check_arch (fdt, node, IH_ARCH_SPARC))
+#elif defined(__nds32__)
+ if (!fit_image_check_arch(fdt, node, IH_ARCH_NDS32))
#else
# error Unknown CPU type
#endif
--
1.7.3.5
^ permalink raw reply related
* [U-Boot] [PATCH v8 10/10] adp-ag101: add board adp-ag101 support
From: Macpaul Lin @ 2011-04-11 2:47 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1302490025-22060-1-git-send-email-macpaul@andestech.com>
Add evaluation board "adp-ag101" aconfiguration file adp-ag101.h.
Add adp-ag101.c board config and related settings.
Add board adp-ag101 into boards.cfg
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
---
Changes for v1-v4:
- code clean up
Changes for v5-v6:
- Refine the definitions and parameters about CLK,
AHB controller, SDRAM controller, Static memory controllers.
- Add APB_CLK, AHB_CLK, SYS_CLK definitions for backward compatible.
- ftahbc010:
- Update include path of ftahbc010.
- ftsdmc021:
- Update include path of ftsdmc021.
- ftsmc020:
- Update include path of ftsmc020.
- ftwdt010:
- Fix WDT define and update include path.
- Fix ftwdt010 for hardware reset.
- ftpmu010:
- Remove duplicate PMU definitions.
- Add related configurations.
- Fix MAX malloc len and fix saveenv.
- clean up.
Changes for v7:
- adp-ag101.c
- Fix Makefile and remove config.mk
- adp-ag101.h:
- clean up.
- Move CONFIG_SYS_TEXT_BASE from board/config.mk.
MAINTAINERS | 11 +
MAKEALL | 6 +
board/AndesTech/adp-ag101/Makefile | 57 +++++
board/AndesTech/adp-ag101/adp-ag101.c | 81 +++++++
boards.cfg | 1 +
include/configs/adp-ag101.h | 378 +++++++++++++++++++++++++++++++++
6 files changed, 534 insertions(+), 0 deletions(-)
create mode 100644 board/AndesTech/adp-ag101/Makefile
create mode 100644 board/AndesTech/adp-ag101/adp-ag101.c
create mode 100644 include/configs/adp-ag101.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 8af9b09..0390c40 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1123,5 +1123,16 @@ Chong Huang <chuang@ucrobotics.com>
bf525-ucr2 BF525
#########################################################################
+# NDS32 Systems: #
+# #
+# Maintainer Name, Email Address #
+# Board CPU #
+#########################################################################
+
+Macpaul Lin <macpaul@andestech.com>
+
+ ADP-AG101 N1213 (AG101 SoC)
+
+#########################################################################
# End of MAINTAINERS list #
#########################################################################
diff --git a/MAKEALL b/MAKEALL
index e1b928f..286d158 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -610,6 +610,12 @@ LIST_sh="$(boards_by_arch sh)"
LIST_sparc="$(boards_by_arch sparc)"
+#########################################################################
+## NDS32 Systems
+#########################################################################
+
+LIST_nds32="$(boards_by_arch nds32)"
+
#-----------------------------------------------------------------------
build_target() {
diff --git a/board/AndesTech/adp-ag101/Makefile b/board/AndesTech/adp-ag101/Makefile
new file mode 100644
index 0000000..5a403b1
--- /dev/null
+++ b/board/AndesTech/adp-ag101/Makefile
@@ -0,0 +1,57 @@
+#
+# Copyright (C) 2011 Andes Technology Corporation
+# Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
+# Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS := adp-ag101.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+ifdef CONFIG_SYS_LDSCRIPT
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+else
+LDSCRIPT := $(SRCTREE)/arch/$(ARCH)/cpu/$(CPU)/u-boot.lds
+endif
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/AndesTech/adp-ag101/adp-ag101.c b/board/AndesTech/adp-ag101/adp-ag101.c
new file mode 100644
index 0000000..b31b785
--- /dev/null
+++ b/board/AndesTech/adp-ag101/adp-ag101.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
+ * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <asm/io.h>
+
+#include <faraday/ftsmc020.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscellaneous platform dependent initializations
+ */
+
+int board_init(void)
+{
+ /*
+ * refer to BOOT_PARAMETER_PA_BASE within
+ * "linux/arch/nds32/include/asm/misc_spec.h"
+ */
+ gd->bd->bi_arch_number = MACH_TYPE_ADPAG101;
+ gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
+
+ ftsmc020_init(); /* initialize Flash */
+ return 0;
+}
+
+int dram_init(void)
+{
+ unsigned long sdram_base = PHYS_SDRAM_0;
+ unsigned long expected_size = PHYS_SDRAM_0_SIZE;
+ unsigned long actual_size;
+
+ actual_size = get_ram_size((void *)sdram_base, expected_size);
+
+ gd->bd->bi_dram[0].start = sdram_base;
+ gd->bd->bi_dram[0].size = actual_size;
+
+ if (expected_size != actual_size)
+ printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
+ actual_size >> 20, expected_size >> 20);
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bd)
+{
+ return ftmac100_initialize(bd);
+}
+
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
+{
+ if (banknum == 0) { /* non-CFI boot flash */
+ info->portwidth = FLASH_CFI_8BIT;
+ info->chipwidth = FLASH_CFI_BY8;
+ info->interface = FLASH_CFI_X8;
+ return 1;
+ } else
+ return 0;
+}
diff --git a/boards.cfg b/boards.cfg
index a45bd83..e3d1c16 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -245,6 +245,7 @@ vct_platinumavc mips mips32 vct microna
vct_platinumavc_small mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE
vct_platinumavc_onenand mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND
vct_platinumavc_onenand_small mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE
+adp-ag101 nds32 n1213 adp-ag101 AndesTech ag101
PCI5441 nios2 nios2 pci5441 psyent
PK1C20 nios2 nios2 pk1c20 psyent
EVB64260 powerpc 74xx_7xx evb64260 - - EVB64260
diff --git a/include/configs/adp-ag101.h b/include/configs/adp-ag101.h
new file mode 100644
index 0000000..9e1d50e
--- /dev/null
+++ b/include/configs/adp-ag101.h
@@ -0,0 +1,378 @@
+/*
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
+ * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/ag101.h>
+
+/*
+ * CPU and Board Configuration Options
+ */
+#define CONFIG_ADP_AG101
+
+#define CONFIG_USE_INTERRUPT
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/*
+ * Timer
+ */
+
+/*
+ * ag101: CONFIG_SYS_HZ: APB_CLK (ag101 original timer clock frequency)
+ *
+ * According to the discussion in u-boot mailing list before,
+ * CONFIG_SYS_HZ at 1000 is mandatory.
+ */
+
+/*
+ * APB_CLK, AHB_CLK, SYS_CLK are from an old configuration
+ * in the earlist nds32 bootloader.
+ *
+ * CONFIG_SYS_HZ = APB_CLK = SYS_CLK = CONFIG_SYS_CLK_FREQ /2
+ *
+ * Since the power management (PWM) Timer 4 uses a counter of
+ * 15625 for 10 ms, so we need it to wrap 100 times
+ * (total 1562500) to get 1 sec.
+ *
+ * #define CONFIG_HZ 1562500
+ * 1562500*25=3906250
+ */
+#define SYS_CLK CONFIG_SYS_CLK_FREQ
+#define AHB_CLK SYS_CLK
+#define APB_CLK (SYS_CLK / 2)
+
+#define CONFIG_SYS_HZ 1000
+#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ
+
+#define CONFIG_SYS_TEXT_BASE 0x03200000
+
+/*
+ * System Clock
+ * Suggested frequency lists:
+ * 16000000 -> 16.000000 MHz
+ * 18432000 -> 18.432000 MHz
+ * 22118400 -> 22.118400 MHz
+ * 83000000 -> 83.000000 MHz
+ * 33000000 -> 33.000000 MHz
+ * 36864000 -> 36.864000 MHz
+ * 48000000 -> 48.000000 MHz CONFIG_ADP_AG101
+ * 39062500 -> 39.062500 MHz CONFIG_ADP_AG101P
+ */
+#ifdef CONFIG_ADP_AG101
+#define CONFIG_SYS_CLK_FREQ 48000000
+#endif
+
+/*
+ * Use Externel CLOCK or PCLK
+ */
+#undef CONFIG_FTRTC010_EXTCLK
+
+#ifndef CONFIG_FTRTC010_EXTCLK
+#define CONFIG_FTRTC010_PCLK
+#endif
+
+#ifdef CONFIG_FTRTC010_EXTCLK
+#define TIMER_CLOCK 32768 /* CONFIG_FTRTC010_EXTCLK */
+#else
+#define TIMER_CLOCK CONFIG_SYS_HZ /* CONFIG_FTRTC010_PCLK */
+#endif
+
+#define TIMER_LOAD_VAL 0xffffffff
+
+/*
+ * Real Time Clock
+ */
+#define CONFIG_RTC_FTRTC010
+
+/*
+ * Real Time Clock Divider
+ * RTC_DIV_COUNT (OSC_CLK/OSC_5MHZ)
+ */
+#ifdef CONFIG_ADP_AG101
+#define OSC_5MHZ (5*1000000)
+#define OSC_CLK (2*OSC_5MHZ)
+#define RTC_DIV_COUNT (OSC_CLK/OSC_5MHZ)
+#endif
+
+/*
+ * Serial console configuration
+ */
+
+/* FTUART is a high speed NS 16C550A compatible UART */
+#define CONFIG_BAUDRATE 38400
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_COM1 CONFIG_FTUART010_02_BASE /* 0x99600000 */
+#define CONFIG_SYS_NS16550_REG_SIZE -4
+
+#ifdef CONFIG_ADP_AG101
+#define CONFIG_SYS_NS16550_CLK ((46080000 * 20) / 25) /* AG101 */
+#endif
+
+/* valid baudrates */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Ethernet
+ */
+#define CONFIG_NET_MULTI
+#define CONFIG_FTMAC100
+
+#define CONFIG_BOOTDELAY 3
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_PING
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "NDS32 # " /* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE \
+ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/* max number of command args */
+#define CONFIG_SYS_MAXARGS 16
+
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
+
+/*
+ * Size of malloc() pool
+ */
+/* 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough */
+#define CONFIG_SYS_MALLOC_LEN (512 << 10)
+
+/*
+ * size in bytes reserved for initial data
+ */
+#define CONFIG_SYS_GBL_DATA_SIZE 128
+
+/*
+ * AHB Controller configuration
+ */
+#define CONFIG_FTAHBC020S
+
+#ifdef CONFIG_FTAHBC020S
+#include <faraday/ftahbc020s.h>
+
+#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE 0x100
+
+#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6 (FTAHBC020S_SLAVE_BSR_BASE(CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE) | \
+ FTAHBC020S_SLAVE_BSR_SIZE(FTAHBC020S_SLAVE_BSR_SIZE_2G))
+#endif
+
+/*
+ * Watchdog
+ */
+#define CONFIG_FTWDT010_WATCHDOG
+
+/*
+ * PMU Power controller configuration
+ */
+#define CONFIG_PMU
+#define CONFIG_FTPMU010_POWER
+
+#ifdef CONFIG_FTPMU010_POWER
+#include <faraday/ftpmu010.h>
+#define CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS 0x0E
+#define CONFIG_SYS_FTPMU010_SDRAMHTC (FTPMU010_SDRAMHTC_EBICTRL_DCSR | \
+ FTPMU010_SDRAMHTC_EBIDATA_DCSR | \
+ FTPMU010_SDRAMHTC_SDRAMCS_DCSR | \
+ FTPMU010_SDRAMHTC_SDRAMCTL_DCSR | \
+ FTPMU010_SDRAMHTC_CKE_DCSR | \
+ FTPMU010_SDRAMHTC_DQM_DCSR | \
+ FTPMU010_SDRAMHTC_SDCLK_DCSR)
+#endif
+
+/*
+ * SDRAM controller configuration
+ */
+#define CONFIG_FTSDMC021
+
+#ifdef CONFIG_FTSDMC021
+#include <faraday/ftsdmc021.h>
+
+#define CONFIG_SYS_FTSDMC021_TP1 (FTSDMC021_TP1_TRP(1) | \
+ FTSDMC021_TP1_TRCD(1) | \
+ FTSDMC021_TP1_TRF(3) | \
+ FTSDMC021_TP1_TWR(1) | \
+ FTSDMC021_TP1_TCL(2))
+
+#define CONFIG_SYS_FTSDMC021_TP2 (FTSDMC021_TP2_INI_PREC(4) | \
+ FTSDMC021_TP2_INI_REFT(8) | \
+ FTSDMC021_TP2_REF_INTV(0x180))
+
+#define CONFIG_SYS_FTSDMC021_CR1 (FTSDMC021_CR1_DDW(2) | \
+ FTSDMC021_CR1_DSZ(3) | \
+ FTSDMC021_CR1_MBW(2) | \
+ FTSDMC021_CR1_BNKSIZEF(6))
+
+#define CONFIG_SYS_FTSDMC021_CR2 (FTSDMC021_CR2_IPREC | \
+ FTSDMC021_CR2_IREF | \
+ FTSDMC021_CR2_ISMR)
+
+#define CONFIG_SYS_FTSDMC021_BANK0_BASE CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE
+#define CONFIG_SYS_FTSDMC021_BANK0_BSR (FTSDMC021_BANK_ENABLE | \
+ CONFIG_SYS_FTSDMC021_BANK0_BASE)
+
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */
+
+/*
+ * Load address and memory test area should agree with
+ * board/faraday/a320/config.mk. Be careful not to overwrite U-boot itself.
+ */
+#define CONFIG_SYS_LOAD_ADDR 0x0CF00000
+
+/* memtest works on 63 MB in DRAM */
+#define CONFIG_SYS_MEMTEST_START 0x00000000
+#define CONFIG_SYS_MEMTEST_END 0x00200000
+
+/*
+ * Static memory controller configuration
+ */
+#define CONFIG_FTSMC020
+
+#ifdef CONFIG_FTSMC020
+#include <faraday/ftsmc020.h>
+
+#define CONFIG_SYS_FTSMC020_CONFIGS { \
+ { FTSMC020_BANK0_CONFIG, FTSMC020_BANK0_TIMING, }, \
+ { FTSMC020_BANK1_CONFIG, FTSMC020_BANK1_TIMING, }, \
+}
+
+#ifdef CONFIG_ADP_AG101
+/*
+ * There are 2 bank connected to FTSMC020 on ADP_AG101
+ * BANK0: FLASH/ROM (SW5, J16), BANK1: OnBoard SDRAM.
+ *
+ * Note:
+ * FLASH on ADP_AG101P (FPGA version of ADP_AG101) is connected to BANK1
+ * Just disalbe the other BANK to avoid detection error.
+ */
+
+/* This FTSMC020_BANK1_SDRAM was used in lowlevel_init.S */
+#define FTSMC020_BANK1_SDRAM_CONFIG (FTSMC020_BANK_ENABLE | \
+ FTSMC020_BANK_SIZE_32M | \
+ FTSMC020_BANK_MBW_32)
+
+#define FTSMC020_BANK1_SDRAM_TIMING (FTSMC020_TPR_RBE | \
+ FTSMC020_TPR_AST(1) | \
+ FTSMC020_TPR_CTW(1) | \
+ FTSMC020_TPR_ATI(1) | \
+ FTSMC020_TPR_AT2(1) | \
+ FTSMC020_TPR_WTC(1) | \
+ FTSMC020_TPR_AHT(1) | \
+ FTSMC020_TPR_TRNA(1))
+
+#define FTSMC020_BANK1_CONFIG FTSMC020_BANK1_SDRAM_CONFIG
+#define FTSMC020_BANK1_TIMING FTSMC020_BANK1_SDRAM_TIMING
+
+/*
+ * This FTSMC020_BANK0_CONFIG indecates the setting of BANK0 (FLASH)
+ * PHYS_FLASH_1 should be 0x400000 (13 bits to store addr, 0x1000000)
+ */
+#define FTSMC020_BANK0_CONFIG (FTSMC020_BANK_ENABLE | \
+ FTSMC020_BANK_BASE(PHYS_FLASH_1) | \
+ FTSMC020_BANK_SIZE_32M | \
+ FTSMC020_BANK_MBW_32)
+
+#define FTSMC020_BANK0_TIMING (FTSMC020_TPR_AST(3) | \
+ FTSMC020_TPR_CTW(3) | \
+ FTSMC020_TPR_ATI(0xf) | \
+ FTSMC020_TPR_AT2(3) | \
+ FTSMC020_TPR_WTC(3) | \
+ FTSMC020_TPR_AHT(3) | \
+ FTSMC020_TPR_TRNA(0xf))
+#endif /* CONFIG_ADP_AG101 */
+#endif /* CONFIG_FTSMC020 */
+
+/*
+ * FLASH and environment organization
+ */
+
+/* use CFI framework */
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+
+/* support JEDEC */
+/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */
+#define PHYS_FLASH_1 0x80400000
+
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
+#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, }
+#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
+
+#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */
+#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */
+
+/* max number of memory banks */
+/*
+ * There are 4 banks supported for this Controller,
+ * but we have only 1 bank connected to flash on board
+ */
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+
+/* max number of sectors on one chip */
+#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2*2)
+#define CONFIG_ENV_SECT_SIZE CONFIG_FLASH_SECTOR_SIZE
+#define CONFIG_SYS_MAX_FLASH_SECT 128
+
+/* environments */
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x1C0000)
+#define CONFIG_ENV_SIZE 8192
+#define CONFIG_ENV_OVERWRITE
+
+/* relocation parameters */
+#define CONFIG_SYS_RELO_ADDR 0x10000000
+
+#endif /* __CONFIG_H */
--
1.7.3.5
^ permalink raw reply related
* [Buildroot] uclibc vs glibc
From: Charles Krinke @ 2011-04-11 2:53 UTC (permalink / raw)
To: buildroot
In-Reply-To: <20110410233639.GA14655@sakrah.homelinux.org>
Dear Khem:
I apologize for asking my question improperly. Let me try again.
Buildroot creates a roots with its internal toolchain, that is the one it
compiles as I understand it. With CodeSouecery, their web site for the none
buildroot now supports says it is glibc.
I am trying to understand how, from inspecting the .so files in /lib on the
target how to tell the difference. For instance, just concentrating on
libc.so.6, I can see the uclibc, generated by buildroot from its compile
toolchain that this is a softlink to libc-2.6.1.so and is 1.38mbytes. I can
also see that the libc.so.6 in a rootfa create by the CodeSourcey 2010.09
toolchain is a softlink to libc-2.11.1.so and is 1.49 mbytes, a little
larger. I think the 2.6.1 libc is uclibc and the 2.11.1 libc is glibc.
Can someone confirm that this is true? That is, that a rootfs built with
buildroot's internally compiled toolchain is uclibc, and that a roots built
with CodeSorcery's external toolchain in the latest release of buildroot is
indeed glibc.
On Apr 10, 2011 4:36 PM, "Khem Raj" <raj.khem@gmail.com> wrote:
> On (10/04/11 16:08), Charles Krinke wrote:
>> I have a quesiton on a different subject and that is the difference
between
>> uclibc and glibc from the MPC8323ERDB target viewpoint.
>>
>
> they are entirely different root file systems.
>
>> Here is what I think I know:
>> 1. The toolchain is independent of the notion of uclibc vs glibc.
>> 2. Several of the .so files in /lib on the target will be different
between
>> uclibc and glibc.
>> 3. An application needs to be compiled with the static (or dynamic)
>> libraries pertinent to glibc or uclibc with appropriate header files to
>> expect it to run on the target.
>>
>> Questions:
>> 1. Which .so files on the target are different? ld, libc, libstdc++ only,
or
>> others?
>> 2. Are the differing files on the target going to have the same names
behind
>> their softlinks
>> like ld.so.1->ld-2.11.1.so for instance?
>> 3. Can I configure the CodeSourcery toolchain to produce a rootfs with
>> either uclibc or glibc and if so, what might be some of the steps?
>
> Try using -muclibc or -mglibc options.
>>
>> --
>> Charles Krinke
>
>> _______________________________________________
>> buildroot mailing list
>> buildroot at busybox.net
>> http://lists.busybox.net/mailman/listinfo/buildroot
>
>
> --
> -Khem
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^ permalink raw reply
* Re: [PATCH] fix build warnings on defconfigs
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-11 2:45 UTC (permalink / raw)
To: wanlong.gao
Cc: linux, hans-christian.egtvedt, ralf, benh, paulus,
david.woodhouse, akpm, u.kleine-koenig, mingo, rientjes,
nicolas.ferre, eric, tony, santosh.shilimkar, khilman, ben-linux,
sam, manuel.lauss, galak, anton, grant.likely, sfr, jwboyer,
linux-mips, linuxppc-dev, linux-kernel, linux-arm-kernel
In-Reply-To: <1302375858-11253-1-git-send-email-wanlong.gao@gmail.com>
On 03:04 Sun 10 Apr , wanlong.gao@gmail.com wrote:
> From: Wanlong Gao <wanlong.gao@gmail.com>
>
> Change the BT_L2CAP and BT_SCO defconfigs from 'm' to 'y',
> since BT_L2CAP and BT_SCO had changed to bool configs.
>
> Signed-off-by: Wanlong Gao <wanlong.gao@gmail.com>
> ---
for at91
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Best Regards,
J.
^ permalink raw reply
* Re: Firmware files for Ralink RT28x0
From: Larry Finger @ 2011-04-11 3:01 UTC (permalink / raw)
To: Xose Vazquez Perez; +Cc: Ben Hutchings, users, linux-wireless
In-Reply-To: <4DA23594.8090002@gmail.com>
On 04/10/2011 05:56 PM, Xose Vazquez Perez wrote:
> On 04/11/2011 12:37 AM, Larry Finger wrote:
>
>> Do you still have the patch from one year ago? I would like to see what you proposed in changes to WHENCE.
>
> Déjà vu
>
> me: http://marc.info/?l=linux-wireless&m=129798073407070&w=2
>
> ivo: http://marc.info/?l=linux-wireless&m=128844402626603&w=2
>
> ralink: http://rt2x00.serialmonkey.com/pipermail/users_rt2x00.serialmonkey.com/2011-March/003381.html
> http://rt2x00.serialmonkey.com/pipermail/users_rt2x00.serialmonkey.com/2011-March/003382.html
I still don't see any problem with the patch that you supplied. The contribution
from Ivo and Ralink did not update WHENCE.
I pulled the binary files from the Ralink submission and have entered them into
my copy of linux-firmware. I need to test that 2860.bin will work with my
RT3090. Do you have a device that uses rt2800usb?
Larry
^ permalink raw reply
* [B.A.T.M.A.N.] batman-adv coexisting with olsr?
From: Ryan Hughes @ 2011-04-11 3:01 UTC (permalink / raw)
To: b.a.t.m.a.n
Hi. Is it possible to get batman-adv to coexist with olsr, working with
different network prefixes?
Cuz it seems to me that the olsr traffic would all get routed by batman,
and every node would think it could see every other node, and olsr would
add all kinds of nonsense to the routing table.
Thanks.
--Ryan
^ permalink raw reply
* Re: [PATCH] fix build warnings on defconfigs
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-11 2:45 UTC (permalink / raw)
To: wanlong.gao
Cc: linux-mips, david.woodhouse, tony, nicolas.ferre, paulus, eric,
sam, sfr, linux, khilman, manuel.lauss, u.kleine-koenig, mingo,
rientjes, anton, ben-linux, linux-arm-kernel, linux-kernel, ralf,
santosh.shilimkar, akpm, linuxppc-dev, hans-christian.egtvedt
In-Reply-To: <1302375858-11253-1-git-send-email-wanlong.gao@gmail.com>
On 03:04 Sun 10 Apr , wanlong.gao@gmail.com wrote:
> From: Wanlong Gao <wanlong.gao@gmail.com>
>
> Change the BT_L2CAP and BT_SCO defconfigs from 'm' to 'y',
> since BT_L2CAP and BT_SCO had changed to bool configs.
>
> Signed-off-by: Wanlong Gao <wanlong.gao@gmail.com>
> ---
for at91
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Best Regards,
J.
^ permalink raw reply
* [U-Boot] [PATCH] ARM: mx31: Print the silicon version
From: Fabio Estevam @ 2011-04-11 3:04 UTC (permalink / raw)
To: u-boot
In-Reply-To: <4D7A2495.2060203@denx.de>
Hi Stefano,
On 3/11/2011 10:33 AM, Stefano Babic wrote:
> On 03/10/2011 08:26 PM, Fabio Estevam wrote:
>
>> +void mx31_read_cpu_rev(void)
>
> Generally, for exported function, I would prefer to remove the processor
> name. For other i.MX processors we use the convention
> mxc_<function_name>, as we can get rid of nasty #ifdef inside the
> drivers. You can see a lot of examples in code.
Ok.
>
>> +{
>> + u32 i, srev;
>> +
>> + /* read SREV register from IIM module */
>> + srev = __raw_readl(MX31_IIM_BASE_ADDR + MXC_IIMSREV);
>
> We have already used the IIM registers on other i.MX processors, you can
> see for i.MX35/MX51/MX53. You should set a structure for the iim
> registers and use it, instead of using offset.
>
> I know the i.MX31, as it was the first i.MX31, does not follow this
> rule, but it means it should be clean up.
Ok.
>
>> diff --git a/arch/arm/include/asm/arch-mx31/mx31-regs.h b/arch/arm/include/asm/arch-mx31/mx31-regs.h
>> index 37337f2..cc0ffc8 100644
>> --- a/arch/arm/include/asm/arch-mx31/mx31-regs.h
>> +++ b/arch/arm/include/asm/arch-mx31/mx31-regs.h
>> @@ -480,6 +480,10 @@ enum iomux_pins {
>> #define CCMR_FPM (1 << 1)
>> #define CCMR_CKIH (2 << 1)
>>
>> +#define MX31_SPBA0_BASE_ADDR 0x50000000
>> +#define MX31_IIM_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x1c000)
>> +#define MXC_IIMSREV 0x0024
>
> As I said, replace them with a structure.
Ok.
>> +++ b/arch/arm/include/asm/imx_soc_revision.h
>> @@ -0,0 +1,42 @@
>> +/*
>> + * Copyright (C) 2011 Freescale Semiconductor, Inc.
>> + *
>> + * Fabio Estevam <fabio.estevam@freescale.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation;
>> + */
>> +
>> +#define IMX_CHIP_REVISION_1_0 0x10
>> +#define IMX_CHIP_REVISION_1_1 0x11
>> +#define IMX_CHIP_REVISION_1_2 0x12
>> +#define IMX_CHIP_REVISION_1_3 0x13
>> +#define IMX_CHIP_REVISION_2_0 0x20
>> +#define IMX_CHIP_REVISION_2_1 0x21
>> +#define IMX_CHIP_REVISION_2_2 0x22
>> +#define IMX_CHIP_REVISION_2_3 0x23
>> +#define IMX_CHIP_REVISION_3_0 0x30
>> +#define IMX_CHIP_REVISION_3_1 0x31
>> +#define IMX_CHIP_REVISION_3_2 0x32
>> +#define IMX_CHIP_REVISION_3_3 0x33
>> +#define IMX_CHIP_REVISION_UNKNOWN 0xff
>
> Is there a good reason to add a further file and not put them inside
> inside the mx31-regs.h file ?
Yes, the idea is that other i.MX processors can reuse this file.
We currently use this same approach in the kernel.
Will post v2 with your recommendations.
Regards,
Fabio Estevam
^ permalink raw reply
* Re: [PATCH v4] mmc: sdhci: add error checking for mmc_add_host
From: Wolfram Sang @ 2011-04-11 3:04 UTC (permalink / raw)
To: Jaehoon Chung; +Cc: linux-mmc@vger.kernel.org, Chris Ball, Kyungmin Park
In-Reply-To: <4DA2633C.5000103@samsung.com>
[-- Attachment #1: Type: text/plain, Size: 643 bytes --]
On Mon, Apr 11, 2011 at 11:11:08AM +0900, Jaehoon Chung wrote:
> Sometimes we can't add the device,but we didn't check any error status.
> Need to check error status for mmc_add_host.
> And Missing regulator disable/put. Fixed them.
Is there any special reason you don't want to answer the open question from the
last two reviews?
> [PATCH v4] : merged for v3 [PATCH 1/2] and [PATCH 2/2] reviewed on Wolfram Sang
This should go below the dashed line (---)
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* Re: [PATCH 1/5] nfsd: distinguish functions of NFSD_MAY_* flags
From: Mi Jinlong @ 2011-04-11 3:06 UTC (permalink / raw)
To: J. Bruce Fields; +Cc: linux-nfs@vger.kernel.org, Bryan Schumaker
In-Reply-To: <1302452973-27272-1-git-send-email-bfields@redhat.com>
J. Bruce Fields 写道:
> Most of the NFSD_MAY_* flags actually request permissions, but over the
> years we've accreted a few that modify the behavior of the permission or
> open code in other ways.
>
> Distinguish the two cases a little more. In particular, allow the
> shortcut at the start of nfsd_permission to ignore the
> non-permission-requesting bits.
>
> Signed-off-by: J. Bruce Fields <bfields@redhat.com>
> ---
> fs/nfsd/vfs.c | 2 +-
> fs/nfsd/vfs.h | 3 +++
> 2 files changed, 4 insertions(+), 1 deletions(-)
>
> diff --git a/fs/nfsd/vfs.c b/fs/nfsd/vfs.c
> index 2e1cebd..ac4f0b4 100644
> --- a/fs/nfsd/vfs.c
> +++ b/fs/nfsd/vfs.c
> @@ -2027,7 +2027,7 @@ nfsd_permission(struct svc_rqst *rqstp, struct svc_export *exp,
> struct inode *inode = dentry->d_inode;
> int err;
>
> - if (acc == NFSD_MAY_NOP)
> + if (acc & NFSD_MAY_MASK == NFSD_MAY_NOP)
> return 0;
Maybe there is a problem, the priority of '==' is higher than '&',
this line equal to "if (acc & (NFSD_MAY_MASK == NFSD_MAY_NOP))",
"return 0" will appears every time, I think it's not we really want.
"if ((acc & NFSD_MAY_MASK) == NFSD_MAY_NOP)" is we need,
do you think so?
--
----
thanks
Mi Jinlong
> #if 0
> dprintk("nfsd: permission 0x%x%s%s%s%s%s%s%s mode 0%o%s%s%s\n",
> diff --git a/fs/nfsd/vfs.h b/fs/nfsd/vfs.h
> index 9a370a5..1036913 100644
> --- a/fs/nfsd/vfs.h
> +++ b/fs/nfsd/vfs.h
> @@ -17,6 +17,9 @@
> #define NFSD_MAY_SATTR 8
> #define NFSD_MAY_TRUNC 16
> #define NFSD_MAY_LOCK 32
> +#define NFSD_MAY_MASK 63
> +
> +/* extra hints to permission and open routines: */
> #define NFSD_MAY_OWNER_OVERRIDE 64
> #define NFSD_MAY_LOCAL_ACCESS 128 /* IRIX doing local access check on device special file*/
> #define NFSD_MAY_BYPASS_GSS_ON_ROOT 256
--
----
thanks
Mi Jinlong
^ permalink raw reply
* Re: [RFC PATCH 4/5] RCU: Add TASK_RCU_OFFSET
From: Lai Jiangshan @ 2011-04-11 3:08 UTC (permalink / raw)
To: paulmck
Cc: H. Peter Anvin, Peter Zijlstra, Michal Marek, Jan Beulich,
Ingo Molnar, Alexander van Heukelum, Dipankar Sarma,
Andrew Morton, Sam Ravnborg, David Howells, Oleg Nesterov,
Roland McGrath, linux-kernel, Thomas Gleixner, Steven Rostedt
In-Reply-To: <20110408051359.GA2318@linux.vnet.ibm.com>
On 04/08/2011 01:13 PM, Paul E. McKenney wrote:
> On Fri, Apr 08, 2011 at 09:26:16AM +0800, Lai Jiangshan wrote:
>> On 04/08/2011 12:26 AM, Paul E. McKenney wrote:
>>> On Thu, Apr 07, 2011 at 08:47:37AM -0700, Paul E. McKenney wrote:
>>>> On Thu, Apr 07, 2011 at 01:49:51PM +0800, Lai Jiangshan wrote:
>>>>> On 04/07/2011 08:30 AM, Paul E. McKenney wrote:
>>>>>> On Wed, Apr 06, 2011 at 02:27:39PM -0700, H. Peter Anvin wrote:
>>>>>>> On 04/06/2011 02:06 PM, Peter Zijlstra wrote:
>>>>>>>> On Wed, 2011-04-06 at 13:13 -0700, Paul E. McKenney wrote:
>>>>>>>>> And the following patch builds correctly for defconfig x86 builds,
>>>>>>>>> while allowing rcupdate.h to see the sched.h definitions as needed
>>>>>>>>> to inline rcu_read_lock() and rcu_read_unlock().
>>>>>>>>>
>>>>>>>> Looks like an entirely reasonable patch to me ;-)
>>>>>>>>
>>>>>>>
>>>>>>> Quite... a lot better than the original proposal!
>>>>>>
>>>>>> Glad you both like it!
>>>>>>
>>>>>> When I do an allyesconfig build, I do get errors during the "CHECK"
>>>>>> phase, when it is putting things into the usr/include in the build tree.
>>>>>> I believe that this is because I am exposing different header files to
>>>>>> the library-export scripts. The following patch silences some of them,
>>>>>> but I am really out of my depth here.
>>>>>>
>>>>>> Sam, Jan, Michal, help?
>>>>>>
>>>>>> Thanx, Paul
>>>>>>
>>>>>> ------------------------------------------------------------------------
>>>>>>
>>>>>
>>>>> Easy to split rcupdate.h, hard to resolve the dependence problem.
>>>>>
>>>>> You can apply the next additional patch when you test:
>>>>
>>>> I am sure that you are quite correct. ;-)
>>>>
>>>> I am moving _rcu_read_lock() and _rcu_read_unlock() into
>>>> include/linux/rcutree.h and include/linux/rcutiny.h, and I am sure that
>>>> more pain will ensue.
>>>>
>>>> One thing I don't understand... How does is it helping to group the
>>>> task_struct RCU-related fields into a structure? Is that generating
>>>> better code on your platform due to smaller offsets or something?
>>
>> You don't like task_rcu_struct patch? I think it can make code clearer,
>> and it can also check the code even when CONFIG_PREEMPT_RCU=n.
>>
>> For rcu_read_[un]lock(), it generates the same code, no better, no worse.
>>
>> It is just a cleanup patch, it is helpless for making rcu_read_[un]lock() inline,
>> if you don't like it, I will give up it.
>
> I don't know that I feel strongly either way about it. It was necessary
> with the integer-offset approach, but optional now.
>
>>>> Also, does your patchset address the CHECK warnings?
>>>
>>> I take it back... I applied the following patch on top of my earlier
>>> one, and a defconfig x86 build completed without error. (Though I have
>>> not tested the results of the build.)
>>>
>>> One possible difference -- I did this work on top of a recent Linus
>>> git commit (b2a8b4b81966) rather than on top of my -rcu tree. Also,
>>> I have not yet tried an allyesconfig build, which will no doubt locate
>>> some more problems.
>>>
>>> Thanx, Paul
>>>
>>
>> when defconfig or allyesconfig, CONFIG_PREEMPT=n and CONFIG_TREE_PREEMPT_RCU=n
>> when you make them "y":
>>
>> In file included from include/linux/rcupdate.h:764:0,
>> from include/linux/tracepoint.h:19,
>> from include/linux/module.h:18,
>> from include/linux/crypto.h:21,
>> from arch/x86/kernel/asm-offsets.c:8:
>> include/linux/rcutree.h:50:20: error: static declaration of ‘__rcu_read_lock’ follows non-static declaration
>> include/linux/rcupdate.h:76:13: note: previous declaration of ‘__rcu_read_lock’ was here
>> include/linux/rcutree.h:63:20: error: static declaration of ‘__rcu_read_unlock’ follows non-static declaration
>> include/linux/rcupdate.h:77:13: note: previous declaration of ‘__rcu_read_unlock’ was here
>> make[1]: *** [arch/x86/kernel/asm-offsets.s] Error 1
>> make: *** [prepare0] Error 2
>
> Yep. I need to move the rcu_read_lock() APIs to follow the inclusion
> of rcutree.h and rcutiny.h. Also add include of sched.h to rcutiny.h.
> The code movement does bloat the patch a bit. But rcu_assign_pointer()
> must precede the inclusion of rcutree.h and rcutiny.h, so it is not
> possible to simply move the inclusions. See below.
>
> Thanx, Paul
>
sched.h still contains rcupdate.h after applied this patch.
See my [PATCH 2/4] for more info.
# make lib/is_single_threaded.o
CHK include/linux/version.h
CHK include/generated/utsrelease.h
CALL scripts/checksyscalls.sh
CC lib/is_single_threaded.o
In file included from include/linux/rcupdate.h:639:0,
from include/linux/rculist.h:10,
from include/linux/sched.h:82,
from lib/is_single_threaded.c:13:
include/linux/rcutree.h: In function ‘__rcu_read_lock’:
include/linux/rcutree.h:52:15: error: dereferencing pointer to incomplete type
In file included from include/linux/rcupdate.h:639:0,
from include/linux/rculist.h:10,
from include/linux/sched.h:82,
from lib/is_single_threaded.c:13:
include/linux/rcutree.h: In function ‘__rcu_read_unlock’:
include/linux/rcutree.h:68:5: error: dereferencing pointer to incomplete type
include/linux/rcutree.h:70:7: error: dereferencing pointer to incomplete type
include/linux/rcutree.h:71:46: error: dereferencing pointer to incomplete type
include/linux/rcutree.h:71:78: error: dereferencing pointer to incomplete type
include/linux/rcutree.h:71:6: warning: type defaults to ‘int’ in type name
make[1]: *** [lib/is_single_threaded.o] Error 1
make: *** [lib/is_single_threaded.o] Error 2
^ permalink raw reply
* Firmware for rt2800pci and rt2800usb
From: Larry Finger @ 2011-04-11 3:06 UTC (permalink / raw)
To: linux-wireless; +Cc: Xose Vazquez Perez, Ben Hutchings, users
In-Reply-To: <4DA23594.8090002@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 186 bytes --]
Hi,
I am in the process of updating the firmware files for rt2800pci and rt2800usb.
If you have one of the devices that use this driver, please test the firmware file.
Thanks,
Larry
[-- Attachment #2: rt2860.bin --]
[-- Type: application/octet-stream, Size: 8192 bytes --]
[-- Attachment #3: rt2870.bin --]
[-- Type: application/octet-stream, Size: 8192 bytes --]
^ permalink raw reply
* [PATCH] xfs: reset buffer pointers before freeing them
From: Dave Chinner @ 2011-04-11 3:10 UTC (permalink / raw)
To: xfs
From: Dave Chinner <dchinner@redhat.com>
When we free a vmapped buffer, we need to ensure the vmap address
and length we free is the same as when it was allocated. In various
places in the log code we change the memory the buffer is pointing
to before issuing IO, but we never reset the buffer to point back to
it's original memory (or no memory, if that is the case for the
buffer).
As a result, when we free the buffer it points to memory that is
owned by something else and attempts to unmap and free it. Because
the range does not match any known mapped range, it can trigger
BUG_ON() traps in the vmap code, and potentially corrupt the vmap
area tracking.
Fix this by always resetting these buffers to their original state
before freeing them.
Signed-off-by: Dave Chinner <dchinner@redhat.com>
---
fs/xfs/linux-2.6/xfs_buf.c | 21 +++++++++++++++++++++
fs/xfs/linux-2.6/xfs_buf.h | 1 +
fs/xfs/xfs_log.c | 8 +++++++-
fs/xfs/xfs_log_recover.c | 31 ++++++++++++++++++++-----------
4 files changed, 49 insertions(+), 12 deletions(-)
diff --git a/fs/xfs/linux-2.6/xfs_buf.c b/fs/xfs/linux-2.6/xfs_buf.c
index d917146..2e8b759 100644
--- a/fs/xfs/linux-2.6/xfs_buf.c
+++ b/fs/xfs/linux-2.6/xfs_buf.c
@@ -711,6 +711,27 @@ xfs_buf_get_empty(
return bp;
}
+/*
+ * Return a buffer allocated as an empty buffer and associated to external
+ * memory via xfs_buf_associate_memory() back to it's empty state.
+ */
+void
+xfs_buf_set_empty(
+ struct xfs_buf *bp,
+ size_t len)
+{
+ if (bp->b_pages)
+ _xfs_buf_free_pages(bp);
+
+ bp->b_pages = NULL;
+ bp->b_page_count = 0;
+ bp->b_addr = NULL;
+ bp->b_file_offset = 0;
+ bp->b_buffer_length = bp->b_count_desired = len;
+ bp->b_bn = XFS_BUF_DADDR_NULL;
+ bp->b_flags &= ~XBF_MAPPED;
+}
+
static inline struct page *
mem_to_page(
void *addr)
diff --git a/fs/xfs/linux-2.6/xfs_buf.h b/fs/xfs/linux-2.6/xfs_buf.h
index a9a1c45..50a7d5f 100644
--- a/fs/xfs/linux-2.6/xfs_buf.h
+++ b/fs/xfs/linux-2.6/xfs_buf.h
@@ -178,6 +178,7 @@ extern xfs_buf_t *xfs_buf_read(xfs_buftarg_t *, xfs_off_t, size_t,
xfs_buf_flags_t);
extern xfs_buf_t *xfs_buf_get_empty(size_t, xfs_buftarg_t *);
+extern void xfs_buf_set_empty(struct xfs_buf *bp, size_t len);
extern xfs_buf_t *xfs_buf_get_uncached(struct xfs_buftarg *, size_t, int);
extern int xfs_buf_associate_memory(xfs_buf_t *, void *, size_t);
extern void xfs_buf_hold(xfs_buf_t *);
diff --git a/fs/xfs/xfs_log.c b/fs/xfs/xfs_log.c
index b612ce4..3850a91 100644
--- a/fs/xfs/xfs_log.c
+++ b/fs/xfs/xfs_log.c
@@ -1449,6 +1449,13 @@ xlog_dealloc_log(xlog_t *log)
xlog_cil_destroy(log);
+ /*
+ * always need to ensure that the extra buffer does not point to memory
+ * owned by another log buffer before we free it.
+ */
+ xfs_buf_set_empty(log->l_xbuf, log->l_iclog_size);
+ xfs_buf_free(log->l_xbuf);
+
iclog = log->l_iclog;
for (i=0; i<log->l_iclog_bufs; i++) {
xfs_buf_free(iclog->ic_bp);
@@ -1458,7 +1465,6 @@ xlog_dealloc_log(xlog_t *log)
}
spinlock_destroy(&log->l_icloglock);
- xfs_buf_free(log->l_xbuf);
log->l_mp->m_log = NULL;
kmem_free(log);
} /* xlog_dealloc_log */
diff --git a/fs/xfs/xfs_log_recover.c b/fs/xfs/xfs_log_recover.c
index 0c4a561..c467e38 100644
--- a/fs/xfs/xfs_log_recover.c
+++ b/fs/xfs/xfs_log_recover.c
@@ -1229,6 +1229,8 @@ xlog_write_log_records(
*/
ealign = round_down(end_block, sectbb);
if (j == 0 && (start_block + endcount > ealign)) {
+ int error2;
+
offset = XFS_BUF_PTR(bp);
balign = BBTOB(ealign - start_block);
error = XFS_BUF_SET_PTR(bp, offset + balign,
@@ -1237,12 +1239,14 @@ xlog_write_log_records(
break;
error = xlog_bread_noalign(log, ealign, sectbb, bp);
- if (error)
- break;
- error = XFS_BUF_SET_PTR(bp, offset, bufblks);
+ /* must reset buffer pointer even on error */
+ error2 = XFS_BUF_SET_PTR(bp, offset, bufblks);
+ if (error2 && !error)
+ error = error2;
if (error)
break;
+
}
offset = xlog_align(log, start_block, endcount, bp);
@@ -3422,6 +3426,8 @@ xlog_do_recovery_pass(
if (error)
goto bread_err2;
} else {
+ int error2;
+
/* This LR is split across physical log end */
if (blk_no != log->l_logBBsize) {
/* some data before physical log end */
@@ -3456,11 +3462,12 @@ xlog_do_recovery_pass(
error = xlog_bread_noalign(log, 0,
wrapped_hblks, hbp);
- if (error)
- goto bread_err2;
- error = XFS_BUF_SET_PTR(hbp, offset,
+ /* must reset buffer pointer even on error */
+ error2 = XFS_BUF_SET_PTR(hbp, offset,
BBTOB(hblks));
+ if (error2 && !error)
+ error = error2;
if (error)
goto bread_err2;
}
@@ -3480,6 +3487,8 @@ xlog_do_recovery_pass(
if (error)
goto bread_err2;
} else {
+ int error2;
+
/* This log record is split across the
* physical end of log */
offset = XFS_BUF_PTR(dbp);
@@ -3518,12 +3527,12 @@ xlog_do_recovery_pass(
goto bread_err2;
error = xlog_bread_noalign(log, wrapped_hblks,
- bblks - split_bblks,
- dbp);
- if (error)
- goto bread_err2;
+ bblks - split_bblks, dbp);
- error = XFS_BUF_SET_PTR(dbp, offset, h_size);
+ /* must reset buffer pointer even on error */
+ error2 = XFS_BUF_SET_PTR(dbp, offset, h_size);
+ if (error2 && !error)
+ error = error2;
if (error)
goto bread_err2;
}
--
1.7.2.3
_______________________________________________
xfs mailing list
xfs@oss.sgi.com
http://oss.sgi.com/mailman/listinfo/xfs
^ permalink raw reply related
* [U-Boot] [PATCH v2] ARM: mx31: Print the silicon version
From: Fabio Estevam @ 2011-04-11 3:08 UTC (permalink / raw)
To: u-boot
Use the same method of the Linux kernel to print the MX31 silicon version on
boot.
Tested on a MX31PDK with a 2.0 silicon, where it shows:
CPU: Freescale i.MX31 at 531 MHz
MX31 silicon rev 2.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v1:
- rename the CPU detect function name to get_cpu_rev
- Use struct to access iim register
arch/arm/cpu/arm1136/mx31/generic.c | 18 ++++++++++++
arch/arm/include/asm/arch-mx31/imx-regs.h | 20 +++++++++++++
arch/arm/include/asm/imx_soc_revision.h | 42 +++++++++++++++++++++++++++++
3 files changed, 80 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/imx_soc_revision.h
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index fa07fec..cfcb3d8 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -24,6 +24,7 @@
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
+#include <asm/imx_soc_revision.h>
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
@@ -106,11 +107,28 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
}
+void get_cpu_rev(void)
+{
+ u32 i, srev;
+
+ /* read SREV register from IIM module */
+ struct iim_regs *iim = (struct iim_regs *)MX31_IIM_BASE_ADDR;
+ srev = readl(&iim->iim_srev);
+
+ for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
+ if (srev == mx31_cpu_type[i].srev) {
+ printf("MX31 silicon rev %s\n", mx31_cpu_type[i].v);
+ return;
+ }
+ printf("Unknown CPU identifier. srev = %02x\n", srev);
+}
+
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo (void)
{
printf("CPU: Freescale i.MX31 at %d MHz\n",
mx31_get_mcu_main_clk() / 1000000);
+ get_cpu_rev();
return 0;
}
#endif
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 37337f2..6401a37 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -84,6 +84,24 @@ struct wdog_regs {
u16 wrsr; /* Reset Status */
};
+/* IIM Control Registers */
+struct iim_regs {
+ u32 iim_stat;
+ u32 iim_statm;
+ u32 iim_err;
+ u32 iim_emask;
+ u32 iim_fctl;
+ u32 iim_ua;
+ u32 iim_la;
+ u32 iim_sdat;
+ u32 iim_prev;
+ u32 iim_srev;
+ u32 iim_prog_p;
+ u32 iim_scs0;
+ u32 iim_scs1;
+ u32 iim_scs2;
+ u32 iim_scs3;
+};
#define IOMUX_PADNUM_MASK 0x1ff
#define IOMUX_PIN(gpionum, padnum) ((padnum) & IOMUX_PADNUM_MASK)
@@ -480,6 +498,8 @@ enum iomux_pins {
#define CCMR_FPM (1 << 1)
#define CCMR_CKIH (2 << 1)
+#define MX31_IIM_BASE_ADDR 0x5001C000
+
#define PDR0_CSI_PODF(x) (((x) & 0x1ff) << 23)
#define PDR0_PER_PODF(x) (((x) & 0x1f) << 16)
#define PDR0_HSP_PODF(x) (((x) & 0x7) << 11)
diff --git a/arch/arm/include/asm/imx_soc_revision.h b/arch/arm/include/asm/imx_soc_revision.h
new file mode 100644
index 0000000..0179d52
--- /dev/null
+++ b/arch/arm/include/asm/imx_soc_revision.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc.
+ *
+ * Fabio Estevam <fabio.estevam@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation;
+ */
+
+#define IMX_CHIP_REVISION_1_0 0x10
+#define IMX_CHIP_REVISION_1_1 0x11
+#define IMX_CHIP_REVISION_1_2 0x12
+#define IMX_CHIP_REVISION_1_3 0x13
+#define IMX_CHIP_REVISION_2_0 0x20
+#define IMX_CHIP_REVISION_2_1 0x21
+#define IMX_CHIP_REVISION_2_2 0x22
+#define IMX_CHIP_REVISION_2_3 0x23
+#define IMX_CHIP_REVISION_3_0 0x30
+#define IMX_CHIP_REVISION_3_1 0x31
+#define IMX_CHIP_REVISION_3_2 0x32
+#define IMX_CHIP_REVISION_3_3 0x33
+#define IMX_CHIP_REVISION_UNKNOWN 0xff
+
+struct mx3_cpu_type {
+ u8 srev;
+ const char *name;
+ const char *v;
+ unsigned int rev;
+};
+
+struct mx3_cpu_type mx31_cpu_type[] = {
+ { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = IMX_CHIP_REVISION_1_0 },
+ { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 },
+ { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 },
+ { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 },
+ { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 },
+ { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 },
+ { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 },
+ { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 },
+ { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 },
+};
--
1.6.0.4
^ permalink raw reply related
* Re: [PATCH V4 0/4] add the GPMI controller driver for IMX23/IMX28
From: Huang Shijie @ 2011-04-11 3:08 UTC (permalink / raw)
To: Lothar Waßmann; +Cc: linux-mtd, linux-arm-kernel
In-Reply-To: <19870.59289.913018.127715@ipc1.ka-ro>
Hi Lothar:
> Hi,
>
> Huang Shijie writes:
>> Hi Lothar:
>>> Hi,
>>>
>>> Huang Shijie writes:
>>>> Does some one have any comments about this driver?
>>>>
>>> I'm still not happy with the rom-helper code that IMO does not belong
>>> in this driver.
>> Could you tell me which part of the rom-helper code is not belong the
>> driver?
>>
> All of it. I don't see a point in having it, when all that it does can
> be achieved with standard functions already.
>
I am afraid most of the rom-help code can not be removed, the reasons are:
[1] imx23 does not need the swap-block-mark feature. The swap-block-mark
feature is used
by the BCH hardware ecc-correction module. But the imx28 does need
the swap-block-mark feature.
Why? the firmwares in both chips are a little different. The
rom-help code is used to distinguish
this, and _DO_ some necessary initializations. After the
initialization, the NAND_SCAN will works.
[2] In the NAND boot mode, we also need to check the swap-block-mark to
do the right ECC read pages.
BUT the default partition layout code really can be removed. It somehow
can be regards as not belonged to
the driver.
thanks.
>>> Also, I would integrate the code from the hal-*.c files into the main
>>> file and remove all the function hooks, since the functions are the
>> thanks for your advice.
>>
>> This driver will serve for many platforms, not only the imx23 and imx28.
>> I am merging the imx508 code to the driver.
>> I feel lucky that i did not merge all the code into the main file, which
>> will
>> make the code mess.
>>
> You would probably end up with some more functions that are
> implemented for the different variants. They could be prefixed with
> the SoC name and selected in the probe() function depending on the
> platform id. I don't see why this should get messy.
>
I really do not like to package all the code into one file which makes
the file bigger and bigger.
Frankly speaking, I regard it as a bad idea. I think it's messy.
imx508 will support DDR mode for ONFI NAND and TOGGLE nand which need to
do lot of TIMING initialization for both mode.
It is a long initialization code. Keep the code in separate file is to
make the code tidy. Do you think it's a
grace method to keep it in one file? I do not think so. :)
yes, I can use the PREFIXED name for different variants. But I think
that will create more code.
The current *hal.c only contains the different implementation for variants.
> If the imx508 driver is so much different from the other variants,
> that merging it gets too messy, it's probably better to not merge it
> with the other variants anyway.
>
It just needs a separate hal-508.c file.
> Lothar Waßmann
Thanks a lot.
Best Regards
Huang Shijie
^ permalink raw reply
* [PATCH V4 0/4] add the GPMI controller driver for IMX23/IMX28
From: Huang Shijie @ 2011-04-11 3:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <19870.59289.913018.127715@ipc1.ka-ro>
Hi Lothar:
> Hi,
>
> Huang Shijie writes:
>> Hi Lothar:
>>> Hi,
>>>
>>> Huang Shijie writes:
>>>> Does some one have any comments about this driver?
>>>>
>>> I'm still not happy with the rom-helper code that IMO does not belong
>>> in this driver.
>> Could you tell me which part of the rom-helper code is not belong the
>> driver?
>>
> All of it. I don't see a point in having it, when all that it does can
> be achieved with standard functions already.
>
I am afraid most of the rom-help code can not be removed, the reasons are:
[1] imx23 does not need the swap-block-mark feature. The swap-block-mark
feature is used
by the BCH hardware ecc-correction module. But the imx28 does need
the swap-block-mark feature.
Why? the firmwares in both chips are a little different. The
rom-help code is used to distinguish
this, and _DO_ some necessary initializations. After the
initialization, the NAND_SCAN will works.
[2] In the NAND boot mode, we also need to check the swap-block-mark to
do the right ECC read pages.
BUT the default partition layout code really can be removed. It somehow
can be regards as not belonged to
the driver.
thanks.
>>> Also, I would integrate the code from the hal-*.c files into the main
>>> file and remove all the function hooks, since the functions are the
>> thanks for your advice.
>>
>> This driver will serve for many platforms, not only the imx23 and imx28.
>> I am merging the imx508 code to the driver.
>> I feel lucky that i did not merge all the code into the main file, which
>> will
>> make the code mess.
>>
> You would probably end up with some more functions that are
> implemented for the different variants. They could be prefixed with
> the SoC name and selected in the probe() function depending on the
> platform id. I don't see why this should get messy.
>
I really do not like to package all the code into one file which makes
the file bigger and bigger.
Frankly speaking, I regard it as a bad idea. I think it's messy.
imx508 will support DDR mode for ONFI NAND and TOGGLE nand which need to
do lot of TIMING initialization for both mode.
It is a long initialization code. Keep the code in separate file is to
make the code tidy. Do you think it's a
grace method to keep it in one file? I do not think so. :)
yes, I can use the PREFIXED name for different variants. But I think
that will create more code.
The current *hal.c only contains the different implementation for variants.
> If the imx508 driver is so much different from the other variants,
> that merging it gets too messy, it's probably better to not merge it
> with the other variants anyway.
>
It just needs a separate hal-508.c file.
> Lothar Wa?mann
Thanks a lot.
Best Regards
Huang Shijie
^ permalink raw reply
* Re: [PATCH 0/2] LSB: add nspr and nss to pass LSB library check
From: Kang Kai @ 2011-04-11 3:13 UTC (permalink / raw)
To: Saul Wold; +Cc: poky
In-Reply-To: <4D9F5668.80807@intel.com>
On 2011年04月09日 02:39, Saul Wold wrote:
> On 04/06/2011 01:06 AM, Kang Kai wrote:
>> From: Kang Kai<kai.kang@windriver.com>
>>
>> Hi Saul,
>>
>> I add the exact LICENSE version and update LICENSE files and resend
>> the patches.
>> Because the license information exists in every file, so just pick
>> one file's header as LICENSE file.
>>
> Kang,
>
> If the license block is the same as the copyright file, then the
> correct file is the copyright. What I was looking for if was multiple
> licensed was a couple of different files that might have had different
> license headers.
Hi Saul,
There are not separate license files or different license headers, so I
will resend this patch with the "copyright" file as license file.
Regards,
Kai
>
> Please use the copyright file for both nspr and nss.
>
> Sorry to make this difficult, we just need to get the license
> information correct.
>
> Sau!
>
>> add nss and nspr to provide libnss3.so, libssl3.so and libnspr4.so
>> to pass LSB library check.
>> Both are imported from oe, rev 6fe7cef27069415f2eba36bc640cf59013d4979b
>> And add header for each patch
>>
>> Pull URL: git://git.pokylinux.org/poky-contrib.git
>> Branch: kangkai/bugfix-nss
>> Browse:
>> http://git.pokylinux.org/cgit.cgi/poky-contrib/log/?h=kangkai/bugfix-nss
>>
>> Thanks,
>> Kang Kai<kai.kang@windriver.com>
>> ---
>>
>>
>> Kang Kai (2):
>> nspr: add nspr to pass LSB library test
>> nss: add nss for LSB library check
>>
>> .../mozilla/nspr-4.8.7/30_config_64bits.dpatch | 45 +
>> .../mozilla/nspr-4.8.7/30_pkgconfig.dpatch | 37 +
>> .../mozilla/nspr-4.8.7/81_sonames.dpatch | 233 +
>> .../mozilla/nspr-4.8.7/unbreak-build.diff | 50 +
>> .../recipes-extended/mozilla/nspr-tools-native.inc | 29 +
>> .../mozilla/nspr-tools-native_4.8.7.bb | 16 +
>> meta/recipes-extended/mozilla/nspr.inc | 44 +
>> meta/recipes-extended/mozilla/nspr_4.8.7.bb | 17 +
>> .../mozilla/nss-3.12.6/00_ckbi_1.79.patch | 6390 ++++++++++++++++++++
>> .../mozilla/nss-3.12.6/25_entropy.patch | 26 +
>> .../mozilla/nss-3.12.6/38_hurd.patch | 63 +
>> .../mozilla/nss-3.12.6/38_kbsd.patch | 156 +
>> .../mozilla/nss-3.12.6/38_mips64_build.patch | 31 +
>> .../mozilla/nss-3.12.6/80_security_build.patch | 21 +
>> .../mozilla/nss-3.12.6/80_security_tools.patch | 30 +
>> .../mozilla/nss-3.12.6/81_sonames.patch | 355 ++
>> .../mozilla/nss-3.12.6/85_security_load.patch | 83 +
>> .../mozilla/nss-3.12.6/90_realpath.patch | 39 +
>> .../mozilla/nss-3.12.6/91_build_pwdecrypt.patch | 21 +
>> .../nss-3.12.6/95_add_spi+cacert_ca_certs.patch | 1172 ++++
>> .../mozilla/nss-3.12.6/96_NSS_VersionCheck.patch | 23 +
>> .../97_SSL_RENEGOTIATE_TRANSITIONAL.patch | 25 +
>> .../mozilla/nss-3.12.6/build-fix.patch | 67 +
>> meta/recipes-extended/mozilla/nss-3.12.6/nss.pc.in | 11 +
>> meta/recipes-extended/mozilla/nss-3.12.6/series | 14 +
>> meta/recipes-extended/mozilla/nss_3.12.6.bb | 116 +
>> 26 files changed, 9114 insertions(+), 0 deletions(-)
>> create mode 100644
>> meta/recipes-extended/mozilla/nspr-4.8.7/30_config_64bits.dpatch
>> create mode 100644
>> meta/recipes-extended/mozilla/nspr-4.8.7/30_pkgconfig.dpatch
>> create mode 100644
>> meta/recipes-extended/mozilla/nspr-4.8.7/81_sonames.dpatch
>> create mode 100644
>> meta/recipes-extended/mozilla/nspr-4.8.7/unbreak-build.diff
>> create mode 100644 meta/recipes-extended/mozilla/nspr-tools-native.inc
>> create mode 100644
>> meta/recipes-extended/mozilla/nspr-tools-native_4.8.7.bb
>> create mode 100644 meta/recipes-extended/mozilla/nspr.inc
>> create mode 100644 meta/recipes-extended/mozilla/nspr_4.8.7.bb
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/00_ckbi_1.79.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/25_entropy.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/38_hurd.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/38_kbsd.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/38_mips64_build.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/80_security_build.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/80_security_tools.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/81_sonames.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/85_security_load.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/90_realpath.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/91_build_pwdecrypt.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/95_add_spi+cacert_ca_certs.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/96_NSS_VersionCheck.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/97_SSL_RENEGOTIATE_TRANSITIONAL.patch
>> create mode 100644
>> meta/recipes-extended/mozilla/nss-3.12.6/build-fix.patch
>> create mode 100644 meta/recipes-extended/mozilla/nss-3.12.6/nss.pc.in
>> create mode 100644 meta/recipes-extended/mozilla/nss-3.12.6/series
>> create mode 100644 meta/recipes-extended/mozilla/nss_3.12.6.bb
>>
>> _______________________________________________
>> poky mailing list
>> poky@yoctoproject.org
>> https://lists.yoctoproject.org/listinfo/poky
>>
>
^ permalink raw reply
* Re: [PATCH] nand: Fix S3C NAND clock stop
From: Jiří Pinkava @ 2011-04-11 3:15 UTC (permalink / raw)
To: Randy Dunlap
Cc: kgene.kim@samsung.com, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org, ben-linux@fluff.org,
dwmw2@infradead.org, linux-arm-kernel@lists.infradead.org
In-Reply-To: <4DA261DA.2050404@oracle.com>
[-- Attachment #1: Type: text/plain, Size: 4329 bytes --]
Current implementation of s3c2410_nand_select_chip call
clk_disable every time when chip = -1 (de-select). This happend
multiple times even if chip was already de-selected. This causes
disabling clock even if they are already disabled and due to
nature of clock subsytem implementation this causes nand clock
to be disabled and newer enabled again.
Signed-off-by: Jiri Pinkava <jiri.pinkava@vscht.cz>
---
drivers/mtd/nand/s3c2410.c | 57
+++++++++++++++++++++++++++++++------------
1 files changed, 41 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 33d832d..fbc37dc 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -54,8 +54,14 @@ static int hardware_ecc = 1;
static int hardware_ecc = 0;
#endif
+#define CLOCK_DISABLE 0
+#define CLOCK_ENABLE 1
+#define CLOCK_SUSPEND 2
+
+static int clock_state = CLOCK_DISABLE;
+
#ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP
-static int clock_stop = 1;
+static const int clock_stop = 1;
#else
static const int clock_stop = 0;
#endif
@@ -159,11 +165,33 @@ static struct s3c2410_platform_nand
*to_nand_plat(struct platform_device *dev)
return dev->dev.platform_data;
}
-static inline int allow_clk_stop(struct s3c2410_nand_info *info)
+static inline int allow_clk_suspend(struct s3c2410_nand_info *info)
{
return clock_stop;
}
+/**
+ * s3c2410_nand_clk_set_state - Enable, disable or suspend NAND clock.
+ * @info: The controller instance.
+ * @new_state: State to which clock should be set.
+ */
+static void s3c2410_nand_clk_set_state(struct s3c2410_nand_info *info,
+ int new_state)
+{
+ if (!allow_clk_suspend(info) && new_state == CLOCK_SUSPEND)
+ return;
+
+ if (clock_state == CLOCK_ENABLE) {
+ if (new_state != CLOCK_ENABLE)
+ clk_disable(info->clk);
+ } else {
+ if (new_state == CLOCK_ENABLE)
+ clk_enable(info->clk);
+ }
+
+ clock_state = new_state;
+}
+
/* timing calculations */
#define NS_IN_KHZ 1000000
@@ -333,8 +361,8 @@ static void s3c2410_nand_select_chip(struct mtd_info
*mtd, int chip)
nmtd = this->priv;
info = nmtd->info;
- if (chip != -1 && allow_clk_stop(info))
- clk_enable(info->clk);
+ if (chip != -1)
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
cur = readl(info->sel_reg);
@@ -356,8 +384,8 @@ static void s3c2410_nand_select_chip(struct mtd_info
*mtd, int chip)
writel(cur, info->sel_reg);
- if (chip == -1 && allow_clk_stop(info))
- clk_disable(info->clk);
+ if (chip == -1)
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
/* s3c2410_nand_hwcontrol
@@ -694,8 +722,7 @@ static int s3c24xx_nand_remove(struct
platform_device *pdev)
/* free the common resources */
if (info->clk != NULL && !IS_ERR(info->clk)) {
- if (!allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
clk_put(info->clk);
}
@@ -947,7 +974,7 @@ static int s3c24xx_nand_probe(struct platform_device
*pdev)
goto exit_error;
}
- clk_enable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
/* allocate and map the resource */
@@ -1026,9 +1053,9 @@ static int s3c24xx_nand_probe(struct
platform_device *pdev)
goto exit_error;
}
- if (allow_clk_stop(info)) {
+ if (allow_clk_suspend(info)) {
dev_info(&pdev->dev, "clock idle support enabled\n");
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
pr_debug("initialised ok\n");
@@ -1059,8 +1086,7 @@ static int s3c24xx_nand_suspend(struct
platform_device *dev, pm_message_t pm)
writel(info->save_sel | info->sel_bit, info->sel_reg);
- if (!allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
}
return 0;
@@ -1072,7 +1098,7 @@ static int s3c24xx_nand_resume(struct
platform_device *dev)
unsigned long sel;
if (info) {
- clk_enable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
s3c2410_nand_inithw(info);
/* Restore the state of the nFCE line. */
@@ -1082,8 +1108,7 @@ static int s3c24xx_nand_resume(struct
platform_device *dev)
sel |= info->save_sel & info->sel_bit;
writel(sel, info->sel_reg);
- if (allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
return 0;
--
1.7.4.4
[-- Attachment #2: 0001-nand-Fix-S3C-NAND-clock-stop.patch --]
[-- Type: text/x-patch, Size: 4499 bytes --]
>From 4fd7086f28d6452f1edafa903e7becd5a0f017c6 Mon Sep 17 00:00:00 2001
From: Jiri Pinkava <jiri.pinkava@vscht.cz>
Date: Mon, 11 Apr 2011 03:20:33 +0200
Subject: [PATCH] nand: Fix S3C NAND clock stop
Current implementation of s3c2410_nand_select_chip call
clk_disable every time when chip = -1 (de-select). This happend
multiple times even if chip was already de-selected. This causes
disabling clock even if they are already disabled and due to
nature of clock subsytem implementation this causes nand clock
to be disabled and newer enabled again.
Signed-off-by: Jiri Pinkava <jiri.pinkava@vscht.cz>
---
drivers/mtd/nand/s3c2410.c | 57 +++++++++++++++++++++++++++++++------------
1 files changed, 41 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 33d832d..fbc37dc 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -54,8 +54,14 @@ static int hardware_ecc = 1;
static int hardware_ecc = 0;
#endif
+#define CLOCK_DISABLE 0
+#define CLOCK_ENABLE 1
+#define CLOCK_SUSPEND 2
+
+static int clock_state = CLOCK_DISABLE;
+
#ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP
-static int clock_stop = 1;
+static const int clock_stop = 1;
#else
static const int clock_stop = 0;
#endif
@@ -159,11 +165,33 @@ static struct s3c2410_platform_nand *to_nand_plat(struct platform_device *dev)
return dev->dev.platform_data;
}
-static inline int allow_clk_stop(struct s3c2410_nand_info *info)
+static inline int allow_clk_suspend(struct s3c2410_nand_info *info)
{
return clock_stop;
}
+/**
+ * s3c2410_nand_clk_set_state - Enable, disable or suspend NAND clock.
+ * @info: The controller instance.
+ * @new_state: State to which clock should be set.
+ */
+static void s3c2410_nand_clk_set_state(struct s3c2410_nand_info *info,
+ int new_state)
+{
+ if (!allow_clk_suspend(info) && new_state == CLOCK_SUSPEND)
+ return;
+
+ if (clock_state == CLOCK_ENABLE) {
+ if (new_state != CLOCK_ENABLE)
+ clk_disable(info->clk);
+ } else {
+ if (new_state == CLOCK_ENABLE)
+ clk_enable(info->clk);
+ }
+
+ clock_state = new_state;
+}
+
/* timing calculations */
#define NS_IN_KHZ 1000000
@@ -333,8 +361,8 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
nmtd = this->priv;
info = nmtd->info;
- if (chip != -1 && allow_clk_stop(info))
- clk_enable(info->clk);
+ if (chip != -1)
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
cur = readl(info->sel_reg);
@@ -356,8 +384,8 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
writel(cur, info->sel_reg);
- if (chip == -1 && allow_clk_stop(info))
- clk_disable(info->clk);
+ if (chip == -1)
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
/* s3c2410_nand_hwcontrol
@@ -694,8 +722,7 @@ static int s3c24xx_nand_remove(struct platform_device *pdev)
/* free the common resources */
if (info->clk != NULL && !IS_ERR(info->clk)) {
- if (!allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
clk_put(info->clk);
}
@@ -947,7 +974,7 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
goto exit_error;
}
- clk_enable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
/* allocate and map the resource */
@@ -1026,9 +1053,9 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
goto exit_error;
}
- if (allow_clk_stop(info)) {
+ if (allow_clk_suspend(info)) {
dev_info(&pdev->dev, "clock idle support enabled\n");
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
pr_debug("initialised ok\n");
@@ -1059,8 +1086,7 @@ static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm)
writel(info->save_sel | info->sel_bit, info->sel_reg);
- if (!allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
}
return 0;
@@ -1072,7 +1098,7 @@ static int s3c24xx_nand_resume(struct platform_device *dev)
unsigned long sel;
if (info) {
- clk_enable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
s3c2410_nand_inithw(info);
/* Restore the state of the nFCE line. */
@@ -1082,8 +1108,7 @@ static int s3c24xx_nand_resume(struct platform_device *dev)
sel |= info->save_sel & info->sel_bit;
writel(sel, info->sel_reg);
- if (allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
return 0;
--
1.7.4.4
^ permalink raw reply related
* [PATCH] nand: Fix S3C NAND clock stop
From: Jiří Pinkava @ 2011-04-11 3:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4DA261DA.2050404@oracle.com>
Current implementation of s3c2410_nand_select_chip call
clk_disable every time when chip = -1 (de-select). This happend
multiple times even if chip was already de-selected. This causes
disabling clock even if they are already disabled and due to
nature of clock subsytem implementation this causes nand clock
to be disabled and newer enabled again.
Signed-off-by: Jiri Pinkava <jiri.pinkava@vscht.cz>
---
drivers/mtd/nand/s3c2410.c | 57
+++++++++++++++++++++++++++++++------------
1 files changed, 41 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 33d832d..fbc37dc 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -54,8 +54,14 @@ static int hardware_ecc = 1;
static int hardware_ecc = 0;
#endif
+#define CLOCK_DISABLE 0
+#define CLOCK_ENABLE 1
+#define CLOCK_SUSPEND 2
+
+static int clock_state = CLOCK_DISABLE;
+
#ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP
-static int clock_stop = 1;
+static const int clock_stop = 1;
#else
static const int clock_stop = 0;
#endif
@@ -159,11 +165,33 @@ static struct s3c2410_platform_nand
*to_nand_plat(struct platform_device *dev)
return dev->dev.platform_data;
}
-static inline int allow_clk_stop(struct s3c2410_nand_info *info)
+static inline int allow_clk_suspend(struct s3c2410_nand_info *info)
{
return clock_stop;
}
+/**
+ * s3c2410_nand_clk_set_state - Enable, disable or suspend NAND clock.
+ * @info: The controller instance.
+ * @new_state: State to which clock should be set.
+ */
+static void s3c2410_nand_clk_set_state(struct s3c2410_nand_info *info,
+ int new_state)
+{
+ if (!allow_clk_suspend(info) && new_state == CLOCK_SUSPEND)
+ return;
+
+ if (clock_state == CLOCK_ENABLE) {
+ if (new_state != CLOCK_ENABLE)
+ clk_disable(info->clk);
+ } else {
+ if (new_state == CLOCK_ENABLE)
+ clk_enable(info->clk);
+ }
+
+ clock_state = new_state;
+}
+
/* timing calculations */
#define NS_IN_KHZ 1000000
@@ -333,8 +361,8 @@ static void s3c2410_nand_select_chip(struct mtd_info
*mtd, int chip)
nmtd = this->priv;
info = nmtd->info;
- if (chip != -1 && allow_clk_stop(info))
- clk_enable(info->clk);
+ if (chip != -1)
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
cur = readl(info->sel_reg);
@@ -356,8 +384,8 @@ static void s3c2410_nand_select_chip(struct mtd_info
*mtd, int chip)
writel(cur, info->sel_reg);
- if (chip == -1 && allow_clk_stop(info))
- clk_disable(info->clk);
+ if (chip == -1)
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
/* s3c2410_nand_hwcontrol
@@ -694,8 +722,7 @@ static int s3c24xx_nand_remove(struct
platform_device *pdev)
/* free the common resources */
if (info->clk != NULL && !IS_ERR(info->clk)) {
- if (!allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
clk_put(info->clk);
}
@@ -947,7 +974,7 @@ static int s3c24xx_nand_probe(struct platform_device
*pdev)
goto exit_error;
}
- clk_enable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
/* allocate and map the resource */
@@ -1026,9 +1053,9 @@ static int s3c24xx_nand_probe(struct
platform_device *pdev)
goto exit_error;
}
- if (allow_clk_stop(info)) {
+ if (allow_clk_suspend(info)) {
dev_info(&pdev->dev, "clock idle support enabled\n");
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
pr_debug("initialised ok\n");
@@ -1059,8 +1086,7 @@ static int s3c24xx_nand_suspend(struct
platform_device *dev, pm_message_t pm)
writel(info->save_sel | info->sel_bit, info->sel_reg);
- if (!allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
}
return 0;
@@ -1072,7 +1098,7 @@ static int s3c24xx_nand_resume(struct
platform_device *dev)
unsigned long sel;
if (info) {
- clk_enable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
s3c2410_nand_inithw(info);
/* Restore the state of the nFCE line. */
@@ -1082,8 +1108,7 @@ static int s3c24xx_nand_resume(struct
platform_device *dev)
sel |= info->save_sel & info->sel_bit;
writel(sel, info->sel_reg);
- if (allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
return 0;
--
1.7.4.4
^ permalink raw reply related
* Re: [PATCH] nand: Fix S3C NAND clock stop
From: Jiří Pinkava @ 2011-04-11 3:15 UTC (permalink / raw)
To: Randy Dunlap
Cc: ben-linux@fluff.org, kgene.kim@samsung.com, dwmw2@infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
In-Reply-To: <4DA261DA.2050404@oracle.com>
[-- Attachment #1: Type: text/plain, Size: 4329 bytes --]
Current implementation of s3c2410_nand_select_chip call
clk_disable every time when chip = -1 (de-select). This happend
multiple times even if chip was already de-selected. This causes
disabling clock even if they are already disabled and due to
nature of clock subsytem implementation this causes nand clock
to be disabled and newer enabled again.
Signed-off-by: Jiri Pinkava <jiri.pinkava@vscht.cz>
---
drivers/mtd/nand/s3c2410.c | 57
+++++++++++++++++++++++++++++++------------
1 files changed, 41 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 33d832d..fbc37dc 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -54,8 +54,14 @@ static int hardware_ecc = 1;
static int hardware_ecc = 0;
#endif
+#define CLOCK_DISABLE 0
+#define CLOCK_ENABLE 1
+#define CLOCK_SUSPEND 2
+
+static int clock_state = CLOCK_DISABLE;
+
#ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP
-static int clock_stop = 1;
+static const int clock_stop = 1;
#else
static const int clock_stop = 0;
#endif
@@ -159,11 +165,33 @@ static struct s3c2410_platform_nand
*to_nand_plat(struct platform_device *dev)
return dev->dev.platform_data;
}
-static inline int allow_clk_stop(struct s3c2410_nand_info *info)
+static inline int allow_clk_suspend(struct s3c2410_nand_info *info)
{
return clock_stop;
}
+/**
+ * s3c2410_nand_clk_set_state - Enable, disable or suspend NAND clock.
+ * @info: The controller instance.
+ * @new_state: State to which clock should be set.
+ */
+static void s3c2410_nand_clk_set_state(struct s3c2410_nand_info *info,
+ int new_state)
+{
+ if (!allow_clk_suspend(info) && new_state == CLOCK_SUSPEND)
+ return;
+
+ if (clock_state == CLOCK_ENABLE) {
+ if (new_state != CLOCK_ENABLE)
+ clk_disable(info->clk);
+ } else {
+ if (new_state == CLOCK_ENABLE)
+ clk_enable(info->clk);
+ }
+
+ clock_state = new_state;
+}
+
/* timing calculations */
#define NS_IN_KHZ 1000000
@@ -333,8 +361,8 @@ static void s3c2410_nand_select_chip(struct mtd_info
*mtd, int chip)
nmtd = this->priv;
info = nmtd->info;
- if (chip != -1 && allow_clk_stop(info))
- clk_enable(info->clk);
+ if (chip != -1)
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
cur = readl(info->sel_reg);
@@ -356,8 +384,8 @@ static void s3c2410_nand_select_chip(struct mtd_info
*mtd, int chip)
writel(cur, info->sel_reg);
- if (chip == -1 && allow_clk_stop(info))
- clk_disable(info->clk);
+ if (chip == -1)
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
/* s3c2410_nand_hwcontrol
@@ -694,8 +722,7 @@ static int s3c24xx_nand_remove(struct
platform_device *pdev)
/* free the common resources */
if (info->clk != NULL && !IS_ERR(info->clk)) {
- if (!allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
clk_put(info->clk);
}
@@ -947,7 +974,7 @@ static int s3c24xx_nand_probe(struct platform_device
*pdev)
goto exit_error;
}
- clk_enable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
/* allocate and map the resource */
@@ -1026,9 +1053,9 @@ static int s3c24xx_nand_probe(struct
platform_device *pdev)
goto exit_error;
}
- if (allow_clk_stop(info)) {
+ if (allow_clk_suspend(info)) {
dev_info(&pdev->dev, "clock idle support enabled\n");
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
pr_debug("initialised ok\n");
@@ -1059,8 +1086,7 @@ static int s3c24xx_nand_suspend(struct
platform_device *dev, pm_message_t pm)
writel(info->save_sel | info->sel_bit, info->sel_reg);
- if (!allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
}
return 0;
@@ -1072,7 +1098,7 @@ static int s3c24xx_nand_resume(struct
platform_device *dev)
unsigned long sel;
if (info) {
- clk_enable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
s3c2410_nand_inithw(info);
/* Restore the state of the nFCE line. */
@@ -1082,8 +1108,7 @@ static int s3c24xx_nand_resume(struct
platform_device *dev)
sel |= info->save_sel & info->sel_bit;
writel(sel, info->sel_reg);
- if (allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
return 0;
--
1.7.4.4
[-- Attachment #2: 0001-nand-Fix-S3C-NAND-clock-stop.patch --]
[-- Type: text/x-patch, Size: 4499 bytes --]
>From 4fd7086f28d6452f1edafa903e7becd5a0f017c6 Mon Sep 17 00:00:00 2001
From: Jiri Pinkava <jiri.pinkava@vscht.cz>
Date: Mon, 11 Apr 2011 03:20:33 +0200
Subject: [PATCH] nand: Fix S3C NAND clock stop
Current implementation of s3c2410_nand_select_chip call
clk_disable every time when chip = -1 (de-select). This happend
multiple times even if chip was already de-selected. This causes
disabling clock even if they are already disabled and due to
nature of clock subsytem implementation this causes nand clock
to be disabled and newer enabled again.
Signed-off-by: Jiri Pinkava <jiri.pinkava@vscht.cz>
---
drivers/mtd/nand/s3c2410.c | 57 +++++++++++++++++++++++++++++++------------
1 files changed, 41 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 33d832d..fbc37dc 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -54,8 +54,14 @@ static int hardware_ecc = 1;
static int hardware_ecc = 0;
#endif
+#define CLOCK_DISABLE 0
+#define CLOCK_ENABLE 1
+#define CLOCK_SUSPEND 2
+
+static int clock_state = CLOCK_DISABLE;
+
#ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP
-static int clock_stop = 1;
+static const int clock_stop = 1;
#else
static const int clock_stop = 0;
#endif
@@ -159,11 +165,33 @@ static struct s3c2410_platform_nand *to_nand_plat(struct platform_device *dev)
return dev->dev.platform_data;
}
-static inline int allow_clk_stop(struct s3c2410_nand_info *info)
+static inline int allow_clk_suspend(struct s3c2410_nand_info *info)
{
return clock_stop;
}
+/**
+ * s3c2410_nand_clk_set_state - Enable, disable or suspend NAND clock.
+ * @info: The controller instance.
+ * @new_state: State to which clock should be set.
+ */
+static void s3c2410_nand_clk_set_state(struct s3c2410_nand_info *info,
+ int new_state)
+{
+ if (!allow_clk_suspend(info) && new_state == CLOCK_SUSPEND)
+ return;
+
+ if (clock_state == CLOCK_ENABLE) {
+ if (new_state != CLOCK_ENABLE)
+ clk_disable(info->clk);
+ } else {
+ if (new_state == CLOCK_ENABLE)
+ clk_enable(info->clk);
+ }
+
+ clock_state = new_state;
+}
+
/* timing calculations */
#define NS_IN_KHZ 1000000
@@ -333,8 +361,8 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
nmtd = this->priv;
info = nmtd->info;
- if (chip != -1 && allow_clk_stop(info))
- clk_enable(info->clk);
+ if (chip != -1)
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
cur = readl(info->sel_reg);
@@ -356,8 +384,8 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
writel(cur, info->sel_reg);
- if (chip == -1 && allow_clk_stop(info))
- clk_disable(info->clk);
+ if (chip == -1)
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
/* s3c2410_nand_hwcontrol
@@ -694,8 +722,7 @@ static int s3c24xx_nand_remove(struct platform_device *pdev)
/* free the common resources */
if (info->clk != NULL && !IS_ERR(info->clk)) {
- if (!allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
clk_put(info->clk);
}
@@ -947,7 +974,7 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
goto exit_error;
}
- clk_enable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
/* allocate and map the resource */
@@ -1026,9 +1053,9 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
goto exit_error;
}
- if (allow_clk_stop(info)) {
+ if (allow_clk_suspend(info)) {
dev_info(&pdev->dev, "clock idle support enabled\n");
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
pr_debug("initialised ok\n");
@@ -1059,8 +1086,7 @@ static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm)
writel(info->save_sel | info->sel_bit, info->sel_reg);
- if (!allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
}
return 0;
@@ -1072,7 +1098,7 @@ static int s3c24xx_nand_resume(struct platform_device *dev)
unsigned long sel;
if (info) {
- clk_enable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
s3c2410_nand_inithw(info);
/* Restore the state of the nFCE line. */
@@ -1082,8 +1108,7 @@ static int s3c24xx_nand_resume(struct platform_device *dev)
sel |= info->save_sel & info->sel_bit;
writel(sel, info->sel_reg);
- if (allow_clk_stop(info))
- clk_disable(info->clk);
+ s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
return 0;
--
1.7.4.4
^ permalink raw reply related
* Re: [Qemu-devel] tcg/tcg.c:1892: tcg fatal error
From: Igor Kovalenko @ 2011-04-11 3:16 UTC (permalink / raw)
To: Artyom Tarasenko; +Cc: Blue Swirl, peter.maydell, qemu-devel, Aurelien Jarno
In-Reply-To: <BANLkTik=z0qxP695ZFaMh5A42DGkg7wWcw@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 10098 bytes --]
On Mon, Apr 11, 2011 at 12:00 AM, Artyom Tarasenko <atar4qemu@gmail.com> wrote:
> On Sun, Apr 10, 2011 at 9:41 PM, Igor Kovalenko
> <igor.v.kovalenko@gmail.com> wrote:
>> On Sun, Apr 10, 2011 at 11:37 PM, Artyom Tarasenko <atar4qemu@gmail.com> wrote:
>>> On Sun, Apr 10, 2011 at 8:52 PM, Igor Kovalenko
>>> <igor.v.kovalenko@gmail.com> wrote:
>>>> On Sun, Apr 10, 2011 at 10:35 PM, Artyom Tarasenko <atar4qemu@gmail.com> wrote:
>>>>> On Sun, Apr 10, 2011 at 7:57 PM, Blue Swirl <blauwirbel@gmail.com> wrote:
>>>>>> On Sun, Apr 10, 2011 at 8:48 PM, Artyom Tarasenko <atar4qemu@gmail.com> wrote:
>>>>>>> On Sun, Apr 10, 2011 at 4:44 PM, Blue Swirl <blauwirbel@gmail.com> wrote:
>>>>>>>> On Sun, Apr 10, 2011 at 5:09 PM, Artyom Tarasenko <atar4qemu@gmail.com> wrote:
>>>>>>>>> On Sun, Apr 10, 2011 at 3:24 PM, Aurelien Jarno <aurelien@aurel32.net> wrote:
>>>>>>>>>> On Sun, Apr 10, 2011 at 02:29:59PM +0200, Artyom Tarasenko wrote:
>>>>>>>>>>> Trying to boot some proprietary OS I get qemu-system-sparc64 crash with a
>>>>>>>>>>>
>>>>>>>>>>> tcg/tcg.c:1892: tcg fatal error
>>>>>>>>>>>
>>>>>>>>>>> error message.
>>>>>>>>>>>
>>>>>>>>>>> It looks like it can be a platform independent bug though, because
>>>>>>>>>>> when a '-singlestep' option IS present, qemu doesn't crash and seems
>>>>>>>>>>> to translate the code properly.
>>>>>>>>>>>
>>>>>>>>>>> (gdb) bt
>>>>>>>>>>> #0 0x00000032c2e327f5 in raise () from /lib64/libc.so.6
>>>>>>>>>>> #1 0x00000032c2e33fd5 in abort () from /lib64/libc.so.6
>>>>>>>>>>> #2 0x000000000051933d in tcg_reg_alloc_call (s=<value optimized out>,
>>>>>>>>>>> def=0x89d340, opc=INDEX_op_call, args=0x10acc98, dead_iargs=3) at
>>>>>>>>>>> qemu/tcg/tcg.c:1892
>>>>>>>>>>> #3 0x000000000051a557 in tcg_gen_code_common (s=0x10b8940,
>>>>>>>>>>> gen_code_buf=0x40338b60 "I\213n@H\213] 3\355I\211\256\220") at
>>>>>>>>>>> qemu/tcg/tcg.c:2099
>>>>>>>>>>> #4 tcg_gen_code (s=0x10b8940, gen_code_buf=0x40338b60 "I\213n@H\213]
>>>>>>>>>>> 3\355I\211\256\220") at qemu/tcg/tcg.c:2142
>>>>>>>>>>> #5 0x00000000004d38f1 in cpu_sparc_gen_code (env=0x10cce10,
>>>>>>>>>>> tb=0x7fffe91bc218, gen_code_size_ptr=0x7fffffffd9b4) at
>>>>>>>>>>> qemu/translate-all.c:93
>>>>>>>>>>> #6 0x00000000004d1fd7 in tb_gen_code (env=0x10cce10, pc=18868776,
>>>>>>>>>>> cs_base=18868780, flags=15, cflags=0) at qemu/exec.c:989
>>>>>>>>>>> #7 0x00000000004d4029 in tb_find_slow (env1=<value optimized out>) at
>>>>>>>>>>> qemu/cpu-exec.c:167
>>>>>>>>>>> #8 tb_find_fast (env1=<value optimized out>) at cpu-exec.c:194
>>>>>>>>>>> #9 cpu_sparc_exec (env1=<value optimized out>) at qemu/cpu-exec.c:556
>>>>>>>>>>> #10 0x0000000000408868 in tcg_cpu_exec () at qemu/cpus.c:1066
>>>>>>>>>>> #11 cpu_exec_all () at qemu/cpus.c:1102
>>>>>>>>>>> #12 0x000000000053c756 in main_loop (argc=<value optimized out>,
>>>>>>>>>>> argv=<value optimized out>, envp=<value optimized out>) at
>>>>>>>>>>> qemu/vl.c:1430
>>>>>>>>>>>
>>>>>>>>>>> I inspected ts->val_type causing the abort() case and it turned out to be 0.
>>>>>>>>>>>
>>>>>>>>>>> The last lines of qemu.log (without -singlestep)
>>>>>>>>>>> IN:
>>>>>>>>>>> 0x00000000011fe9f0: rdpr %pstate, %g1
>>>>>>>>>>> 0x00000000011fe9f4: wrpr %g1, 2, %pstate
>>>>>>>>>>> --------------
>>>>>>>>>>> IN:
>>>>>>>>>>> 0x00000000011fe9f8: ldub [ %o0 ], %o1
>>>>>>>>>>> 0x00000000011fe9fc: mov %o1, %o2
>>>>>>>>>>> 0x00000000011fea00: rdpr %tick, %o3
>>>>>>>>>>> 0x00000000011fea04: cmp %o1, %o2
>>>>>>>>>>> 0x00000000011fea08: be %icc, 0x11fea00
>>>>>>>>>>> 0x00000000011fea0c: ldub [ %o0 ], %o2
>>>>>>>>>>>
>>>>>>>>>>> Search PC...
>>>>>>>>>>> Search PC...
>>>>>>>>>>> Search PC...
>>>>>>>>>>> Search PC...
>>>>>>>>>>> Search PC...
>>>>>>>>>>> Search PC...
>>>>>>>>>>> --------------
>>>>>>>>>>> IN:
>>>>>>>>>>> 0x00000000011fe9f8: ldub [ %o0 ], %o1
>>>>>>>>>>> 0x00000000011fe9fc: mov %o1, %o2
>>>>>>>>>>> 0x00000000011fea00: rdpr %tick, %o3
>>>>>>>>>>> 0x00000000011fea04: cmp %o1, %o2
>>>>>>>>>>> 0x00000000011fea08: be %icc, 0x11fea00
>>>>>>>>>>> 0x00000000011fea0c: ldub [ %o0 ], %o2
>>>>>>>>>>>
>>>>>>>>>>> 110521: Data Access MMU Miss (v=0068) pc=00000000011fe9f8
>>>>>>>>>>> npc=00000000011fe9fc SP=000000000180ae41
>>>>>>>>>>> pc: 00000000011fe9f8 npc: 00000000011fe9fc
>>>>>>>>>>>
>>>>>>>>>>> IN:
>>>>>>>>>>> 0x00000000011fea00: rdpr %tick, %o3
>>>>>>>>>>> 0x00000000011fea04: cmp %o1, %o2
>>>>>>>>>>> 0x00000000011fea08: be %icc, 0x11fea00
>>>>>>>>>>> 0x00000000011fea0c: ldub [ %o0 ], %o2
>>>>>>>>>>> --------------
>>>>>>>>>>> IN:
>>>>>>>>>>> 0x00000000011fea10: brz,pn %o2, 0x11fe9f8
>>>>>>>>>>> 0x00000000011fea14: mov %o2, %o4
>>>>>>>>>>> --------------
>>>>>>>>>>> IN:
>>>>>>>>>>> 0x00000000011fea18: rdpr %tick, %o5
>>>>>>>>>>> 0x00000000011fea1c: cmp %o2, %o4
>>>>>>>>>>> 0x00000000011fea20: be %icc, 0x11fea18
>>>>>>>>>>> 0x00000000011fea24: ldub [ %o0 ], %o4
>>>>>>>>>>> --------------
>>>>>>>>>>> IN:
>>>>>>>>>>> 0x00000000011fea28: brz,pn %o4, 0x11fe9f4
>>>>>>>>>>> 0x00000000011fea2c: wrpr %g0, %g1, %pstate
>>>>>>>>>>> <EOF>
>>>>>>>>>>>
>>>>>>>>>>> The crash is 100% reproducible and happens always on the same place,
>>>>>>>>>>> so it's probably a pure TCG issue, not related on getting the
>>>>>>>>>>> external/timer interrupts.
>>>>>>>>>>>
>>>>>>>>>>> Do you need any additional info?
>>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>> What would be interesting would be to get the corresponding TCG code
>>>>>>>>>> from qemu.log (-d op,op_opt).
>>>>>>>>>
>>>>>>>>>
>>>>>>>>> OP:
>>>>>>>>> ---- 0x11fea28
>>>>>>>>> ld_i64 tmp6,regwptr,$0x20
>>>>>>>>> movi_i64 cond,$0x0
>>>>>>>>> movi_i64 tmp8,$0x0
>>>>>>>>> brcond_i64 tmp6,tmp8,ne,$0x0
>>>>>>>>> movi_i64 cond,$0x1
>>>>>>>>> set_label $0x0
>>>>>>>>>
>>>>>>>>> ---- 0x11fea2c
>>>>>>>>> movi_i64 tmp7,$0x0
>>>>>>>>> xor_i64 tmp0,tmp7,g1
>>>>>>>>> movi_i64 pc,$0x11fea2c
>>>>>>>>> movi_i64 tmp8,$compute_psr
>>>>>>>>> call tmp8,$0x0,$0
>>>>>>>>> movi_i64 tmp8,$0x0
>>>>>>>>> brcond_i64 cond,tmp8,eq,$0x1
>>>>>>>>> movi_i64 npc,$0x11fe9f4
>>>>>>>>> br $0x2
>>>>>>>>> set_label $0x1
>>>>>>>>> movi_i64 npc,$0x11fea30
>>>>>>>>> set_label $0x2
>>>>>>>>> movi_i64 tmp8,$wrpstate
>>>>>>>>> call tmp8,$0x0,$0,tmp0
>>>>>>>>> mov_i64 pc,npc
>>>>>>>>> movi_i64 tmp8,$0x4
>>>>>>>>> add_i64 npc,npc,tmp8
>>>>>>>>> exit_tb $0x0
>>>>>>>>>
>>>>>>>>> OP after liveness analysis:
>>>>>>>>> ---- 0x11fea28
>>>>>>>>> ld_i64 tmp6,regwptr,$0x20
>>>>>>>>> movi_i64 cond,$0x0
>>>>>>>>> movi_i64 tmp8,$0x0
>>>>>>>>> brcond_i64 tmp6,tmp8,ne,$0x0
>>>>>>>>> movi_i64 cond,$0x1
>>>>>>>>> set_label $0x0
>>>>>>>>>
>>>>>>>>> ---- 0x11fea2c
>>>>>>>>> nopn $0x2,$0x2
>>>>>>>>> nopn $0x3,$0x68,$0x3
>>>>>>>>> movi_i64 pc,$0x11fea2c
>>>>>>>>> movi_i64 tmp8,$compute_psr
>>>>>>>>> call tmp8,$0x0,$0
>>>>>>>>> movi_i64 tmp8,$0x0
>>>>>>>>> brcond_i64 cond,tmp8,eq,$0x1
>>>>>>>>> movi_i64 npc,$0x11fe9f4
>>>>>>>>> br $0x2
>>>>>>>>> set_label $0x1
>>>>>>>>> movi_i64 npc,$0x11fea30
>>>>>>>>> set_label $0x2
>>>>>>>>> movi_i64 tmp8,$wrpstate
>>>>>>>>> call tmp8,$0x0,$0,tmp0
>>>>>>>>> mov_i64 pc,npc
>>>>>>>>> movi_i64 tmp8,$0x4
>>>>>>>>> add_i64 npc,npc,tmp8
>>>>>>>>> exit_tb $0x0
>>>>>>>>> end
>>>>>>>>>
>>>>>>>>> Does it mean the last block is processed correctly and the crash
>>>>>>>>> happens on the next instruction which doesn't make it to the log?
>>>>>>>>> The next instruction would be a
>>>>>>>>>
>>>>>>>>> 0x00000000011fea30: retl
>>>>>>>>>
>>>>>>>>> Since it's a branch instruction I guess this would also be a tcg block boundary.
>>>>>>>>
>>>>>>>> Because abort() was called from tcg_reg_alloc_call, I'd say 'retl'
>>>>>>>> (synthetic op for 'jmpl %o8 + 8, %g0') was the problem.
>>>>>>>
>>>>>>> Any idea why? retl is not a rare instruction...
>>>>>>
>>>>>> Sorry, calls are generated for helpers, so it's not 'jmpl' but the
>>>>>> call to wrpstate helper.
>>>>>
>>>>> And why it doesn't happen in a singlestep mode?
>>>>> I tried to comment out
>>>>> cpu_check_irqs(env);
>>>>> in the helper_wrpstate but it made no difference. The only suspicious
>>>>> thing left is register bank switching. Is it safe to switch register
>>>>> banks in the helper function? Shouldn't we end the translation block
>>>>> before?
>>>>
>>>> Not sure if I have seen write to pstate in delay slot, but switching
>>>> globals with PS_AG appears to be safe.
>>>> Do you know which bits are changed in the pstate?
>>>
>>> Hard to say. With a breakpoint set qemu doesn't crash.
>>> The breakpoint shows the change from 0x14->0x16.
>>> So the only difference is that interrupts are getting enabled. No
>>> register bank change.
>>> (And now also no cpu_check_irqs(env) call, because I commented it out.)
>>>
>>> But given there was a Data Access MMU Miss, I would expect there must
>>> have beeb a PS_MG switch.
>>>
>>> Also the breakpoint makes tcg to cut the translation block before the wrpr:
>>>
>>> IN:
>>> 0x00000000011fea18: rdpr %tick, %o5
>>> 0x00000000011fea1c: cmp %o2, %o4
>>> 0x00000000011fea20: be %icc, 0x11fea18
>>> 0x00000000011fea24: ldub [ %o0 ], %o4
>>> --------------
>>> IN:
>>> 0x00000000011fea28: brz,pn %o4, 0x11fe9f4
>>> --------------
>>> IN:
>>> 0x00000000011fea2c: wrpr %g0, %g1, %pstate
>>> --------------
>>> IN:
>>> 0x00000000011fea30: retl
>>> --------------
>>> IN:
>>> 0x00000000011fea30: retl
>>> 0x00000000011fea34: sub %o5, %o3, %o0
>>>
>>
>> You can try enabling DEBUG_PSTATE to see which bits are changed.
>
> I put an additional DPRINTF in the helper and it doesn't get executed
> at 11fea2c. Only at 11fe9f4 (0x16->0x14).
In such cases I would run with -d in_asm,int to have more data to
compare two runs.
May the patch attached help a bit to add verbose pstate output.
Do you have public test case?
It is possible to code this delay slot write test but real issue may
be corruption elsewhere.
--
Kind regards,
Igor V. Kovalenko
[-- Attachment #2: sparc64-dump-pstate-verbose --]
[-- Type: application/octet-stream, Size: 4225 bytes --]
sparc64: verbose pstate dump
From: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
---
target-sparc/cpu.h | 4 ++++
target-sparc/helper.c | 29 +++++++++++++++++++++++++++--
target-sparc/op_helper.c | 24 ++++++++++++++++++++++++
3 files changed, 55 insertions(+), 2 deletions(-)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 5cd89a4..e0032dd 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -667,4 +667,8 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
#endif
}
+#if defined(TARGET_SPARC64)
+void pstate_to_string(uint32_t pstate, char *str, size_t str_limit);
+#endif
+
#endif
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index e415b22..89da711 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -1480,6 +1480,26 @@ static void cpu_print_cc(FILE *f, fprintf_function cpu_fprintf,
#define REGS_PER_LINE 8
#endif
+#if defined (TARGET_SPARC64)
+void pstate_to_string(uint32_t pstate, char *str, size_t str_limit)
+{
+ snprintf(str, str_limit,
+ "%s%s%s%s%s%s%s%s%s%s%s ",
+ (pstate & PS_IG) ? " IG" : "",
+ (pstate & PS_MG) ? " MG" : "",
+ (pstate & PS_CLE) ? " CLE" : "",
+ (pstate & PS_TLE) ? " TLE" : "",
+ (pstate & PS_RMO) ? " RMO" : "",
+ (pstate & PS_RED) ? " RED" : "",
+ (pstate & PS_PEF) ? " PEF" : "",
+ (pstate & PS_AM) ? " AM" : "",
+ (pstate & PS_PRIV) ? " PRIV" : "",
+ (pstate & PS_IE) ? " IE" : "",
+ (pstate & PS_AG) ? " AG" : ""
+ );
+}
+#endif
+
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
@@ -1522,8 +1542,13 @@ void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
cpu_fprintf(f, "\n");
}
#ifdef TARGET_SPARC64
- cpu_fprintf(f, "pstate: %08x ccr: %02x (icc: ", env->pstate,
- (unsigned)cpu_get_ccr(env));
+ {
+ char pstate_string[128];
+ pstate_to_string(env->pstate, pstate_string, sizeof (pstate_string));
+ cpu_fprintf(f, "pstate: %08x [%s] ccr: %02x (icc: ",
+ env->pstate, pstate_string,
+ (unsigned)cpu_get_ccr(env));
+ }
cpu_print_cc(f, cpu_fprintf, cpu_get_ccr(env) << PSR_CARRY_SHIFT);
cpu_fprintf(f, " xcc: ");
cpu_print_cc(f, cpu_fprintf, cpu_get_ccr(env) << (PSR_CARRY_SHIFT - 4));
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index f292309..f01bf53 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -4036,6 +4036,12 @@ void helper_wrpstate(target_ulong new_state)
{
change_pstate(new_state & 0xf3f);
+ {
+ char pstate_string[128];
+ pstate_to_string(env->pstate, pstate_string, sizeof (pstate_string));
+ DPRINTF_PSTATE("helper_wrpstate pstate=[%s]\n", pstate_string);
+ }
+
#if !defined(CONFIG_USER_ONLY)
if (cpu_interrupts_enabled(env)) {
cpu_check_irqs(env);
@@ -4071,6 +4077,12 @@ void helper_done(void)
DPRINTF_PSTATE("... helper_done tl=%d\n", env->tl);
+ {
+ char pstate_string[128];
+ pstate_to_string(env->pstate, pstate_string, sizeof (pstate_string));
+ DPRINTF_PSTATE("helper_done pstate=[%s]\n", pstate_string);
+ }
+
#if !defined(CONFIG_USER_ONLY)
if (cpu_interrupts_enabled(env)) {
cpu_check_irqs(env);
@@ -4092,6 +4104,12 @@ void helper_retry(void)
DPRINTF_PSTATE("... helper_retry tl=%d\n", env->tl);
+ {
+ char pstate_string[128];
+ pstate_to_string(env->pstate, pstate_string, sizeof (pstate_string));
+ DPRINTF_PSTATE("helper_retry pstate=[%s]\n", pstate_string);
+ }
+
#if !defined(CONFIG_USER_ONLY)
if (cpu_interrupts_enabled(env)) {
cpu_check_irqs(env);
@@ -4277,6 +4295,12 @@ void do_interrupt(CPUState *env)
}
env->npc = env->pc + 4;
env->exception_index = -1;
+
+ {
+ char pstate_string[128];
+ pstate_to_string(env->pstate, pstate_string, sizeof (pstate_string));
+ DPRINTF_PSTATE("do_interrupt pstate=[%s]\n", pstate_string);
+ }
}
#else
#ifdef DEBUG_PCALL
^ permalink raw reply related
* Re: [RFC PATCH 00/11] Sequencer Foundations
From: Christian Couder @ 2011-04-11 3:18 UTC (permalink / raw)
To: Ramkumar Ramachandra; +Cc: Git List, Daniel Barkalow, Jonathan Nieder
In-Reply-To: <1302448317-32387-1-git-send-email-artagnon@gmail.com>
On Sunday 10 April 2011 17:11:46 Ramkumar Ramachandra wrote:
> Hi,
>
> I've started working on building a sequencer for Git.
So you are starting the GSoC early! Great!
When (or before) it really starts, just make sure you put your work on a
public Git repository and you send status updates regularly (weekly if
possible).
> 3. From the format of the TODO and DONE files, one more thing should
> be clear- I'm trying to stick to a slight variation of the 'rebase -i'
> format. This part will go into the sequencer. Then I'll use a
> cherry-pick specific file to keep the command-line options. Yes, I'm
> trying to work on Daniel's idea [3] from the very start. Is this a
> good idea?
I think that the TODO and DONE file format will need at one point to include
options and it is simpler if this change is done early. Using a cherry-pick
specific file to keep the options is not very generic for a sequencer that could
be used for many things.
For example, as we have rebase --interactive, we will probably want to have
cherry-pick --interactive, and when editing the TODO file we might want to use
different cherry-pick options when picking different commits.
This would also make the different cherry-pick options available when using
rebase --interactive once it uses the sequencer.
> [1]:
> http://thread.gmane.org/gmane.comp.version-control.git/170758/focus=170908
> [2]: http://thread.gmane.org/gmane.comp.version-control.git/162183 [3]:
> http://thread.gmane.org/gmane.comp.version-control.git/170758/focus=170834
[3] is missing here.
Thanks,
Christian.
^ permalink raw reply
* Re: [PATCH] Btrfs: cleanup btrfs_alloc_path()'s caller code
From: Tsutomu Itoh @ 2011-04-11 3:20 UTC (permalink / raw)
To: Yoshinori Sano; +Cc: linux-btrfs
In-Reply-To: <1302315790-29605-1-git-send-email-yoshinori.sano@gmail.com>
(2011/04/09 11:23), Yoshinori Sano wrote:
> This patch checks return value of btrfs_alloc_path() and removes BUG_ON().
>
> Signed-off-by: Yoshinori Sano <yoshinori.sano@gmail.com>
> ---
> fs/btrfs/dir-item.c | 2 ++
> fs/btrfs/extent-tree.c | 12 ++++++++----
> fs/btrfs/file-item.c | 6 ++++--
> fs/btrfs/file.c | 3 ++-
> fs/btrfs/inode.c | 34 ++++++++++++++++++++++++----------
> fs/btrfs/relocation.c | 1 +
> fs/btrfs/root-tree.c | 6 ++++--
> fs/btrfs/tree-log.c | 3 ++-
> fs/btrfs/volumes.c | 8 ++++++--
> 9 files changed, 53 insertions(+), 22 deletions(-)
>
> diff --git a/fs/btrfs/dir-item.c b/fs/btrfs/dir-item.c
> index c62f02f..e60bf8e 100644
> --- a/fs/btrfs/dir-item.c
> +++ b/fs/btrfs/dir-item.c
> @@ -142,6 +142,8 @@ int btrfs_insert_dir_item(struct btrfs_trans_handle *trans, struct btrfs_root
> key.offset = btrfs_name_hash(name, name_len);
>
> path = btrfs_alloc_path();
> + if (!path)
> + return -ENOMEM;
> path->leave_spinning = 1;
>
> data_size = sizeof(*dir_item) + name_len;
> diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c
> index f619c3c..b830db8 100644
> --- a/fs/btrfs/extent-tree.c
> +++ b/fs/btrfs/extent-tree.c
> @@ -645,7 +645,8 @@ int btrfs_lookup_extent(struct btrfs_root *root, u64 start, u64 len)
> struct btrfs_path *path;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
> key.objectid = start;
> key.offset = len;
> btrfs_set_key_type(&key, BTRFS_EXTENT_ITEM_KEY);
> @@ -5531,7 +5532,8 @@ static int alloc_reserved_tree_block(struct btrfs_trans_handle *trans,
> u32 size = sizeof(*extent_item) + sizeof(*block_info) + sizeof(*iref);
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
>
> path->leave_spinning = 1;
> ret = btrfs_insert_empty_item(trans, fs_info->extent_root, path,
> @@ -6302,7 +6304,8 @@ int btrfs_drop_snapshot(struct btrfs_root *root,
> int level;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
If you change this, I think that it is better to change the following caller.
for example:
fs/btrfs/relocation.c:
2231 btrfs_drop_snapshot(reloc_root, rc->block_rsv, 0);
>
> wc = kzalloc(sizeof(*wc), GFP_NOFS);
> BUG_ON(!wc);
> @@ -8699,7 +8702,8 @@ int btrfs_remove_block_group(struct btrfs_trans_handle *trans,
> spin_unlock(&cluster->refill_lock);
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
>
> inode = lookup_free_space_inode(root, block_group, path);
> if (!IS_ERR(inode)) {
> diff --git a/fs/btrfs/file-item.c b/fs/btrfs/file-item.c
> index a6a9d4e..097911e 100644
> --- a/fs/btrfs/file-item.c
> +++ b/fs/btrfs/file-item.c
> @@ -281,7 +281,8 @@ int btrfs_lookup_csums_range(struct btrfs_root *root, u64 start, u64 end,
> u16 csum_size = btrfs_super_csum_size(&root->fs_info->super_copy);
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
>
> key.objectid = BTRFS_EXTENT_CSUM_OBJECTID;
> key.offset = start;
> @@ -665,7 +666,8 @@ int btrfs_csum_file_blocks(struct btrfs_trans_handle *trans,
> btrfs_super_csum_size(&root->fs_info->super_copy);
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
> sector_sum = sums->sums;
> again:
> next_offset = (u64)-1;
> diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c
> index e621ea5..fe623ea 100644
> --- a/fs/btrfs/file.c
> +++ b/fs/btrfs/file.c
> @@ -599,7 +599,8 @@ int btrfs_mark_extent_written(struct btrfs_trans_handle *trans,
> btrfs_drop_extent_cache(inode, start, end - 1, 0);
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
> again:
> recow = 0;
> split = start;
> diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
> index cc60228..aa116dc 100644
> --- a/fs/btrfs/inode.c
> +++ b/fs/btrfs/inode.c
> @@ -1007,6 +1007,7 @@ static noinline int csum_exist_in_range(struct btrfs_root *root,
>
> ret = btrfs_lookup_csums_range(root->fs_info->csum_root, bytenr,
> bytenr + num_bytes - 1, &list);
> + BUG_ON(ret);
> if (ret == 0 && list_empty(&list))
> return 0;
>
> @@ -1050,7 +1051,8 @@ static noinline int run_delalloc_nocow(struct inode *inode,
> bool nolock = false;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
> if (root == root->fs_info->tree_root) {
> nolock = true;
> trans = btrfs_join_transaction_nolock(root, 1);
> @@ -1496,13 +1498,15 @@ static noinline int add_pending_csums(struct btrfs_trans_handle *trans,
> struct inode *inode, u64 file_offset,
> struct list_head *list)
> {
> + int ret;
> struct btrfs_ordered_sum *sum;
>
> btrfs_set_trans_block_group(trans, inode);
>
> list_for_each_entry(sum, list, list) {
> - btrfs_csum_file_blocks(trans,
> + ret = btrfs_csum_file_blocks(trans,
> BTRFS_I(inode)->root->fs_info->csum_root, sum);
> + BUG_ON(ret);
> }
> return 0;
> }
> @@ -1625,8 +1629,8 @@ static int insert_reserved_file_extent(struct btrfs_trans_handle *trans,
> int ret;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> -
> + if (!path)
> + return -ENOMEM;
> path->leave_spinning = 1;
>
> /*
> @@ -2493,7 +2497,7 @@ static void btrfs_read_locked_inode(struct inode *inode)
> int ret;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + BUG_ON(!path); /* FIXME, should not use BUG_ON */
> memcpy(&location, &BTRFS_I(inode)->location, sizeof(location));
>
> ret = btrfs_lookup_inode(NULL, root, path, &location, 0);
> @@ -2631,7 +2635,8 @@ noinline int btrfs_update_inode(struct btrfs_trans_handle *trans,
> int ret;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
I think that you better change the following.
for ex.
fs/btrfs/inode.c
2739 btrfs_update_inode(trans, root, dir);
> path->leave_spinning = 1;
> ret = btrfs_lookup_inode(trans, root, path,
> &BTRFS_I(inode)->location, 1);
> @@ -3290,7 +3295,8 @@ int btrfs_truncate_inode_items(struct btrfs_trans_handle *trans,
> btrfs_drop_extent_cache(inode, new_size & (~mask), (u64)-1, 0);
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
> path->reada = -1;
>
> key.objectid = inode->i_ino;
> @@ -3817,7 +3823,8 @@ static int btrfs_inode_by_name(struct inode *dir, struct dentry *dentry,
> int ret = 0;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
>
> di = btrfs_lookup_dir_item(NULL, root, path, dir->i_ino, name,
> namelen, 0);
> @@ -4243,6 +4250,8 @@ static int btrfs_real_readdir(struct file *filp, void *dirent,
> filp->f_pos = 2;
> }
> path = btrfs_alloc_path();
> + if (!path)
> + return -ENOMEM;
> path->reada = 2;
>
> btrfs_set_key_type(&key, key_type);
> @@ -4523,7 +4532,8 @@ static struct inode *btrfs_new_inode(struct btrfs_trans_handle *trans,
> int owner;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return ERR_PTR(-ENOMEM);
>
> inode = new_inode(root->fs_info->sb);
> if (!inode)
> @@ -7235,7 +7245,11 @@ static int btrfs_symlink(struct inode *dir, struct dentry *dentry,
> goto out_unlock;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path) {
> + err = -ENOMEM;
> + drop_inode = 1;
> + goto out_unlock;
> + }
> key.objectid = inode->i_ino;
> key.offset = 0;
> btrfs_set_key_type(&key, BTRFS_EXTENT_DATA_KEY);
> diff --git a/fs/btrfs/relocation.c b/fs/btrfs/relocation.c
> index 58250e0..7201c24 100644
> --- a/fs/btrfs/relocation.c
> +++ b/fs/btrfs/relocation.c
> @@ -4243,6 +4243,7 @@ int btrfs_reloc_clone_csums(struct inode *inode, u64 file_pos, u64 len)
> disk_bytenr = file_pos + BTRFS_I(inode)->index_cnt;
> ret = btrfs_lookup_csums_range(root->fs_info->csum_root, disk_bytenr,
> disk_bytenr + len - 1, &list);
> + BUG_ON(ret);
>
> while (!list_empty(&list)) {
> sums = list_entry(list.next, struct btrfs_ordered_sum, list);
> diff --git a/fs/btrfs/root-tree.c b/fs/btrfs/root-tree.c
> index 6928bff..c330cad 100644
> --- a/fs/btrfs/root-tree.c
> +++ b/fs/btrfs/root-tree.c
> @@ -40,7 +40,8 @@ int btrfs_search_root(struct btrfs_root *root, u64 search_start,
> search_key.offset = (u64)-1;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
> again:
> ret = btrfs_search_slot(NULL, root, &search_key, path, 0, 0);
> if (ret < 0)
> @@ -141,7 +142,8 @@ int btrfs_update_root(struct btrfs_trans_handle *trans, struct btrfs_root
> unsigned long ptr;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
> ret = btrfs_search_slot(trans, root, key, path, 0, 1);
> if (ret < 0)
> goto out;
> diff --git a/fs/btrfs/tree-log.c b/fs/btrfs/tree-log.c
> index c50271a..5aecd02 100644
> --- a/fs/btrfs/tree-log.c
> +++ b/fs/btrfs/tree-log.c
> @@ -1601,7 +1601,8 @@ static int replay_one_buffer(struct btrfs_root *log, struct extent_buffer *eb,
> return 0;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
I think that you better change the following, too.
for ex.
fs/btrfs/tree-log.c:
1775 wc->process_func(root, path->nodes[*level], wc,
1776 btrfs_header_generation(path->nodes[*level]));
Thanks,
Tsutomu
>
> nritems = btrfs_header_nritems(eb);
> for (i = 0; i < nritems; i++) {
> diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
> index 8b9fb8c..fa84172 100644
> --- a/fs/btrfs/volumes.c
> +++ b/fs/btrfs/volumes.c
> @@ -1058,7 +1058,8 @@ static noinline int find_next_chunk(struct btrfs_root *root,
> struct btrfs_key found_key;
>
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path)
> + return -ENOMEM;
>
> key.objectid = objectid;
> key.offset = (u64)-1;
> @@ -2067,7 +2068,10 @@ int btrfs_balance(struct btrfs_root *dev_root)
>
> /* step two, relocate all the chunks */
> path = btrfs_alloc_path();
> - BUG_ON(!path);
> + if (!path) {
> + mutex_unlock(&dev_root->fs_info->volume_mutex);
> + return -ENOMEM;
> + }
>
> key.objectid = BTRFS_FIRST_CHUNK_TREE_OBJECTID;
> key.offset = (u64)-1;
^ permalink raw reply
* Re: [PATCH 02/11] revert: Lose global variables "commit" and "me"
From: Christian Couder @ 2011-04-11 3:24 UTC (permalink / raw)
To: Ramkumar Ramachandra; +Cc: Git List, Daniel Barkalow, Jonathan Nieder
In-Reply-To: <1302448317-32387-3-git-send-email-artagnon@gmail.com>
On Sunday 10 April 2011 17:11:48 Ramkumar Ramachandra wrote:
> @@ -546,10 +547,13 @@ static int prepare_revs(struct rev_info *revs)
> return 0;
> }
>
> -static int read_and_refresh_cache(const char *me)
> +static int read_and_refresh_cache(void)
> {
> static struct lock_file index_lock;
> int index_fd = hold_locked_index(&index_lock, 0);
> + const char *me;
> +
> + me = (cmd_opts.action == REVERT ? "revert" : "cherry-pick");
It looks like this patch will not compile as cmd_opts is introduced in patch
03/11.
> if (read_index_preload(&the_index, NULL) < 0)
> return error(_("%s: failed to read the index"), me);
> refresh_index(&the_index, REFRESH_QUIET|REFRESH_UNMERGED, NULL, NULL,
Best regards,
Christian.
^ permalink raw reply
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