* Re: Git is not scalable with too many refs/*
From: Jeff King @ 2011-06-14 19:47 UTC (permalink / raw)
To: Shawn Pearce
Cc: Johan Herland, Sverre Rabbelier, git, Junio C Hamano,
Andreas Ericsson, NAKAMURA Takumi, A Large Angry SCM
In-Reply-To: <BANLkTin0CjnM_hMaEpMroZdDhhavaoKAv00_4xBqeHj9biToVA@mail.gmail.com>
On Tue, Jun 14, 2011 at 12:20:29PM -0700, Shawn O. Pearce wrote:
> > We would want to store the cache in an on-disk format that could be
> > searched easily. Possibly something like the packed-refs format would be
> > sufficient, if we mmap'd and binary searched it. It would be dirt simple
> > if we used an existing key/value store like gdbm or tokyocabinet, but we
> > usually try to avoid extra dependencies.
>
> Yea, not a bad idea. Use a series of SSTable like things, like Hadoop
> uses. It doesn't need to be as complex as the Hadoop SSTable concept.
> But a simple sorted string to string mapping file that is immutable,
> with edits applied by creating an overlay file that contains
> new/updated entries.
>
> As you point out, we can use the notes tree to tell us the validity of
> the cache, and do incremental updates. If the current cache doesn't
> match the notes ref, compute the tree diff between the current cache's
> source tree and the new tree, and create a new SSTable like thing that
> has the relevant updates as an overlay of the existing tables. After
> some time you will have many of these little overlay files, and a GC
> can just merge them down to a single file.
I was really hoping that it would be fast enough that we could simply
blow away the old mapping and recreate it from scratch. That gets us out
of writing any journaling-type code with overlays. For something like
svn revisions, it's probably fine to take an extra second or two to
build the cache after we do a fetch. But it wouldn't scale to something
that was getting updated frequently.
If we're going to start doing clever database-y things, I'd much rather
use a proven key/value db solution like tokyocabinet. I'm just not sure
how to degrade gracefully when the db library isn't available. Don't
allow reverse mappings? Fallback to something slow?
> The only problem is, you probably want this "reverse notes index" to
> be indexing a portion of the note blob text, not all of it. That is,
> we want the SVN note text to say something like "SVN Revision: r1828"
> so `git log --notes=svn` shows us something more useful than just
> "r1828". But in the reverse index, we may only want the key to be
> "r1828". So you need some sort of small mapping function to decide
> what to put into that reverse index.
I had assumed that we would just be writing r1828 into the note. The
output via git log is actually pretty readable:
$ git notes --ref=svn/revisions add -m r1828
$ git show --notes=svn/revisions
...
Notes (svn/revisions):
r1828
Of course this is just one use case.
For that matter, we have to figure out how one would actually reference
the reverse mapping. If we have a simple, pure-reverse mapping, we can
just generate and cache them on the fly, and give a special syntax.
Like:
$ git log notes/svn/revisions@{revnote:r1828}
which would invert the notes/svn/revisions tree, search for r1828, and
reference the resulting commit.
If you had something more heavyweight that actually needed to parse
during the mapping, you might have something like:
$ : set up the mapping
$ git config revnote.svn.map 'SVN Revision: (r[0-9]+)'
$ : do the reverse; we should be able to build the cache on the fly
$ git notes reverse r1828
346ab9aaa1cf7b1ed2dd2c0a67bccc5b8ec23f7c
$ : so really you could have a similar ref syntax like, though
$ : this would require some ref parser updates, as we currently
$ : assume anything to the left of @{} is a real ref
$ git log r1828@{revnote:svn}
The syntaxes are not as nice as having a real ref. In the last example,
we could probably look for the contents of "@{}" as a possible revnote
mapping (since we've already had to name it via the configuration), to
make it "r1828@{svn}". Or you could even come up with a default set of
revnotes to consider, so that if we lookup "r1828" and it isn't a real
ref, we fall back to trying r1828@{revnote:svn}.
I dunno. I'm just throwing ideas out at this point.
-Peff
^ permalink raw reply
* Re: [PATCH 00/15] Backport 8xx TLB to 2.4
From: Willy Tarreau @ 2011-06-14 19:31 UTC (permalink / raw)
To: Joakim Tjernlund; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <1308059700-10839-1-git-send-email-Joakim.Tjernlund@transmode.se>
Hi Joakim,
On Tue, Jun 14, 2011 at 03:54:45PM +0200, Joakim Tjernlund wrote:
> This is a backport from 2.6 which I did to overcome 8xx CPU
> bugs. 8xx does not update the DAR register when taking a TLB
> error caused by dcbX and icbi insns which makes it very
> tricky to use these insns. Also the dcbst wrongly sets the
> the store bit when faulting into DTLB error.
> A few more bugs very found during development.
>
> I know 2.4 is in strict maintenance mode and 8xx is obsolete
> but as it is still in use I wanted 8xx to age with grace.
OK, I'm not opposed to merge these patches and I really welcome your
work and want to thank you for having done it. However, I have
absolutely *zero* skills on ppc, so I want to ensure that someone
(possibly you) will be able to back me up in case of reported
regressions once these patches are merged. Since you say that the
code works on your board, I'm not much worried but at least Dan's
comment about the risk of performance regression has to be considered.
If we all agree that it's a tradeoff between performance and stability
or security, then that's a different matter of course !
Thanks !
Willy
^ permalink raw reply
* [PATCH 4/4] intel-gpu-tools: shader debug
From: Ben Widawsky @ 2011-06-14 19:46 UTC (permalink / raw)
To: intel-gfx
In-Reply-To: <1308080767-21176-1-git-send-email-ben@bwidawsk.net>
Preliminary code for shader debugging. This provides a trace like
implementation which can get EU architectural state at each instruction.
The code currently only supports the most basic set of state and
features.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
configure.ac | 1 +
debugger/Makefile.am | 13 +
debugger/debug_rdata.c | 141 +++++++++
debugger/eudb.c | 493 ++++++++++++++++++++++++++++++
debugger/sr_loader.c | 118 +++++++
debugger/system_routine/Makefile | 69 +++++
debugger/system_routine/eviction_macro.c | 48 +++
debugger/system_routine/pre_cpp.py | 123 ++++++++
debugger/system_routine/sr.g4a | 277 +++++++++++++++++
lib/debug.h | 92 ++++++
10 files changed, 1375 insertions(+), 0 deletions(-)
create mode 100644 debugger/Makefile.am
create mode 100644 debugger/debug_rdata.c
create mode 100644 debugger/eudb.c
create mode 100644 debugger/sr_loader.c
create mode 100644 debugger/system_routine/Makefile
create mode 100644 debugger/system_routine/eviction_macro.c
create mode 100755 debugger/system_routine/pre_cpp.py
create mode 100644 debugger/system_routine/sr.g4a
create mode 100644 lib/debug.h
diff --git a/configure.ac b/configure.ac
index 4eb1c48..d2b30dc 100644
--- a/configure.ac
+++ b/configure.ac
@@ -98,5 +98,6 @@ AC_CONFIG_FILES([
scripts/Makefile
tests/Makefile
tools/Makefile
+ debugger/Makefile
])
AC_OUTPUT
diff --git a/debugger/Makefile.am b/debugger/Makefile.am
new file mode 100644
index 0000000..32df7bf
--- /dev/null
+++ b/debugger/Makefile.am
@@ -0,0 +1,13 @@
+SUBDIRS=system_routine
+
+bin_PROGRAMS = \
+ eudb \
+ sr_loader \
+ debug_rdata \
+ $(NULL)
+
+LDADD = ../lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS)
+
+AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(WARN_CFLAGS) \
+ -I$(srcdir)/.. \
+ -I$(srcdir)/../lib
diff --git a/debugger/debug_rdata.c b/debugger/debug_rdata.c
new file mode 100644
index 0000000..de60775
--- /dev/null
+++ b/debugger/debug_rdata.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Ben Widawsky <ben@bwidawsk.net>
+ *
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include "intel_gpu_tools.h"
+
+struct eu_rdata {
+ union {
+ struct {
+ uint8_t sendc_dep : 1;
+ uint8_t swh_dep : 1;
+ uint8_t pwc_dep : 1;
+ uint8_t n2_dep : 1;
+ uint8_t n1_dep : 1;
+ uint8_t n0_dep : 1;
+ uint8_t flag1_dep : 1;
+ uint8_t flag0_dep : 1;
+ uint8_t indx_dep : 1;
+ uint8_t mrf_dep : 1;
+ uint8_t dst_dep : 1;
+ uint8_t src2_dep : 1;
+ uint8_t src1_dep : 1;
+ uint8_t src0_dep : 1;
+ uint8_t mp_dep_pin : 1;
+ uint8_t sp_dep_pin : 1;
+ uint8_t fftid : 8;
+ uint8_t ffid : 4;
+ uint8_t instruction_valid : 1;
+ uint8_t thread_status : 3;
+ };
+ uint32_t dword;
+ } ud0;
+
+ union {
+ struct {
+ uint8_t mrf_addr : 4;
+ uint8_t dst_addr : 7;
+ uint8_t src2_addr : 7;
+ uint8_t src1_addr : 7;
+ uint8_t src0_addr : 7;
+ };
+ uint32_t dword;
+ } ud1;
+
+ union {
+ struct {
+ uint16_t exip : 12;
+ uint8_t opcode : 7;
+ uint8_t pwc : 8;
+ uint8_t instruction_valid : 1;
+ uint8_t mbz : 4;
+ };
+ uint32_t dword;
+ } ud2;
+};
+
+const char *thread_status[] =
+ {"INVALID", "invalid/no thread", "standby (dependency)", "INVALID", "Executing",
+ "INVALID" , "INVALID" , "INVALID"};
+
+static struct eu_rdata
+collect_rdata(int eu, int tid) {
+ struct eu_rdata rdata;
+
+ intel_register_write(0x7800, eu << 16 | (3 * tid) << 8);
+ rdata.ud0.dword = intel_register_read(0x7840);
+
+ intel_register_write(0x7800, eu << 16 | (3 * tid + 1) << 8);
+ rdata.ud1.dword = intel_register_read(0x7840);
+
+ intel_register_write(0x7800, eu << 16 | (3 * tid + 2) << 8);
+ rdata.ud2.dword = intel_register_read(0x7840);
+
+ return rdata;
+}
+static void
+print_rdata(struct eu_rdata rdata) {
+ printf("\t%s\n", thread_status[rdata.ud0.thread_status]);
+ printf("\tn1_dep: %d\n", rdata.ud0.n1_dep);
+ printf("\tpwc_dep: %d\n", rdata.ud0.pwc_dep);
+ printf("\tswh_dep: %d\n", rdata.ud0.swh_dep);
+ printf("\tsource 0 %x\n", rdata.ud1.src0_addr);
+ printf("\tsource 1 %x\n", rdata.ud1.src1_addr);
+ printf("\tsource 2 %x\n", rdata.ud1.src2_addr);
+ printf("\tdest %x\n", rdata.ud1.dst_addr);
+ printf("\tmrf %x\n", rdata.ud1.mrf_addr);
+ printf("\tIP: %x\n", rdata.ud2.exip);
+ printf("\topcode: %x\n", rdata.ud2.opcode);
+}
+
+static void
+find_stuck_threads(void)
+{
+ int i, j;
+ for (i = 0; i < 15; i++)
+ for (j = 0; j < 5; j++) {
+ struct eu_rdata rdata;
+ rdata = collect_rdata(i, j);
+ if (rdata.ud0.thread_status == 2 ||
+ rdata.ud0.thread_status == 4) {
+ printf("%d %d:\n", i, j);
+ print_rdata(rdata);
+ }
+ }
+}
+
+int main(int argc, char *argv[]) {
+ struct pci_device *pci_dev;
+ pci_dev = intel_get_pci_device();
+
+ intel_register_access_init(pci_dev, 1, 2);
+ find_stuck_threads();
+// collect_rdata(atoi(argv[1]), atoi(argv[2]));
+ return 0;
+}
diff --git a/debugger/eudb.c b/debugger/eudb.c
new file mode 100644
index 0000000..b90e7a7
--- /dev/null
+++ b/debugger/eudb.c
@@ -0,0 +1,493 @@
+/*
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Ben Widawsky <ben@bwidawsk.net>
+ *
+ * Notes:
+ *
+ */
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+#include <signal.h>
+#include <stdlib.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <string.h>
+#include <strings.h>
+#include <assert.h>
+#include "drm.h"
+#include "i915_drm.h"
+#include "drmtest.h"
+#include "intel_chipset.h"
+#include "intel_bufmgr.h"
+#include "intel_gpu_tools.h"
+#include "intel_batchbuffer.h"
+#include "debug.h"
+
+/*
+ * This should come from a shared interface with the DRI client that is
+ * submitting the program to be debugged.
+ */
+#ifndef PER_THREAD_SCRATCH
+ #define PER_THREAD_SCRATCH (1 << 20)
+#endif
+
+#define EU_ATT 0x7810
+#define EU_ATT_CLR 0x7830
+
+#define RSVD_EU -1
+#define RSVD_THREAD -1
+#define RSVD_ID EUID(-1, -1, -1)
+
+enum {
+ EBAD_SHMEM,
+ EBAD_PROTOCOL,
+ EBAD_MAGIC,
+ EBAD_WRITE
+};
+
+struct debuggee {
+ int euid;
+ int tid;
+ int fd;
+ int clr;
+ uint32_t reg;
+};
+
+struct debugger {
+ struct debuggee *debuggees;
+ int num_threads;
+ int real_num_threads;
+ int threads_per_eu;
+} *eu_info;
+
+drm_intel_bufmgr *bufmgr;
+struct intel_batchbuffer *batch;
+drm_intel_bo *scratch_bo;
+
+int handle;
+int drm_fd;
+int debug_fd = 0;
+const char *debug_file = "dump_debug.bin";
+int debug;
+int clear_waits;
+int shutting_down = 0;
+
+/*
+ * The docs are wrong about the attention clear bits. The clear bits are
+ * provided as part of the structure in case they change in future generations.
+ */
+#define EUID(eu, td, clear) \
+ { .euid = eu, .tid = td, .reg = EU_ATT, .fd = -1, .clr = clear }
+#define EUID2(eu, td, clear) \
+ { .euid = eu, .tid = td, .reg = EU_ATT + 4, .fd = -1, .clr = clear }
+struct debuggee gt1_debug_ids[] = {
+ RSVD_ID, RSVD_ID,
+ RSVD_ID, EUID(6, 3, 28), EUID(6, 2, 27), EUID(6, 1, 26), EUID(6, 0, 25),
+ RSVD_ID, EUID(5, 3, 23), EUID(5, 2, 22), EUID(5, 1, 21), EUID(5, 0, 20),
+ RSVD_ID, EUID(4, 3, 18), EUID(4, 2, 17), EUID(4, 1, 16), EUID(4, 0, 15),
+ RSVD_ID, EUID(2, 3, 13), EUID(2, 2, 12), EUID(2, 1, 11), EUID(2, 0, 10),
+ RSVD_ID, EUID(1, 3, 8), EUID(1, 2, 7), EUID(1, 1, 6), EUID(1, 0, 5),
+ RSVD_ID, EUID(0, 3, 3), EUID(0, 2, 2), EUID(0, 1, 1), EUID(0, 0, 0)
+};
+
+struct debuggee gt2_debug_ids[] = {
+ EUID(8, 1, 31), EUID(8, 0, 30),
+ EUID(6, 4, 29), EUID(6, 3, 28), EUID(6, 2, 27), EUID(6, 1, 26), EUID(6, 0, 25),
+ EUID(5, 4, 24), EUID(5, 3, 23), EUID(5, 2, 22), EUID(5, 1, 21), EUID(5, 0, 20),
+ EUID(4, 4, 19), EUID(4, 3, 18), EUID(4, 2, 17), EUID(4, 1, 16), EUID(4, 0, 15),
+ EUID(2, 4, 14), EUID(2, 3, 13), EUID(2, 2, 12), EUID(2, 1, 11), EUID(2, 0, 10),
+ EUID(1, 4, 9), EUID(1, 3, 8), EUID(1, 2, 7), EUID(1, 1, 6), EUID(1, 0, 5),
+ EUID(0, 4, 4), EUID(0, 3, 3), EUID(0, 2, 2), EUID(0, 1, 1), EUID(0, 0, 0),
+ RSVD_ID, RSVD_ID, RSVD_ID, RSVD_ID,
+ EUID2(14, 4, 27), EUID2(14, 3, 26), EUID2(14, 2, 25), EUID2(14, 1, 24), EUID2(14, 0, 23),
+ EUID2(13, 4, 22), EUID2(13, 3, 21), EUID2(13, 2, 20), EUID2(13, 1, 19), EUID2(13, 0, 18),
+ EUID2(12, 4, 17), EUID2(12, 3, 16), EUID2(12, 2, 15), EUID2(12, 1, 14), EUID2(12, 0, 13),
+ EUID2(10, 4, 12), EUID2(10, 3, 11), EUID2(10, 2, 10), EUID2(10, 1, 9), EUID2(10, 0, 8),
+ EUID2(9, 4, 7), EUID2(9, 3, 6), EUID2(9, 2, 5), EUID2(9, 1, 4), EUID2(9, 0, 3),
+ EUID2(8, 4, 2), EUID2(8, 3, 1), EUID2(8, 2, 0)
+};
+
+struct debugger gt1 = {
+ .debuggees = gt1_debug_ids,
+ .num_threads = 32,
+ .real_num_threads = 24,
+ .threads_per_eu = 4
+};
+
+struct debugger gt2 = {
+ .debuggees = gt2_debug_ids,
+ .num_threads = 64,
+ .real_num_threads = 60,
+ .threads_per_eu = 5
+};
+
+static void
+dump_debug(void *buf, size_t count) {
+ if (!debug_fd)
+ debug_fd = open(debug_file, O_CREAT | O_WRONLY | O_TRUNC, S_IRWXO);
+
+ write(debug_fd, buf, count);
+}
+
+static volatile void *
+map_debug_buffer(void) {
+ int ret;
+
+ ret = drm_intel_bo_map(scratch_bo, 0);
+ assert(ret == 0);
+ return scratch_bo->virtual;
+}
+
+static void
+unmap_debug_buffer(void) {
+ drm_intel_bo_unmap(scratch_bo);
+}
+
+static int
+wait_for_attn(int timeout, int *out_bits) {
+ int step = 1;
+ int eus_waiting = 0;
+ int i,j;
+
+ if (timeout <= 0) {
+ timeout = 1;
+ step = 0;
+ }
+
+ for (i = 0; i < timeout; i += step) {
+ for (j = 0; j < 8; j += 4) {
+ uint32_t attn = intel_register_read(EU_ATT + j);
+ if (attn) {
+ int bit = 0;
+ while( (bit = ffs(attn)) != 0) {
+ bit--; // ffs is 1 based
+ assert(bit >= 0);
+ out_bits[eus_waiting] = bit + (j * 8);
+ attn &= ~(1 << bit);
+ eus_waiting++;
+ }
+ }
+ }
+
+ if (intel_register_read(EU_ATT + 8) ||
+ intel_register_read(EU_ATT + 0xc)) {
+ fprintf(stderr, "Unknown attention bits\n");
+ }
+
+ if (eus_waiting || shutting_down)
+ break;
+ }
+
+ return eus_waiting;
+}
+
+#define eu_fd(bit) eu_info->debuggees[bit].fd
+#define eu_id(bit) eu_info->debuggees[bit].euid
+#define eu_tid(bit) eu_info->debuggees[bit].tid
+static struct eu_state *
+find_eu_shmem(int bit, volatile uint8_t *buf) {
+ struct per_thread_data {
+ uint8_t ____[PER_THREAD_SCRATCH];
+ }__attribute__((packed)) *data;
+ struct eu_state *eu;
+ int mem_tid, mem_euid, i;
+
+ data = (struct per_thread_data *)buf;
+ for(i = 0; i < eu_info->num_threads; i++) {
+ eu = (struct eu_state *)&data[i];
+ mem_tid = eu->sr0 & 0x7;
+ mem_euid = (eu->sr0 >> 8) & 0xf;
+ if (mem_tid == eu_tid(bit) && mem_euid == eu_id(bit))
+ break;
+ eu = NULL;
+ }
+
+ return eu;
+}
+
+#define GRF_CMP(a, b) memcmp(a, b, sizeof(grf))
+#define GRF_CPY(a, b) memcpy(a, b, sizeof(grf))
+static int
+handshake(struct eu_state *eu) {
+ if (GRF_CMP(eu->version, protocol_version)) {
+ if (debug) {
+ printf("Bad EU protocol version %x %x\n",
+ ((uint32_t *)&eu->version)[0],
+ DEBUG_PROTOCOL_VERSION);
+ dump_debug((void *)eu, sizeof(*eu));
+ }
+ return -EBAD_PROTOCOL;
+ }
+
+ if (GRF_CMP(eu->state_magic, eu_msg)) {
+ if (debug) {
+ printf("Bad EU state magic %x %x\n",
+ ((uint32_t *)&eu->state_magic)[0],
+ ((uint32_t *)&eu->state_magic)[1]);
+ dump_debug((void *)eu, sizeof(*eu));
+ }
+ return -EBAD_MAGIC;
+ } else {
+ GRF_CPY(eu->state_magic, cpu_ack);
+ }
+
+ eu->sr0 = RSVD_EU << 8 | RSVD_THREAD;
+ return 0;
+}
+
+static int
+collect_data(int bit, volatile uint8_t *buf) {
+ struct eu_state *eu;
+ ssize_t num;
+ int ret;
+
+ assert(eu_id(bit) != RSVD_EU);
+
+ if (eu_fd(bit) == -1) {
+ char name[128];
+ sprintf(name, "dump_eu_%02d_%d.bin", eu_id(bit), eu_tid(bit));
+ eu_fd(bit) = open(name, O_CREAT | O_WRONLY | O_TRUNC, S_IRWXO);
+ if (eu_fd(bit) == -1)
+ return -1;
+ }
+
+ eu = find_eu_shmem(bit, buf);
+
+ if (eu == NULL) {
+ if (debug)
+ printf("Bad offset %d %d\n", eu_id(bit), eu_tid(bit));
+ return -EBAD_SHMEM;
+ }
+
+ ret = handshake(eu);
+ if (ret)
+ return ret;
+
+ num = write(eu_fd(bit), (void *)eu, sizeof(*eu));
+ if (num != sizeof(*eu)) {
+ perror("unhandled write failure");
+ return EBAD_WRITE;
+ }
+
+
+ return 0;
+}
+
+static void
+clear_attn(int bit) {
+#if 0
+/*
+ * This works but doesn't allow for easily changed clearing bits
+ */
+static void
+clear_attn_old(int bit) {
+ int bit_to_clear = bit % 32;
+ bit_to_clear = 31 - bit_to_clear;
+ intel_register_write(0x7830 + (bit/32) * 4, 0);
+ intel_register_write(0x7830 + (bit/32) * 4, 1 << bit_to_clear);
+}
+#else
+ int bit_to_clear;
+ bit_to_clear = eu_info->debuggees[bit].clr;
+ intel_register_write(EU_ATT_CLR + (bit/32) * 4, 0);
+ intel_register_write(EU_ATT_CLR + (bit/32) * 4, 1 << bit_to_clear);
+#endif
+}
+
+static void
+shutdown(int sig) {
+
+ shutting_down = 1;
+ printf("Shutting down...\n");
+}
+
+static void
+die(int reason) {
+ int i = 0;
+
+ intel_register_write(EU_ATT_CLR, 0);
+ intel_register_write(EU_ATT_CLR + 4, 0);
+
+ if (debug_fd)
+ close(debug_fd);
+
+ for (i = 0; i < eu_info->num_threads; i++) {
+ if (eu_info->debuggees[i].fd != -1)
+ close(eu_info->debuggees[i].fd);
+ }
+
+ unmap_debug_buffer();
+
+ intel_register_access_fini();
+ exit(reason);
+}
+
+static int
+identify_device(int devid) {
+ switch(devid) {
+ case PCI_CHIP_SANDYBRIDGE_GT1:
+ case PCI_CHIP_SANDYBRIDGE_M_GT1:
+ case PCI_CHIP_SANDYBRIDGE_S:
+ eu_info = >1;
+ break;
+ case PCI_CHIP_SANDYBRIDGE_GT2:
+ case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
+ case PCI_CHIP_SANDYBRIDGE_M_GT2:
+ case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
+ eu_info = >2;
+ break;
+ default:
+ return 1;
+ }
+
+ return 0;
+}
+
+static void
+parse_data(const char *file_name) {
+ struct eu_state *eu_state = NULL;
+ struct stat st;
+ int fd = -1;
+ int ret, i, elements;
+
+ fd = open(file_name, O_RDONLY);
+ if (fd == -1) {
+ perror("open");
+ goto out;
+ }
+
+ ret = fstat(fd, &st);
+ if (ret == -1) {
+ perror("fstat");
+ goto out;
+ }
+
+ elements = st.st_size / sizeof(struct eu_state);
+ if (elements == 0) {
+ fprintf(stderr, "File not big enough for 1 entry\n");
+ goto out;
+ }
+
+ eu_state = mmap(0, st.st_size, PROT_READ, MAP_SHARED, fd, 0);
+ if (eu_state == MAP_FAILED) {
+ perror("mmap");
+ goto out;
+ }
+
+ for(i = 0; i < elements; i++) {
+ printf("AIP: ");
+ printf("%x\n", ((uint32_t *)eu_state[i].cr0)[2]);
+ }
+out:
+ if (eu_state)
+ munmap(eu_state, st.st_size);
+ if (fd != -1)
+ close(fd);
+}
+
+int main(int argc, char* argv[]) {
+ struct pci_device *pci_dev;
+ volatile uint8_t *scratch = NULL;
+ int bits[64];
+ int devid = -1, opt;
+
+ while ((opt = getopt(argc, argv, "cdr:p?h")) != -1) {
+ switch (opt) {
+ case 'c':
+ clear_waits = 1;
+ break;
+ case 'd':
+ debug = 1;
+ break;
+ case 'r':
+ parse_data(optarg);
+ exit(0);
+ break;
+ case 'p':
+ devid = atoi(optarg);
+ break;
+ case '?':
+ case 'h':
+ default:
+ exit(0);
+ }
+ }
+
+ pci_dev = intel_get_pci_device();
+ if (devid != -1);
+ devid = pci_dev->device_id;
+ if (identify_device(devid)) {
+ abort();
+ }
+
+ assert(intel_register_access_init(pci_dev, 1, 2) == 0);
+
+ memset(bits, -1, sizeof(bits));
+
+ /*
+ * These events have to occur before the SR runs, or we need
+ * non-blocking versions of the functions.
+ */
+ if (!clear_waits) {
+ int handle;
+ drm_fd = drm_open_any();
+ bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
+ printf("scratch handle: ");
+ if (fscanf(stdin, "%1d", &handle) == 0)
+ exit(1);
+ scratch_bo = intel_bo_gem_create_from_name(bufmgr, "scratch", handle);
+ signal(SIGINT, shutdown);
+ printf("Press Ctrl-C to stop\n");
+ } else {
+ while (wait_for_attn(20000, bits)) {
+ clear_attn(bits[0]);
+ memset(bits, -1, sizeof(bits));
+ }
+ die(0);
+ }
+
+ scratch = map_debug_buffer();
+ while (shutting_down == 0) {
+ int num_events, i;
+
+ memset(bits, -1, sizeof(bits));
+ num_events = wait_for_attn(-1, bits);
+ if (num_events == 0)
+ break;
+
+ for (i = 0; i < num_events; i++) {
+ assert(bits[i] < 64 && bits[i] >= 0);
+ if (collect_data(bits[i], scratch)) {
+ bits[i] = -1;
+ continue;
+ }
+ clear_attn(bits[i]);
+ }
+ }
+
+ die(0);
+ return 0;
+}
diff --git a/debugger/sr_loader.c b/debugger/sr_loader.c
new file mode 100644
index 0000000..4786895
--- /dev/null
+++ b/debugger/sr_loader.c
@@ -0,0 +1,118 @@
+/*
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Ben Widawsky <ben@bwidawsk.net>
+ *
+ */
+
+#include <sys/ioctl.h>
+#include <assert.h>
+#include "drmtest.h"
+#include "drm.h"
+#include "i915_drm.h"
+#include "drmtest.h"
+#include "intel_bufmgr.h"
+#include "intel_batchbuffer.h"
+#include "intel_gpu_tools.h"
+
+#include "system_routine/sr.txt"
+
+#ifdef USER_STATE_SETUP
+static drm_intel_bufmgr *bufmgr;
+struct intel_batchbuffer *batch;
+
+static void
+upload_system_routine(drm_intel_bo *sr_bo) {
+ BEGIN_BATCH(12);
+ OUT_BATCH(BRW_STATE_BASE_ADDRESS | (8-2));
+ OUT_BATCH(0); /* General state base address */
+ OUT_BATCH(0); /* Surface state base address */
+ OUT_BATCH(0); /* Indirect object base address */
+ OUT_BATCH(1); /* Instruction base address */
+ OUT_BATCH(0); /* General state upper bound */
+ OUT_BATCH(0); /* Indirect object upper bound */
+ OUT_BATCH(1); /* Instruction access upper bound */
+ OUT_BATCH(BRW_STATE_SIP); /* STATE_SIP */
+ OUT_RELOC(sr_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
+ OUT_BATCH(MI_FLUSH | 1 << 1);
+ OUT_BATCH(MI_NOOP);
+ ADVANCE_BATCH();
+ intel_batchbuffer_flush(batch);
+}
+
+static void
+copy_system_routine(drm_intel_bo *bo) {
+ drm_intel_bo_get_subdata(bo, 0, sizeof(gen_eu_bytes), (void *)gen_eu_bytes);
+}
+#endif
+
+static void
+set_debug_state(void) {
+ intel_register_write(INSTPM, INSTPM_GLOBAL_DEBUG_EN |
+ (INSTPM_GLOBAL_DEBUG_EN << 16));
+ intel_register_write(GEN6_TD_CTL, TD_CTL_FORCE_TD_BKPT);
+ assert(intel_register_read(INSTPM) & INSTPM_GLOBAL_DEBUG_EN);
+ assert(intel_register_read(GEN6_TD_CTL) & TD_CTL_FORCE_TD_BKPT);
+}
+
+int main(int argc, char **argv)
+{
+ int fd, ret = 0;
+
+ fd = drm_open_any();
+
+ ret = intel_register_access_init(intel_get_pci_device(), 1, 2);
+ set_debug_state();
+
+#ifndef USER_STATE_SETUP
+/* I'd like to move state setup from the kernel, but it's not working yet. */
+ struct drm_intel_system_routine sysrout;
+
+ sysrout.sr_buffer = (__u64)gen_eu_bytes;
+ sysrout.size = sizeof(gen_eu_bytes);
+
+ assert(fd > 0);
+
+ ret = ioctl(fd, DRM_IOCTL_I915_SYSTEM_ROUTINE, &sysrout);
+ assert(ret == 0);
+#else
+
+ drm_intel_bo *bo;
+
+ bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
+ drm_intel_bufmgr_gem_enable_reuse(bufmgr);
+ batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+
+ bo = drm_intel_bo_alloc(bufmgr, "system routine", sizeof(gen_eu_bytes), 4096);
+ ret = drm_intel_bo_pin(bo, 4096);
+ copy_system_routine(bo);
+ upload_system_routine(bo);
+
+ intel_batchbuffer_free(batch);
+ drm_intel_bufmgr_destroy(bufmgr);
+ while(1);
+#endif
+ intel_register_access_fini();
+ close(fd);
+ return ret;
+}
diff --git a/debugger/system_routine/Makefile b/debugger/system_routine/Makefile
new file mode 100644
index 0000000..3da0f32
--- /dev/null
+++ b/debugger/system_routine/Makefile
@@ -0,0 +1,69 @@
+# Copyright © 2011 Intel Corporation
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice (including the next
+# paragraph) shall be included in all copies or substantial portions of the
+# Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Authors:
+# Ben Widawsky <ben@bwidawsk.net>
+
+PRECPP=./pre_cpp.py
+CPP_FLAGS=-x assembler-with-cpp -P
+
+GEN_AS?=~/intel-gfx/intel-gen4asm/src/intel-gen4asm
+GEN_AS_FLAGS?=-g6 -a -b
+
+TEMP:=$(shell mktemp)
+TEMP2:=$(shell mktemp)
+
+GPU?=SANDYBRIDGE
+DEFINES+=-DGEN_ASM -D$(GPU) -I. -I../..//lib
+
+sr.txt: sr.g4a eviction_macro evict.h
+ $(PRECPP) $^ > $(TEMP)
+ $(CPP) $(CPP_FLAGS) $(DEFINES) -o $(TEMP2) $(TEMP)
+ $(GEN_AS) $(GEN_AS_FLAGS) $(TEMP2) -o $@
+
+helper: sr.g4a eviction_macro
+ $(PRECPP) $^ > help
+ $(CPP) $(CPP_FLAGS) $(DEFINES) -o help2 help
+ $(GEN_AS) $(GEN_AS_FLAGS) help2 -o $@
+
+eviction_macro :
+
+evict.h : eviction_macro
+ $(shell ./eviction_macro >| evict.h)
+
+all: sr.txt
+
+.PHONY : clean
+clean :
+ $(RM) sr.txt evict.h eviction_macro
+
+.PHONY : clean
+distclean: clean
+ $(RM) help*
+
+maintainer-clean: clean
+
+EMPTY_AUTOMAKE_TARGETS = install install-data install-exec uninstall \
+ install-dvi install-html install-info install-ps \
+ install-pdf installdirs check installcheck \
+ mostlyclean dvi pdf ps info html tags ctags
+.PHONY: $(EMPTY_AUTOMAKE_TARGETS)
+$(EMPTY_AUTOMAKE_TARGETS):
diff --git a/debugger/system_routine/eviction_macro.c b/debugger/system_routine/eviction_macro.c
new file mode 100644
index 0000000..1da2233
--- /dev/null
+++ b/debugger/system_routine/eviction_macro.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Ben Widawsky <ben@bwidawsk.net>
+ *
+ */
+
+#include <stdio.h>
+
+#define START 0x100
+#define END ((128 << 10) / 4)
+
+int main(int argc, char *argv[]) {
+ int i;
+ printf("#ifdef SANDYBRIDGE\n");
+ printf("#define EVICT_CACHE \\\n");
+ printf("\tmov (1) m0.5:ud g0.5:ud FLAGS; \\\n");
+ for (i = START; i < END - 8; i+=0x8) {
+ printf("\tmov (1) m0.2:ud 0x%04x:ud FLAGS; \\\n", i);
+ printf("\tWRITE_SCRATCH4(m0); \\\n");
+ }
+
+ printf("\tmov (1) m0.2:ud 0x%04x:ud FLAGS; \\\n", i);
+ printf("\tWRITE_SCRATCH4(m0)\n");
+ printf("#else\n");
+ printf("#define EVICT_CACHE\n");
+ printf("#endif\n");
+}
diff --git a/debugger/system_routine/pre_cpp.py b/debugger/system_routine/pre_cpp.py
new file mode 100755
index 0000000..effea0e
--- /dev/null
+++ b/debugger/system_routine/pre_cpp.py
@@ -0,0 +1,123 @@
+#!/usr/bin/env python3
+
+# Copyright © 2011 Intel Corporation
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice (including the next
+# paragraph) shall be included in all copies or substantial portions of the
+# Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Authors:
+# Ben Widawsky <ben@bwidawsk.net>
+
+#very limited C-like preprocessor
+
+#limitations:
+# no macro substitutions
+# no multiline definitions
+# divide operator is //
+
+import sys,re
+
+file = open(sys.argv[1], "r")
+
+lines = file.readlines()
+len(lines)
+out = dict()
+defines = dict()
+
+count = 0
+#create a dict for our output
+for line in lines:
+ out[count] = line
+ count = count + 1
+
+#done is considered #define <name> <number>
+def is_done(string):
+ m = re.match("#define\s+(\w+?)\s+([a-fA-F0-9\-]+?)\s*$", string)
+ return m
+
+#skip macros, the real cpp will handle it
+def skip(string):
+ #macro
+ m = re.match("#define\s+\w+\(.+", string)
+ return m != None
+
+#put contants which are done being evaluated into the dictionary
+def easy_constants():
+ ret = 0
+ for lineno, string in out.items():
+ if skip(string):
+ continue
+ m = is_done(string)
+ if m != None:
+ key = m.group(1)
+ value = m.group(2)
+ if not key in defines:
+ defines[key] = int(eval(value))
+ ret = 1
+ return ret
+
+#replace names with dictionary values
+def simple_replace():
+ ret = 0
+ for lineno, string in out.items():
+ if skip(string):
+ continue
+ for key, value in defines.items():
+ if is_done(string):
+ continue
+ s = re.subn(key, repr(value), string)
+ if s[1] > 0:
+ out[lineno] = s[0]
+ ret = s[1]
+ return ret
+
+#evaluate expressions to try to simplify them
+def collapse_constants():
+ ret = 0
+ for lineno, string in out.items():
+ if skip(string):
+ continue
+ if is_done(string):
+ continue
+ m = re.match("#define\s+(.+?)\s+(.+)$", string)
+ if m != None:
+ try:
+ out[lineno] = "#define " + m.group(1) + " " + repr(eval(m.group(2)))
+ ret = 1
+ except NameError as ne:
+ #this happens before a variable is resolved in simple_replace
+ continue
+ except SyntaxError:
+ #this happens with something like #define foo bar, which the
+ #regular cpp can handle
+ continue
+ except:
+ raise KeyboardInterrupt
+ return ret;
+
+while True:
+ ret = 0
+ ret += easy_constants()
+ ret += simple_replace()
+ ret += collapse_constants()
+ if ret == 0:
+ break;
+
+for lineno, string in out.items():
+ print(string.rstrip())
diff --git a/debugger/system_routine/sr.g4a b/debugger/system_routine/sr.g4a
new file mode 100644
index 0000000..61c65d7
--- /dev/null
+++ b/debugger/system_routine/sr.g4a
@@ -0,0 +1,277 @@
+/*
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Ben Widawsky <ben@bwidawsk.net>
+ *
+ */
+
+#include "debug.h"
+#include "evict.h"
+
+#define CR0_0_ME_STATE_CTRL (1 << 31)
+#define CR0_0_BP_SUPPRESS (1 << 15)
+#define CR0_0_SPF_EN (1 << 2)
+#define CR0_0_ACC_DIS (1 << 1)
+#define CR0_1_BES_CTRL (1 << 31)
+#define CR0_1_HALT_CTRL (1 << 30)
+#define CR0_1_SOFT_EXCEPTION_CTRL (1 << 29)
+#define CR0_1_ILLGL_OP_STS (1 << 28)
+#define CR0_1_STACK_OVRFLW_STS (1 << 27)
+
+#define CR0_0_ENTRY_UNMASK (CR0_0_SPF_EN | CR0_0_ACC_DIS)
+// TODO: Need to fix this for non breakpoint case
+#define CR0_1_ENTRY_UNMASK ~(CR0_1_BES_CTRL)
+#define CR0_0_RETURN_MASK ~(CR0_0_ME_STATE_CTRL | CR0_0_SPF_EN | CR0_0_ACC_DIS)
+
+// TODO: not sure how to make this not hardcoded
+#define PER_THREAD_SCRATCH_SIZE (1 << 20)
+#define PER_THREAD_QWORDS (PER_THREAD_SCRATCH_SIZE >> 4)
+
+/* Should get this from brw_defines.h */
+#define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2
+#define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3
+#define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4
+#define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 8
+#define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0
+
+/* desc field, ie. dword3 6.3.66.2 and 2.11.2.1.4 */
+#define SEND_MLEN_5 (5<<25)
+#define SEND_MLEN_3 (3<<25)
+#define SEND_MLEN_2 (2<<25)
+#define SEND_MLEN_1 (1<<25)
+#define SEND_RLEN_1 (1<<20)
+#define SEND_RLEN_0 (0<<20)
+#define SEND_HEADER_PRESENT (1<<19)
+#define SEND_WRITE_COMMIT (1<<17)
+#define SEND_TYPE_WRITE (GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE<<13)
+#define SEND_TYPE_READ (BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ<<13)
+#define SEND_BLOCK_SIZE1 (BRW_DATAPORT_OWORD_BLOCK_2_OWORDS<<8)
+#define SEND_BLOCK_SIZE2 (BRW_DATAPORT_OWORD_BLOCK_4_OWORDS<<8)
+#define SEND_BLOCK_SIZE4 (BRW_DATAPORT_OWORD_BLOCK_8_OWORDS<<8)
+#define SEND_BINDING_TABLE (255<<0)
+// No write commit
+#define WRITE_DESC1_XXX SEND_BINDING_TABLE | SEND_BLOCK_SIZE1 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_2
+#define WRITE_DESC1_WC SEND_BINDING_TABLE | SEND_BLOCK_SIZE1 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_2 | SEND_WRITE_COMMIT
+#define WRITE_DESC2 SEND_BINDING_TABLE | SEND_BLOCK_SIZE2 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_3
+#define WRITE_DESC4 SEND_BINDING_TABLE | SEND_BLOCK_SIZE4 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_5
+#define RECV_DESC1 SEND_BINDING_TABLE | SEND_BLOCK_SIZE1 | SEND_TYPE_READ | SEND_HEADER_PRESENT | SEND_MLEN_1 | SEND_RLEN_1
+//#define SEND_DESC1 0x40902FF
+#define SEND_DESC1_WC 0x40b02FF
+
+/* ex_desc field 6.3.66.2 */
+#define SEND_DP_RENDER_CACHE (5<<0)
+#define SEND_EOT (1<<5)
+#define SEND_EX_DESC SEND_DP_RENDER_CACHE
+
+/**
+ * WRITE_SCRATCH1 - Write 2 owords.
+ * cdst.2 - offset
+ * cdst.5 - per thread scratch base, relative to gsba??
+ * cdst+1 - data to be written.
+ */
+#define WRITE_SCRATCH1(cdst) \
+ send (16) null cdst SEND_EX_DESC WRITE_DESC1_XXX FLAGS
+#define WRITE_SCRATCH1_WC(cdst) \
+ send (16) g1 cdst SEND_EX_DESC WRITE_DESC1_WC FLAGS
+#define WRITE_SCRATCH2(cdst) \
+ send (16) null cdst SEND_EX_DESC WRITE_DESC2 FLAGS
+#define WRITE_SCRATCH4(cdst) \
+ send (16) null cdst SEND_EX_DESC WRITE_DESC4 FLAGS
+
+/**
+ * READ_SCRATCH1 - Read 2 owords.
+ * cdst.2 - offset
+ * cdst.5 - per thread scratch base, relative to gsba??
+ * grf - register where read data is populated.
+ */
+#define READ_SCRATCH1(grf, cdst) \
+ send (16) grf:ud cdst SEND_EX_DESC RECV_DESC1 FLAGS
+
+/**
+ * SET_OFFSET - setup mrf for the given offset prior to a send instruction.
+ * mrf - message register to be used as the header.
+ * offset - offset.
+ *
+ * If a WRITE_SCRATCH follows, mrf+1 -> mrf+1+n should contain the data to be
+ * written.
+ */
+#define SET_OFFSET(mrf, offset) \
+ mov (1) mrf.5:ud g0.5:ud FLAGS; \
+ mov (1) mrf.2:ud offset:ud FLAGS
+
+/**
+ * SAVE_CRF - save the control register
+ * clobbers: m0.2, m0.5
+ */
+#define CR_OFFSET 0x40
+#define SAVE_CRF \
+ SET_OFFSET(m0, CR_OFFSET); \
+ mov (8) m1:ud 0xdeadbeef:ud FLAGS; \
+ mov (1) m1.0:ud cr0.0 FLAGS; \
+ mov (1) m1.1:ud cr0.1 FLAGS; \
+ mov (1) m1.2:ud cr0.2 FLAGS; \
+ mov (1) m1.3:ud sr0:ud FLAGS; \
+ WRITE_SCRATCH1(m0)
+
+/*
+ * clobbers: m0.2, m0.5
+ */
+#define STORE_GRF(grf, offset) \
+ SET_OFFSET(m0, offset); \
+ mov (8) m1:ud grf:ud FLAGS; \
+ WRITE_SCRATCH1(m0)
+
+/*
+ * clobbers: m0.2, m0.5
+ */
+#define LOAD_GRF(grf, offset) \
+ SET_OFFSET(m0, offset); \
+ READ_SCRATCH1(grf, m0)
+
+/*
+ * clobbers: mrf.2 mrf.5
+ */
+#define SAVE_MRF(mrf, offset) \
+ SET_OFFSET(mrf, offset); \
+ WRITE_SCRATCH1(mrf)
+
+/*
+ * non-quirky semantics, unlike SAVE_MRF
+ * clobbers: g1
+ */
+#define RESTORE_MRF(mrf, offset) \
+ LOAD_GRF(g1, offset); \
+ mov (8) mrf:ud g1:ud FLAGS
+
+#define SAVE_ALL_MRF \
+ /* m1 is saved already */ \
+ SAVE_MRF(m1, 0x2); \
+ SAVE_MRF(m2, 0x4); \
+ SAVE_MRF(m3, 0x6); \
+ SAVE_MRF(m4, 0x8); \
+ SAVE_MRF(m5, 0xa); \
+ SAVE_MRF(m6, 0xc); \
+ SAVE_MRF(m7, 0xe); \
+ SAVE_MRF(m8, 0x10); \
+ SAVE_MRF(m9, 0x12); \
+ SAVE_MRF(m10, 0x14); \
+ SAVE_MRF(m11, 0x16); \
+ SAVE_MRF(m12, 0x18); \
+ SAVE_MRF(m13, 0x1a); \
+ SAVE_MRF(m14, 0x1c)
+
+#define RESTORE_ALL_MRF \
+ RESTORE_MRF(m15, 0x1c); \
+ RESTORE_MRF(m14, 0x1a); \
+ RESTORE_MRF(m13, 0x18); \
+ RESTORE_MRF(m12, 0x16); \
+ RESTORE_MRF(m11, 0x14); \
+ RESTORE_MRF(m10, 0x12); \
+ RESTORE_MRF(m9, 0x10); \
+ RESTORE_MRF(m8, 0xe); \
+ RESTORE_MRF(m7, 0xc); \
+ RESTORE_MRF(m6, 0xa); \
+ RESTORE_MRF(m5, 0x8); \
+ RESTORE_MRF(m4, 0x6); \
+ RESTORE_MRF(m3, 0x4); \
+ RESTORE_MRF(m2, 0x2); \
+ RESTORE_MRF(m1, 0x0)
+
+#ifndef SANDYBRIDGE
+ #error Only SandyBridge is supported
+#endif
+
+/* Default flags for an instruction */
+#define FLAGS { ALIGN1, SWITCH, MASK_DISABLE, ACCWRCTRL}
+
+/*
+ * We can clobber m0, and g0.4, everything else must be saved.
+ */
+Enter:
+ nop;
+
+ or (1) cr0.0 cr0.0 CR0_0_ENTRY_UNMASK:ud FLAGS;
+
+ /*
+ * g0.5 has the per thread scratch space when running in FS or VS.
+ * If we don't have a valid g0.5, we can calculate a per thread scratch offset
+ * using the system registers. The problem is we do not have a good way to know
+ * the offset from GSBA. The system routine will have to be hardcoded or
+ * dynamically patched with the correct offset.
+ * TID is in sr0.0[2:0]
+ * EUID is in sr0.0[11:8]
+ */
+
+ mov (1) g0.4:ud 0:ud FLAGS;
+
+#ifdef GPGPU
+#if 0
+ /* This should work according to the docs, the add blows up */
+ shr (1) g0.8:uw sr0.0:uw 5 FLAGS;
+ add (1) g0.16:ub gr0.16:ub sr0.0:ub FLAGS;
+#else
+ shr (1) g0.8:uw sr0.0:uw 5 FLAGS;
+ mov (1) g0.9:uw sr0.0:uw FLAGS;
+ and (1) g0.9:uw g0.9:uw 0x7:uw FLAGS;
+ add (1) g0.8:uw g0.8:uw g0.9:uw FLAGS;
+ mov (1) g0.9:uw 0:uw FLAGS;
+ mul (1) g0.4:ud g0.4:ud PER_THREAD_QWORDS FLAGS;
+#endif
+#endif
+
+
+ /* Saves must occur in order so as not to clobber the next register */
+ SAVE_MRF(m0, 0);
+ STORE_GRF(g0, 0x20);
+ STORE_GRF(g1, 0x22);
+ SAVE_ALL_MRF;
+
+ mov (8) g1:ud STATE_EU_MSG:ud FLAGS;
+ STORE_GRF(g1, STATE_QWORD);
+
+ mov (8) g1:ud DEBUG_PROTOCOL_VERSION:ud FLAGS;
+ STORE_GRF(g1, COMMUNICATION_QWORD);
+
+ SAVE_CRF;
+
+ EVICT_CACHE;
+ wait n1:ud;
+ EVICT_CACHE;
+
+ /* Using this to try to keep coherency */
+ LOAD_GRF(g1, CR_OFFSET);
+ LOAD_GRF(g1, COMMUNICATION_QWORD);
+ LOAD_GRF(g1, STATE_QWORD);
+
+ RESTORE_ALL_MRF;
+ LOAD_GRF(g1, 0x22);
+ LOAD_GRF(g0, 0x20);
+
+ /* Clear breakpoint status */
+ and (1) cr0.1 cr0.1 CR0_1_ENTRY_UNMASK:ud FLAGS;
+
+ /* set breakpoint suppress this should be conditional on bes */
+ or (1) cr0.0 cr0.0 CR0_0_BP_SUPPRESS:ud FLAGS;
+
+ and (1) cr0.0 cr0.0 CR0_0_RETURN_MASK:ud FLAGS;
+ nop;
diff --git a/lib/debug.h b/lib/debug.h
new file mode 100644
index 0000000..886f2a4
--- /dev/null
+++ b/lib/debug.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Ben Widawsky <ben@bwidawsk.net>
+ *
+ */
+
+#ifndef _DEBUG_H_
+#define _DEBUG_H_
+
+#define DEBUG_PROTOCOL_VERSION 1
+#define COMMUNICATION_OFFSET 0xc00
+#define COMMUNICATION_QWORD 0xc0
+
+#define STATE_EU_MSG 0x01f00d10
+#define STATE_CPU_ACK 0x02f00d20
+#define STATE_OFFSET 0xc20
+#define STATE_QWORD 0xc2
+
+#define TX_OFFSET 0xc40
+#define TX_QWORD 0xc4
+#define RX_OFFSET 0xc60
+#define RX_QWORD 0xc6
+
+#ifndef GEN_ASM
+typedef uint32_t grf[8];
+typedef uint32_t mrf[8];
+typedef uint8_t cr[12];
+typedef uint32_t sr;
+
+#define DWORD8(x) {x, x, x, x, x, x, x, x}
+
+const static grf protocol_version = DWORD8(DEBUG_PROTOCOL_VERSION);
+const static grf eu_msg = DWORD8(STATE_EU_MSG);
+const static grf cpu_ack = DWORD8(STATE_CPU_ACK);
+
+struct eu_state {
+ mrf m_regs[15];
+ grf g_regs[16];
+ grf pad;
+
+/* 0x400 */
+ cr cr0;
+ sr sr0;
+ uint32_t beef_pad[4];
+ uint8_t pad2[992 + 1024];
+
+/* 0xc00 COMMUNICATION_OFFSET */
+ grf version;
+ grf state_magic;
+ grf eu_tx;
+ grf eu_rx;
+
+ uint8_t pad3[896];
+} __attribute__((packed));
+
+static inline void
+print_reg(uint8_t reg[32]) {
+ uint32_t *dwords = (uint32_t *)reg;
+ printf("%08x %08x %08x %08x %08x %08x %08x %08x",
+ dwords[7], dwords[6], dwords[5], dwords[4],
+ dwords[3], dwords[2], dwords[1], dwords[0]);
+}
+
+static inline void
+print_creg(uint8_t reg[12]) {
+ uint32_t *dwords = (uint32_t *)reg;
+ printf("%08x %08x %08x", dwords[2], dwords[1], dwords[0]);
+}
+#endif
+
+#endif
--
1.7.5.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related
* [PATCH 3/4] intel-gpu-tools: add important debug regs
From: Ben Widawsky @ 2011-06-14 19:46 UTC (permalink / raw)
To: intel-gfx
In-Reply-To: <1308080767-21176-1-git-send-email-ben@bwidawsk.net>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
lib/intel_reg.h | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index 48d8f66..ef9cb63 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -3488,5 +3488,10 @@ typedef enum {
#define TRANS_DP_HSYNC_ACTIVE_HIGH (1<<3)
#define TRANS_DP_HSYNC_ACTIVE_LOW 0
+/* Debug */
+#define INSTPM 0x20c0
+#define INSTPM_GLOBAL_DEBUG_EN (1<<4)
+#define GEN6_TD_CTL 0x7000
+#define TD_CTL_FORCE_TD_BKPT (1<<4)
#endif /* _I810_REG_H */
--
1.7.5.2
^ permalink raw reply related
* [PATCH 2/4] intel-gpu-tools/forcewaked: simple forcewake app
From: Ben Widawsky @ 2011-06-14 19:46 UTC (permalink / raw)
To: intel-gfx
In-Reply-To: <1308080767-21176-1-git-send-email-ben@bwidawsk.net>
This app is required for debug features which seem to (undocumented)
reset themselves if/when the GT goes to sleep.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
tools/Makefile.am | 1 +
tools/forcewaked.c | 45 +++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 46 insertions(+), 0 deletions(-)
create mode 100644 tools/forcewaked.c
diff --git a/tools/Makefile.am b/tools/Makefile.am
index c777778..2a6c82d 100644
--- a/tools/Makefile.am
+++ b/tools/Makefile.am
@@ -12,6 +12,7 @@ bin_PROGRAMS = \
intel_reg_snapshot \
intel_reg_write \
intel_reg_read \
+ forcewaked \
$(NULL)
noinst_PROGRAMS = \
diff --git a/tools/forcewaked.c b/tools/forcewaked.c
new file mode 100644
index 0000000..2222285
--- /dev/null
+++ b/tools/forcewaked.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Ben Widawsky <ben@bwidawsk.net>
+ *
+ */
+
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <err.h>
+#include <string.h>
+#include <assert.h>
+#include "intel_gpu_tools.h"
+
+int main(int argc, char** argv)
+{
+ int ret;
+
+ ret = intel_register_access_init(intel_get_pci_device(), 1, 1);
+ while(1);
+ intel_register_access_fini();
+ return 0;
+}
+
--
1.7.5.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related
* [PATCH 1/4] intel-gpu-tools: register range handling for forcewake hooks
From: Ben Widawsky @ 2011-06-14 19:46 UTC (permalink / raw)
To: intel-gfx
In-Reply-To: <1308080767-21176-1-git-send-email-ben@bwidawsk.net>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=UTF-8, Size: 14251 bytes --]
We can deprecate the old code by using the non-safe flag in the new API.
The safe flag should allow the previous behavior to continue.
The code also adds some range checking on register access. This code is
gives hooks to prevent tools from doing bad things.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
lib/Makefile.am | 1 +
lib/intel_chipset.h | 8 ++
lib/intel_gpu_tools.h | 27 +++++++
lib/intel_mmio.c | 197 +++++++++++++++++++++++++++++++++++++++++++++++++
lib/intel_reg_map.c | 174 +++++++++++++++++++++++++++++++++++++++++++
5 files changed, 407 insertions(+), 0 deletions(-)
create mode 100644 lib/intel_reg_map.c
diff --git a/lib/Makefile.am b/lib/Makefile.am
index 0c9380d..4612cd5 100644
--- a/lib/Makefile.am
+++ b/lib/Makefile.am
@@ -8,6 +8,7 @@ libintel_tools_la_SOURCES = \
intel_mmio.c \
intel_pci.c \
intel_reg.h \
+ intel_reg_map.c \
instdone.c \
instdone.h \
drmtest.h
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index c3db3ab..a38f661 100755
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -168,3 +168,11 @@
#define HAS_BLT_RING(devid) (IS_GEN6(devid) || \
IS_GEN7(devid))
+
+#define IS_BROADWATER(devid) (devid == PCI_CHIP_I946_GZ || \
+ devid == PCI_CHIP_I965_G_1 || \
+ devid == PCI_CHIP_I965_Q || \
+ devid == PCI_CHIP_I965_G)
+
+#define IS_CRESTLINE(devid) (devid == PCI_CHIP_I965_GM || \
+ devid == PCI_CHIP_I965_GME)
diff --git a/lib/intel_gpu_tools.h b/lib/intel_gpu_tools.h
index acee657..f911e48 100644
--- a/lib/intel_gpu_tools.h
+++ b/lib/intel_gpu_tools.h
@@ -37,6 +37,33 @@
extern void *mmio;
void intel_get_mmio(struct pci_device *pci_dev);
+/* New style register access API */
+int intel_register_access_init(struct pci_device *pci_dev, int safe, int greedy);
+void intel_register_access_fini(void);
+uint32_t intel_register_read(uint32_t reg);
+void intel_register_write(uint32_t reg, uint32_t val);
+
+#define INTEL_RANGE_RSVD (0<<0) /* Shouldn't be read or written */
+#define INTEL_RANGE_READ (1<<0)
+#define INTEL_RANGE_WRITE (1<<1)
+#define INTEL_RANGE_RW (INTEL_RANGE_READ | INTEL_RANGE_WRITE)
+#define INTEL_RANGE_END (1<<31)
+
+struct intel_register_range {
+ uint32_t base;
+ uint32_t size;
+ uint32_t flags;
+};
+
+struct intel_register_map {
+ struct intel_register_range *map;
+ uint32_t top;
+ uint32_t alignment_mask;
+};
+struct intel_register_map intel_get_register_map(uint32_t devid);
+struct intel_register_range *intel_get_register_range(struct intel_register_map map, uint32_t offset, int mode);
+
+
static inline uint32_t
INREG(uint32_t reg)
{
diff --git a/lib/intel_mmio.c b/lib/intel_mmio.c
index 0228a87..35ea20f 100644
--- a/lib/intel_mmio.c
+++ b/lib/intel_mmio.c
@@ -22,12 +22,15 @@
*
* Authors:
* Eric Anholt <eric@anholt.net>
+ * Ben Widawsky <ben@bwidawsk.net>
*
*/
#include <unistd.h>
#include <stdlib.h>
#include <stdio.h>
+#include <stdint.h>
+#include <stdbool.h>
#include <string.h>
#include <errno.h>
#include <err.h>
@@ -41,6 +44,17 @@
void *mmio;
+static struct _mmio_data {
+ int inited;
+ bool greedy;
+ bool safe;
+ char debugfs_path[FILENAME_MAX];
+ char debugfs_forcewake_path[FILENAME_MAX];
+ uint32_t i915_devid;
+ struct intel_register_map map;
+ int key;
+} mmio_data;
+
void
intel_map_file(char *file)
{
@@ -89,3 +103,186 @@ intel_get_mmio(struct pci_device *pci_dev)
}
}
+/*
+ * If successful, i915_debugfs_path and i915_debugfs_forcewake_path are both
+ * updated with the correct path.
+ */
+static int
+find_debugfs_path(char *dri_base)
+{
+ int i;
+ char buf[FILENAME_MAX];
+ char name[256];
+ char pciid[256];
+ FILE *file;
+
+ for (i = 0; i < 16; i++) {
+ int n;
+ snprintf(buf, FILENAME_MAX, "%s/%i/name", dri_base, i);
+
+ file = fopen(buf, "r");
+ if (file == NULL)
+ continue;
+
+ /*
+ *if (master->unique) {
+ * seq_printf(m, "%s %s %s\n",
+ * bus_name,
+ * dev_name(dev->dev), master->unique);
+ *} else {
+ * seq_printf(m, "%s %s\n",
+ * bus_name, dev_name(dev->dev));
+ *}
+ */
+ n = fscanf(file, "%s %s ", name, pciid);
+ fclose (file);
+
+ if (n != 2)
+ continue;
+
+ if (strncmp("0000:00:02.0", pciid, strlen("0000:00:02.0")))
+ continue;
+
+ snprintf(mmio_data.debugfs_path, FILENAME_MAX,
+ "%s/%i/", dri_base, i);
+ snprintf(mmio_data.debugfs_forcewake_path, FILENAME_MAX,
+ "%s/%i/i915_forcewake_user", dri_base, i);
+
+ return 0;
+ }
+
+ return -1;
+}
+
+/* force wake locking is stubbed out until accepted upstream */
+static int
+get_forcewake_lock(void)
+{
+ return open(mmio_data.debugfs_forcewake_path, 0);
+}
+
+static void
+release_forcewake_lock(int fd)
+{
+ close(fd);
+}
+
+/*
+ * Initialize register access library.
+ *
+ * @pci_dev: pci device we're mucking with
+ * @safe: use safe register access tables
+ * @greedy: hold forcewake lock from init to fini
+ */
+int
+intel_register_access_init(struct pci_device *pci_dev, int safe, int greedy)
+{
+ int ret;
+
+ /* after old API is deprecated, remove this */
+ if (mmio == NULL)
+ intel_get_mmio(pci_dev);
+
+ assert(mmio != NULL);
+
+ if (mmio_data.inited)
+ return -1;
+
+ mmio_data.safe = safe != 0 ? true : false;
+ mmio_data.greedy = greedy != 0 ? true : false;
+
+ /* Find where the forcewake lock is */
+ ret = find_debugfs_path("/sys/kernel/debug/dri");
+ if (ret) {
+ fprintf(stderr, "Couldn't find path to dri/debugfs entry\n");
+ return ret;
+ }
+
+ mmio_data.i915_devid = pci_dev->device_id;
+ if (mmio_data.safe)
+ mmio_data.map = intel_get_register_map(mmio_data.i915_devid);
+
+ if (mmio_data.greedy)
+ mmio_data.key = get_forcewake_lock();
+
+ mmio_data.inited++;
+ return 0;
+}
+
+void
+intel_register_access_fini(void)
+{
+ if (mmio_data.greedy)
+ release_forcewake_lock(mmio_data.key);
+
+ mmio_data.inited--;
+}
+
+uint32_t
+intel_register_read(uint32_t reg)
+{
+ struct intel_register_range *range;
+ uint32_t ret;
+
+ assert(mmio_data.inited);
+
+ if (!mmio_data.greedy)
+ mmio_data.key = get_forcewake_lock();
+
+ if (IS_GEN6(mmio_data.i915_devid))
+ assert(mmio_data.key != -1);
+
+ if (!mmio_data.safe)
+ goto read_out;
+
+ range = intel_get_register_range(mmio_data.map,
+ reg,
+ INTEL_RANGE_READ);
+
+ if(!range) {
+ fprintf(stderr, "Register read blocked for safety "
+ "(*0x%08x)\n", reg);
+ ret = 0xffffffff;
+ goto out;
+ }
+
+read_out:
+ ret = *(volatile uint32_t *)((volatile char *)mmio + reg);
+out:
+ if (!mmio_data.greedy)
+ release_forcewake_lock(mmio_data.key);
+ return ret;
+}
+
+void
+intel_register_write(uint32_t reg, uint32_t val)
+{
+ struct intel_register_range *range;
+
+ assert(mmio_data.inited);
+
+ if (!mmio_data.greedy)
+ mmio_data.key = get_forcewake_lock();
+
+ if (IS_GEN6(mmio_data.i915_devid))
+ assert(mmio_data.key != -1);
+
+ if (!mmio_data.safe)
+ goto write_out;
+
+ range = intel_get_register_range(mmio_data.map,
+ reg,
+ INTEL_RANGE_WRITE);
+
+ if(!range) {
+ fprintf(stderr, "Register write blocked for safety "
+ "(*0x%08x = 0x%x)\n", reg, val);
+ goto out;
+ }
+
+write_out:
+ *(volatile uint32_t *)((volatile char *)mmio + reg) = val;
+out:
+ if (!mmio_data.greedy)
+ release_forcewake_lock(mmio_data.key);
+}
diff --git a/lib/intel_reg_map.c b/lib/intel_reg_map.c
new file mode 100644
index 0000000..8b79c23
--- /dev/null
+++ b/lib/intel_reg_map.c
@@ -0,0 +1,174 @@
+/*
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Ben Widawsky <ben@bwidawsk.net>
+ *
+ */
+
+#include <stdlib.h>
+#include <sys/types.h>
+#include "intel_gpu_tools.h"
+
+static struct intel_register_range gen_bwcl_register_map[] = {
+ {0x00000000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00001000, 0x00000fff, INTEL_RANGE_RSVD},
+ {0x00002000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00003000, 0x000001ff, INTEL_RANGE_RW},
+ {0x00003200, 0x00000dff, INTEL_RANGE_RW},
+ {0x00004000, 0x000003ff, INTEL_RANGE_RSVD},
+ {0x00004400, 0x00000bff, INTEL_RANGE_RSVD},
+ {0x00005000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00006000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00007000, 0x000003ff, INTEL_RANGE_RW},
+ {0x00007400, 0x000014ff, INTEL_RANGE_RW},
+ {0x00008900, 0x000006ff, INTEL_RANGE_RSVD},
+ {0x00009000, 0x00000fff, INTEL_RANGE_RSVD},
+ {0x0000a000, 0x00000fff, INTEL_RANGE_RW},
+ {0x0000b000, 0x00004fff, INTEL_RANGE_RSVD},
+ {0x00010000, 0x00003fff, INTEL_RANGE_RW},
+ {0x00014000, 0x0001bfff, INTEL_RANGE_RSVD},
+ {0x00030000, 0x0000ffff, INTEL_RANGE_RW},
+ {0x00040000, 0x0001ffff, INTEL_RANGE_RSVD},
+ {0x00060000, 0x0000ffff, INTEL_RANGE_RW},
+ {0x00070000, 0x00002fff, INTEL_RANGE_RW},
+ {0x00073000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00074000, 0x0000bfff, INTEL_RANGE_RSVD},
+ {0x00000000, 0x00000000, INTEL_RANGE_END}
+};
+
+static struct intel_register_range gen4_register_map[] = {
+ {0x00000000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00001000, 0x00000fff, INTEL_RANGE_RSVD},
+ {0x00002000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00003000, 0x000001ff, INTEL_RANGE_RW},
+ {0x00003200, 0x00000dff, INTEL_RANGE_RW},
+ {0x00004000, 0x000003ff, INTEL_RANGE_RW},
+ {0x00004400, 0x00000bff, INTEL_RANGE_RW},
+ {0x00005000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00006000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00007000, 0x000003ff, INTEL_RANGE_RW},
+ {0x00007400, 0x000014ff, INTEL_RANGE_RW},
+ {0x00008900, 0x000006ff, INTEL_RANGE_RSVD},
+ {0x00009000, 0x00000fff, INTEL_RANGE_RSVD},
+ {0x0000a000, 0x00000fff, INTEL_RANGE_RW},
+ {0x0000b000, 0x00004fff, INTEL_RANGE_RSVD},
+ {0x00010000, 0x00003fff, INTEL_RANGE_RW},
+ {0x00014000, 0x0001bfff, INTEL_RANGE_RSVD},
+ {0x00030000, 0x0000ffff, INTEL_RANGE_RW},
+ {0x00040000, 0x0001ffff, INTEL_RANGE_RSVD},
+ {0x00060000, 0x0000ffff, INTEL_RANGE_RW},
+ {0x00070000, 0x00002fff, INTEL_RANGE_RW},
+ {0x00073000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00074000, 0x0000bfff, INTEL_RANGE_RSVD},
+ {0x00000000, 0x00000000, INTEL_RANGE_END}
+};
+
+/* The documentation is a little sketchy on these register ranges. */
+static struct intel_register_range gen6_gt_register_map[] = {
+ {0x00000000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00001000, 0x00000fff, INTEL_RANGE_RSVD},
+ {0x00002000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00003000, 0x000001ff, INTEL_RANGE_RW},
+ {0x00003200, 0x00000dff, INTEL_RANGE_RW},
+ {0x00004000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00005000, 0x0000017f, INTEL_RANGE_RW},
+ {0x00005180, 0x00000e7f, INTEL_RANGE_RW},
+ {0x00006000, 0x00001fff, INTEL_RANGE_RW},
+ {0x00008000, 0x000007ff, INTEL_RANGE_RW},
+ {0x00008800, 0x000000ff, INTEL_RANGE_RSVD},
+ {0x00008900, 0x000006ff, INTEL_RANGE_RW},
+ {0x00009000, 0x00000fff, INTEL_RANGE_RSVD},
+ {0x0000a000, 0x00000fff, INTEL_RANGE_RW},
+ {0x0000b000, 0x00004fff, INTEL_RANGE_RSVD},
+ {0x00010000, 0x00001fff, INTEL_RANGE_RW},
+ {0x00012000, 0x000003ff, INTEL_RANGE_RW},
+ {0x00012400, 0x00000bff, INTEL_RANGE_RW},
+ {0x00013000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00014000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00015000, 0x0000cfff, INTEL_RANGE_RW},
+ {0x00022000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00023000, 0x00000fff, INTEL_RANGE_RSVD},
+ {0x00024000, 0x00000fff, INTEL_RANGE_RW},
+ {0x00025000, 0x0000afff, INTEL_RANGE_RSVD},
+ {0x00030000, 0x0000ffff, INTEL_RANGE_RW},
+ {0x00040000, 0x0000ffff, INTEL_RANGE_RW},
+ {0x00050000, 0x0000ffff, INTEL_RANGE_RW},
+ {0x00060000, 0x0000ffff, INTEL_RANGE_RW},
+ {0x00070000, 0x00003fff, INTEL_RANGE_RW},
+ {0x00074000, 0x0008bfff, INTEL_RANGE_RSVD},
+ {0x00100000, 0x00007fff, INTEL_RANGE_RW},
+ {0x00108000, 0x00037fff, INTEL_RANGE_RSVD},
+ {0x00140000, 0x0003ffff, INTEL_RANGE_RW},
+ {0x00000000, 0x00000000, INTEL_RANGE_END}
+};
+
+struct intel_register_map
+intel_get_register_map(uint32_t devid)
+{
+ struct intel_register_map map;
+
+ if (IS_GEN6(devid)) {
+ map.map = gen6_gt_register_map;
+ map.top = 0x180000;
+ } else if (IS_BROADWATER(devid) || IS_CRESTLINE(devid)) {
+ map.map = gen_bwcl_register_map;
+ map.top = 0x80000;
+ } else if (IS_GEN4(devid) || IS_GEN5(devid)) {
+ map.map = gen4_register_map;
+ map.top = 0x80000;
+ } else {
+ abort();
+ }
+
+ map.alignment_mask = 0x3;
+
+ return map;
+}
+
+struct intel_register_range *
+intel_get_register_range(struct intel_register_map map, uint32_t offset, int mode)
+{
+ struct intel_register_range *range = map.map;
+ uint32_t align = map.alignment_mask;
+
+ if (offset & map.alignment_mask)
+ return NULL;
+
+ if (offset >= map.top)
+ return NULL;
+
+ while (!(range->flags & INTEL_RANGE_END)) {
+ /* list is assumed to be in order */
+ if (offset < range->base)
+ break;
+
+ if ( (offset >= range->base) &&
+ (offset + align) <= (range->base + range->size)) {
+ if ((mode & range->flags) == mode)
+ return range;
+ }
+ range++;
+ }
+
+ return NULL;
+}
--
1.7.5.2
[-- Attachment #2: Type: text/plain, Size: 159 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related
* Shader debugging
From: Ben Widawsky @ 2011-06-14 19:46 UTC (permalink / raw)
To: intel-gfx
The following patches enable GEN hardware shader debugging features. This is
for >= GEN6 only.
The patches are not usable without patches to the DDX as well as Mesa.
Furthermore currently a kernel ioctl is required (more on that later). As
these are all in tools, I figure I would post these now while I continue
cleaning up the other patches. Furthermore, no interactive debugging is yet
supported.
The system routine has been tested on a fragment shader (though it
should work for vertex shaders as well).
Here is a brief description of what is missing (ie. not yet ready for
mailing list):
- DDX state setup needs to cooperate when setting the Instruction
Base address.
- Mesa state setup needs to cooperate.
- Mesa need some way to set breakpoints.
- Mesa register allocation needs modification.
- Kernel ioctl to set the system routine instruction pointer
Here is what is working in the current implementation:
- System routine upload (done in Kernel IOCTL currently)
- Basic system routine
- Coherent EU/CPU communication (while ring is frozen)
- EU architectural state saving (just MRF 1-15, GRF 0-15, SR, and CR), and
saved into CPU visible space.
- Tool to read architectural state (mostly for reference).
Here is what is planned next:
- Clean up and send out what I have for Mesa, DDX, and kernel (even
though I know most of those need changes anyway).
- When I started this work nobody was using the instuction base
pointer, so I need to cooperate more closely with that now.
- Work on EU side communication (do different things based on CPU
commands).
- Change eviction macro to a loop
There's probably more which I'm forgetting right now. The 4th patch is the
gigantic, not sure how to split it up, patch. I will probably add an extremely,
more simpler system routine for basic sanity testing.
^ permalink raw reply
* [patch] Re: Linux 3.0-rc3 (APM fix)
From: Randy Dunlap @ 2011-06-14 19:45 UTC (permalink / raw)
To: Linus Torvalds, len.brown
Cc: Linux Kernel Mailing List, Andy Whitcroft, Ben Hutchings
In-Reply-To: <BANLkTinCfV4owNBhJ+F-yfF3V+wg1o=PLA@mail.gmail.com>
On Mon, 13 Jun 2011 16:01:26 -0700 Linus Torvalds wrote:
> .. and this time even with a timely tar-ball, since I'm not traveling any more.
ERROR: "pm_idle" [arch/x86/kernel/apm.ko] undefined!
ERROR: "default_idle" [arch/x86/kernel/apm.ko] undefined!
Fix was posted by Andy Whitcroft on June 8 and Ben Hutchings on June 9.
https://lkml.org/lkml/2011/6/8/170
https://lkml.org/lkml/2011/6/9/679
Below is Andy's patch since it was posted first.
Please merge some fix.
---
The commit below removed the export for pm_idle/default_idle unless the
apm module was modularised and CONFIG_APM_CPU_IDLE was set. The apm
module uses pm_idle/default_idle unconditionally, CONFIG_APM_CPU_IDLE
only affects the bios idle threshold. Adjust the export accordingly.
commit 06ae40ce073daf233607a3c54a489f2c1e44683e
Author: Len Brown <len.brown@intel.com>
Date: Fri Apr 1 15:28:09 2011 -0400
x86 idle: EXPORT_SYMBOL(default_idle, pm_idle) only when APM demands it
Signed-off-by: Andy Whitcroft <apw@canonical.com>
---
arch/x86/kernel/process.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 2e4928d..b8265d0 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -337,7 +337,7 @@ EXPORT_SYMBOL(boot_option_idle_override);
* Powermanagement idle function, if any..
*/
void (*pm_idle)(void);
-#if defined(CONFIG_APM_MODULE) && defined(CONFIG_APM_CPU_IDLE)
+#if defined(CONFIG_APM_MODULE)
EXPORT_SYMBOL(pm_idle);
#endif
@@ -399,7 +399,7 @@ void default_idle(void)
cpu_relax();
}
}
-#if defined(CONFIG_APM_MODULE) && defined(CONFIG_APM_CPU_IDLE)
+#if defined(CONFIG_APM_MODULE)
EXPORT_SYMBOL(default_idle);
#endif
--
^ permalink raw reply related
* Re: Re: BUG: unable to handle kernel NULL pointer dereference (4.0.1 w/2.6.32.36)
From: Daniel Stodden @ 2011-06-14 19:44 UTC (permalink / raw)
To: Jan Beulich
Cc: quartex, Jeremy Fitzhardinge, xen-devel@lists.xensource.com,
Pasi@citrix.com
In-Reply-To: <4DF739AF0200007800046F42@nat28.tlf.novell.com>
On Tue, 2011-06-14 at 04:36 -0400, Jan Beulich wrote:
> >>> On 13.06.11 at 02:17, Daniel Stodden <daniel.stodden@citrix.com> wrote:
>
> > Can you all pull in this one?
> >
> > http://xenbits.xen.org/gitweb/?p=people/dstodden/linux.git;a=commit;h=a76525
> > 7af7e28c41bd776c3e03615539597eb592
>
> Any reason why after several months this still doesn't appear to be in
> stable-2.6.32, which is what people are generally directed to use?
Presumably no, it's a no-brainer. Who's maintaining 2.6.32 right now? I
thought that's still Jeremy. Sorry if keep ccing the wrong people, it's
the second time this came up.
Daniel
> Jan
>
> > Likely the one, but let me absolutely know if not.
> >
> > Daniel
> >
> >
> > On Sat, 2011-06-11 at 07:17 -0400, quartex wrote:
> >> I have updated to 2.6.32.41 but it happened again.
> >>
> >> [491154.766766] BUG: unable to handle kernel NULL pointer dereference
> >> at 0000000000000320
> >> [491154.767477] IP: [<ffffffff8128cbc3>] blktap_device_end_request+0x4a/0x71
> >> [491154.767844] PGD 3db17067 PUD 3cebe067 PMD 0
> >> [491154.768219] Oops: 0000 [#1] SMP
> >> [491154.768572] last sysfs file: /sys/devices/vbd-4-51713/statistics/wr_sect
> >> [491154.768942] CPU 3
> >> [491154.769295] Modules linked in: netconsole [last unloaded:
> >> scsi_wait_scan]
> >> [491154.769683] Pid: 4392, comm: tapdisk2 Not tainted 2.6.32.36 #4 S3420GP
> >> [491154.770056] RIP: e030:[<ffffffff8128cbc3>] [<ffffffff8128cbc3>]
> >> blktap_device_end_request+0x4a/0x71
> >> [491154.770767] RSP: e02b:ffff88003cd33ca8 EFLAGS: 00010046
> >> [491154.771133] RAX: 0000000000000000 RBX: ffff88003df60d20 RCX:
> >> 0000000000000000
> >> [491154.771824] RDX: 00000000000000a1 RSI: 0000000000000001 RDI:
> >> 0000000000000004
> >> [491154.772524] RBP: ffff88003cd33cc8 R08: 0000000000000000 R09:
> >> ffff88003cd33b08
> >> [491154.773222] R10: 0000000000000001 R11: ffffffff00001000 R12:
> >> ffff88003ccadb20
> >> [491154.773915] R13: ffff88003d8e3c00 R14: 0000000000000000 R15:
> >> 0000000000000002
> >> [491154.774622] FS: 00007f152f810740(0000) GS:ffff88002808f000(0000)
> >> knlGS:0000000000000000
> >> [491154.775325] CS: e033 DS: 0000 ES: 0000 CR0: 000000008005003b
> >> [491154.775683] CR2: 0000000000000320 CR3: 000000003b095000 CR4:
> >> 0000000000002660
> >> [491154.776380] DR0: 0000000000000000 DR1: 0000000000000000 DR2:
> >> 0000000000000000
> >> [491154.777079] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7:
> >> 0000000000000400
> >> [491154.777770] Process tapdisk2 (pid: 4392, threadinfo
> >> ffff88003cd32000, task ffff88003d833c80)
> >> [491154.778476] Stack:
> >> [491154.778821] ffff88003d8e3c00 0000000000000000 ffff88003ccadb20
> >> 0000000000e5386f
> >> [491154.779220] <0> ffff88003cd33e58 ffffffff8128beab 000000003cd33ce8
> >> ffffffff81aab128
> >> [491154.779956] <0> 000000013d743ac0 ffff88003d7439a0 000000019681a000
> >> ffff88003fffc800
> >> [491154.780987] Call Trace:
> >> [491154.781334] [<ffffffff8128beab>] blktap_ring_ioctl+0x12d/0x23f
> >> [491154.781676] [<ffffffff811d503b>] ? avc_has_perm+0x57/0x69
> >> [491154.782017] [<ffffffff811d6322>] ? inode_has_perm+0x5f/0x61
> >> [491154.782368] [<ffffffff810e13b3>] ? generic_file_aio_write+0x8c/0xa9
> >> [491154.782718] [<ffffffff8111fd46>] vfs_ioctl+0x6a/0x82
> >> [491154.783072] [<ffffffff81120248>] do_vfs_ioctl+0x473/0x4b9
> >> [491154.783426] [<ffffffff811202df>] sys_ioctl+0x51/0x74
> >> [491154.783781] [<ffffffff8103ccc2>] system_call_fastpath+0x16/0x1b
> >> [491154.784142] Code: e6 4c 89
> >> [491154.795155] [<ffffffff81120248>] do_vfs_ioctl+0x473/0x4b9
> >>
> >>
> >>
> >>
> >>
> >> --
> >> View this message in context:
> > http://xen.1045712.n5.nabble.com/BUG-unable-to-handle-kernel-NULL-pointer-dere
> > ference-4-0-1-w-2-6-32-36-tp4432056p4478572.html
> >> Sent from the Xen - Dev mailing list archive at Nabble.com.
> >>
> >> _______________________________________________
> >> Xen-devel mailing list
> >> Xen-devel@lists.xensource.com
> >> http://lists.xensource.com/xen-devel
> >
> >
> >
> > _______________________________________________
> > Xen-devel mailing list
> > Xen-devel@lists.xensource.com
> > http://lists.xensource.com/xen-devel
>
>
>
^ permalink raw reply
* Re: [PATCH] ti-dsplink: Fixed location of toolchain
From: Koen Kooi @ 2011-06-14 19:38 UTC (permalink / raw)
To: openembedded-devel
In-Reply-To: <20110614193117.GD1324@denix.org>
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
On 14-06-11 21:31, Denys Dmytriyenko wrote:
> On Tue, Jun 14, 2011 at 05:47:07PM +0200, Koen Kooi wrote:
>> -----BEGIN PGP SIGNED MESSAGE-----
>> Hash: SHA1
>>
>> On 14-06-11 17:38, Denys Dmytriyenko wrote:
>>> On Tue, Jun 14, 2011 at 09:36:26AM +0200, Koen Kooi wrote:
>>>> -----BEGIN PGP SIGNED MESSAGE-----
>>>> Hash: SHA1
>>>>
>>>> On 14-06-11 05:55, Joel A Fernandes wrote:
>>>>> ti-dsplink: Fixed location of toolchain to build ti-dsplink.
>>>>
>>>> It sadly really needs an absolute path to the tools :(
>>>
>>> So, what was this patch trying to fix anyway? Is there something broken?
>>
>> Using an external toolchain without your import magic and then
>> overriding TOOLCHAINPATH in local.conf is broken. You might call it
>> broken by design :)
>
> As you know, the design is hindered by requirements, so ease up! :)
>
> As of the "import magic" - there is nothing magical about it, it just sets up
> TOOLCHAIN_PATH and TOOLCHAIN_SYSPATH automatically. Otherwise you'd have to
> set at least TOOLCHAIN_PATH manually and it works. So, I still don't see what
> exactly is broken and needs to be fixed.
Joel setup his tree the wrong way
> BTW, the requirements for absolute toolchain path come from dsplink and not
> the external toolchain, AFAICR...
dsplink and others, yes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.5 (Darwin)
iD8DBQFN97jDMkyGM64RGpERAimXAKC70bo3sUyDf+/jzJux/n8mXRurYgCgqsEt
RT2PAYT1EIeptDARW/MoEcE=
=Yfp9
-----END PGP SIGNATURE-----
^ permalink raw reply
* Re: generate one module from multiple object files (was: Re: [PATCH 2/2] usb: gadget: convert all users to the new udc)
From: Felipe Balbi @ 2011-06-14 19:41 UTC (permalink / raw)
To: Alan Stern
Cc: Felipe Balbi, Arnaud Lacombe, Michal Nazarewicz,
Sebastian Andrzej Siewior, Greg KH, Linux USB Mailing List,
linux-kbuild
In-Reply-To: <Pine.LNX.4.44L0.1106141453420.2102-100000@iolanthe.rowland.org>
[-- Attachment #1: Type: text/plain, Size: 6600 bytes --]
Hi,
On Tue, Jun 14, 2011 at 03:27:47PM -0400, Alan Stern wrote:
> On Tue, 14 Jun 2011, Felipe Balbi wrote:
>
> > On Tue, Jun 14, 2011 at 01:06:16PM -0400, Alan Stern wrote:
> > > On Tue, 14 Jun 2011, Felipe Balbi wrote:
> > >
> > > > > --- a/drivers/usb/gadget/Makefile
> > > > > +++ b/drivers/usb/gadget/Makefile
> > > > > @@ -34,6 +34,12 @@ obj-$(CONFIG_USB_FUSB300) += fusb300_udc.o
> > > > > # USB gadget drivers
> > > > > #
> > > > > g_zero-y := zero.o
> > > > > +g_zero-y += composite.o
> > > > > +g_zero-y += usbstring.o
> > > > > +g_zero-y += config.o
> > > > > +g_zero-y += epautoconf.o
> > > > > +g_zero-y += f_sourcesink.o
> > > > > +g_zero-y += f_loopback.o
> > > >
> > > > yes, you can do that. But the problem is the runtime memory footprint
> > > > that we will have with that. At least that was the reason why Greg had
> > > > asked Dave to change it to how it is done now.
> > >
> > > What exactly is the runtime memory footprint problem? I thought the
> > > whole reason for #include'ing .c files was that back then, the kbuild
> > > system wasn't able to do this.
> >
> > not at all. Kbuild has always been able to generate one module from
> > several objects. But then we need to remove "static" from many
> > functions to achieve that.
>
> If you insist on building an object from multiple source files with
> separate compilation, the price you pay is making symbols non-static.
> That's what we have .h files for. And that's also why the [eou]hci-hcd
> drivers use the same trick of #include'ing various .c files. I really
> don't know why people object to this idiom. (Note that if the object
> is a module, non-static symbols don't matter. It's an issue only when
> the object is linked into the main kernel.)
>
> > AFAICT, gcc --combine will really combine the files as if they were one,
> > pretty much the same as including the entire C source.
> >
> > Just look at the rationale from the commit log itself:
> >
> > commit 4e9ba518ec19c6c961bf6074ec05ae1a927230bc
> > Author: David Brownell <dbrownell@users.sourceforge.net>
> > Date: Mon Aug 18 17:41:02 2008 -0700
>
> Much as I admired David's work, he could sometimes be a little
> difficult to understand.
>
> > usb gadget: link fixes for serial gadget
> >
> > Change how the serial gadget driver builds: don't use
> > separate compilation, since it works poorly when key parts
> > are library code (with init sections etc). Instead be as
>
> "works poorly" how? That is, what goes wrong when you try to use
> separate compilation?
>
> > close as we can to "gcc --combine ...".
> >
> > Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
> > Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
> >
> > part of it is also in any gadget driver:
> >
> > /*
> > * Kbuild is not very cooperative with respect to linking separately
> > * compiled library objects into one module. So for now we won't use
>
> (I assume this doesn't use the word "library" in a significant sense.
> It isn't referring to static-link .a library archives, for instance.)
>
> In what way is kbuild uncooperative? You said above that kbuild has
> always been able to build modules from separately-compiled objects.
>
> > * separate compilation ... ensuring init/exit sections work to shrink
> > * the runtime footprint, and giving us at least some parts of what
> > * a "gcc --combine ... part1.c part2.c part3.c ... " build would.
> > */
>
> Is the use of init sections the problem? I don't see why it should
> be. If you link multiple objects into a single module, all the init
> code should go into a single section. Plenty of drivers throughout the
> kernel do this successfully. In fact, g_serial did before David's
> patch, didn't it?
>
> > you can find all such commits by:
> >
> > $ git log --author="David Brownell" --grep="link fixes" -- drivers/usb/gadget/
> >
> > And here are the original discussions:
> >
> > http://marc.info/?l=linux-usb&m=121868805717787&w=2
> > http://marc.info/?l=linux-usb&m=121875765411492&w=2
>
> The problem Greg faced was that he tried to put all the library code
> into a separate module. This clearly leads to potential problems.
> Suppose module A contains library code in an init section, which is
> used by the init code in module B. When A is finished loading, its
> init code is jettisoned. Then when B loads and tries to call that
> code, the system crashes.
>
> It's not clear why single compilation saves space. The difference
> wasn't tremendous -- in David's g_serial test case
> (http://marc.info/?l=linux-usb&m=121875765411492&w=2), 42 bytes were
> saved out of 20000. And the savings was almost entirely in data and
> bss; you'd have to do some serious digging to figure what really was
> going on.
>
> > In summary:
> >
> > We don't want to have library code into their own drivers because, well,
> > you can only have one gadget driver at a time anyway.
>
> That sentence isn't clear. Perhaps you mean that having a single copy
> of the executable library code at runtime, which could be shared among
> multiple gadget drivers, doesn't help because there's only one gadget
that's what I meant.
> driver present at a time. With the new UDC framework, that won't be
> true any more.
Good point.
> > And we don't want
> > separate compilation due to having stuff out of init sections.
>
> I still don't understand what the issue is with that. There are plenty
> of driver modules built from multiple, separately-compiled objects
> that use init sections without trouble.
Maybe we should turn u_*.c and composite.c into their own modules now
that we're starting to allow multiple gadget controllers and thus
multiple gadget drivers loaded. I failed to see that, great catch.
> On the other hand, if you want to share a single copy of the executable
> library code among multiple gadget drivers, then none of it can go in
> an init section. Since gadget drivers can be loaded and unloaded at
> any time, the library code would have to remain in memory permanently
> -- it couldn't go in an init section.
very true. Let's leave this alone for now and revisit once all
controllers are converted to the ->start()/->stop() methods correctly.
--
balbi
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 490 bytes --]
^ permalink raw reply
* [PATCH] Add fallocate_keep_size option and functionality
From: Eric Gouriou @ 2011-06-14 19:40 UTC (permalink / raw)
To: Jens Axboe; +Cc: fio, Nauman Rafique, Daniel Ehrenberg, Eric Gouriou
Linux offers fallocate() and the FALLOC_FL_KEEP_SIZE option as
an alternative to posix_fallocate(). When FALLOC_FL_KEEP_SIZE is
specified for an falloc request going beyond the end of the file,
the requested blocks get preallocated without changing the apparent
size of the file. This is is a commonly recommended use of fallocate()
for workloads performing append writes.
On systems where FALLOC_FL_KEEP_SIZE is available (i.e., Linux at this
time), this patch add a fallocate_keep_size option, which is off by
default. When *both* the options fallocate and fallocate_keep_size are
set, then fallocate() will be used with FALLOC_FL_KEEP_SIZE set,
instead of the default posix_fallocate().
Signed-off-by: Eric Gouriou <egouriou@google.com>
---
I tried to follow the existing style and practices. I am wondering
whether introducing 'fallocate_keep_size' is the best way, or whether
I should have changed the existing 'fallocate' option from a boolean
option to a string option. Let me know what you think.
Regards - Eric
---
HOWTO | 12 +++++++++---
filesetup.c | 36 +++++++++++++++++++++++++++++-------
fio.1 | 14 +++++++++++---
fio.h | 1 +
helpers.c | 5 +++++
options.c | 11 ++++++++++-
os/os-linux.h | 1 +
7 files changed, 66 insertions(+), 14 deletions(-)
diff --git a/HOWTO b/HOWTO
index 69b8cc6..eb3bb9c 100644
--- a/HOWTO
+++ b/HOWTO
@@ -354,12 +354,18 @@ use_os_rand=bool Fio can either use the random generator supplied by the OS
internal generator, which is often of better quality and
faster.
-fallocate=bool By default, fio will use fallocate() to advise the system
- of the size of the file we are going to write. This can be
- turned off with fallocate=0. May not be available on all
+fallocate=bool By default, fio will use posix_fallocate() to advise the
+ system of the size of the file we are going to write. This can
+ be turned off with fallocate=0. May not be available on all
supported platforms. If using ZFS on Solaris this must be
set to 0 because ZFS doesn't support it.
+fallocate_keep_size=bool If this option and the fallocate option are
+ both set, fio will invoke the Linux-specific fallocate()
+ system call with the option FALLOC_FL_KEEP_SIZE, rather than
+ posix_fallocate(). This is only available on Linux.
+ Default: false.
+
fadvise_hint=bool By default, fio will use fadvise() to advise the kernel
on what IO patterns it is likely to issue. Sometimes you
want to test specific IO patterns without telling the
diff --git a/filesetup.c b/filesetup.c
index 799202f..ac49237 100644
--- a/filesetup.c
+++ b/filesetup.c
@@ -13,6 +13,10 @@
#include "filehash.h"
#include "os/os.h"
+#ifdef FIO_HAVE_LINUX_FALLOCATE
+#include <linux/falloc.h>
+#endif
+
static int root_warn;
static inline void clear_error(struct thread_data *td)
@@ -68,16 +72,34 @@ static int extend_file(struct thread_data *td, struct fio_file *f)
#ifdef FIO_HAVE_FALLOCATE
if (td->o.fallocate && !td->o.fill_device) {
- dprint(FD_FILE, "fallocate file %s size %llu\n", f->file_name,
- f->real_file_size);
-
- r = posix_fallocate(f->fd, 0, f->real_file_size);
- if (r > 0) {
- log_err("fio: posix_fallocate fails: %s\n",
- strerror(r));
+ int use_posix_fallocate = 1;
+#ifdef FIO_HAVE_LINUX_FALLOCATE
+ if (td->o.fallocate_keep_size) {
+ use_posix_fallocate = 0;
+ dprint(FD_FILE,
+ "fallocate(FALLOC_FL_KEEP_SIZE) "
+ "file %s size %llu\n",
+ f->file_name, f->real_file_size);
+
+ r = fallocate(f->fd, FALLOC_FL_KEEP_SIZE, 0,
+ f->real_file_size);
+ if (r != 0) {
+ td_verror(td, errno, "fallocate");
+ }
+ }
+#endif /* FIO_HAVE_LINUX_FALLOCATE */
+ if (use_posix_fallocate) {
+ dprint(FD_FILE, "fallocate file %s size %llu\n",
+ f->file_name, f->real_file_size);
+
+ r = posix_fallocate(f->fd, 0, f->real_file_size);
+ if (r > 0) {
+ log_err("fio: posix_fallocate fails: %s\n",
+ strerror(r));
+ }
}
}
-#endif
+#endif /* FIO_HAVE_FALLOCATE */
if (!new_layout)
goto done;
diff --git a/fio.1 b/fio.1
index 0ced604..5d55e05 100644
--- a/fio.1
+++ b/fio.1
@@ -221,9 +221,17 @@ Default is to use the internal generator, which is often of better quality and
faster. Default: false.
.TP
.BI fallocate \fR=\fPbool
-By default, fio will use fallocate() to advise the system of the size of the
-file we are going to write. This can be turned off with fallocate=0. May not
-be available on all supported platforms.
+By default, fio will use posix_fallocate() to advise the
+system of the size of the file we are going to write. This can
+be turned off with fallocate=0. May not be available on all
+supported platforms. If using ZFS on Solaris this must be
+set to 0 because ZFS doesn't support it.
+.TP
+.BI fallocate_keep_size \fR=\fPbool
+If this option and the fallocate option are
+both set, fio will invoke the Linux-specific fallocate()
+system call with the option FALLOC_FL_KEEP_SIZE, rather than
+posix_fallocate(). This is only available on Linux. Default: false.
.TP
.BI fadvise_hint \fR=\fPbool
Disable use of \fIposix_fadvise\fR\|(2) to advise the kernel what I/O patterns
diff --git a/fio.h b/fio.h
index 6ad186f..5ee3961 100644
--- a/fio.h
+++ b/fio.h
@@ -249,6 +249,7 @@ struct thread_options {
unsigned int group_reporting;
unsigned int fadvise_hint;
unsigned int fallocate;
+ unsigned int fallocate_keep_size;
unsigned int zero_buffers;
unsigned int refill_buffers;
unsigned int time_based;
diff --git a/helpers.c b/helpers.c
index 377dd02..0da2fd7 100644
--- a/helpers.c
+++ b/helpers.c
@@ -14,6 +14,11 @@ int __weak posix_fallocate(int fd, off_t offset, off_t len)
{
return 0;
}
+
+int __weak fallocate(int fd, int mode, off_t offset, off_t len)
+{
+ return 0;
+}
#endif
int __weak inet_aton(const char *cp, struct in_addr *inp)
diff --git a/options.c b/options.c
index a9b0534..b340477 100644
--- a/options.c
+++ b/options.c
@@ -1180,10 +1180,19 @@ static struct fio_option options[FIO_MAX_OPTS] = {
.name = "fallocate",
.type = FIO_OPT_BOOL,
.off1 = td_var_offset(fallocate),
- .help = "Use fallocate() when laying out files",
+ .help = "Use posix_fallocate() or fallocate() when laying out files",
.def = "1",
},
#endif
+#ifdef FIO_HAVE_LINUX_FALLOCATE
+ {
+ .name = "fallocate_keep_size",
+ .type = FIO_OPT_BOOL,
+ .off1 = td_var_offset(fallocate_keep_size),
+ .help = "Use the FALLOC_FL_KEEP_SIZE mode if fallocate() is invoked",
+ .def = "0",
+ },
+#endif
{
.name = "fadvise_hint",
.type = FIO_OPT_BOOL,
diff --git a/os/os-linux.h b/os/os-linux.h
index 70c993b..024ef89 100644
--- a/os/os-linux.h
+++ b/os/os-linux.h
@@ -32,6 +32,7 @@
#define FIO_HAVE_BLKTRACE
#define FIO_HAVE_STRSEP
#define FIO_HAVE_FALLOCATE
+#define FIO_HAVE_LINUX_FALLOCATE
#define FIO_HAVE_POSIXAIO_FSYNC
#define FIO_HAVE_PSHARED_MUTEX
#define FIO_HAVE_CL_SIZE
--
1.7.3.1
^ permalink raw reply related
* Re: [PATCH 2/2] archive: support gzipped tar files
From: René Scharfe @ 2011-06-14 19:39 UTC (permalink / raw)
To: Jeff King; +Cc: git, git-dev
In-Reply-To: <20110614181821.GA32685@sigill.intra.peff.net>
Am 14.06.2011 20:18, schrieb Jeff King:
> git-archive already supports the creation of tar files. For
> local cases, one can simply pipe the output to gzip, and
> having git-archive do the gzip is a minor convenience.
>
> However, when running git-archive against a remote site,
> having the remote side do the compression can save
> considerable bandwidth. Service providers could always wrap
> git-archive to provide that functionality, but this makes it
> much simpler.
That's a good point and one that was overlooked when this topic came up
earlier (see http://kerneltrap.org/mailarchive/git/2009/9/10/11507 and
http://kerneltrap.org/mailarchive/git/2009/9/11/11577). That
implementation was ... heavier than yours, but it also avoided an
unnecessary level of buffering. I wonder if it makes a measurable
difference, though.
> Creating gzipped archives is of course more expensive than
> regular tar archives; however, the amount of work should be
> comparable to that of creating a zip file, which is already
> possible. So there should be no new security implications
> with respect to creating load on a remote server.
>
> Signed-off-by: Jeff King <peff@peff.net>
> ---
> Documentation/git-archive.txt | 17 +++++++++++++++--
> archive-tar.c | 27 +++++++++++++++++++++++++++
> archive.c | 1 +
> archive.h | 1 +
> builtin/archive.c | 6 ++++++
> t/t5000-tar-tree.sh | 26 ++++++++++++++++++++++++++
> 6 files changed, 76 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/git-archive.txt b/Documentation/git-archive.txt
> index 9c750e2..963bec4 100644
> --- a/Documentation/git-archive.txt
> +++ b/Documentation/git-archive.txt
> @@ -34,10 +34,11 @@ OPTIONS
> -------
>
> --format=<fmt>::
> - Format of the resulting archive: 'tar' or 'zip'. If this option
> + Format of the resulting archive: 'tar', 'tgz', or 'zip'. If this option
> is not given, and the output file is specified, the format is
> inferred from the filename if possible (e.g. writing to "foo.zip"
> - makes the output to be in the zip format). Otherwise the output
> + creates the output in the zip format; "foo.tgz" or "foo.tar.gz"
> + creates the output in the tgz format). Otherwise the output
> format is `tar`.
>
> -l::
> @@ -89,6 +90,12 @@ zip
> Highest and slowest compression level. You can specify any
> number from 1 to 9 to adjust compression speed and ratio.
>
> +tgz
> +~~~
> +-9::
> + Highest and slowest compression level. You can specify any
> + number from 1 to 9 to adjust compression speed and ratio.
> +
>
> CONFIGURATION
> -------------
> @@ -133,6 +140,12 @@ git archive --format=tar --prefix=git-1.4.0/ v1.4.0 | gzip >git-1.4.0.tar.gz::
>
> Create a compressed tarball for v1.4.0 release.
>
> +git archive --prefix=git-1.4.0/ -o git-1.4.0.tar.gz v1.4.0
> +
> + Same as above, except that we use the internal gzip. Note that
> + the output format is inferred by the extension of the output
> + file.
> +
> git archive --format=tar --prefix=git-1.4.0/ v1.4.0{caret}\{tree\} | gzip >git-1.4.0.tar.gz::
>
> Create a compressed tarball for v1.4.0 release, but without a
> diff --git a/archive-tar.c b/archive-tar.c
> index b1aea87..86c8aa9 100644
> --- a/archive-tar.c
> +++ b/archive-tar.c
> @@ -260,3 +260,30 @@ int write_tar_archive(struct archiver_args *args)
> output = output_write;
> return write_tar_archive_internal(args);
> }
> +
> +static gzFile gz_file;
> +static void output_gz(const char *buf, unsigned long len)
> +{
> + if (!gzwrite(gz_file, buf, len))
> + die("unable to write compressed stream: %s",
> + gzerror(gz_file, NULL));
> +}
Does this do the right things when faced with interrupted writes or
truncated pipes? I ask because the earlier attempt had a
gzwrite_or_die() which did that, but I don't know anymore if that is
strictly needed. Oh, and bridging the gap between unsigned long and int
was certainly another reason for the existence of this function.
^ permalink raw reply
* Re: xfstests test case 229 fails consistently
From: Eric Sandeen @ 2011-06-14 19:39 UTC (permalink / raw)
To: sekharan; +Cc: XFS Mailing List
In-Reply-To: <1308077636.7661.476.camel@chandra-lucid.beaverton.ibm.com>
On 6/14/11 1:53 PM, Chandra Seetharaman wrote:
> Hello All,
>
> xfstests test case 229 fails consistently in my x84_64 system.
> Only thing that is different between runs is the number of errors.
> Any suggestions on how to proceed with the debug.
>
> regards,
>
> chandra
>
This one is known to fail.
http://oss.sgi.com/archives/xfs/2011-05/msg00237.html
"it's never passed. It's a placeholder to remind us how to
reproduce a known problem that is difficult to fix."
-Eric
_______________________________________________
xfs mailing list
xfs@oss.sgi.com
http://oss.sgi.com/mailman/listinfo/xfs
^ permalink raw reply
* Re: bernard-5.0.1, poky-image-lsb, beagle, build error
From: Tom Rini @ 2011-06-14 19:38 UTC (permalink / raw)
To: poky
In-Reply-To: <4DF7B675.6050304@linux.intel.com>
On 06/14/2011 12:28 PM, Saul Wold wrote:
> On 06/14/2011 11:20 AM, Robert Berger wrote:
>> Hi,
>>
>> I hit a build error with the tag: bernard-5.0.1
>> while trying to build poky-image-lsb, which failed, because psmisc could
>> not be downloaded.
>>
>> I fixed it like this:
>>
>> diff --git a/meta/recipes-extended/psmisc/psmisc.inc
>> b/meta/recipes-extended/psmisc/psmisc.inc
>> index 8b391f4..460affc 100644
>> --- a/meta/recipes-extended/psmisc/psmisc.inc
>> +++ b/meta/recipes-extended/psmisc/psmisc.inc
>> @@ -10,8 +10,9 @@ SECTION = "base"
>> PRIORITY = "required"
>> DEPENDS = "ncurses virtual/libintl"
>>
>> -SRC_URI = "${SOURCEFORGE_MIRROR}/psmisc/psmisc-${PV}.tar.gz \
>> +SRC_URI =
>> "${SOURCEFORGE_MIRROR}/project/psmisc/psmisc/${PV}/psmisc-${PV}.tar.gz \
>> file://libintl-link.patch;patch=1"
>> +
>> S = "${WORKDIR}/psmisc-${PV}"
>>
>> This means that the tag bernard-5.0.1 does not build anymore for the
>> beagle and most likely other platforms won't build as well out of the
>> box.
>>
>> That's just a small issue, but my problem is more generic.
>>
>> Assuming someone makes a distro based on a tag e.g. bernard-5.0.1 and
>> wants to rebuild this distro in a year from now.
>>
>> Packages might have disappeared, or in best case just the URLs changed.
>> In any case the distro will not build anymore out of the box.
>>
>> I would ideally like to be able to reproduce exactly what I have in a
>> couple of years from now, which seems impossible due to dependencies
>> external to poky which are not controlled by this community.
>>
>> I could come up with a solution, where local copies of packages are kept
>> e.g. in a local download directory, but this would mean, that I'll need
>> to build and test all possible platforms just after the releases (where
>> everything still works) and not when I'll actually need them.
>>
>> What's the best way to deal with this?
>>
> Robert,
>
> This is a know problem with Upstream sources moving, dropping older
> versions or just doing strange behavior.
>
> Currently, if you have MIRRORS, it should pick up the original upstream
> source tarball from http://autobuilder.yoctoprojecto.org/sources, if you
> want to avoid checking any upstream source, you can set
> PREMIRRORS_prepend for ftp, http, and https URLs to the
> autobuilder/sources location. This location should maintain all tarballs
> for releases.
>
> We had a similar problem with distcc right about the time we released
> 5.0.1!
>
> You can use a local solution also with PREMIRRORS_prepend, as well as
> setting the BB_NO_NETWORK, which will force bitbake to not look on the
> network for any upstreams, this assumes you have everything preloaded
> locally.
>
> Let us know if this is what you are looking for.
I'd suggest making poky look at a poky-mirror as a "last resort" mirror
by default (similar to angstrom and angstrom-mirror.bbclass), at least
for release branches.
--
Tom Rini
Mentor Graphics Corporation
^ permalink raw reply
* Re: Failure of test case 244
From: Eric Sandeen @ 2011-06-14 19:38 UTC (permalink / raw)
To: sekharan; +Cc: XFS Mailing List
In-Reply-To: <1308076910.7661.470.camel@chandra-lucid.beaverton.ibm.com>
On 6/14/11 1:41 PM, Chandra Seetharaman wrote:
> Hello,
>
> test case 244 expects a mkfs option projid32bit, which is not present in
> older version of mkfs.xfs(for example 3.1.1 in RHEL 6.1).
>
> I though of making it a "requires" for this test, so that the test case
> doesn't generate a "failure" when the test is run on older versions.
>
> Opinions ?
Yes, that make sense; care to send a patch with proper signoff?
Thanks,
-Eric
> regards
>
> chandra
>
> PS: here is the test o/p
>
> FSTYP -- xfs (non-debug)
> PLATFORM -- Linux/x86_64 elm3c201 2.6.39-rc4-xfs.git.p2+
> MKFS_OPTIONS -- -f -bsize=4096 /dev/sdd2
> MOUNT_OPTIONS -- -o context=system_u:object_r:nfs_t:s0 /dev/sdd2 /mnt/xfsScratchMntPt
>
> 244 [failed, exit status 1] - output mismatch (see 244.out.bad)
> --- 244.out 2011-04-20 08:34:36.000000000 -0700
> +++ 244.out.bad 2011-06-14 11:29:57.000000000 -0700
> @@ -1,2 +1,25 @@
> QA output created by 244
> -Silence is golden
> +unknown option -i projid32bit=0
> +Usage: mkfs.xfs
> +/* blocksize */ [-b log=n|size=num]
> +/* data subvol */ [-d agcount=n,agsize=n,file,name=xxx,size=num,
> + (sunit=value,swidth=value|su=num,sw=num),
> + sectlog=n|sectsize=num
> +/* inode size */ [-i log=n|perblock=n|size=num,maxpct=n,attr=0|1|2]
> +/* log subvol */ [-l agnum=n,internal,size=num,logdev=xxx,version=n
> + sunit=value|su=num,sectlog=n|sectsize=num,
> + lazy-count=0|1]
> +/* label */ [-L label (maximum 12 characters)]
> +/* naming */ [-n log=n|size=num,version=2|ci]
> +/* prototype file */ [-p fname]
> +/* quiet */ [-q]
> +/* realtime subvol */ [-r extsize=num,size=num,rtdev=xxx]
> +/* sectorsize */ [-s log=n|size=num]
> +/* version */ [-V]
> + devicename
> +<devicename> is required unless -d name=xxx is given.
> +<num> is xxx (bytes), xxxs (sectors), xxxb (fs blocks), xxxk (xxx KiB),
> + xxxm (xxx MiB), xxxg (xxx GiB), xxxt (xxx TiB) or xxxp (xxx PiB).
> +<value> is xxx (512 byte blocks).
> +mkfs failed
> +(see 244.full for details)
> Ran: 244
> Failures: 244
> Failed 1 of 1 tests
>
>
> _______________________________________________
> xfs mailing list
> xfs@oss.sgi.com
> http://oss.sgi.com/mailman/listinfo/xfs
>
_______________________________________________
xfs mailing list
xfs@oss.sgi.com
http://oss.sgi.com/mailman/listinfo/xfs
^ permalink raw reply
* Re: xfstests 252 failure
From: Allison Henderson @ 2011-06-14 19:37 UTC (permalink / raw)
To: Josef Bacik; +Cc: linux-fsdevel, Eric Sandeen, Ext4 Developers List, xfs-oss
In-Reply-To: <4DF7AB76.8030701@redhat.com>
On 06/14/2011 11:41 AM, Josef Bacik wrote:
> On 06/14/2011 12:06 PM, Eric Sandeen wrote:
>> On 6/14/11 10:41 AM, Allison Henderson wrote:
>>> Hi all,
>>>
>>> I just wanted to get some ideas moving on this question before too
>>> much time goes by. Ext4 is currently failing xfstest 252, test number
>>> 12. Currently test 12 is:
>>>
>>> $XFS_IO_PROG $xfs_io_opt -f -c "truncate 20k" \
>>> -c "$alloc_cmd 0 20k" \
>>> -c "pwrite 8k 4k" -c "fsync" \
>>> -c "$zero_cmd 4k 12k" \
>>> -c "$map_cmd -v" $testfile | $filter_cmd
>>> [ $? -ne 0 ]&& die_now
>>
>> so the file should go through these steps:
>> (H=hole, P=prealloc, D=data)
>>
>> 0k 20k
>> | H | H | H | H | H | (truncate)
>> | P | P | P | P | P | (alloc_cmd)
>> | P | P | D | P | P | (pwrite)
>> <fsync> (fsync)
>> | P | H | H | H | P | (punch)
>>
>>> and the output is:
>>>
>>> 12. unwritten -> data -> unwritten
>>> 0: [0..7]: unwritten
>>> 1: [8..31]: hole
>>> 2: [32..39]: unwritten
>>>
>>> Ext4 gets data extents here instead of unwritten extents.
>>
>> so it's like this?
>>
>> 0: [0..7]: data
>> 1: [8..31]: hole
>> 2: [32..39]: data
>>
>>> I did some
>>> investigating and it looks like the fsync command causes the extents
>>> to be written out before the punch hole operation starts. It looks
>>> like what happens is that when an unwritten extent gets written to,
>>> it doesnt always split the extent. If the extent is small enough,
>>> then it just zeros out the portions that are not written to, and the
>>> whole extent becomes a written extent. Im not sure if that is
>>> incorrect or if we need to change the test to not compare the extent
>>> types.
>>
>> Yes, it does do that IIRC.
>>
>> I probably need to look closer, but any test which expects exact
>> layouts from a filesystem after a series of operations is probably
>> expecting too much...
>>
>> From a data integrity perspective, written zeros is as good as a hole is
>> as good as preallocated space, so I suppose those should all be acceptable,
>> though I guess "punch" should result in holes exactly as requested.
>>
>>> It looks to me that the code in ext4 that does this is supposed to be
>>> an optimization to help reduce fragmentation. We could change the
>>> filters to print just "extent" instead of "unwritten" or "data", but
>>> I realize that probably makes the test a lot less effective for xfs.
>>> If anyone can think of some more elegant fixes, please let me know.
>>> Thx!
>>
>> Josef, what do you think? It's your test originally. :)
>>
>
> Yes, a test that was really only meant to test the block based fiemap
> since they all act in a dumb and easy to verify way. I think if we want
> to keep this test we should probably have it just recognize these little
> optimizations so it doesn't freak out. Thanks,
>
> Josef
Alrighty then, so it sounds like we should adjust the filters to only
recognize extents and holes, and then add a checksum to the punched
files. I think that seems pretty straight forward. I already have a
patch set out there that is adding more punch hole tests, so I can add
these changes in with it if everyone is ok with that. Thx!
Allison Henderson
_______________________________________________
xfs mailing list
xfs@oss.sgi.com
http://oss.sgi.com/mailman/listinfo/xfs
^ permalink raw reply
* Re: xfstests 252 failure
From: Allison Henderson @ 2011-06-14 19:37 UTC (permalink / raw)
To: Josef Bacik; +Cc: Eric Sandeen, xfs-oss, Ext4 Developers List, linux-fsdevel
In-Reply-To: <4DF7AB76.8030701@redhat.com>
On 06/14/2011 11:41 AM, Josef Bacik wrote:
> On 06/14/2011 12:06 PM, Eric Sandeen wrote:
>> On 6/14/11 10:41 AM, Allison Henderson wrote:
>>> Hi all,
>>>
>>> I just wanted to get some ideas moving on this question before too
>>> much time goes by. Ext4 is currently failing xfstest 252, test number
>>> 12. Currently test 12 is:
>>>
>>> $XFS_IO_PROG $xfs_io_opt -f -c "truncate 20k" \
>>> -c "$alloc_cmd 0 20k" \
>>> -c "pwrite 8k 4k" -c "fsync" \
>>> -c "$zero_cmd 4k 12k" \
>>> -c "$map_cmd -v" $testfile | $filter_cmd
>>> [ $? -ne 0 ]&& die_now
>>
>> so the file should go through these steps:
>> (H=hole, P=prealloc, D=data)
>>
>> 0k 20k
>> | H | H | H | H | H | (truncate)
>> | P | P | P | P | P | (alloc_cmd)
>> | P | P | D | P | P | (pwrite)
>> <fsync> (fsync)
>> | P | H | H | H | P | (punch)
>>
>>> and the output is:
>>>
>>> 12. unwritten -> data -> unwritten
>>> 0: [0..7]: unwritten
>>> 1: [8..31]: hole
>>> 2: [32..39]: unwritten
>>>
>>> Ext4 gets data extents here instead of unwritten extents.
>>
>> so it's like this?
>>
>> 0: [0..7]: data
>> 1: [8..31]: hole
>> 2: [32..39]: data
>>
>>> I did some
>>> investigating and it looks like the fsync command causes the extents
>>> to be written out before the punch hole operation starts. It looks
>>> like what happens is that when an unwritten extent gets written to,
>>> it doesnt always split the extent. If the extent is small enough,
>>> then it just zeros out the portions that are not written to, and the
>>> whole extent becomes a written extent. Im not sure if that is
>>> incorrect or if we need to change the test to not compare the extent
>>> types.
>>
>> Yes, it does do that IIRC.
>>
>> I probably need to look closer, but any test which expects exact
>> layouts from a filesystem after a series of operations is probably
>> expecting too much...
>>
>> From a data integrity perspective, written zeros is as good as a hole is
>> as good as preallocated space, so I suppose those should all be acceptable,
>> though I guess "punch" should result in holes exactly as requested.
>>
>>> It looks to me that the code in ext4 that does this is supposed to be
>>> an optimization to help reduce fragmentation. We could change the
>>> filters to print just "extent" instead of "unwritten" or "data", but
>>> I realize that probably makes the test a lot less effective for xfs.
>>> If anyone can think of some more elegant fixes, please let me know.
>>> Thx!
>>
>> Josef, what do you think? It's your test originally. :)
>>
>
> Yes, a test that was really only meant to test the block based fiemap
> since they all act in a dumb and easy to verify way. I think if we want
> to keep this test we should probably have it just recognize these little
> optimizations so it doesn't freak out. Thanks,
>
> Josef
Alrighty then, so it sounds like we should adjust the filters to only
recognize extents and holes, and then add a checksum to the punched
files. I think that seems pretty straight forward. I already have a
patch set out there that is adding more punch hole tests, so I can add
these changes in with it if everyone is ok with that. Thx!
Allison Henderson
^ permalink raw reply
* Re: [PATCH 2/2] archive: support gzipped tar files
From: Jeff King @ 2011-06-14 19:30 UTC (permalink / raw)
To: J.H.; +Cc: git, René Scharfe, git-dev
In-Reply-To: <4DF7B59D.30306@eaglescrag.net>
On Tue, Jun 14, 2011 at 12:25:17PM -0700, J.H. wrote:
> On 06/14/2011 11:18 AM, Jeff King wrote:
> > git-archive already supports the creation of tar files. For
> > local cases, one can simply pipe the output to gzip, and
> > having git-archive do the gzip is a minor convenience.
> >
> > However, when running git-archive against a remote site,
> > having the remote side do the compression can save
> > considerable bandwidth. Service providers could always wrap
> > git-archive to provide that functionality, but this makes it
> > much simpler.
> >
> > Creating gzipped archives is of course more expensive than
> > regular tar archives; however, the amount of work should be
> > comparable to that of creating a zip file, which is already
> > possible. So there should be no new security implications
> > with respect to creating load on a remote server.
>
> Would it make sense to make this a little more generic and support bz2
> and xz as well?
I think it's a great idea if somebody wants to do it on top of my patch.
They should be able to hook into the tar code just like I did in 2/2.
But they will need library support that we don't already have in git.
Doing gz was easy because we already require zlib.
We could also support them by piping to an external compressor, which
wouldn't be too hard (you could do it for gzip, too, but given that we
have zlib, this was much simpler). There is a slight hitch with the
"--list" command, though. Should git-archive advertise these formats,
and if so, how should it know that they are available?
-Peff
^ permalink raw reply
* Re: Question about LRO/GRO and TCP acknowledgements
From: Joris van Rantwijk @ 2011-06-14 19:37 UTC (permalink / raw)
To: Ilpo Järvinen; +Cc: Netdev
In-Reply-To: <alpine.DEB.2.00.1106141302110.17529@wel-95.cs.helsinki.fi>
On 2011-06-14, "Ilpo Järvinen" <ilpo.jarvinen@helsinki.fi> wrote:
> BTW, it wouldn't be impossible to create all those "missing" ACKs on
> the TCP layer relatively cheaply when receiving the GRO'ed super
> segment. I'm certainly not opposed you coming up such patch which
> does all that minimal work needed on TCP layer but I think it
> requires also some TSO/GSO related problem solving because TSO/GSO as
> is won't let you create such super ACKs we'd want to send out on that
> single go.
Your super-ACK idea is similar to the solution presented in this paper:
http://www.usenix.org/event/usenix08/tech/full_papers/menon/menon_html/
Actually, I started looking at the GRO code after reading that
paper, hoping to find that Linux has a better way to deal with ACKs.
The super ACK doesn't look easy. It must contain all different ack_seq
values to avoid tripping duplicate ACK detection. Ideally, the ack_seq
values would match real seq values from the received segments.
I don't currently have a setup where I could test these kinds of
changes, so this doesn't seem like a job for me. At least not right now.
Thanks, Joris.
^ permalink raw reply
* Re: [PATCH 11/13] KVM: PPC: e500: Add shadow PID support
From: Scott Wood @ 2011-06-14 19:37 UTC (permalink / raw)
To: kvm-ppc
In-Reply-To: <20110517234242.GI3580@schlenkerla.am.freescale.net>
On Tue, 14 Jun 2011 12:41:03 +0200
Alexander Graf <agraf@suse.de> wrote:
>
> On 03.06.2011, at 01:17, Scott Wood wrote:
>
> > +static void kvmppc_e500_stlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
> > + int tlbsel, int esel)
> > +{
> > + struct tlbe *gtlbe = &vcpu_e500->gtlb_arch[tlbsel][esel];
> > + struct vcpu_id_table *idt = vcpu_e500->idt;
> > + unsigned int pr, tid, ts, pid;
> > + u32 val, eaddr;
> > + unsigned long flags;
> > +
> > + ts = get_tlb_ts(gtlbe);
> > + tid = get_tlb_tid(gtlbe);
> > +
> > + preempt_disable();
> > +
> > + /* One guest ID may be mapped to two shadow IDs */
> > + for (pr = 0; pr < 2; pr++) {
> > + /*
> > + * The shadow PID can have a valid mapping on at most one
> > + * host CPU. In the common case, it will be valid on this
>
> Not sure I understand this part. Who ensures that a shadow pid is only valid on a single CPU?
vcpu_e500->idt->id[...]->pentry can only point to one place at a time. Any
other shadow PIDs (e.g. on other host CPUs) that it used to point to are
now invalid, and will not be re-used if the vcpu returns to that host CPU
(other than by having that host CPU reset its shadow PIDs once
they're exhausted, invalidating everything).
The linkage must match in both directions in local_sid_lookup(), or a new
shadow ID will be allocated (and the old one put out of use when pentry is
updated).
> > + /*
> > + * The guest is invalidating a TLB0 entry which in in a PID
>
> in in?
>
"is in", sorry.
-Scott
^ permalink raw reply
* Re: [PATCH 2/2] drm/i915: add Ivy Bridge page flip support
From: Jesse Barnes @ 2011-06-14 19:35 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
In-Reply-To: <d08817$c2chc@azsmga001.ch.intel.com>
On Tue, 14 Jun 2011 19:22:33 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Tue, 14 Jun 2011 11:13:08 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > Use the blit ring for submitting flips since the render ring doesn't
> > generate flip complete interrupts.
> >
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 25 +++++++++++++++++++++++++
> > 1 files changed, 25 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 06748f3a..3d095de 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -6379,6 +6379,28 @@ out:
> > return ret;
> > }
> >
> > +static int intel_gen7_queue_flip(struct drm_device *dev,
> > + struct drm_crtc *crtc,
> > + struct drm_framebuffer *fb,
> > + struct drm_i915_gem_object *obj)
> > +{
> > + struct drm_i915_private *dev_priv = dev->dev_private;
> > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
> > + int ret;
> > +
> > + ret = intel_ring_begin(&dev_priv->ring[BCS], 4);
> > + if (ret)
> > + goto out;
> > +
> > + intel_ring_emit(&dev_priv->ring[BCS], (MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)) | (1 << 17));
> What's the magic number? 80 column limit?
> -Chris
All good points. See the updated patches.
Thanks,
--
Jesse Barnes, Intel Open Source Technology Center
^ permalink raw reply
* Re: [PATCH] ti-dsplink: Fixed location of toolchain
From: Denys Dmytriyenko @ 2011-06-14 19:31 UTC (permalink / raw)
To: openembedded-devel
In-Reply-To: <it7vpr$n45$1@dough.gmane.org>
On Tue, Jun 14, 2011 at 05:47:07PM +0200, Koen Kooi wrote:
> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA1
>
> On 14-06-11 17:38, Denys Dmytriyenko wrote:
> > On Tue, Jun 14, 2011 at 09:36:26AM +0200, Koen Kooi wrote:
> >> -----BEGIN PGP SIGNED MESSAGE-----
> >> Hash: SHA1
> >>
> >> On 14-06-11 05:55, Joel A Fernandes wrote:
> >>> ti-dsplink: Fixed location of toolchain to build ti-dsplink.
> >>
> >> It sadly really needs an absolute path to the tools :(
> >
> > So, what was this patch trying to fix anyway? Is there something broken?
>
> Using an external toolchain without your import magic and then
> overriding TOOLCHAINPATH in local.conf is broken. You might call it
> broken by design :)
As you know, the design is hindered by requirements, so ease up! :)
As of the "import magic" - there is nothing magical about it, it just sets up
TOOLCHAIN_PATH and TOOLCHAIN_SYSPATH automatically. Otherwise you'd have to
set at least TOOLCHAIN_PATH manually and it works. So, I still don't see what
exactly is broken and needs to be fixed.
BTW, the requirements for absolute toolchain path come from dsplink and not
the external toolchain, AFAICR...
--
Denys
^ permalink raw reply
* [PATCH 2/2] drm/i915: add Ivy Bridge page flip support
From: Jesse Barnes @ 2011-06-14 19:34 UTC (permalink / raw)
To: intel-gfx
In-Reply-To: <1308080094-4510-1-git-send-email-jbarnes@virtuousgeek.org>
Use the blit ring for submitting flips since the render ring doesn't
generate flip complete interrupts.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/intel_display.c | 26 ++++++++++++++++++++++++++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0fb0b0c..d40fcd0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6379,6 +6379,29 @@ out:
return ret;
}
+static int intel_gen7_queue_flip(struct drm_device *dev,
+ struct drm_crtc *crtc,
+ struct drm_framebuffer *fb,
+ struct drm_i915_gem_object *obj)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
+ int ret;
+
+ ret = intel_ring_begin(ring, 4);
+ if (ret)
+ goto out;
+
+ intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
+ intel_ring_emit(ring, (fb->pitch | obj->tiling_mode));
+ intel_ring_emit(ring, (obj->gtt_offset));
+ intel_ring_emit(ring, (MI_NOOP));
+ intel_ring_advance(ring);
+out:
+ return ret;
+}
+
static int intel_default_queue_flip(struct drm_device *dev,
struct drm_crtc *crtc,
struct drm_framebuffer *fb,
@@ -7750,6 +7773,9 @@ static void intel_init_display(struct drm_device *dev)
case 6:
dev_priv->display.queue_flip = intel_gen6_queue_flip;
break;
+ case 7:
+ dev_priv->display.queue_flip = intel_gen7_queue_flip;
+ break;
}
}
--
1.7.4.1
^ permalink raw reply related
* [PATCH 1/2] drm/i915: split page flip queueing into per-chipset functions
From: Jesse Barnes @ 2011-06-14 19:34 UTC (permalink / raw)
To: intel-gfx
This makes things a little clearer and prevents us from running old code
on a new chipset that may not be supported.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/i915_drv.h | 3 +
drivers/gpu/drm/i915/intel_display.c | 202 +++++++++++++++++++++++++---------
2 files changed, 151 insertions(+), 54 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f63ee16..eddabf6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -211,6 +211,9 @@ struct drm_i915_display_funcs {
void (*fdi_link_train)(struct drm_crtc *crtc);
void (*init_clock_gating)(struct drm_device *dev);
void (*init_pch_clock_gating)(struct drm_device *dev);
+ int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
+ struct drm_framebuffer *fb,
+ struct drm_i915_gem_object *obj);
/* clock updates for mode set */
/* cursor updates */
/* render clock increase/decrease */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 81a9059..0fb0b0c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6262,6 +6262,131 @@ void intel_prepare_page_flip(struct drm_device *dev, int plane)
spin_unlock_irqrestore(&dev->event_lock, flags);
}
+static int intel_gen2_queue_flip(struct drm_device *dev,
+ struct drm_crtc *crtc,
+ struct drm_framebuffer *fb,
+ struct drm_i915_gem_object *obj)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ unsigned long offset;
+ int ret;
+
+ /* Offset into the new buffer for cases of shared fbs between CRTCs */
+ offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
+
+ ret = BEGIN_LP_RING(4);
+ if (ret)
+ goto out;
+
+ OUT_RING(MI_DISPLAY_FLIP |
+ MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+ OUT_RING(fb->pitch);
+ OUT_RING(obj->gtt_offset + offset);
+ OUT_RING(MI_NOOP);
+ ADVANCE_LP_RING();
+out:
+ return ret;
+}
+
+static int intel_gen3_queue_flip(struct drm_device *dev,
+ struct drm_crtc *crtc,
+ struct drm_framebuffer *fb,
+ struct drm_i915_gem_object *obj)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ unsigned long offset;
+ int ret;
+
+ /* Offset into the new buffer for cases of shared fbs between CRTCs */
+ offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
+
+ ret = BEGIN_LP_RING(4);
+ if (ret)
+ goto out;
+
+ OUT_RING(MI_DISPLAY_FLIP_I915 |
+ MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+ OUT_RING(fb->pitch);
+ OUT_RING(obj->gtt_offset + offset);
+ OUT_RING(MI_NOOP);
+
+ ADVANCE_LP_RING();
+out:
+ return ret;
+}
+
+static int intel_gen4_queue_flip(struct drm_device *dev,
+ struct drm_crtc *crtc,
+ struct drm_framebuffer *fb,
+ struct drm_i915_gem_object *obj)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ uint32_t pf, pipesrc;
+ int ret;
+
+ ret = BEGIN_LP_RING(4);
+ if (ret)
+ goto out;
+
+ /* i965+ uses the linear or tiled offsets from the
+ * Display Registers (which do not change across a page-flip)
+ * so we need only reprogram the base address.
+ */
+ OUT_RING(MI_DISPLAY_FLIP |
+ MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+ OUT_RING(fb->pitch);
+ OUT_RING(obj->gtt_offset | obj->tiling_mode);
+
+ /* XXX Enabling the panel-fitter across page-flip is so far
+ * untested on non-native modes, so ignore it for now.
+ * pf = I915_READ(pipe == 0 ? PFA_CTL_1 : PFB_CTL_1) & PF_ENABLE;
+ */
+ pf = 0;
+ pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
+ OUT_RING(pf | pipesrc);
+ ADVANCE_LP_RING();
+out:
+ return ret;
+}
+
+static int intel_gen6_queue_flip(struct drm_device *dev,
+ struct drm_crtc *crtc,
+ struct drm_framebuffer *fb,
+ struct drm_i915_gem_object *obj)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ uint32_t pf, pipesrc;
+ int ret;
+
+ ret = BEGIN_LP_RING(4);
+ if (ret)
+ goto out;
+
+ OUT_RING(MI_DISPLAY_FLIP |
+ MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+ OUT_RING(fb->pitch | obj->tiling_mode);
+ OUT_RING(obj->gtt_offset);
+
+ pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE;
+ pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
+ OUT_RING(pf | pipesrc);
+ ADVANCE_LP_RING();
+out:
+ return ret;
+}
+
+static int intel_default_queue_flip(struct drm_device *dev,
+ struct drm_crtc *crtc,
+ struct drm_framebuffer *fb,
+ struct drm_i915_gem_object *obj)
+{
+ return -ENODEV;
+}
+
static int intel_crtc_page_flip(struct drm_crtc *crtc,
struct drm_framebuffer *fb,
struct drm_pending_vblank_event *event)
@@ -6273,8 +6398,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_unpin_work *work;
unsigned long flags, offset;
- int pipe = intel_crtc->pipe;
- u32 pf, pipesrc;
int ret;
work = kzalloc(sizeof *work, GFP_KERNEL);
@@ -6343,7 +6466,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
/* Offset into the new buffer for cases of shared fbs between CRTCs */
offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
- ret = BEGIN_LP_RING(4);
+ ret = dev_priv->display.queue_flip(dev, crtc, fb, obj);
if (ret)
goto cleanup_objs;
@@ -6352,57 +6475,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
*/
atomic_add(1 << intel_crtc->plane, &work->old_fb_obj->pending_flip);
- switch (INTEL_INFO(dev)->gen) {
- case 2:
- OUT_RING(MI_DISPLAY_FLIP |
- MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
- OUT_RING(fb->pitch);
- OUT_RING(obj->gtt_offset + offset);
- OUT_RING(MI_NOOP);
- break;
-
- case 3:
- OUT_RING(MI_DISPLAY_FLIP_I915 |
- MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
- OUT_RING(fb->pitch);
- OUT_RING(obj->gtt_offset + offset);
- OUT_RING(MI_NOOP);
- break;
-
- case 4:
- case 5:
- /* i965+ uses the linear or tiled offsets from the
- * Display Registers (which do not change across a page-flip)
- * so we need only reprogram the base address.
- */
- OUT_RING(MI_DISPLAY_FLIP |
- MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
- OUT_RING(fb->pitch);
- OUT_RING(obj->gtt_offset | obj->tiling_mode);
-
- /* XXX Enabling the panel-fitter across page-flip is so far
- * untested on non-native modes, so ignore it for now.
- * pf = I915_READ(pipe == 0 ? PFA_CTL_1 : PFB_CTL_1) & PF_ENABLE;
- */
- pf = 0;
- pipesrc = I915_READ(PIPESRC(pipe)) & 0x0fff0fff;
- OUT_RING(pf | pipesrc);
- break;
-
- case 6:
- case 7:
- OUT_RING(MI_DISPLAY_FLIP |
- MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
- OUT_RING(fb->pitch | obj->tiling_mode);
- OUT_RING(obj->gtt_offset);
-
- pf = I915_READ(PF_CTL(pipe)) & PF_ENABLE;
- pipesrc = I915_READ(PIPESRC(pipe)) & 0x0fff0fff;
- OUT_RING(pf | pipesrc);
- break;
- }
- ADVANCE_LP_RING();
-
mutex_unlock(&dev->struct_mutex);
trace_i915_flip_request(intel_crtc->plane, obj);
@@ -7657,6 +7729,28 @@ static void intel_init_display(struct drm_device *dev)
else
dev_priv->display.get_fifo_size = i830_get_fifo_size;
}
+
+ /* Default just returns -ENODEV to indicate unsupported */
+ dev_priv->display.queue_flip = intel_default_queue_flip;
+
+ switch (INTEL_INFO(dev)->gen) {
+ case 2:
+ dev_priv->display.queue_flip = intel_gen2_queue_flip;
+ break;
+
+ case 3:
+ dev_priv->display.queue_flip = intel_gen3_queue_flip;
+ break;
+
+ case 4:
+ case 5:
+ dev_priv->display.queue_flip = intel_gen4_queue_flip;
+ break;
+
+ case 6:
+ dev_priv->display.queue_flip = intel_gen6_queue_flip;
+ break;
+ }
}
/*
--
1.7.4.1
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