* RE: [PATCH v2 0/2] ARM: Samsung: Add basic device tree support for Exynos4 boards
From: Kukjin Kim @ 2011-11-02 12:45 UTC (permalink / raw)
To: 'Thomas Abraham', devicetree-discuss, linux-samsung-soc
Cc: grant.likely, rob.herring, arnd, linux-arm-kernel
In-Reply-To: <1320109613-2811-1-git-send-email-thomas.abraham@linaro.org>
Thomas Abraham wrote:
>
> Changes since v1:
> - Removed unique per-controller compatible string value from gpio
controller
> nodes
> to align with the updated device tree support for exynos4 gpio
controller.
> - Removed the interrupt combiner controller node.
>
> This patchset adds a new basic device tree enabled machine/board file
which is
> based on the Samsung's Exynos4 family of SoC's. Also included in this
patchset
> is the
> dts file for Exynos4210 SoC, Samsung's SMDKV310 board and Insignal's
Origen
> board.
>
> The Exynos4210 dts file includes support for IRQ, GPIO, WDT, RTC, UART,
SDHCI,
> Keypad,
> DMA and I2C controllers. As device tree coverage for Exynos4210 increases,
> additional
> device nodes to represent the controllers should be added.
>
> The device tree enabled machine file enables boot on two boards based on
the
> Exynos4210 SoC. This provides a starting point to add additional device
tree
> support
> on these boards, migrate other existing Exynos4 based boards to use device
tree
> and enable device tree based boot on new upcoming boards.
>
> This patchset has been tested on the following tree:
> git://git.linaro.org/git/people/arnd/arm-soc.git branch: for-next
>
> Thomas Abraham (2):
> ARM: Samsung: Add Exynos4 device tree enabled board file
> ARM: dts: Add intial dts file for Exynos4210 SoC, SMDKV310 and Origen
board
>
> .../devicetree/bindings/arm/insignal-boards.txt | 8 +
> .../devicetree/bindings/arm/samsung-boards.txt | 8 +
> arch/arm/boot/dts/exynos4210-origen.dts | 137 +++++++
> arch/arm/boot/dts/exynos4210-smdkv310.dts | 182 +++++++++
> arch/arm/boot/dts/exynos4210.dtsi | 397
> ++++++++++++++++++++
> arch/arm/mach-exynos4/Kconfig | 14 +
> arch/arm/mach-exynos4/Makefile | 2 +
> arch/arm/mach-exynos4/mach-exynos4-dt.c | 85 +++++
> 8 files changed, 833 insertions(+), 0 deletions(-)
> create mode 100644
Documentation/devicetree/bindings/arm/insignal-boards.txt
> create mode 100644
Documentation/devicetree/bindings/arm/samsung-boards.txt
> create mode 100644 arch/arm/boot/dts/exynos4210-origen.dts
> create mode 100644 arch/arm/boot/dts/exynos4210-smdkv310.dts
> create mode 100644 arch/arm/boot/dts/exynos4210.dtsi
> create mode 100644 arch/arm/mach-exynos4/mach-exynos4-dt.c
OK. replaced with this in next-samsung-dt branch.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [PATCH v2 0/2] ARM: Samsung: Add basic device tree support for Exynos4 boards
From: Kukjin Kim @ 2011-11-02 12:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320109613-2811-1-git-send-email-thomas.abraham@linaro.org>
Thomas Abraham wrote:
>
> Changes since v1:
> - Removed unique per-controller compatible string value from gpio
controller
> nodes
> to align with the updated device tree support for exynos4 gpio
controller.
> - Removed the interrupt combiner controller node.
>
> This patchset adds a new basic device tree enabled machine/board file
which is
> based on the Samsung's Exynos4 family of SoC's. Also included in this
patchset
> is the
> dts file for Exynos4210 SoC, Samsung's SMDKV310 board and Insignal's
Origen
> board.
>
> The Exynos4210 dts file includes support for IRQ, GPIO, WDT, RTC, UART,
SDHCI,
> Keypad,
> DMA and I2C controllers. As device tree coverage for Exynos4210 increases,
> additional
> device nodes to represent the controllers should be added.
>
> The device tree enabled machine file enables boot on two boards based on
the
> Exynos4210 SoC. This provides a starting point to add additional device
tree
> support
> on these boards, migrate other existing Exynos4 based boards to use device
tree
> and enable device tree based boot on new upcoming boards.
>
> This patchset has been tested on the following tree:
> git://git.linaro.org/git/people/arnd/arm-soc.git branch: for-next
>
> Thomas Abraham (2):
> ARM: Samsung: Add Exynos4 device tree enabled board file
> ARM: dts: Add intial dts file for Exynos4210 SoC, SMDKV310 and Origen
board
>
> .../devicetree/bindings/arm/insignal-boards.txt | 8 +
> .../devicetree/bindings/arm/samsung-boards.txt | 8 +
> arch/arm/boot/dts/exynos4210-origen.dts | 137 +++++++
> arch/arm/boot/dts/exynos4210-smdkv310.dts | 182 +++++++++
> arch/arm/boot/dts/exynos4210.dtsi | 397
> ++++++++++++++++++++
> arch/arm/mach-exynos4/Kconfig | 14 +
> arch/arm/mach-exynos4/Makefile | 2 +
> arch/arm/mach-exynos4/mach-exynos4-dt.c | 85 +++++
> 8 files changed, 833 insertions(+), 0 deletions(-)
> create mode 100644
Documentation/devicetree/bindings/arm/insignal-boards.txt
> create mode 100644
Documentation/devicetree/bindings/arm/samsung-boards.txt
> create mode 100644 arch/arm/boot/dts/exynos4210-origen.dts
> create mode 100644 arch/arm/boot/dts/exynos4210-smdkv310.dts
> create mode 100644 arch/arm/boot/dts/exynos4210.dtsi
> create mode 100644 arch/arm/mach-exynos4/mach-exynos4-dt.c
OK. replaced with this in next-samsung-dt branch.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* RE: Exynos4: Enable device tree support for GIC controller
From: Kukjin Kim @ 2011-11-02 12:44 UTC (permalink / raw)
To: 'Thomas Abraham', devicetree-discuss
Cc: linux-samsung-soc, grant.likely, rob.herring, arnd,
linux-arm-kernel
In-Reply-To: <1320109289-2730-1-git-send-email-thomas.abraham@linaro.org>
Thomas Abraham wrote:
>
> Changes since v1:
> - Dropped device tree support for interrupt combiner controller from this
patchset.
> Some rework in the interrupt combiner controller code is required to
address
> the irq domain related comments from Grant Likely and hence those
changes will
> be in another patchset.
> - As suggested by Grant Likely, linux virq number 0 is left unused.
>
> This patchset adds device tree support for GIC controller in Exynos4 SoC.
>
> Patch 1 moves the statically mapped timer irqs 11 to 15 to the end of the
> statically mapped linux irq space for Exynos4 platforms.
>
> For Exynos4 platforms, the five hardware timer irqs are connected to GIC
> at some hardware irq number (in exynos it is GIC_ID 69 to 73 for five
timers).
> When any of these hardware interrupt occurs, its interrupt handler calls
> generic_handle_irq() with linux irq number 11/12/13/14/15 for timer
0/1/2/3/4
> as the parameter. The code that needs to be notified about the timer
interrupts
> would have already registered its handler for either of the interrupts 11
to 15.
>
> Instead of using linux irq number 11 to 15 to which consumers of timer
interrupt
> attach their handler, this interrupt range is moved to the end of linux
irq
> space used. So there will be no interrupts statically mapped between 0 to
31.
>
> The GIC hardware interrupts, which were previously statically mapped to
> start from linux irq 32 are now moved to start from linux irq 0. In case
of
> exynos, GIC_ID[0] (which is SGI[0]) which was previously at linux irq 32,
will
> not be at linux irq 0. This was required to use Rob Herring's GIC OF
bindings
> patches for Exynos4.
>
> Patch 2 adds a interceptor for all ioremap calls targeted towards any of
the
> statically remapped memory region. This was required because the GIC OF
> binding's patchset ioremaps the GIC memory-mapped regions in the
gic_of_init()
> function. Without this patch, there would be two separate remap for GIC
> controller, one statically remapped and the other dynamically remapped by
the
> gic_of_init() function. The patch will eventually be superseded by Nicolas
> Pitre's vmalloc patch series.
>
> Patch 3 adds device tree support for GIC controllers on Exynos4. For GIC
> controller, this patch is based on Rob Herring's,
> "[PATCH 0/3] GIC OF bindings" patchset.
>
> This patchset is based on the following tree:
> git://git.linaro.org/git/people/arnd/arm-soc.git branch: for-next
>
> Thomas Abraham (3):
> ARM: Exynos4: Move timer irq numbers to end of linux irq space
> ARM: Exynos4: Add ioremap interceptor for statically remapped regions
> ARM: Exynos4: Enable conversion of GIC dt irq specifier to linux virq
>
> arch/arm/mach-exynos4/cpu.c | 33
> +++++++++++++++++++++-
> arch/arm/mach-exynos4/include/mach/entry-macro.S | 1 -
> arch/arm/mach-exynos4/include/mach/io.h | 5 +++
> arch/arm/mach-exynos4/include/mach/irqs.h | 8 +++--
> arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 +
> arch/arm/mach-s5pc100/include/mach/irqs.h | 2 +
> arch/arm/mach-s5pv210/include/mach/irqs.h | 2 +
> arch/arm/plat-samsung/include/plat/irqs.h | 3 +-
> 8 files changed, 50 insertions(+), 6 deletions(-)
Looks ok to me, I replaced previous patches with this series.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* Exynos4: Enable device tree support for GIC controller
From: Kukjin Kim @ 2011-11-02 12:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320109289-2730-1-git-send-email-thomas.abraham@linaro.org>
Thomas Abraham wrote:
>
> Changes since v1:
> - Dropped device tree support for interrupt combiner controller from this
patchset.
> Some rework in the interrupt combiner controller code is required to
address
> the irq domain related comments from Grant Likely and hence those
changes will
> be in another patchset.
> - As suggested by Grant Likely, linux virq number 0 is left unused.
>
> This patchset adds device tree support for GIC controller in Exynos4 SoC.
>
> Patch 1 moves the statically mapped timer irqs 11 to 15 to the end of the
> statically mapped linux irq space for Exynos4 platforms.
>
> For Exynos4 platforms, the five hardware timer irqs are connected to GIC
> at some hardware irq number (in exynos it is GIC_ID 69 to 73 for five
timers).
> When any of these hardware interrupt occurs, its interrupt handler calls
> generic_handle_irq() with linux irq number 11/12/13/14/15 for timer
0/1/2/3/4
> as the parameter. The code that needs to be notified about the timer
interrupts
> would have already registered its handler for either of the interrupts 11
to 15.
>
> Instead of using linux irq number 11 to 15 to which consumers of timer
interrupt
> attach their handler, this interrupt range is moved to the end of linux
irq
> space used. So there will be no interrupts statically mapped between 0 to
31.
>
> The GIC hardware interrupts, which were previously statically mapped to
> start from linux irq 32 are now moved to start from linux irq 0. In case
of
> exynos, GIC_ID[0] (which is SGI[0]) which was previously at linux irq 32,
will
> not be at linux irq 0. This was required to use Rob Herring's GIC OF
bindings
> patches for Exynos4.
>
> Patch 2 adds a interceptor for all ioremap calls targeted towards any of
the
> statically remapped memory region. This was required because the GIC OF
> binding's patchset ioremaps the GIC memory-mapped regions in the
gic_of_init()
> function. Without this patch, there would be two separate remap for GIC
> controller, one statically remapped and the other dynamically remapped by
the
> gic_of_init() function. The patch will eventually be superseded by Nicolas
> Pitre's vmalloc patch series.
>
> Patch 3 adds device tree support for GIC controllers on Exynos4. For GIC
> controller, this patch is based on Rob Herring's,
> "[PATCH 0/3] GIC OF bindings" patchset.
>
> This patchset is based on the following tree:
> git://git.linaro.org/git/people/arnd/arm-soc.git branch: for-next
>
> Thomas Abraham (3):
> ARM: Exynos4: Move timer irq numbers to end of linux irq space
> ARM: Exynos4: Add ioremap interceptor for statically remapped regions
> ARM: Exynos4: Enable conversion of GIC dt irq specifier to linux virq
>
> arch/arm/mach-exynos4/cpu.c | 33
> +++++++++++++++++++++-
> arch/arm/mach-exynos4/include/mach/entry-macro.S | 1 -
> arch/arm/mach-exynos4/include/mach/io.h | 5 +++
> arch/arm/mach-exynos4/include/mach/irqs.h | 8 +++--
> arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 +
> arch/arm/mach-s5pc100/include/mach/irqs.h | 2 +
> arch/arm/mach-s5pv210/include/mach/irqs.h | 2 +
> arch/arm/plat-samsung/include/plat/irqs.h | 3 +-
> 8 files changed, 50 insertions(+), 6 deletions(-)
Looks ok to me, I replaced previous patches with this series.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* Re: [GIT PULL] Queue free fix (was Re: [PATCH] block: Free queue resources at blk_release_queue())
From: Hannes Reinecke @ 2011-11-02 12:44 UTC (permalink / raw)
To: Jun'ichi Nomura
Cc: Heiko Carstens, James Bottomley, Steffen Maier,
linux-scsi@vger.kernel.org, Jens Axboe, Linux Kernel, Alan Stern,
Thadeu Lima de Souza Cascardo, Taraka R. Bodireddy,
Seshagiri N. Ippili, Manvanthara B. Puttashankar, Jeff Moyer,
Shaohua Li, Mike Snitzer, gmuelas
In-Reply-To: <4EB13972.30308@ce.jp.nec.com>
On 11/02/2011 01:37 PM, Jun'ichi Nomura wrote:
> On 10/31/11 22:00, Heiko Carstens wrote:
>> On Mon, Oct 31, 2011 at 08:46:06PM +0900, Jun'ichi Nomura wrote:
>>> Hm, dm_softirq_done is generic completion code of original
>>> request in dm-multipath.
>>> So oops here might be another manifestation of use-after-free.
>>>
>>> Do you always hit the oops at the same address?
>>
>> I think we saw this bug the first time. But before that the scsi
>> logging level was higher. Gonzalo is trying to recreate it with
>> the same (old) scsi logging level.
>> Afterwards we will try with barrier=0.
>>
>> Both on v3.0.7 btw.
>>
>>> Could you find corresponding source code line for
>>> the crashed address, dm_softirq_done+0x72/0x140,
>>> and which pointer was invalid?
>>
>> It crashes in the inlined function dm_done() when trying to
>> dereference tio (aka clone->end_io_data):
>>
>> static void dm_done(struct request *clone, int error, bool mapped)
>> {
>> int r = error;
>> struct dm_rq_target_io *tio = clone->end_io_data;
>> dm_request_endio_fn rq_end_io = tio->ti->type->rq_end_io;
>
> Thank you. But, hmm. I have no idea about scenario.
>
> struct dm_rq_target_io is a container of clone request
> and clone->end_io_data points to its container.
>
> struct dm_rq_target_io {
> struct mapped_device *md;
> struct dm_target *ti;
> struct request *orig, clone;
> int error;
> union map_info info;
> };
>
> If clone can be dereferenced, clone->end_io_data should be, too.
>
Well, actually it _always_ can be dereferenced.
At the very least we'd need to do an integrity check, ie
if the pointer 'clone->end_io_data' is indeed of the
required type.
More to the point, the end_io_data pointer could've been
assigned to something else; so even though the pointer is set
(which we don't check, either), it might not be pointing
to a 'struct dm_rq_target_io'.
Cheers,
Hannes
--
Dr. Hannes Reinecke zSeries & Storage
hare@suse.de +49 911 74053 688
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: J. Hawn, J. Guild, F. Imendörffer, HRB 16746 (AG Nürnberg)
^ permalink raw reply
* Re: [GIT PULL] Queue free fix (was Re: [PATCH] block: Free queue resources at blk_release_queue())
From: Hannes Reinecke @ 2011-11-02 12:44 UTC (permalink / raw)
To: Jun'ichi Nomura
Cc: Heiko Carstens, James Bottomley, Steffen Maier,
linux-scsi@vger.kernel.org, Jens Axboe, Linux Kernel, Alan Stern,
Thadeu Lima de Souza Cascardo, Taraka R. Bodireddy,
Seshagiri N. Ippili, Manvanthara B. Puttashankar, Jeff Moyer,
Shaohua Li, Mike Snitzer, gmuelas
In-Reply-To: <4EB13972.30308@ce.jp.nec.com>
On 11/02/2011 01:37 PM, Jun'ichi Nomura wrote:
> On 10/31/11 22:00, Heiko Carstens wrote:
>> On Mon, Oct 31, 2011 at 08:46:06PM +0900, Jun'ichi Nomura wrote:
>>> Hm, dm_softirq_done is generic completion code of original
>>> request in dm-multipath.
>>> So oops here might be another manifestation of use-after-free.
>>>
>>> Do you always hit the oops at the same address?
>>
>> I think we saw this bug the first time. But before that the scsi
>> logging level was higher. Gonzalo is trying to recreate it with
>> the same (old) scsi logging level.
>> Afterwards we will try with barrier=0.
>>
>> Both on v3.0.7 btw.
>>
>>> Could you find corresponding source code line for
>>> the crashed address, dm_softirq_done+0x72/0x140,
>>> and which pointer was invalid?
>>
>> It crashes in the inlined function dm_done() when trying to
>> dereference tio (aka clone->end_io_data):
>>
>> static void dm_done(struct request *clone, int error, bool mapped)
>> {
>> int r = error;
>> struct dm_rq_target_io *tio = clone->end_io_data;
>> dm_request_endio_fn rq_end_io = tio->ti->type->rq_end_io;
>
> Thank you. But, hmm. I have no idea about scenario.
>
> struct dm_rq_target_io is a container of clone request
> and clone->end_io_data points to its container.
>
> struct dm_rq_target_io {
> struct mapped_device *md;
> struct dm_target *ti;
> struct request *orig, clone;
> int error;
> union map_info info;
> };
>
> If clone can be dereferenced, clone->end_io_data should be, too.
>
Well, actually it _always_ can be dereferenced.
At the very least we'd need to do an integrity check, ie
if the pointer 'clone->end_io_data' is indeed of the
required type.
More to the point, the end_io_data pointer could've been
assigned to something else; so even though the pointer is set
(which we don't check, either), it might not be pointing
to a 'struct dm_rq_target_io'.
Cheers,
Hannes
--
Dr. Hannes Reinecke zSeries & Storage
hare@suse.de +49 911 74053 688
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: J. Hawn, J. Guild, F. Imendörffer, HRB 16746 (AG Nürnberg)
--
To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [Qemu-devel] [PULL] Virtfs update
From: Anthony Liguori @ 2011-11-02 12:42 UTC (permalink / raw)
To: Aneesh Kumar K.V; +Cc: QEMU Developers
In-Reply-To: <87aa8ehlih.fsf@linux.vnet.ibm.com>
On 11/02/2011 05:22 AM, Aneesh Kumar K.V wrote:
>
> The following changes since commit e072ea2fd8fdceef64159b9596d3c15ce01bea91:
>
> Bump version to 1.0-rc0 (2011-11-01 19:37:01 -0500)
>
> are available in the git repository at:
> git://repo.or.cz/qemu/v9fs.git for-upstream-8
>
> Aneesh Kumar K.V (1):
> hw/9pfs: Move opt validation to FsDriver callback
>
> Stefan Hajnoczi (1):
> hw/9pfs: use g_vasprintf() instead of rolling our own
Neither of these look like bug fixes to me.
Regards,
Anthony Liguori
>
> fsdev/file-op-9p.h | 15 ++++++-
> fsdev/qemu-fsdev.c | 44 +++----------------
> fsdev/qemu-fsdev.h | 10 ----
> hw/9pfs/virtio-9p-device.c | 13 +++--
> hw/9pfs/virtio-9p-handle.c | 20 +++++++++
> hw/9pfs/virtio-9p-local.c | 34 ++++++++++++++
> hw/9pfs/virtio-9p.c | 103 ++------------------------------------------
> vl.c | 8 +---
> 8 files changed, 87 insertions(+), 160 deletions(-)
^ permalink raw reply
* [PATCH 5/5] EXYNOS4210: Add support ASV feature
From: Kukjin Kim @ 2011-11-02 12:43 UTC (permalink / raw)
To: linux-samsung-soc, cpufreq
Cc: davej, 'Jaecheol Lee', 'Kukjin Kim'
From: Jaecheol Lee <jc.lee@samsung.com>
This patch adds support ASV on Exynos4210. Exynos4 CPUFREQ
driver uses Adaptive Supply Voltage to configure voltage table.
Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
---
arch/arm/mach-exynos4/include/mach/cpufreq.h | 7 +++
drivers/cpufreq/exynos4210-cpufreq.c | 76
+++++++++++++++++---------
2 files changed, 57 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-exynos4/include/mach/cpufreq.h
b/arch/arm/mach-exynos4/include/mach/cpufreq.h
index 7e00931..16bb3e9 100644
--- a/arch/arm/mach-exynos4/include/mach/cpufreq.h
+++ b/arch/arm/mach-exynos4/include/mach/cpufreq.h
@@ -37,3 +37,10 @@ enum cpufreq_lock_ID {
int exynos4_cpufreq_lock(unsigned int nId,
enum cpufreq_level_request cpufreq_level);
void exynos4_cpufreq_lock_free(unsigned int nId);
+
+#define SUPPORT_1400MHZ (1 << 31)
+#define SUPPORT_1200MHZ (1 << 30)
+#define SUPPORT_1000MHZ (1 << 29)
+
+#define SUPPORT_FREQ_SHIFT 29
+#define SUPPORT_FREQ_MASK 7
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c
b/drivers/cpufreq/exynos4210-cpufreq.c
index 30e1949..8dcd9b1 100644
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ b/drivers/cpufreq/exynos4210-cpufreq.c
@@ -60,6 +60,8 @@ static struct cpufreq_frequency_table exynos4_freq_table[]
= {
{0, CPUFREQ_TABLE_END},
};
+static unsigned int exynos4_volt_table[CPUFREQ_LEVEL_END];
+
/* This defines are for cpufreq lock */
#define CPUFREQ_MIN_LEVEL (CPUFREQ_LEVEL_END - 1)
unsigned int cpufreq_lock_id;
@@ -111,30 +113,6 @@ static unsigned int clkdiv_cpu1[CPUFREQ_LEVEL_END][2] =
{
{ 3, 0 },
};
-struct cpufreq_voltage_table {
- unsigned int index; /* any */
- unsigned int arm_volt; /* uV */
-};
-
-static struct cpufreq_voltage_table exynos4_volt_table[CPUFREQ_LEVEL_END] =
{
- {
- .index = L0,
- .arm_volt = 1350000,
- }, {
- .index = L1,
- .arm_volt = 1300000,
- }, {
- .index = L2,
- .arm_volt = 1200000,
- }, {
- .index = L3,
- .arm_volt = 1100000,
- }, {
- .index = L4,
- .arm_volt = 1050000,
- },
-};
-
static unsigned int exynos4_apll_pms_table[CPUFREQ_LEVEL_END] = {
/* APLL FOUT L0: 1200MHz */
((150 << 16) | (3 << 8) | 1),
@@ -152,6 +130,26 @@ static unsigned int
exynos4_apll_pms_table[CPUFREQ_LEVEL_END] = {
((200 << 16) | (6 << 8) | 3),
};
+/*
+ * ASV group voltage table
+ */
+static const unsigned int asv_voltage[CPUFREQ_LEVEL_END][8] = {
+ /*
+ * SS, A1, A2, B1, B2, C1, C2, D
+ * @1200 :
+ * @1000 :
+ * @800 : ASV_VOLTAGE_TABLE
+ * @500 :
+ * @200 :
+ */
+ { 1350000, 1350000, 1300000, 1275000, 1250000, 1225000, 1200000,
1175000 },
+ { 1300000, 1250000, 1200000, 1175000, 1150000, 1125000, 1100000,
1075000 },
+ { 1200000, 1150000, 1100000, 1075000, 1050000, 1025000, 1000000,
975000 },
+ { 1100000, 1050000, 1000000, 975000, 975000, 950000, 925000, 925000
},
+ { 1050000, 1000000, 975000, 950000, 950000, 925000, 925000, 925000
},
+
+};
+
static int exynos4_verify_speed(struct cpufreq_policy *policy)
{
return cpufreq_frequency_table_verify(policy, exynos4_freq_table);
@@ -312,7 +310,7 @@ static int exynos4_target(struct cpufreq_policy *policy,
}
/* get the voltage value */
- arm_volt = exynos4_volt_table[index].arm_volt;
+ arm_volt = exynos4_volt_table[index];
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
@@ -392,7 +390,7 @@ int exynos4_cpufreq_lock(unsigned int id,
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
/* get the voltage value */
- arm_volt = exynos4_volt_table[cpufreq_level].arm_volt;
+ arm_volt = exynos4_volt_table[cpufreq_level];
regulator_set_voltage(arm_regulator, arm_volt,
arm_volt);
@@ -518,11 +516,37 @@ static struct cpufreq_driver exynos4_driver = {
#endif
};
+static void __init set_volt_table(void)
+{
+ unsigned int tmp, i, asv_group = 0;
+
+ tmp = __raw_readl(S5P_INFORM2);
+
+ switch (tmp & (SUPPORT_FREQ_MASK << SUPPORT_FREQ_SHIFT)) {
+ case SUPPORT_1200MHZ:
+ asv_group = (tmp & 0xF);
+ break;
+ case SUPPORT_1400MHZ:
+ case SUPPORT_1000MHZ:
+ default:
+ /* Not supported and assign typical ASV group */
+ asv_group = 2;
+ break;
+ }
+
+ printk(KERN_INFO "DVFS: VDD_ARM Voltage table set with %d Group\n",
asv_group);
+
+ for (i = 0 ; i < CPUFREQ_LEVEL_END ; i++)
+ exynos4_volt_table[i] = asv_voltage[i][asv_group];
+}
+
static int __init exynos4_cpufreq_init(void)
{
int i;
unsigned int tmp;
+ set_volt_table();
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
--
1.7.1
^ permalink raw reply related
* [PATCH 4/5] [CPUFREQ] EXYNOS4210: Add DVS lock feature for other driver
From: Kukjin Kim @ 2011-11-02 12:43 UTC (permalink / raw)
To: linux-samsung-soc, cpufreq
Cc: davej, 'Jongpill Lee', 'SangWook Ju',
'Jonghwan Choi', 'Jaecheol Lee',
'Kukjin Kim'
From: Jongpill Lee <boyko.lee@samsung.com>
This patch adds DVS lock feature for other driver and pm/
reboot notifier to enhance stability.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: SangWook Ju <sw.ju@samsung.com>
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
---
arch/arm/mach-exynos4/include/mach/cpufreq.h | 39 ++++++
drivers/cpufreq/exynos4210-cpufreq.c | 174
+++++++++++++++++++++++++-
2 files changed, 207 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/mach-exynos4/include/mach/cpufreq.h
diff --git a/arch/arm/mach-exynos4/include/mach/cpufreq.h
b/arch/arm/mach-exynos4/include/mach/cpufreq.h
new file mode 100644
index 0000000..7e00931
--- /dev/null
+++ b/arch/arm/mach-exynos4/include/mach/cpufreq.h
@@ -0,0 +1,39 @@
+/* linux/arch/arm/mach-exynos4/include/mach/cpufreq.h
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * EXYNOS4 - CPUFreq support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * CPU frequency level index for using cpufreq lock API
+ * This should be same with cpufreq_frequency_table
+ */
+enum cpufreq_level_request {
+ CPU_L0, /* 1200MHz */
+ CPU_L1, /* 1000MHz */
+ CPU_L2, /* 800MHz */
+ CPU_L3, /* 500MHz */
+ CPU_L4, /* 200MHz */
+ CPU_LEVEL_END,
+};
+
+enum cpufreq_lock_ID {
+ DVFS_LOCK_ID_G2D, /* G2D */
+ DVFS_LOCK_ID_TV, /* TV */
+ DVFS_LOCK_ID_MFC, /* MFC */
+ DVFS_LOCK_ID_USB, /* USB */
+ DVFS_LOCK_ID_CAM, /* CAM */
+ DVFS_LOCK_ID_PM, /* PM */
+ DVFS_LOCK_ID_USER, /* USER */
+ DVFS_LOCK_ID_END,
+};
+
+int exynos4_cpufreq_lock(unsigned int nId,
+ enum cpufreq_level_request cpufreq_level);
+void exynos4_cpufreq_lock_free(unsigned int nId);
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c
b/drivers/cpufreq/exynos4210-cpufreq.c
index 246f9e2..30e1949 100644
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ b/drivers/cpufreq/exynos4210-cpufreq.c
@@ -17,14 +17,21 @@
#include <linux/slab.h>
#include <linux/regulator/consumer.h>
#include <linux/cpufreq.h>
+#include <linux/suspend.h>
+#include <linux/reboot.h>
#include <mach/map.h>
#include <mach/regs-clock.h>
#include <mach/regs-mem.h>
+#include <mach/cpufreq.h>
#include <plat/clock.h>
#include <plat/pm.h>
+static bool exynos4_cpufreq_init_done;
+static DEFINE_MUTEX(set_freq_lock);
+static DEFINE_MUTEX(set_cpu_freq_lock);
+
static struct clk *cpu_clk;
static struct clk *moutcore;
static struct clk *mout_mpll;
@@ -53,6 +60,12 @@ static struct cpufreq_frequency_table
exynos4_freq_table[] = {
{0, CPUFREQ_TABLE_END},
};
+/* This defines are for cpufreq lock */
+#define CPUFREQ_MIN_LEVEL (CPUFREQ_LEVEL_END - 1)
+unsigned int cpufreq_lock_id;
+unsigned int cpufreq_lock_val[DVFS_LOCK_ID_END];
+unsigned int cpufreq_lock_level = CPUFREQ_MIN_LEVEL;
+
static unsigned int clkdiv_cpu0[CPUFREQ_LEVEL_END][7] = {
/*
* Clock divider value for following
@@ -272,22 +285,31 @@ static int exynos4_target(struct cpufreq_policy
*policy,
{
unsigned int index, old_index;
unsigned int arm_volt;
+ int ret = 0;
+
+ mutex_lock(&set_freq_lock);
freqs.old = exynos4_getspeed(policy->cpu);
if (cpufreq_frequency_table_target(policy, exynos4_freq_table,
- freqs.old, relation, &old_index))
- return -EINVAL;
+ freqs.old, relation, &old_index))
{
+ ret = -EINVAL;
+ goto out;
+ }
if (cpufreq_frequency_table_target(policy, exynos4_freq_table,
- target_freq, relation, &index))
- return -EINVAL;
+ target_freq, relation, &index)) {
+ ret = -EINVAL;
+ goto out;
+ }
freqs.new = exynos4_freq_table[index].frequency;
freqs.cpu = policy->cpu;
- if (freqs.new == freqs.old)
- return 0;
+ if (freqs.new == freqs.old) {
+ ret = -EINVAL;
+ goto out;
+ }
/* get the voltage value */
arm_volt = exynos4_volt_table[index].arm_volt;
@@ -311,8 +333,98 @@ static int exynos4_target(struct cpufreq_policy
*policy,
regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
}
+out:
+ mutex_unlock(&set_freq_lock);
+
+ return ret;
+}
+
+atomic_t exynos4_cpufreq_lock_count;
+
+int exynos4_cpufreq_lock(unsigned int id,
+ enum cpufreq_level_request cpufreq_level)
+{
+ int i, old_idx = 0;
+ unsigned int freq_old, freq_new, arm_volt;
+
+ if (!exynos4_cpufreq_init_done)
+ return 0;
+
+ if (cpufreq_lock_id & (1 << id)) {
+ printk(KERN_ERR "%s:Device [%d] already locked cpufreq\n",
+ __func__, id);
+ return 0;
+ }
+ mutex_lock(&set_cpu_freq_lock);
+ cpufreq_lock_id |= (1 << id);
+ cpufreq_lock_val[id] = cpufreq_level;
+
+ /* If the requested cpufreq is higher than current min frequency */
+ if (cpufreq_level < cpufreq_lock_level)
+ cpufreq_lock_level = cpufreq_level;
+
+ mutex_unlock(&set_cpu_freq_lock);
+
+ /*
+ * If current frequency is lower than requested freq,
+ * it needs to update
+ */
+ mutex_lock(&set_freq_lock);
+ freq_old = exynos4_getspeed(0);
+ freq_new = exynos4_freq_table[cpufreq_level].frequency;
+ if (freq_old < freq_new) {
+ /* Find out current level index */
+ for (i = 0 ; i < CPUFREQ_LEVEL_END ; i++) {
+ if (freq_old == exynos4_freq_table[i].frequency) {
+ old_idx = exynos4_freq_table[i].index;
+ break;
+ } else if (i == (CPUFREQ_LEVEL_END - 1)) {
+ printk(KERN_ERR "%s: Level not found\n",
+ __func__);
+ mutex_unlock(&set_freq_lock);
+ return -EINVAL;
+ } else {
+ continue;
+ }
+ }
+ freqs.old = freq_old;
+ freqs.new = freq_new;
+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+ /* get the voltage value */
+ arm_volt = exynos4_volt_table[cpufreq_level].arm_volt;
+ regulator_set_voltage(arm_regulator, arm_volt,
+ arm_volt);
+
+ exynos4_set_frequency(old_idx, cpufreq_level);
+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+ }
+ mutex_unlock(&set_freq_lock);
+
return 0;
}
+EXPORT_SYMBOL_GPL(exynos4_cpufreq_lock);
+
+void exynos4_cpufreq_lock_free(unsigned int id)
+{
+ int i;
+
+ if (!exynos4_cpufreq_init_done)
+ return;
+
+ mutex_lock(&set_cpu_freq_lock);
+ cpufreq_lock_id &= ~(1 << id);
+ cpufreq_lock_val[id] = CPUFREQ_MIN_LEVEL;
+ cpufreq_lock_level = CPUFREQ_MIN_LEVEL;
+ if (cpufreq_lock_id) {
+ for (i = 0; i < DVFS_LOCK_ID_END; i++) {
+ if (cpufreq_lock_val[i] < cpufreq_lock_level)
+ cpufreq_lock_level = cpufreq_lock_val[i];
+ }
+ }
+ mutex_unlock(&set_cpu_freq_lock);
+}
+EXPORT_SYMBOL_GPL(exynos4_cpufreq_lock_free);
#ifdef CONFIG_PM
static int exynos4_cpufreq_suspend(struct cpufreq_policy *policy)
@@ -326,6 +438,31 @@ static int exynos4_cpufreq_resume(struct cpufreq_policy
*policy)
}
#endif
+static int exynos4_cpufreq_notifier_event(struct notifier_block *this,
+ unsigned long event, void *ptr)
+{
+ int ret;
+
+ switch (event) {
+ case PM_SUSPEND_PREPARE:
+ ret = exynos4_cpufreq_lock(DVFS_LOCK_ID_PM, CPU_L0);
+ if (ret < 0)
+ return NOTIFY_BAD;
+ pr_debug("PM_SUSPEND_PREPARE for CPUFREQ\n");
+ return NOTIFY_OK;
+ case PM_POST_RESTORE:
+ case PM_POST_SUSPEND:
+ pr_debug("PM_POST_SUSPEND for CPUFREQ\n");
+ exynos4_cpufreq_lock_free(DVFS_LOCK_ID_PM);
+ return NOTIFY_OK;
+ }
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block exynos4_cpufreq_notifier = {
+ .notifier_call = exynos4_cpufreq_notifier_event,
+};
+
static int exynos4_cpufreq_cpu_init(struct cpufreq_policy *policy)
{
policy->cur = policy->min = policy->max =
exynos4_getspeed(policy->cpu);
@@ -351,6 +488,23 @@ static int exynos4_cpufreq_cpu_init(struct
cpufreq_policy *policy)
return cpufreq_frequency_table_cpuinfo(policy, exynos4_freq_table);
}
+static int exynos4_cpufreq_reboot_notifier_call(struct notifier_block
*this,
+ unsigned long code, void *_cmd)
+{
+ int ret;
+
+ ret = exynos4_cpufreq_lock(DVFS_LOCK_ID_PM, CPU_L0);
+ if (ret < 0)
+ return NOTIFY_BAD;
+
+ printk(KERN_INFO "REBOOT Notifier for CPUFREQ\n");
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block exynos4_cpufreq_reboot_notifier = {
+ .notifier_call = exynos4_cpufreq_reboot_notifier_call,
+};
+
static struct cpufreq_driver exynos4_driver = {
.flags = CPUFREQ_STICKY,
.verify = exynos4_verify_speed,
@@ -391,6 +545,11 @@ static int __init exynos4_cpufreq_init(void)
goto err_vdd_arm;
}
+ register_pm_notifier(&exynos4_cpufreq_notifier);
+ register_reboot_notifier(&exynos4_cpufreq_reboot_notifier);
+
+ exynos4_cpufreq_init_done = true;
+
tmp = __raw_readl(S5P_CLKDIV_CPU);
for (i = L0; i < CPUFREQ_LEVEL_END; i++) {
@@ -420,6 +579,9 @@ static int __init exynos4_cpufreq_init(void)
return 0;
err_cpufreq:
+ unregister_reboot_notifier(&exynos4_cpufreq_reboot_notifier);
+ unregister_pm_notifier(&exynos4_cpufreq_notifier);
+
if (!IS_ERR(arm_regulator))
regulator_put(arm_regulator);
--
1.7.1
^ permalink raw reply related
* [PATCH 3/5] [CPUFREQ] EXYNOS4210: cpufreq code is changed for stable working
From: Kukjin Kim @ 2011-11-02 12:43 UTC (permalink / raw)
To: linux-samsung-soc, cpufreq
Cc: davej, 'Jongpill Lee', 'SangWook Ju',
'Jonghwan Choi', 'Jaecheol Lee',
'Kukjin Kim'
From: Jongpill Lee <boyko.lee@samsung.com>
This patch is modify code for stable working
1. Remove unused register access code
2. Change sequence for frequency changing
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: SangWook Ju <sw.ju@samsung.com>
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
---
drivers/cpufreq/exynos4210-cpufreq.c | 139
+++++++++++++++++++++------------
1 files changed, 88 insertions(+), 51 deletions(-)
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c
b/drivers/cpufreq/exynos4210-cpufreq.c
index 5ca9380..246f9e2 100644
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ b/drivers/cpufreq/exynos4210-cpufreq.c
@@ -34,10 +34,16 @@ static struct regulator *arm_regulator;
static struct cpufreq_freqs freqs;
+struct cpufreq_clkdiv {
+ unsigned int clkdiv;
+};
+
enum cpufreq_level_index {
L0, L1, L2, L3, L4, CPUFREQ_LEVEL_END,
};
+static struct cpufreq_clkdiv exynos4_clkdiv_table[CPUFREQ_LEVEL_END];
+
static struct cpufreq_frequency_table exynos4_freq_table[] = {
{L0, 1200*1000},
{L1, 1000*1000},
@@ -149,20 +155,7 @@ static void exynos4_set_clkdiv(unsigned int div_index)
/* Change Divider - CPU0 */
- tmp = __raw_readl(S5P_CLKDIV_CPU);
-
- tmp &= ~(S5P_CLKDIV_CPU0_CORE_MASK | S5P_CLKDIV_CPU0_COREM0_MASK |
- S5P_CLKDIV_CPU0_COREM1_MASK | S5P_CLKDIV_CPU0_PERIPH_MASK |
- S5P_CLKDIV_CPU0_ATB_MASK | S5P_CLKDIV_CPU0_PCLKDBG_MASK |
- S5P_CLKDIV_CPU0_APLL_MASK);
-
- tmp |= ((clkdiv_cpu0[div_index][0] << S5P_CLKDIV_CPU0_CORE_SHIFT) |
- (clkdiv_cpu0[div_index][1] << S5P_CLKDIV_CPU0_COREM0_SHIFT)
|
- (clkdiv_cpu0[div_index][2] << S5P_CLKDIV_CPU0_COREM1_SHIFT)
|
- (clkdiv_cpu0[div_index][3] << S5P_CLKDIV_CPU0_PERIPH_SHIFT)
|
- (clkdiv_cpu0[div_index][4] << S5P_CLKDIV_CPU0_ATB_SHIFT) |
- (clkdiv_cpu0[div_index][5] << S5P_CLKDIV_CPU0_PCLKDBG_SHIFT)
|
- (clkdiv_cpu0[div_index][6] << S5P_CLKDIV_CPU0_APLL_SHIFT));
+ tmp = exynos4_clkdiv_table[div_index].clkdiv;
__raw_writel(tmp, S5P_CLKDIV_CPU);
@@ -227,14 +220,12 @@ static void exynos4_set_frequency(unsigned int
old_index, unsigned int new_index
unsigned int tmp;
if (old_index > new_index) {
- /* The frequency changing to L0 needs to change apll */
- if (freqs.new == exynos4_freq_table[L0].frequency) {
- /* 1. Change the system clock divider values */
- exynos4_set_clkdiv(new_index);
-
- /* 2. Change the apll m,p,s value */
- exynos4_set_apll(new_index);
- } else {
+ /*
+ * L1/L3, L2/L4 Level change require
+ * to only change s divider value
+ */
+ if (((old_index == L3) && (new_index == L1)) ||
+ ((old_index == L4) && (new_index == L2))) {
/* 1. Change the system clock divider values */
exynos4_set_clkdiv(new_index);
@@ -243,18 +234,20 @@ static void exynos4_set_frequency(unsigned int
old_index, unsigned int new_index
tmp &= ~(0x7 << 0);
tmp |= (exynos4_apll_pms_table[new_index] & 0x7);
__raw_writel(tmp, S5P_APLL_CON0);
- }
- }
-
- else if (old_index < new_index) {
- /* The frequency changing from L0 needs to change apll */
- if (freqs.old == exynos4_freq_table[L0].frequency) {
- /* 1. Change the apll m,p,s value */
- exynos4_set_apll(new_index);
-
- /* 2. Change the system clock divider values */
- exynos4_set_clkdiv(new_index);
} else {
+ /* Clock Configuration Procedure */
+ /* 1. Change the system clock divider values */
+ exynos4_set_clkdiv(new_index);
+ /* 2. Change the apll m,p,s value */
+ exynos4_set_apll(new_index);
+ }
+ } else if (old_index < new_index) {
+ /*
+ * L1/L3, L2/L4 Level change require
+ * to only change s divider value
+ */
+ if (((old_index == L1) && (new_index == L3)) ||
+ ((old_index == L2) && (new_index == L4))) {
/* 1. Change just s value in apll m,p,s value */
tmp = __raw_readl(S5P_APLL_CON0);
tmp &= ~(0x7 << 0);
@@ -263,6 +256,12 @@ static void exynos4_set_frequency(unsigned int
old_index, unsigned int new_index
/* 2. Change the system clock divider values */
exynos4_set_clkdiv(new_index);
+ } else {
+ /* Clock Configuration Procedure */
+ /* 1. Change the apll m,p,s value */
+ exynos4_set_apll(new_index);
+ /* 2. Change the system clock divider values */
+ exynos4_set_clkdiv(new_index);
}
}
}
@@ -304,14 +303,14 @@ static int exynos4_target(struct cpufreq_policy
*policy,
/* Clock Configuration Procedure */
exynos4_set_frequency(old_index, index);
+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
/* control regulator */
if (freqs.new < freqs.old) {
/* Voltage down */
regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
}
- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-
return 0;
}
@@ -342,7 +341,12 @@ static int exynos4_cpufreq_cpu_init(struct
cpufreq_policy *policy)
* Each cpu is bound to the same speed.
* So the affected cpu is all of the cpus.
*/
- cpumask_setall(policy->cpus);
+ if (!cpu_online(1)) {
+ cpumask_copy(policy->related_cpus, cpu_possible_mask);
+ cpumask_copy(policy->cpus, cpu_online_mask);
+ } else {
+ cpumask_setall(policy->cpus);
+ }
return cpufreq_frequency_table_cpuinfo(policy, exynos4_freq_table);
}
@@ -362,47 +366,80 @@ static struct cpufreq_driver exynos4_driver = {
static int __init exynos4_cpufreq_init(void)
{
+ int i;
+ unsigned int tmp;
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
moutcore = clk_get(NULL, "moutcore");
if (IS_ERR(moutcore))
- goto out;
+ goto err_moutcore;
mout_mpll = clk_get(NULL, "mout_mpll");
if (IS_ERR(mout_mpll))
- goto out;
+ goto err_mout_mpll;
mout_apll = clk_get(NULL, "mout_apll");
if (IS_ERR(mout_apll))
- goto out;
+ goto err_mout_apll;
arm_regulator = regulator_get(NULL, "vdd_arm");
if (IS_ERR(arm_regulator)) {
printk(KERN_ERR "failed to get resource %s\n", "vdd_arm");
- goto out;
+ goto err_vdd_arm;
}
- return cpufreq_register_driver(&exynos4_driver);
+ tmp = __raw_readl(S5P_CLKDIV_CPU);
-out:
- if (!IS_ERR(cpu_clk))
- clk_put(cpu_clk);
+ for (i = L0; i < CPUFREQ_LEVEL_END; i++) {
+ tmp &= ~(S5P_CLKDIV_CPU0_CORE_MASK |
+ S5P_CLKDIV_CPU0_COREM0_MASK |
+ S5P_CLKDIV_CPU0_COREM1_MASK |
+ S5P_CLKDIV_CPU0_PERIPH_MASK |
+ S5P_CLKDIV_CPU0_ATB_MASK |
+ S5P_CLKDIV_CPU0_PCLKDBG_MASK |
+ S5P_CLKDIV_CPU0_APLL_MASK);
+
+ tmp |= ((clkdiv_cpu0[i][0] << S5P_CLKDIV_CPU0_CORE_SHIFT) |
+ (clkdiv_cpu0[i][1] << S5P_CLKDIV_CPU0_COREM0_SHIFT)
|
+ (clkdiv_cpu0[i][2] << S5P_CLKDIV_CPU0_COREM1_SHIFT)
|
+ (clkdiv_cpu0[i][3] << S5P_CLKDIV_CPU0_PERIPH_SHIFT)
|
+ (clkdiv_cpu0[i][4] << S5P_CLKDIV_CPU0_ATB_SHIFT) |
+ (clkdiv_cpu0[i][5] << S5P_CLKDIV_CPU0_PCLKDBG_SHIFT)
|
+ (clkdiv_cpu0[i][6] << S5P_CLKDIV_CPU0_APLL_SHIFT));
+
+ exynos4_clkdiv_table[i].clkdiv = tmp;
+ }
- if (!IS_ERR(moutcore))
- clk_put(moutcore);
+ if (cpufreq_register_driver(&exynos4_driver)) {
+ pr_err("failed to register cpufreq driver\n");
+ goto err_cpufreq;
+ }
- if (!IS_ERR(mout_mpll))
- clk_put(mout_mpll);
+ return 0;
+err_cpufreq:
+ if (!IS_ERR(arm_regulator))
+ regulator_put(arm_regulator);
+err_vdd_arm:
if (!IS_ERR(mout_apll))
clk_put(mout_apll);
- if (!IS_ERR(arm_regulator))
- regulator_put(arm_regulator);
+err_mout_apll:
+ if (!IS_ERR(mout_mpll))
+ clk_put(mout_mpll);
+
+err_mout_mpll:
+ if (!IS_ERR(moutcore))
+ clk_put(moutcore);
+
+err_moutcore:
+ if (!IS_ERR(cpu_clk))
+ clk_put(cpu_clk);
- printk(KERN_ERR "%s: failed initialization\n", __func__);
+ pr_debug("%s: failed initialization\n", __func__);
return -EINVAL;
}
--
1.7.1
^ permalink raw reply related
* [PATCH 2/5] EXYNOS4210: Update frequency table for cpu divider
From: Kukjin Kim @ 2011-11-02 12:42 UTC (permalink / raw)
To: linux-samsung-soc, cpufreq
Cc: davej, 'Jongpill Lee', 'SangWook Ju',
'Jaecheol Lee', 'Kukjin Kim'
From: Jongpill Lee <boyko.lee@samsung.com>
This patch is changes frequency table for cpu divider for stable frequency.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: SangWook Ju <sw.ju@samsung.com>
Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
drivers/cpufreq/exynos4210-cpufreq.c | 69
++++++++++++++++++++--------------
1 files changed, 41 insertions(+), 28 deletions(-)
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c
b/drivers/cpufreq/exynos4210-cpufreq.c
index 6ff3993..5ca9380 100644
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ b/drivers/cpufreq/exynos4210-cpufreq.c
@@ -35,14 +35,15 @@ static struct regulator *arm_regulator;
static struct cpufreq_freqs freqs;
enum cpufreq_level_index {
- L0, L1, L2, L3, CPUFREQ_LEVEL_END,
+ L0, L1, L2, L3, L4, CPUFREQ_LEVEL_END,
};
static struct cpufreq_frequency_table exynos4_freq_table[] = {
- {L0, 1000*1000},
- {L1, 800*1000},
- {L2, 400*1000},
- {L3, 100*1000},
+ {L0, 1200*1000},
+ {L1, 1000*1000},
+ {L2, 800*1000},
+ {L3, 500*1000},
+ {L4, 200*1000},
{0, CPUFREQ_TABLE_END},
};
@@ -53,17 +54,20 @@ static unsigned int clkdiv_cpu0[CPUFREQ_LEVEL_END][7] =
{
* DIVATB, DIVPCLK_DBG, DIVAPLL }
*/
- /* ARM L0: 1000MHz */
- { 0, 3, 7, 3, 3, 0, 1 },
+ /* ARM L0: 1200MHz */
+ { 0, 3, 7, 3, 4, 1, 7 },
- /* ARM L1: 800MHz */
- { 0, 3, 7, 3, 3, 0, 1 },
+ /* ARM L1: 1000MHz */
+ { 0, 3, 7, 3, 4, 1, 7 },
- /* ARM L2: 400MHz */
- { 0, 1, 3, 1, 3, 0, 1 },
+ /* ARM L2: 800MHz */
+ { 0, 3, 7, 3, 3, 1, 7 },
- /* ARM L3: 100MHz */
- { 0, 0, 1, 0, 3, 1, 1 },
+ /* ARM L3: 500MHz */
+ { 0, 3, 7, 3, 3, 1, 7 },
+
+ /* ARM L4: 200MHz */
+ { 0, 1, 3, 1, 3, 1, 0 },
};
static unsigned int clkdiv_cpu1[CPUFREQ_LEVEL_END][2] = {
@@ -72,16 +76,19 @@ static unsigned int clkdiv_cpu1[CPUFREQ_LEVEL_END][2] =
{
* { DIVCOPY, DIVHPM }
*/
- /* ARM L0: 1000MHz */
- { 3, 0 },
+ /* ARM L0: 1200MHz */
+ { 5, 0 },
+
+ /* ARM L1: 1000MHz */
+ { 4, 0 },
- /* ARM L1: 800MHz */
+ /* ARM L2: 800MHz */
{ 3, 0 },
- /* ARM L2: 400MHz */
+ /* ARM L3: 500MHz */
{ 3, 0 },
- /* ARM L3: 100MHz */
+ /* ARM L4: 200MHz */
{ 3, 0 },
};
@@ -93,31 +100,37 @@ struct cpufreq_voltage_table {
static struct cpufreq_voltage_table exynos4_volt_table[CPUFREQ_LEVEL_END] =
{
{
.index = L0,
- .arm_volt = 1200000,
+ .arm_volt = 1350000,
}, {
.index = L1,
- .arm_volt = 1100000,
+ .arm_volt = 1300000,
}, {
.index = L2,
- .arm_volt = 1000000,
+ .arm_volt = 1200000,
}, {
.index = L3,
- .arm_volt = 900000,
+ .arm_volt = 1100000,
+ }, {
+ .index = L4,
+ .arm_volt = 1050000,
},
};
static unsigned int exynos4_apll_pms_table[CPUFREQ_LEVEL_END] = {
- /* APLL FOUT L0: 1000MHz */
+ /* APLL FOUT L0: 1200MHz */
+ ((150 << 16) | (3 << 8) | 1),
+
+ /* APLL FOUT L1: 1000MHz */
((250 << 16) | (6 << 8) | 1),
- /* APLL FOUT L1: 800MHz */
+ /* APLL FOUT L2: 800MHz */
((200 << 16) | (6 << 8) | 1),
- /* APLL FOUT L2 : 400MHz */
- ((200 << 16) | (6 << 8) | 2),
+ /* APLL FOUT L3: 500MHz */
+ ((250 << 16) | (6 << 8) | 2),
- /* APLL FOUT L3: 100MHz */
- ((200 << 16) | (6 << 8) | 4),
+ /* APLL FOUT L4: 200MHz */
+ ((200 << 16) | (6 << 8) | 3),
};
static int exynos4_verify_speed(struct cpufreq_policy *policy)
--
1.7.1
^ permalink raw reply related
* [PATCH 1/5] [CPUFREQ] EXYNOS4210: Remove code about bus on cpufreq
From: Kukjin Kim @ 2011-11-02 12:42 UTC (permalink / raw)
To: linux-samsung-soc, cpufreq
Cc: davej, 'Jongpill Lee', 'SangWook Ju',
'Jaecheol Lee', 'Kukjin Kim'
From: Jongpill Lee <boyko.lee@samsung.com>
This patch removes code for bus on cpufreq because the code
for bus frequency changing moves to busfreq driver.
So code about bus on cpufreq is not necessary.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: SangWook Ju <sw.ju@samsung.com>
Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
drivers/cpufreq/exynos4210-cpufreq.c | 174
+---------------------------------
1 files changed, 1 insertions(+), 173 deletions(-)
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c
b/drivers/cpufreq/exynos4210-cpufreq.c
index b7c3a84..6ff3993 100644
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ b/drivers/cpufreq/exynos4210-cpufreq.c
@@ -31,16 +31,8 @@ static struct clk *mout_mpll;
static struct clk *mout_apll;
static struct regulator *arm_regulator;
-static struct regulator *int_regulator;
static struct cpufreq_freqs freqs;
-static unsigned int memtype;
-
-enum exynos4_memory_type {
- DDR2 = 4,
- LPDDR2,
- DDR3,
-};
enum cpufreq_level_index {
L0, L1, L2, L3, CPUFREQ_LEVEL_END,
@@ -93,87 +85,24 @@ static unsigned int clkdiv_cpu1[CPUFREQ_LEVEL_END][2] =
{
{ 3, 0 },
};
-static unsigned int clkdiv_dmc0[CPUFREQ_LEVEL_END][8] = {
- /*
- * Clock divider value for following
- * { DIVACP, DIVACP_PCLK, DIVDPHY, DIVDMC, DIVDMCD
- * DIVDMCP, DIVCOPY2, DIVCORE_TIMERS }
- */
-
- /* DMC L0: 400MHz */
- { 3, 1, 1, 1, 1, 1, 3, 1 },
-
- /* DMC L1: 400MHz */
- { 3, 1, 1, 1, 1, 1, 3, 1 },
-
- /* DMC L2: 266.7MHz */
- { 7, 1, 1, 2, 1, 1, 3, 1 },
-
- /* DMC L3: 200MHz */
- { 7, 1, 1, 3, 1, 1, 3, 1 },
-};
-
-static unsigned int clkdiv_top[CPUFREQ_LEVEL_END][5] = {
- /*
- * Clock divider value for following
- * { DIVACLK200, DIVACLK100, DIVACLK160, DIVACLK133, DIVONENAND }
- */
-
- /* ACLK200 L0: 200MHz */
- { 3, 7, 4, 5, 1 },
-
- /* ACLK200 L1: 200MHz */
- { 3, 7, 4, 5, 1 },
-
- /* ACLK200 L2: 160MHz */
- { 4, 7, 5, 7, 1 },
-
- /* ACLK200 L3: 133.3MHz */
- { 5, 7, 7, 7, 1 },
-};
-
-static unsigned int clkdiv_lr_bus[CPUFREQ_LEVEL_END][2] = {
- /*
- * Clock divider value for following
- * { DIVGDL/R, DIVGPL/R }
- */
-
- /* ACLK_GDL/R L0: 200MHz */
- { 3, 1 },
-
- /* ACLK_GDL/R L1: 200MHz */
- { 3, 1 },
-
- /* ACLK_GDL/R L2: 160MHz */
- { 4, 1 },
-
- /* ACLK_GDL/R L3: 133.3MHz */
- { 5, 1 },
-};
-
struct cpufreq_voltage_table {
unsigned int index; /* any */
unsigned int arm_volt; /* uV */
- unsigned int int_volt;
};
static struct cpufreq_voltage_table exynos4_volt_table[CPUFREQ_LEVEL_END] =
{
{
.index = L0,
.arm_volt = 1200000,
- .int_volt = 1100000,
}, {
.index = L1,
.arm_volt = 1100000,
- .int_volt = 1100000,
}, {
.index = L2,
.arm_volt = 1000000,
- .int_volt = 1000000,
}, {
.index = L3,
.arm_volt = 900000,
- .int_volt = 1000000,
},
};
@@ -242,80 +171,6 @@ static void exynos4_set_clkdiv(unsigned int div_index)
do {
tmp = __raw_readl(S5P_CLKDIV_STATCPU1);
} while (tmp & 0x11);
-
- /* Change Divider - DMC0 */
-
- tmp = __raw_readl(S5P_CLKDIV_DMC0);
-
- tmp &= ~(S5P_CLKDIV_DMC0_ACP_MASK | S5P_CLKDIV_DMC0_ACPPCLK_MASK |
- S5P_CLKDIV_DMC0_DPHY_MASK | S5P_CLKDIV_DMC0_DMC_MASK |
- S5P_CLKDIV_DMC0_DMCD_MASK | S5P_CLKDIV_DMC0_DMCP_MASK |
- S5P_CLKDIV_DMC0_COPY2_MASK | S5P_CLKDIV_DMC0_CORETI_MASK);
-
- tmp |= ((clkdiv_dmc0[div_index][0] << S5P_CLKDIV_DMC0_ACP_SHIFT) |
- (clkdiv_dmc0[div_index][1] << S5P_CLKDIV_DMC0_ACPPCLK_SHIFT)
|
- (clkdiv_dmc0[div_index][2] << S5P_CLKDIV_DMC0_DPHY_SHIFT) |
- (clkdiv_dmc0[div_index][3] << S5P_CLKDIV_DMC0_DMC_SHIFT) |
- (clkdiv_dmc0[div_index][4] << S5P_CLKDIV_DMC0_DMCD_SHIFT) |
- (clkdiv_dmc0[div_index][5] << S5P_CLKDIV_DMC0_DMCP_SHIFT) |
- (clkdiv_dmc0[div_index][6] << S5P_CLKDIV_DMC0_COPY2_SHIFT) |
- (clkdiv_dmc0[div_index][7] <<
S5P_CLKDIV_DMC0_CORETI_SHIFT));
-
- __raw_writel(tmp, S5P_CLKDIV_DMC0);
-
- do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_DMC0);
- } while (tmp & 0x11111111);
-
- /* Change Divider - TOP */
-
- tmp = __raw_readl(S5P_CLKDIV_TOP);
-
- tmp &= ~(S5P_CLKDIV_TOP_ACLK200_MASK | S5P_CLKDIV_TOP_ACLK100_MASK |
- S5P_CLKDIV_TOP_ACLK160_MASK | S5P_CLKDIV_TOP_ACLK133_MASK |
- S5P_CLKDIV_TOP_ONENAND_MASK);
-
- tmp |= ((clkdiv_top[div_index][0] << S5P_CLKDIV_TOP_ACLK200_SHIFT) |
- (clkdiv_top[div_index][1] << S5P_CLKDIV_TOP_ACLK100_SHIFT) |
- (clkdiv_top[div_index][2] << S5P_CLKDIV_TOP_ACLK160_SHIFT) |
- (clkdiv_top[div_index][3] << S5P_CLKDIV_TOP_ACLK133_SHIFT) |
- (clkdiv_top[div_index][4] << S5P_CLKDIV_TOP_ONENAND_SHIFT));
-
- __raw_writel(tmp, S5P_CLKDIV_TOP);
-
- do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_TOP);
- } while (tmp & 0x11111);
-
- /* Change Divider - LEFTBUS */
-
- tmp = __raw_readl(S5P_CLKDIV_LEFTBUS);
-
- tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK);
-
- tmp |= ((clkdiv_lr_bus[div_index][0] << S5P_CLKDIV_BUS_GDLR_SHIFT) |
- (clkdiv_lr_bus[div_index][1] << S5P_CLKDIV_BUS_GPLR_SHIFT));
-
- __raw_writel(tmp, S5P_CLKDIV_LEFTBUS);
-
- do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_LEFTBUS);
- } while (tmp & 0x11);
-
- /* Change Divider - RIGHTBUS */
-
- tmp = __raw_readl(S5P_CLKDIV_RIGHTBUS);
-
- tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK);
-
- tmp |= ((clkdiv_lr_bus[div_index][0] << S5P_CLKDIV_BUS_GDLR_SHIFT) |
- (clkdiv_lr_bus[div_index][1] << S5P_CLKDIV_BUS_GPLR_SHIFT));
-
- __raw_writel(tmp, S5P_CLKDIV_RIGHTBUS);
-
- do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_RIGHTBUS);
- } while (tmp & 0x11);
}
static void exynos4_set_apll(unsigned int index)
@@ -404,7 +259,7 @@ static int exynos4_target(struct cpufreq_policy *policy,
unsigned int relation)
{
unsigned int index, old_index;
- unsigned int arm_volt, int_volt;
+ unsigned int arm_volt;
freqs.old = exynos4_getspeed(policy->cpu);
@@ -424,7 +279,6 @@ static int exynos4_target(struct cpufreq_policy *policy,
/* get the voltage value */
arm_volt = exynos4_volt_table[index].arm_volt;
- int_volt = exynos4_volt_table[index].int_volt;
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
@@ -432,7 +286,6 @@ static int exynos4_target(struct cpufreq_policy *policy,
if (freqs.new > freqs.old) {
/* Voltage up */
regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
- regulator_set_voltage(int_regulator, int_volt, int_volt);
}
/* Clock Configuration Procedure */
@@ -442,7 +295,6 @@ static int exynos4_target(struct cpufreq_policy *policy,
if (freqs.new < freqs.old) {
/* Voltage down */
regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
- regulator_set_voltage(int_regulator, int_volt, int_volt);
}
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
@@ -519,27 +371,6 @@ static int __init exynos4_cpufreq_init(void)
goto out;
}
- int_regulator = regulator_get(NULL, "vdd_int");
- if (IS_ERR(int_regulator)) {
- printk(KERN_ERR "failed to get resource %s\n", "vdd_int");
- goto out;
- }
-
- /*
- * Check DRAM type.
- * Because DVFS level is different according to DRAM type.
- */
- memtype = __raw_readl(S5P_VA_DMC0 + S5P_DMC0_MEMCON_OFFSET);
- memtype = (memtype >> S5P_DMC0_MEMTYPE_SHIFT);
- memtype &= S5P_DMC0_MEMTYPE_MASK;
-
- if ((memtype < DDR2) && (memtype > DDR3)) {
- printk(KERN_ERR "%s: wrong memtype= 0x%x\n", __func__,
memtype);
- goto out;
- } else {
- printk(KERN_DEBUG "%s: memtype= 0x%x\n", __func__, memtype);
- }
-
return cpufreq_register_driver(&exynos4_driver);
out:
@@ -558,9 +389,6 @@ out:
if (!IS_ERR(arm_regulator))
regulator_put(arm_regulator);
- if (!IS_ERR(int_regulator))
- regulator_put(int_regulator);
-
printk(KERN_ERR "%s: failed initialization\n", __func__);
return -EINVAL;
--
1.7.1
^ permalink raw reply related
* Re: [PATCHv4 1/6] input/cma3000_d0x: Support devices without pdata
From: Ricardo Ribalda Delgado @ 2011-11-02 12:41 UTC (permalink / raw)
To: Grant Likely
Cc: dmitry.torokhov, sameo, peter.ujfalusi, jic23, aghayal, david,
Shubhrajyoti, saaguirre, hemanthv, linux-input, linux-kernel
In-Reply-To: <CACxGe6uAMugBRAqeN5D-HfX4G+DysLFjfp7=ZeC378cAdwOAwA@mail.gmail.com>
Hello Grant
Thanks for your feedback
>>> No of_device_id match table to match against compatible values?
>>
>> I think it is not needed, the device will be matched against the
>> driver cma3000_d0x_spi.c and AFAIK on the spi/i2c devices you dont
>> need the device_id match. But you know much more about this :). Can
>> you point me to a example where a spi driver uses of_device-id match.
>
> Use an of_device_id table. It's the right thing to do.
>
Can you point me to a file where of_device_id is used in a spi/i2c
driver? I thought that was only for mmaped drivers....
Thanks!
--
Ricardo Ribalda
^ permalink raw reply
* Re: [PATCHv4 1/6] input/cma3000_d0x: Support devices without pdata
From: Ricardo Ribalda Delgado @ 2011-11-02 12:41 UTC (permalink / raw)
To: Grant Likely
Cc: dmitry.torokhov, sameo, peter.ujfalusi, jic23, aghayal, david,
Shubhrajyoti, saaguirre, hemanthv, linux-input, linux-kernel
In-Reply-To: <CACxGe6uAMugBRAqeN5D-HfX4G+DysLFjfp7=ZeC378cAdwOAwA@mail.gmail.com>
Hello Grant
Thanks for your feedback
>>> No of_device_id match table to match against compatible values?
>>
>> I think it is not needed, the device will be matched against the
>> driver cma3000_d0x_spi.c and AFAIK on the spi/i2c devices you dont
>> need the device_id match. But you know much more about this :). Can
>> you point me to a example where a spi driver uses of_device-id match.
>
> Use an of_device_id table. It's the right thing to do.
>
Can you point me to a file where of_device_id is used in a spi/i2c
driver? I thought that was only for mmaped drivers....
Thanks!
--
Ricardo Ribalda
--
To unsubscribe from this list: send the line "unsubscribe linux-input" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH 2/2] trusted-key: added support for loading a key blob in the TPM
From: Roberto Sassu @ 2011-11-02 12:41 UTC (permalink / raw)
To: keyrings
Cc: linux-security-module, linux-kernel, safford, zohar, dhowells,
jmorris, Roberto Sassu
In-Reply-To: <1320237682-3857-1-git-send-email-roberto.sassu@polito.it>
[-- Attachment #1: Type: text/plain, Size: 12736 bytes --]
The new functions 'tpm_loadkey2', 'tpm_evictkey' and 'tpm_flushspecific'
allow to load/unload a TPM key whose blob is provided from the userspace
interface and to use it for sealing or unsealing the symmetric key.
Signed-off-by: Roberto Sassu <roberto.sassu@polito.it>
---
Documentation/security/keys-trusted-encrypted.txt | 6 +-
include/linux/tpm_command.h | 6 +
security/keys/trusted.c | 203 ++++++++++++++++++++-
security/keys/trusted.h | 27 +++-
4 files changed, 234 insertions(+), 8 deletions(-)
diff --git a/Documentation/security/keys-trusted-encrypted.txt b/Documentation/security/keys-trusted-encrypted.txt
index 5f50cca..afebb58 100644
--- a/Documentation/security/keys-trusted-encrypted.txt
+++ b/Documentation/security/keys-trusted-encrypted.txt
@@ -27,8 +27,10 @@ Usage:
keyctl print keyid
options:
- keyhandle= ascii hex value of sealing key default 0x40000000 (SRK)
- keyauth= ascii hex auth for sealing key default 0x00...i
+ keyhandle= ascii hex value of sealing key handle default 0x40000000 (SRK)
+ keyblob= ascii hex value of sealing key blob (no default)
+ srkauth= ascii hex auth for SRK key default 0x00...
+ keyauth= ascii hex auth for sealing key (not SRK) default 0x00...
(40 ascii zeros)
blobauth= ascii hex auth for sealed data default 0x00...
(40 ascii zeros)
diff --git a/include/linux/tpm_command.h b/include/linux/tpm_command.h
index 727512e..e3348b7 100644
--- a/include/linux/tpm_command.h
+++ b/include/linux/tpm_command.h
@@ -15,7 +15,10 @@
#define TPM_TAG_RSP_AUTH2_COMMAND 198
/* Command Ordinals */
+#define TPM_ORD_EVICTKEY 34
+#define TPM_ORD_FLUSHSPECIFIC 186
#define TPM_ORD_GETRANDOM 70
+#define TPM_ORD_LOADKEY2 65
#define TPM_ORD_OSAP 11
#define TPM_ORD_OIAP 10
#define TPM_ORD_SEAL 23
@@ -24,5 +27,8 @@
/* Other constants */
#define SRKHANDLE 0x40000000
#define TPM_NONCE_SIZE 20
+#define TPM_RT_KEY 0x00000001
+#define TPM_TAG_KEY12 0x0028
+#define TPM_BAD_ORDINAL 10
#endif
diff --git a/security/keys/trusted.c b/security/keys/trusted.c
index 8777015..c332e3b 100644
--- a/security/keys/trusted.c
+++ b/security/keys/trusted.c
@@ -688,12 +688,118 @@ static int tpm_unseal(struct tpm_buf *tb,
}
/*
+ * Load a TPM key from the blob provided by userspace
+ */
+static int tpm_loadkey2(struct tpm_buf *tb,
+ uint32_t keyhandle, unsigned char *keyauth,
+ const unsigned char *keyblob, int keybloblen,
+ uint32_t *newhandle)
+{
+ unsigned char nonceodd[TPM_NONCE_SIZE];
+ unsigned char enonce[TPM_NONCE_SIZE];
+ unsigned char authdata[SHA1_DIGEST_SIZE];
+ uint32_t authhandle = 0;
+ unsigned char cont = 0;
+ uint32_t ordinal;
+ int ret;
+
+ ordinal = htonl(TPM_ORD_LOADKEY2);
+
+ /* session for loading the key */
+ ret = oiap(tb, &authhandle, enonce);
+ if (ret < 0) {
+ pr_info("trusted_key: oiap failed (%d)\n", ret);
+ return ret;
+ }
+
+ /* generate odd nonce */
+ ret = tpm_get_random(tb, nonceodd, TPM_NONCE_SIZE);
+ if (ret < 0) {
+ pr_info("trusted_key: tpm_get_random failed (%d)\n", ret);
+ return ret;
+ }
+
+ /* calculate authorization HMAC value */
+ ret = TSS_authhmac(authdata, keyauth, SHA1_DIGEST_SIZE, enonce,
+ nonceodd, cont, sizeof(uint32_t), &ordinal,
+ keybloblen, keyblob, 0, 0);
+ if (ret < 0)
+ return ret;
+
+ /* build the request buffer */
+ INIT_BUF(tb);
+ store16(tb, TPM_TAG_RQU_AUTH1_COMMAND);
+ store32(tb, TPM_LOADKEY2_SIZE + keybloblen);
+ store32(tb, TPM_ORD_LOADKEY2);
+ store32(tb, keyhandle);
+ storebytes(tb, keyblob, keybloblen);
+ store32(tb, authhandle);
+ storebytes(tb, nonceodd, TPM_NONCE_SIZE);
+ store8(tb, cont);
+ storebytes(tb, authdata, SHA1_DIGEST_SIZE);
+
+ ret = trusted_tpm_send(TPM_ANY_NUM, tb->data, MAX_BUF_SIZE);
+ if (ret < 0) {
+ pr_info("trusted_key: authhmac failed (%d)\n", ret);
+ return ret;
+ }
+
+ ret = TSS_checkhmac1(tb->data, ordinal, nonceodd, keyauth,
+ SHA1_DIGEST_SIZE, 0, 0);
+ if (ret < 0) {
+ pr_info("trusted_key: TSS_checkhmac1 failed (%d)\n", ret);
+ return ret;
+ }
+
+ *newhandle = LOAD32(tb->data, TPM_DATA_OFFSET);
+ return 0;
+}
+
+/*
+ * Execute the FlushSpecific TPM command
+ */
+uint32_t tpm_flushspecific(struct tpm_buf *tb, uint32_t handle,
+ uint32_t resourcetype)
+{
+ INIT_BUF(tb);
+ store16(tb, TPM_TAG_RQU_COMMAND);
+ store32(tb, TPM_FLUSHSPECIFIC_SIZE);
+ store32(tb, TPM_ORD_FLUSHSPECIFIC);
+ store32(tb, handle);
+ store32(tb, resourcetype);
+
+ return trusted_tpm_send(TPM_ANY_NUM, tb->data, MAX_BUF_SIZE);
+}
+
+/*
+ * Evict a key from the TPM
+ */
+uint32_t tpm_evictkey(struct tpm_buf *tb, uint32_t keyhandle)
+{
+ int ret;
+
+ INIT_BUF(tb);
+ store16(tb, TPM_TAG_RQU_COMMAND);
+ store32(tb, TPM_EVICTKEY_SIZE);
+ store32(tb, TPM_ORD_EVICTKEY);
+ store32(tb, keyhandle);
+
+ ret = trusted_tpm_send(TPM_ANY_NUM, tb->data, sizeof tb->data);
+ if (ret < 0)
+ ret = tpm_flushspecific(tb, keyhandle, TPM_RT_KEY);
+
+ return ret;
+}
+
+/*
* Have the TPM seal(encrypt) the symmetric key
*/
static int key_seal(struct trusted_key_payload *p,
struct trusted_key_options *o)
{
struct tpm_buf *tb;
+ uint32_t keyhandle;
+ unsigned char *parentauth;
int ret;
tb = kzalloc(sizeof *tb, GFP_KERNEL);
@@ -703,12 +809,40 @@ static int key_seal(struct trusted_key_payload *p,
/* include migratable flag at end of sealed key */
p->key[p->key_len] = p->migratable;
- ret = tpm_seal(tb, o->keytype, o->keyhandle, o->keyauth,
+ /* set default values */
+ keyhandle = o->keyhandle;
+ parentauth = o->srkauth;
+
+ if (o->keytype == SEAL_keytype) {
+ parentauth = o->keyauth;
+ if (o->keyblob_len > 0) {
+ ret = tpm_loadkey2(tb, SRKHANDLE, o->srkauth,
+ o->keyblob, o->keyblob_len,
+ &keyhandle);
+ if (ret < 0) {
+ pr_info("trusted_key: loadkey2 failed (%d)\n",
+ ret);
+ goto out;
+ }
+
+ dump_tpm_key12_handle(keyhandle);
+ }
+ }
+
+ ret = tpm_seal(tb, o->keytype, keyhandle, parentauth,
p->key, p->key_len + 1, p->blob, &p->blob_len,
o->blobauth, o->pcrinfo, o->pcrinfo_len);
if (ret < 0)
pr_info("trusted_key: srkseal failed (%d)\n", ret);
+ if (o->keyblob_len > 0) {
+ int evictret = tpm_evictkey(tb, keyhandle);
+
+ if (evictret < 0)
+ pr_info("trusted_key: evictkey failed (%d)\n",
+ evictret);
+ }
+out:
kfree(tb);
return ret;
}
@@ -720,13 +854,33 @@ static int key_unseal(struct trusted_key_payload *p,
struct trusted_key_options *o)
{
struct tpm_buf *tb;
+ uint32_t keyhandle;
+ unsigned char *parentauth;
int ret;
tb = kzalloc(sizeof *tb, GFP_KERNEL);
if (!tb)
return -ENOMEM;
- ret = tpm_unseal(tb, o->keyhandle, o->keyauth, p->blob, p->blob_len,
+ /* set default values */
+ keyhandle = o->keyhandle;
+ parentauth = o->srkauth;
+
+ if (o->keytype == SEAL_keytype) {
+ parentauth = o->keyauth;
+ if (o->keyblob_len > 0) {
+ ret = tpm_loadkey2(tb, SRKHANDLE, o->srkauth,
+ o->keyblob, o->keyblob_len,
+ &keyhandle);
+ if (ret < 0) {
+ pr_info("trusted_key: loadkey2 failed (%d)\n",
+ ret);
+ goto out;
+ }
+ }
+ }
+
+ ret = tpm_unseal(tb, keyhandle, parentauth, p->blob, p->blob_len,
o->blobauth, p->key, &p->key_len);
if (ret < 0)
pr_info("trusted_key: srkunseal failed (%d)\n", ret);
@@ -734,14 +888,22 @@ static int key_unseal(struct trusted_key_payload *p,
/* pull migratable flag out of sealed key */
p->migratable = p->key[--p->key_len];
+ if (o->keyblob_len > 0) {
+ int evictret = tpm_evictkey(tb, keyhandle);
+
+ if (evictret < 0)
+ pr_info("trusted_key: evictkey failed (%d)\n",
+ evictret);
+ }
+out:
kfree(tb);
return ret;
}
enum {
Opt_err = -1,
- Opt_new, Opt_load, Opt_update,
- Opt_keyhandle, Opt_keyauth, Opt_blobauth,
+ Opt_new, Opt_load, Opt_update, Opt_srkauth,
+ Opt_keyhandle, Opt_keyblob, Opt_keyauth, Opt_blobauth,
Opt_pcrinfo, Opt_pcrlock, Opt_migratable
};
@@ -749,7 +911,9 @@ static const match_table_t key_tokens = {
{Opt_new, "new"},
{Opt_load, "load"},
{Opt_update, "update"},
+ {Opt_srkauth, "srkauth=%s"},
{Opt_keyhandle, "keyhandle=%s"},
+ {Opt_keyblob, "keyblob=%s"},
{Opt_keyauth, "keyauth=%s"},
{Opt_blobauth, "blobauth=%s"},
{Opt_pcrinfo, "pcrinfo=%s"},
@@ -768,6 +932,8 @@ static int getoptions(char *c, struct trusted_key_payload *pay,
int res;
unsigned long handle;
unsigned long lock;
+ uint16_t tpm_key_tag;
+ uint32_t value;
while ((p = strsep(&c, " \t"))) {
if (*p == '\0' || *p == ' ' || *p == '\t')
@@ -788,6 +954,35 @@ static int getoptions(char *c, struct trusted_key_payload *pay,
opt->keytype = SEAL_keytype;
opt->keyhandle = handle;
break;
+ case Opt_keyblob:
+ if (strlen(args[0].from) >= MAX_KEYBLOB_SIZE * 2)
+ return -EINVAL;
+ hex2bin(opt->keyblob, args[0].from, MAX_KEYBLOB_SIZE);
+ tpm_key_tag = LOAD16(opt->keyblob, 0);
+ if (tpm_key_tag != TPM_TAG_KEY12)
+ return -EINVAL;
+ opt->keytype = SEAL_keytype;
+ opt->keyblob_len = TPM_KEY12_EXPSIZE_OFFSET;
+ /* key exponent size */
+ value = LOAD32(opt->keyblob, opt->keyblob_len);
+ opt->keyblob_len += sizeof(uint32_t) + value;
+ /* PCRINFO size */
+ value = LOAD32(opt->keyblob, opt->keyblob_len);
+ opt->keyblob_len += sizeof(uint32_t) + value;
+ /* key length */
+ value = LOAD32(opt->keyblob, opt->keyblob_len);
+ opt->keyblob_len += sizeof(uint32_t) + value;
+ /* enc data size */
+ value = LOAD32(opt->keyblob, opt->keyblob_len);
+ opt->keyblob_len += sizeof(uint32_t) + value;
+ if (opt->keyblob_len >= MAX_KEYBLOB_SIZE)
+ return -EINVAL;
+ break;
+ case Opt_srkauth:
+ if (strlen(args[0].from) != 2 * SHA1_DIGEST_SIZE)
+ return -EINVAL;
+ hex2bin(opt->srkauth, args[0].from, SHA1_DIGEST_SIZE);
+ break;
case Opt_keyauth:
if (strlen(args[0].from) != 2 * SHA1_DIGEST_SIZE)
return -EINVAL;
diff --git a/security/keys/trusted.h b/security/keys/trusted.h
index 3249fbd..6a9f373 100644
--- a/security/keys/trusted.h
+++ b/security/keys/trusted.h
@@ -3,12 +3,16 @@
/* implementation specific TPM constants */
#define MAX_PCRINFO_SIZE 64
-#define MAX_BUF_SIZE 512
+#define MAX_BUF_SIZE 1024
+#define MAX_KEYBLOB_SIZE 1024
#define TPM_GETRANDOM_SIZE 14
#define TPM_OSAP_SIZE 36
#define TPM_OIAP_SIZE 10
#define TPM_SEAL_SIZE 87
#define TPM_UNSEAL_SIZE 104
+#define TPM_LOADKEY2_SIZE 59
+#define TPM_EVICTKEY_SIZE 14
+#define TPM_FLUSHSPECIFIC_SIZE 18
#define TPM_SIZE_OFFSET 2
#define TPM_RETURN_OFFSET 6
#define TPM_DATA_OFFSET 10
@@ -17,6 +21,8 @@
#define LOAD32N(buffer, offset) (*(uint32_t *)&buffer[offset])
#define LOAD16(buffer, offset) (ntohs(*(uint16_t *)&buffer[offset]))
+#define TPM_KEY12_EXPSIZE_OFFSET 31
+
struct tpm_buf {
int len;
unsigned char data[MAX_BUF_SIZE];
@@ -39,6 +45,9 @@ enum {
struct trusted_key_options {
uint16_t keytype;
uint32_t keyhandle;
+ uint32_t keyblob_len;
+ unsigned char keyblob[MAX_KEYBLOB_SIZE];
+ unsigned char srkauth[SHA1_DIGEST_SIZE];
unsigned char keyauth[SHA1_DIGEST_SIZE];
unsigned char blobauth[SHA1_DIGEST_SIZE];
uint32_t pcrinfo_len;
@@ -52,7 +61,12 @@ struct trusted_key_options {
static inline void dump_options(struct trusted_key_options *o)
{
pr_info("trusted_key: sealing key type %d\n", o->keytype);
- pr_info("trusted_key: sealing key handle %0X\n", o->keyhandle);
+ if (o->keyblob_len > 0) {
+ pr_info("trusted_key: sealing key blob %d\n", o->keyblob_len);
+ print_hex_dump(KERN_INFO, "keyblob ", DUMP_PREFIX_NONE,
+ 16, 1, o->keyblob, o->keyblob_len, 0);
+ } else
+ pr_info("trusted_key: sealing key handle %0X\n", o->keyhandle);
pr_info("trusted_key: pcrlock %d\n", o->pcrlock);
pr_info("trusted_key: pcrinfo %d\n", o->pcrinfo_len);
print_hex_dump(KERN_INFO, "pcrinfo ", DUMP_PREFIX_NONE,
@@ -90,6 +104,11 @@ static inline void dump_tpm_buf(unsigned char *buf)
len = LOAD32(buf, TPM_SIZE_OFFSET);
print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 1, buf, len, 0);
}
+static inline void dump_tpm_key12_handle(uint32_t handle)
+{
+ print_hex_dump(KERN_INFO, "trusted-key: key handle ", DUMP_PREFIX_NONE,
+ 16, 1, &handle, 4, 0);
+}
#else
static inline void dump_options(struct trusted_key_options *o)
{
@@ -106,6 +125,10 @@ static inline void dump_sess(struct osapsess *s)
static inline void dump_tpm_buf(unsigned char *buf)
{
}
+
+static inline void dump_tpm_key12_handle(uint32_t handle)
+{
+}
#endif
static inline void store8(struct tpm_buf *buf, const unsigned char value)
--
1.7.6.4
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^ permalink raw reply related
* [PATCH 1/2] trusted-key: allow overwriting the migratable flag
From: Roberto Sassu @ 2011-11-02 12:41 UTC (permalink / raw)
To: keyrings
Cc: linux-security-module, linux-kernel, safford, zohar, dhowells,
jmorris, Roberto Sassu
[-- Attachment #1: Type: text/plain, Size: 823 bytes --]
The migratable should be modifiable during the key update() method. This
allows for example to update a migratable trusted key, wrapped by a TPM
key, to a a non-migratable one sealed under the SRK with a PCR set.
Signed-off-by: Roberto Sassu <roberto.sassu@polito.it>
---
security/keys/trusted.c | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/security/keys/trusted.c b/security/keys/trusted.c
index 0c33e2e..8777015 100644
--- a/security/keys/trusted.c
+++ b/security/keys/trusted.c
@@ -1036,7 +1036,6 @@ static int trusted_update(struct key *key, const void *data, size_t datalen)
goto out;
}
/* copy old key values, and reseal with new pcrs */
- new_p->migratable = p->migratable;
new_p->key_len = p->key_len;
memcpy(new_p->key, p->key, p->key_len);
dump_payload(p);
--
1.7.6.4
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[-- Type: application/x-pkcs7-signature, Size: 2061 bytes --]
^ permalink raw reply related
* Re: HDA Intel microphone regression in 3.1.0
From: Sergey S. Kostyliov @ 2011-11-02 12:40 UTC (permalink / raw)
To: Chris Vine; +Cc: Linux Kernel Mailing List
In-Reply-To: <20111102102554.1f443b9c@laptop.homenet>
On 2 November 2011 12:25, Chris Vine <chris@cvine.freeserve.co.uk> wrote:
> My Lenovo S12 IdeaPad netbook uses a HDA Intel sound card with Realtek
> ALC269 chip. With the 3.1.0 kernel, all microphone input (both with the
> internal microphone and any external microphone) is permanently
> muted, although sound output works OK. Microphone input works correctly
> with the 3.0 and earlier kernels.
Could you please say do you have CONFIG_SND_HDA_GENERIC == y ?
I had experienced the same problem with CONFIG_SND_HDA_GENERIC = y
Turning it off it cured the problem for me.
>
> The only obvious difference between the 3.0 and 3.1 kernels is that
> with kernel 3.0.7, 'dmesg | grep HDA' gives this:
>
> HDA Intel 0000:00:1b.0: PCI INT A -> GSI 22 (level, low) -> IRQ 22
> HDA Intel 0000:00:1b.0: setting latency timer to 64
> input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/input/input10
> input: HDA Intel Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input11
> input: HDA Intel Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input12
>
> whereas with kernel 3.1.0 it just gives:
>
> input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/input/input9
> input: HDA Intel Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input10
> input: HDA Intel Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input11
>
> lspci -v gives the following audio hardware information:
>
> 00:1b.0 Audio device: Intel Corporation N10/ICH 7 Family High Definition Audio Controller (rev 02)
> Subsystem: Lenovo Device 3be9
> Flags: bus master, fast devsel, latency 0, IRQ 22
> Memory at fc140000 (64-bit, non-prefetchable) [size=16K]
> Capabilities: [50] Power Management version 2
> Capabilities: [60] MSI: Enable- Count=1/1 Maskable- 64bit+
> Capabilities: [70] Express Root Complex Integrated Endpoint, MSI 00
> Capabilities: [100] Virtual Channel
> Capabilities: [130] Root Complex Link
> Kernel driver in use: snd_hda_intel
> Kernel modules: snd-hda-intel
>
> lsmod | egrep "snd|sound" gives:
>
> snd_seq_dummy 1023 0
> snd_seq_oss 23792 0
> snd_seq_midi_event 4408 1 snd_seq_oss
> snd_seq 39673 5 snd_seq_dummy,snd_seq_oss,snd_seq_midi_event
> snd_seq_device 4121 3 snd_seq_dummy,snd_seq_oss,snd_seq
> snd_pcm_oss 33087 0
> snd_mixer_oss 12647 1 snd_pcm_oss
> snd_hda_codec_realtek 205307 1
> snd_hda_intel 18347 2
> snd_hda_codec 64459 2 snd_hda_codec_realtek,snd_hda_intel
> snd_hwdep 4420 1 snd_hda_codec
> snd_pcm 57725 3 snd_pcm_oss,snd_hda_intel,snd_hda_codec
> snd_timer 14567 2 snd_seq,snd_pcm
> snd 40539 15 snd_seq_oss,snd_seq,snd_seq_device,snd_pcm_oss,snd_mixer_oss,snd_hda_codec_realtek,snd_hda_intel,snd_hda_codec,snd_hwdep,snd_pcm,snd_timer
> soundcore 4129 1 snd
> snd_page_alloc 5445 2 snd_hda_intel,snd_pcm
>
> Chris
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
>
^ permalink raw reply
* Re: [PATCH 01/63] checkpolicy: the " is not part of the filename for
From: Steve Lawrence @ 2011-11-02 12:25 UTC (permalink / raw)
To: Daniel J Walsh; +Cc: eparis, selinux
In-Reply-To: <4EB047C7.2060703@redhat.com>
On 11/01/2011 03:25 PM, Daniel J Walsh wrote:
>
> OpenPGP: *Attachments to this message have not been signed or encrypted*
>
> ********* *BEGIN ENCRYPTED or SIGNED PART* *********
>
>
> This patch looks good to me. acked.
>
>
> ********** *END ENCRYPTED or SIGNED PART* **********
>
> 0001-checkpolicy-the-is-not-part-of-the-filename-for-tran.patchFrom c3ba40d2e17186d702a6ea2b83e185603dafa06f Mon Sep 17 00:00:00 2001
> From: Dan Walsh <dwalsh@redhat.com>
> Date: Tue, 20 Sep 2011 09:52:57 -0400
> Subject: [PATCH 01/63] checkpolicy: the " is not part of the filename for
> trans rules
>
> Policy decided that all filenames needed to be wrapped in " in the
> filename trans rules. But we weren't doing anything with those in the
> language syntax and instead just passed the " to the kernel as if the
> filename in question were actually \"file\". Add the " to the policy
> grammer.
>
> Signed-off-by: Eric Paris <eparis@redhat.com>
> ---
> checkpolicy/policy_parse.y | 4 ++--
> checkpolicy/policy_scan.l | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/checkpolicy/policy_parse.y b/checkpolicy/policy_parse.y
> index 49ac15f..1e3ef6f 100644
> --- a/checkpolicy/policy_parse.y
> +++ b/checkpolicy/policy_parse.y
> @@ -353,7 +353,7 @@ cond_rule_def : cond_transition_def
> | require_block
> { $$ = NULL; }
> ;
> -cond_transition_def : TYPE_TRANSITION names names ':' names identifier filename ';'
> +cond_transition_def : TYPE_TRANSITION names names ':' names identifier '\"' filename '\"' ';'
> { $$ = define_cond_filename_trans() ;
> if ($$ == COND_ERR) return -1;}
> | TYPE_TRANSITION names names ':' names identifier ';'
> @@ -391,7 +391,7 @@ cond_dontaudit_def : DONTAUDIT names names ':' names names ';'
> { $$ = define_cond_te_avtab(AVRULE_DONTAUDIT);
> if ($$ == COND_ERR) return -1; }
> ;
> -transition_def : TYPE_TRANSITION names names ':' names identifier filename ';'
> +transition_def : TYPE_TRANSITION names names ':' names identifier '\"' filename '\"' ';'
> {if (define_filename_trans()) return -1; }
> | TYPE_TRANSITION names names ':' names identifier ';'
> {if (define_compute_type(AVRULE_TRANSITION)) return -1;}
> diff --git a/checkpolicy/policy_scan.l b/checkpolicy/policy_scan.l
> index a61e0db..2ba5971 100644
> --- a/checkpolicy/policy_scan.l
> +++ b/checkpolicy/policy_scan.l
> @@ -227,7 +227,6 @@ PERMISSIVE { return(PERMISSIVE); }
> {digit}{1,3}(\.{digit}{1,3}){3} { return(IPV4_ADDR); }
> {hexval}{0,4}":"{hexval}{0,4}":"({hexval}|[:.])* { return(IPV6_ADDR); }
> {digit}+(\.({alnum}|[_.])*)? { return(VERSION_IDENTIFIER); }
> -\"({alnum}|[_\.\-])+\" { return(FILENAME); }
> {alnum}* { return(FILENAME); }
> \.({alnum}|[_\.\-])* { return(FILENAME); }
> {letter}+([-_\.]|{alnum})+ { return(FILENAME); }
> @@ -253,6 +252,7 @@ PERMISSIVE { return(PERMISSIVE); }
> "-" |
> "." |
> "]" |
> +"\"" |
> "~" |
> "*" { return(yytext[0]); }
> . { yywarn("unrecognized character");}
> -- 1.7.7
I believe this shouldn't be necessary, and it looks like that's because
a patch was committed that shouldn't have been.
This was the original filename commit:
commit d4c230386653db49d8e8116b603efcce4423df70
Author: Daniel J Walsh <dwalsh@redhat.com>
Date: Fri Apr 29 15:29:48 2011 -0400
checkpolicy: use a better identifier for filenames
That commit was reverted and changed to require a quote around filenames
(which did the quote stripping) in this commit:
commit b42e15ffd5163effe3b2cb910685a5956a00defc
Author: Steve Lawrence <slawrence@tresys.com>
Date: Mon May 16 08:40:00 2011 -0400
checkpolicy: wrap file names in filename trans with quotes
Then, recnetly, this patch was committed, which looks to be the same as
the commit that was reverted:
commit d72a9ec825ef2a8723510f62292cf2adfd4a2a6c
Author: Dan Walsh <dwalsh@redhat.com>
Date: Tue Apr 12 09:54:46 2011 -0400
checkpolicy: Redo filename/filesystem syntax to support filename
trans rules
The comment for that commit said:
In order to support filenames, which might start with "." or
filesystems that start with a number we need to rework the matching
rules a little bit. Since the new filename rule is so permissive it
must be moved to the bottom of the matching list to not cover other
definitions.
Both of those cases should have been supported by the "wrap in quotes"
commit.
Was this just a mistake of something getting committed that shouldn't
have been? Should d72a9ec825ef2a8723510f62292cf2adfd4a2a6c be reverted?
- Steve
--
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^ permalink raw reply
* Re: [Qemu-devel] [PATCH] virtio: Add PCI memory BAR in addition to PIO BAR
From: Anthony Liguori @ 2011-11-02 12:39 UTC (permalink / raw)
To: Rusty Russell
Cc: Alexey Kardashevskiy, Michael S. Tsirkin, qemu-devel, Sasha Levin,
David Gibson
In-Reply-To: <87r51rtdgw.fsf@rustcorp.com.au>
On 11/01/2011 10:22 PM, Rusty Russell wrote:
> On Tue, 01 Nov 2011 17:20:06 -0500, Anthony Liguori<aliguori@us.ibm.com> wrote:
>> On 09/30/2011 12:26 AM, David Gibson wrote:
>>> Currently, virtio devices are usually presented to the guest as an
>>> emulated PCI device, virtio_pci. Although the actual IO operations
>>> are done through system memory, the configuration of the virtio device
>>> is done through the one PCI IO space BAR that virtio_pci presents.
>>>
>>> But PCI IO space (aka PIO) is deprecated for modern PCI devices, and
>>> on some systems with many PCI domains accessing PIO space can be
>>> problematic. For example on the existing PowerVM implementation of
>>> the PAPR spec, PCI PIO access is not supported at all. We're hoping
>>> that our KVM implementation will support PCI PIO (once we support PCI
>>> at all), but it will probably have some irritating limitations.
>>>
>>> This patch, therefore, extends the virtio_pci device to have a PCI
>>> memory space (MMIO) BAR as well as the IO BAR. The MMIO BAR contains
>>> exactly the same registers, in exactly the same layout as the existing
>>> PIO BAR.
>>>
>>> Because the PIO BAR is still present, existing guest drivers should
>>> still work fine. With this change in place, future guest drivers can
>>> check for an MMIO BAR and use that if present (falling back to PIO
>>> when possible to support older qemu versions).
>>>
>>> Signed-off-by: David Gibson<david@gibson.dropbear.id.au>
>>
>> Seems harmless for QEMU, so applied. You should update the virtio-pci spec too.
>>
>> Regards,
>
> Can you revert this? We just reverted the kernel part, figuring we need
> a rethink.
Already did.
Regards,
Anthony Liguori
>
> Thanks,
> Rusty.
>
^ permalink raw reply
* Re: [PATCHv4 4/6] input/cma3000_d0x: Add CMA3000 spi support
From: Ricardo Ribalda Delgado @ 2011-11-02 12:38 UTC (permalink / raw)
To: Mark Brown
Cc: Jonathan Cameron, Grant Likely, dmitry.torokhov, sameo,
peter.ujfalusi, aghayal, david, Shubhrajyoti, saaguirre, hemanthv,
linux-input, LKML
In-Reply-To: <20111025083633.GB31508@opensource.wolfsonmicro.com>
Hello Mark
I will wait until your patches arrive to linux-next. And then I will
port mine in top of yours. It will be great to get your feedback then.
Thanks!
On Tue, Oct 25, 2011 at 10:36, Mark Brown
<broonie@opensource.wolfsonmicro.com> wrote:
> On Tue, Oct 25, 2011 at 09:32:27AM +0100, Jonathan Cameron wrote:
>> On 10/25/11 08:24, Ricardo Ribalda Delgado wrote:
>
>> > It is not on linux-next, and also it cannot be used directly, in order
>> > to read you have to do set reg= (reg << 2) | 2; And AFAIK it is not
>> > supported by the regmap
>
>> My gut feeling is it would easy enough to add if it can't currently
>> be done. Mark?
>
> That should be trivial to add - the | 2 bit is already supported in
> -next and will be sent to Linus this merge window, adding the shift is
> just a simple matter of programming.
>
>> Gains here are leveraging the bus abstractions from there. There aren't
>> enough registers to gain from caching etc.
>
> Depends on the workload more than the number of registers - if you're
> able to eliminate enough reads then it can give a bit of a performance
> boost. But it's completely optional either way.
>
--
Ricardo Ribalda
^ permalink raw reply
* Re: [GIT PULL] Queue free fix (was Re: [PATCH] block: Free queue resources at blk_release_queue())
From: Jun'ichi Nomura @ 2011-11-02 12:37 UTC (permalink / raw)
To: Heiko Carstens
Cc: James Bottomley, Steffen Maier, linux-scsi@vger.kernel.org,
Jens Axboe, Hannes Reinecke, Linux Kernel, Alan Stern,
Thadeu Lima de Souza Cascardo, Taraka R. Bodireddy,
Seshagiri N. Ippili, Manvanthara B. Puttashankar, Jeff Moyer,
Shaohua Li, Mike Snitzer, gmuelas
In-Reply-To: <20111031130004.GB4768@osiris.boeblingen.de.ibm.com>
On 10/31/11 22:00, Heiko Carstens wrote:
> On Mon, Oct 31, 2011 at 08:46:06PM +0900, Jun'ichi Nomura wrote:
>> Hm, dm_softirq_done is generic completion code of original
>> request in dm-multipath.
>> So oops here might be another manifestation of use-after-free.
>>
>> Do you always hit the oops at the same address?
>
> I think we saw this bug the first time. But before that the scsi
> logging level was higher. Gonzalo is trying to recreate it with
> the same (old) scsi logging level.
> Afterwards we will try with barrier=0.
>
> Both on v3.0.7 btw.
>
>> Could you find corresponding source code line for
>> the crashed address, dm_softirq_done+0x72/0x140,
>> and which pointer was invalid?
>
> It crashes in the inlined function dm_done() when trying to
> dereference tio (aka clone->end_io_data):
>
> static void dm_done(struct request *clone, int error, bool mapped)
> {
> int r = error;
> struct dm_rq_target_io *tio = clone->end_io_data;
> dm_request_endio_fn rq_end_io = tio->ti->type->rq_end_io;
Thank you. But, hmm. I have no idea about scenario.
struct dm_rq_target_io is a container of clone request
and clone->end_io_data points to its container.
struct dm_rq_target_io {
struct mapped_device *md;
struct dm_target *ti;
struct request *orig, clone;
int error;
union map_info info;
};
If clone can be dereferenced, clone->end_io_data should be, too.
--
Jun'ichi Nomura, NEC Corporation
^ permalink raw reply
* [PATCH 5/5] ARM: restart: only perform setup for restart when soft-restarting
From: Russell King - ARM Linux @ 2011-11-02 12:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111102121159.GF645@mudshark.cambridge.arm.com>
On Wed, Nov 02, 2011 at 12:12:00PM +0000, Will Deacon wrote:
> Hi Russell,
>
> On Tue, Nov 01, 2011 at 04:09:49PM +0000, Russell King - ARM Linux wrote:
> > We only need to set the system up for a soft-restart if we're going to
> > be doing a soft-restart. Provide a new function (soft_restart()) which
> > does the setup and final call for this, and make platforms use it.
> > Eliminate the call to setup_restart() from the default handler.
> >
> > This means that platforms arch_reset() function is no longer called with
> > the page tables prepared for a soft-restart, and caches will still be
> > enabled.
> >
> > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> > ---
> > arch/arm/include/asm/system.h | 1 +
> > arch/arm/kernel/process.c | 10 +++++++---
> > arch/arm/mach-clps711x/include/mach/system.h | 2 +-
> > arch/arm/mach-ebsa110/include/mach/system.h | 2 +-
> > arch/arm/mach-footbridge/include/mach/system.h | 2 +-
> > arch/arm/mach-iop32x/include/mach/system.h | 2 +-
> > arch/arm/mach-iop33x/include/mach/system.h | 2 +-
> > arch/arm/mach-ixp4xx/include/mach/system.h | 2 +-
> > arch/arm/mach-ks8695/include/mach/system.h | 2 +-
> > arch/arm/mach-mmp/include/mach/system.h | 4 ++--
> > arch/arm/mach-mxs/system.c | 2 +-
> > arch/arm/mach-nuc93x/include/mach/system.h | 2 +-
> > arch/arm/mach-pnx4008/include/mach/system.h | 2 +-
> > arch/arm/mach-pxa/reset.c | 2 +-
> > arch/arm/mach-rpc/include/mach/system.h | 2 +-
> > arch/arm/mach-s3c2410/include/mach/system-reset.h | 4 ++--
> > arch/arm/mach-s3c64xx/include/mach/system.h | 2 +-
> > arch/arm/mach-sa1100/include/mach/system.h | 2 +-
> > arch/arm/mach-shmobile/include/mach/system.h | 2 +-
> > arch/arm/mach-w90x900/include/mach/system.h | 2 +-
> > arch/arm/plat-mxc/system.c | 2 +-
> > arch/arm/plat-spear/include/plat/system.h | 2 +-
> > 22 files changed, 30 insertions(+), 25 deletions(-)
>
> Which branch is this patch taken against? I'm getting conflicts if I try to
> apply it against mainline, next, 3.1 or your devel branch.
It's at some random point during the merge window at the moment.
It's probably going to be a good idea to wait until after the merge window
closes before tackling this stuff seriously, because things are still
changing quite quickly - eg, we have new platforms merged last night which
wouldn't have been updated with these patches.
I'd suggest not rushing this; we'll have a full 2-3 months before they
can be merged into mainline.
^ permalink raw reply
* [U-Boot] [PATCH] Reduce build times
From: Matthias Weißer @ 2011-11-02 12:35 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320216842-29785-1-git-send-email-wd@denx.de>
Am 02.11.2011 07:54, schrieb Wolfgang Denk:
> U-Boot Makefiles contain a number of tests for compiler features etc.
> which so far are executed again and again. On some architectures
> (especially ARM) this results in a large number of calls to gcc.
>
> This patch makes sure to run such tests only once, thus largely
> reducing the number of "execve" system calls.
>
> Example: number of "execve" system calls for building the "P2020DS"
> (Power Architecture) and "qong" (ARM) boards, measured as:
> -> strace -f -e trace=execve -o /tmp/foo ./MAKEALL<board>
> -> grep execve /tmp/foo | wc -l
>
> Before: After: Reduction:
> ==================================
> P2020DS 20555 15205 -26%
> qong 31692 14490 -54%
>
> As a result, built times are significantly reduced, typically by
> 30...50%.
>
> Signed-off-by: Wolfgang Denk<wd@denx.de>
> Cc: Andy Fleming<afleming@gmail.com>
> Cc: Kumar Gala<galak@kernel.crashing.org>
> Cc: Albert Aribaud<albert.aribaud@free.fr>
> cc: Graeme Russ<graeme.russ@gmail.com>
> cc: Mike Frysinger<vapier@gentoo.org>
> ---
Nice. Some additional numbers:
zmx25: make
-----------
real 1m47.546s 0m57.213s -53%
user 1m39.698s 0m54.831s
sys 0m24.798s 0m9.509s
zmx25: make -j2
---------------
real 0m56.791s 0m32.187s -57%
user 1m38.478s 0m55.571s
sys 0m24.522s 0m9.513s
Tested-by: Matthias Weisser <weisserm@arcor.de>
Matthias
^ permalink raw reply
* [PATCHv2] ARM: zImage: Use $(CROSS_COMPILE)size to get .bss size
From: Thomas Weber @ 2011-11-02 12:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.02.1110131454340.17040@xanadu.home>
Am 13.10.2011 20:56, schrieb Nicolas Pitre:
> On Thu, 13 Oct 2011, Russell King - ARM Linux wrote:
>
>> On Thu, Oct 13, 2011 at 08:50:22AM +0200, Thomas Weber wrote:
>>> Use $(CROSS_COMPILE)size to determine the bss size
>>> from vmlinux.
>>>
>>> The problem is introduced in:
>>>
>>> commit 5ffb04f6690d71fab241b3562ebf52b893ac4ff1
>>> ARM: zImage: make sure appended DTB doesn't get
>>> overwritten by kernel .bss
>>>
>>> This fixes following error message:
>>>
>>> size: arch/arm/boot/compressed/../../../../vmlinux:
>>> File format is ambiguous
>>>
>>> size: Matching formats:
>>> elf32-littlearm
>>> elf32-littlearm-symbian
>>> elf32-littlearm-vxworks
>>>
>>> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
>>> Acked-by: Tony Lindgren <tony@atomide.com>
>>> Signed-off-by: Thomas Weber <weber@corscience.de>
>> This is going to totally break my ability to build any kernels at the
>> moment - for some reason I don't have an arm-linux-size with all the
>> other bits of binutils, so I've been relying on the x86 version so far.
> Naive suggestion: ln -s /usr/bin/size arm-linux-size
>
>
> Nicolas
>
>
Hello Russell,
what is the status of this patch?
Thomas
^ permalink raw reply
* [PATCH] opensm/osmtest/osmtest.c: inventory file parsing bugfix
From: Daniel Klein @ 2011-11-02 12:35 UTC (permalink / raw)
To: linux-rdma-u79uwXL29TY76Z2rM5mHXA
Parsing of 'mkey' field from inventory file fails due to precedences.
Instead of parsing 'mkey' field, it parsed 'mkey_violations'.
Signed-off-by: Daniel Klein <danielk-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
---
osmtest/osmtest.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/osmtest/osmtest.c b/osmtest/osmtest.c
index 489e2201..37d574b 100644
--- a/osmtest/osmtest.c
+++ b/osmtest/osmtest.c
@@ -181,7 +181,6 @@ const osmtest_token_t token_array[] = {
{OSMTEST_TOKEN_RATE, 4, "RATE"},
{OSMTEST_TOKEN_PKT_LIFE, 8, "PKT_LIFE"},
{OSMTEST_TOKEN_PREFERENCE, 10, "PREFERENCE"},
- {OSMTEST_TOKEN_MKEY, 4, "M_KEY"},
{OSMTEST_TOKEN_SUBN_PREF, 13, "SUBNET_PREFIX"},
{OSMTEST_TOKEN_BASE_LID, 8, "BASE_LID"},
{OSMTEST_TOKEN_SM_BASE_LID, 18, "MASTER_SM_BASE_LID"},
@@ -213,6 +212,7 @@ const osmtest_token_t token_array[] = {
{OSMTEST_TOKEN_SUBN_TIMEOUT, 14, "subnet_timeout"},
{OSMTEST_TOKEN_RESP_TIME_VAL, 15, "resp_time_value"},
{OSMTEST_TOKEN_ERR_THRESHOLD, 15, "error_threshold"},
+ {OSMTEST_TOKEN_MKEY, 4, "M_KEY"}, /* must be after the other mkey... tokens. */
{OSMTEST_TOKEN_MTU, 3, "MTU"}, /* must be after the other mtu... tokens. */
{OSMTEST_TOKEN_FROMLID, 8, "from_lid"},
{OSMTEST_TOKEN_FROMPORTNUM, 13, "from_port_num"},
--
1.7.4.1
--
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