* Re: [PATCH 7/7 v3] sched: fix wrong utilization accounting when switching to fair class
From: Peter Zijlstra @ 2016-09-15 13:18 UTC (permalink / raw)
To: Vincent Guittot
Cc: mingo, linux-kernel, yuyang.du, Morten.Rasmussen, linaro-kernel,
dietmar.eggemann, pjt, bsegall
In-Reply-To: <1473666472-13749-8-git-send-email-vincent.guittot@linaro.org>
On Mon, Sep 12, 2016 at 09:47:52AM +0200, Vincent Guittot wrote:
> When a task switches to fair scheduling class, the period between now and
> the last update of its utilization is accounted as running time whatever
> happened during this period. This wrong accounting applies to the task
> and also to the task group branch.
>
> When changing the property of a running task like its list of allowed CPUs
> or its scheduling class, we follow the sequence:
> -dequeue task
> -put task
> -change the property
> -set task as current task
> -enqueue task
>
> The end of the sequence doesn't follow the normal sequence which is :
> -enqueue a task
> -then set the task as current task.
>
> This wrong ordering is the root cause of wrong utilization accounting.
> Update the sequence to follow the right one:
> -dequeue task
> -put task
> -change the property
> -enqueue task
> -set task as current task
But enqueue_entity depends on cfs_rq->curr, which is set by
set_curr_task_fair().
Also, the normalize comment in dequeue_entity() worries me, 'someone'
didn't update that when he moved update_min_vruntime() around.
^ permalink raw reply
* Re: [Nbd] [RESEND][PATCH 0/5] nbd improvements
From: Wouter Verhelst @ 2016-09-15 13:17 UTC (permalink / raw)
To: Alex Bligh
Cc: Christoph Hellwig, nbd-general@lists.sourceforge.net, Josef Bacik,
linux-kernel@vger.kernel.org, linux-block, mpa, kernel-team
In-Reply-To: <DA0880DA-700F-4989-9326-68F5F7A55F25@alex.org.uk>
On Thu, Sep 15, 2016 at 01:44:29PM +0100, Alex Bligh wrote:
>
> > On 15 Sep 2016, at 13:41, Christoph Hellwig <hch@infradead.org> wrote:
> >
> > On Thu, Sep 15, 2016 at 01:39:11PM +0100, Alex Bligh wrote:
> >> That's probably right in the case of file-based back ends that
> >> are running on a Linux OS. But gonbdserver for instance supports
> >> (e.g.) Ceph based backends, where each connection might be talking
> >> to a completely separate ceph node, and there may be no cache
> >> consistency between connections.
> >
> > Yes, if you don't have a cache coherent backend you are generally
> > screwed with a multiqueue protocol.
>
> I wonder if the ability to support multiqueue should be visible
> in the negotiation stage. That would allow the client to refuse
> to select multiqueue where it isn't safe.
The server can always refuse to allow multiple connections.
I was thinking of changing the spec as follows:
diff --git a/doc/proto.md b/doc/proto.md
index 217f57e..cb099e2 100644
--- a/doc/proto.md
+++ b/doc/proto.md
@@ -308,6 +308,23 @@ specification, the
[kernel documentation](https://www.kernel.org/doc/Documentation/block/writeback_cache_control.txt)
may be useful.
+For performance reasons, clients MAY open multiple connections to the
+same server. To support such clients, servers SHOULD ensure that at
+least one of the following conditions hold:
+
+* Flush commands are processed for ALL connections. That is, when an
+ `NBD_CMD_WRITE` is processed on one connection, and then an
+ `NBD_CMD_FLUSH` is processed on another connection, the data of the
+ `NBD_CMD_WRITE` on the first connection MUST reach permanent storage
+ before the reply of the `NBD_CMD_FLUSH` is sent.
+* The server allows `NBD_CMD_WRITE` and `NBD_CMD_FLUSH` on at most one
+ connection
+* Multiple connections are not allowed
+
+In addition, clients using multiple connections SHOULD NOT send
+`NBD_CMD_FLUSH` if an `NBD_CMD_WRITE` for which they care in relation to
+the flush has not been replied to yet.
+
#### Request message
The request message, sent by the client, looks as follows:
The latter bit (on the client side) is because even if your backend has
no cache coherency issues, TCP does not guarantee ordering between
multiple connections. I don't know if the above is in line with what
blk-mq does, but consider the following scenario:
- A client sends two writes to the server, followed (immediately) by a
flush, where at least the second write and the flush are not sent over
the same connection.
- The first write is a small one, and it is handled almost immediately.
- The second write takes a little longer, so the flush is handled
earlier than the second write
- The network packet containing the flush reply gets lost for whatever
reason, so the client doesn't get it, and we fall into TCP
retransmits.
- The second write finishes, and its reply header does not get lost
- After the second write reply reaches the client, the TCP retransmits
for the flush reply are handled.
In the above scenario, the flush reply arrives on the client side after
a write reply which it did not cover; so the client will (incorrectly)
assume that the write has reached permanent storage when in fact it may
not have done so yet.
If the kernel does not care about the ordering of the two writes versus
the flush, then there is no problem. I don't know how blk-mq works in
that context, but if the above is a likely scenario, we may have to
reconsider adding blk-mq to nbd.
--
< ron> I mean, the main *practical* problem with C++, is there's like a dozen
people in the world who think they really understand all of its rules,
and pretty much all of them are just lying to themselves too.
-- #debian-devel, OFTC, 2016-02-12
^ permalink raw reply related
* [GIT PULL] tpmdd updates for Linux 4.9
From: Jarkko Sakkinen @ 2016-09-15 13:16 UTC (permalink / raw)
To: James Morris; +Cc: linux-security-module, linux-kernel
Hi James,
This pull request contains tpmdd updates for Linux 4.9. There are no
major new features. This is purely a bug fix and cleanup release.
/Jarkko
The following changes since commit a39f44faa8c7d84dff7d1fc0bc851c6499f94d7b:
Merge branch 'smack-for-4.9' of http://github.com/cschaufler/smack-next into next (2016-09-15 14:43:46 +1000)
are available in the git repository at:
git://git.infradead.org/users/jjs/linux-tpmdd.git master
for you to fetch changes up to ebfd7532e985818a327906e011f3e43c8ddfdd74:
tpm: add check for minimum buffer size in tpm_transmit() (2016-09-15 16:04:21 +0300)
----------------------------------------------------------------
Jarkko Sakkinen (11):
tpm: invalid self test error message
tpm: fix a race condition in tpm2_unseal_trusted()
tpm: remove unnecessary externs from tpm.h
tpm: replace tpm_gen_interrupt() with tpm_tis_gen_interrupt()
tpm: use tpm_transmit_cmd() in tpm2_probe()
tpm: use tpm_pcr_read_dev() in tpm_do_selftest()
tpm_crb: fix crb_req_canceled behavior
tpm_crb: remove wmb()'s
tpm_crb: refine the naming of constants
tpm_crb: fix incorrect values of cmdReady and goIdle bits
tpm: add check for minimum buffer size in tpm_transmit()
Jason Gunthorpe (1):
tpm/st33zp24: Remove useless tpm_gen_interrupt
Julia Lawall (1):
tpm: constify TPM 1.x header structures
Tomas Winkler (5):
tpm/tpm_tis: remove unused itpm variable
tmp/tpm_crb: drop include to platform_device
tpm/tpm_crb: cache cmd_size register value.
tpm/tpm_crb: drop useless cpu_to_le32 when writing to registers
tpm/tpm_crb: fix the over 80 characters checkpatch warring
drivers/char/tpm/st33zp24/st33zp24.c | 2 -
drivers/char/tpm/tpm-dev.c | 2 +-
drivers/char/tpm/tpm-interface.c | 84 +++++++++++-------------
drivers/char/tpm/tpm-sysfs.c | 4 +-
drivers/char/tpm/tpm.h | 46 ++++++-------
drivers/char/tpm/tpm2-cmd.c | 124 +++++++++++++++++++----------------
drivers/char/tpm/tpm_crb.c | 50 +++++++-------
drivers/char/tpm/tpm_tis_core.c | 24 ++++---
8 files changed, 171 insertions(+), 165 deletions(-)
^ permalink raw reply
* [Qemu-devel] [PATCH] tcg: try sti when moving a constant into a dead memory temp
From: Paolo Bonzini @ 2016-09-15 13:16 UTC (permalink / raw)
To: qemu-devel; +Cc: rth
This comes from free from unifying tcg_reg_alloc_mov and
tcg_reg_alloc_movi's handling of TEMP_VAL_CONST. It triggers
often on moves to cc_dst, such as the following translation
of "sub $0x3c,%esp":
before: after:
subl $0x3c,%ebp subl $0x3c,%ebp
movl %ebp,0x10(%r14) movl %ebp,0x10(%r14)
movl $0x3c,%ebx movl $0x3c,0x2c(%r14)
movl %ebx,0x2c(%r14)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
tcg/tcg.c | 56 +++++++++++++++++++++++++++-----------------------------
1 file changed, 27 insertions(+), 29 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 42417bd..77a19b6 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -2099,15 +2099,9 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
save_globals(s, allocated_regs);
}
-static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args,
- TCGLifeData arg_life)
+static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
+ tcg_target_ulong val, TCGLifeData arg_life)
{
- TCGTemp *ots;
- tcg_target_ulong val;
-
- ots = &s->temps[args[0]];
- val = args[1];
-
if (ots->fixed_reg) {
/* For fixed registers, we do not do any constant propagation. */
tcg_out_movi(s, ots->type, ots->reg, val);
@@ -2128,6 +2122,15 @@ static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args,
}
}
+static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args,
+ TCGLifeData arg_life)
+{
+ TCGTemp *ots = &s->temps[args[0]];
+ tcg_target_ulong val = args[1];
+
+ tcg_reg_alloc_do_movi(s, ots, val, arg_life);
+}
+
static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
const TCGArg *args, TCGLifeData arg_life)
{
@@ -2143,21 +2146,29 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
otype = ots->type;
itype = ts->type;
- /* If the source value is not in a register, and we're going to be
- forced to have it in a register in order to perform the copy,
- then copy the SOURCE value into its own register first. That way
- we don't have to reload SOURCE the next time it is used. */
- if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG)
- || ts->val_type == TEMP_VAL_MEM) {
+ if (ts->val_type == TEMP_VAL_CONST) {
+ /* propagate constant or generate sti */
+ tcg_target_ulong val = ts->val;
+ if (IS_DEAD_ARG(1)) {
+ temp_dead(s, ts);
+ }
+ tcg_reg_alloc_do_movi(s, ots, val, arg_life);
+ return;
+ }
+
+ /* If the source value is in memory we're going to be forced
+ to have it in a register in order to perform the copy. Copy
+ the SOURCE value into its own register first, that way we
+ don't have to reload SOURCE the next time it is used. */
+ if (ts->val_type == TEMP_VAL_MEM) {
temp_load(s, ts, tcg_target_available_regs[itype], allocated_regs);
}
+ tcg_debug_assert(ts->val_type == TEMP_VAL_REG);
if (IS_DEAD_ARG(0) && !ots->fixed_reg) {
/* mov to a non-saved dead register makes no sense (even with
liveness analysis disabled). */
tcg_debug_assert(NEED_SYNC_ARG(0));
- /* The code above should have moved the temp to a register. */
- tcg_debug_assert(ts->val_type == TEMP_VAL_REG);
if (!ots->mem_allocated) {
temp_allocate_frame(s, args[0]);
}
@@ -2166,20 +2177,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
temp_dead(s, ts);
}
temp_dead(s, ots);
- } else if (ts->val_type == TEMP_VAL_CONST) {
- /* propagate constant */
- if (ots->val_type == TEMP_VAL_REG) {
- s->reg_to_temp[ots->reg] = NULL;
- }
- ots->val_type = TEMP_VAL_CONST;
- ots->val = ts->val;
- if (IS_DEAD_ARG(1)) {
- temp_dead(s, ts);
- }
} else {
- /* The code in the first if block should have moved the
- temp to a register. */
- tcg_debug_assert(ts->val_type == TEMP_VAL_REG);
if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) {
/* the mov can be suppressed */
if (ots->val_type == TEMP_VAL_REG) {
--
2.7.4
^ permalink raw reply related
* Re: solo6010 modprobe lockup since e1ceb25a (v4.3 regression)
From: Hans Verkuil @ 2016-09-15 13:15 UTC (permalink / raw)
To: Andrey Utkin, Krzysztof Hałasa, linux-kernel, linux-media,
Mauro Carvalho Chehab, Hans Verkuil, Ismael Luceno
Cc: Bluecherry Maintainers, andrey_utkin
In-Reply-To: <20160915130441.ji3f3jiiebsnsbct@acer>
It could be related to the fact that a PCI write may be delayed unless
it is followed by a read (see also the comments in drivers/media/pci/ivtv/ivtv-driver.h).
That was probably the reason for the pci_read_config_word in the reg_write
code. Try putting that back (and just that).
Regards,
Hans
On 09/15/2016 03:04 PM, Andrey Utkin wrote:
> Hi Krzysztof,
>
> Me and one more solo6010 board user experience machine lockup when
> solo6x10 module is loaded on kernel series starting with 4.3 (despite
> solo6110 board probes just fine on all kernels). That is, 3.16, 3.18,
> 4.1 and 4.2 are tested and fine, and 4.3, 4.4, and others up to current
> linux-next are bad.
> So regression slipped in between 4.2 and 4.3. The diff between
> stable/linux-4.2.y and ...-4.3.y (which were tested) is not large, and
> my suspect fell on ripoff of register writing procedures complexity,
> which was introduced in e1ceb25a (see below). Reversion of that fixes
> lockup. However, if, on top of reversion of e1ceb25a, i drop barrier
> stuff and pci_read_config... (see
> https://github.com/bluecherrydvr/linux/commit/d59aaf3), leaving the
> spinlock stuff, it locks up again. This is a matter in which I'm not
> quite qualified, so I have no idea what that code copes with and why
> this workaround works for solo6010. For now I think I'll tell the
> customer to use kernel with e1ceb25a reverted, but for upstream fix, I'm
> interested in more in-depth investigation. I'll be able to provide dmesg
> logs a bit later.
>
> The breaking commit is quoted below.
>
> commit e1ceb25a1569ce5b61b9c496dd32d038ba8cb936
> Author: Krzysztof Hałasa <khalasa@piap.pl>
> Date: Mon Jun 8 10:42:24 2015 -0300
>
> [media] SOLO6x10: remove unneeded register locking and barriers
>
> readl() and writel() are atomic, we don't need the spin lock.
> Also, flushing posted write buffer isn't required. Especially on read :-)
>
> Signed-off-by: Krzysztof Ha?asa <khalasa@piap.pl>
> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
>
> diff --git a/drivers/media/pci/solo6x10/solo6x10-core.c b/drivers/media/pci/solo6x10/solo6x10-core.c
> index 84627e6..9c948b1 100644
> --- a/drivers/media/pci/solo6x10/solo6x10-core.c
> +++ b/drivers/media/pci/solo6x10/solo6x10-core.c
> @@ -483,7 +483,6 @@ static int solo_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
>
> solo_dev->type = id->driver_data;
> solo_dev->pdev = pdev;
> - spin_lock_init(&solo_dev->reg_io_lock);
> ret = v4l2_device_register(&pdev->dev, &solo_dev->v4l2_dev);
> if (ret)
> goto fail_probe;
> diff --git a/drivers/media/pci/solo6x10/solo6x10.h b/drivers/media/pci/solo6x10/solo6x10.h
> index 1ca54b0..27423d7 100644
> --- a/drivers/media/pci/solo6x10/solo6x10.h
> +++ b/drivers/media/pci/solo6x10/solo6x10.h
> @@ -199,7 +199,6 @@ struct solo_dev {
> int nr_ext;
> u32 irq_mask;
> u32 motion_mask;
> - spinlock_t reg_io_lock;
> struct v4l2_device v4l2_dev;
>
> /* tw28xx accounting */
> @@ -281,36 +280,13 @@ struct solo_dev {
>
> static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
> {
> - unsigned long flags;
> - u32 ret;
> - u16 val;
> -
> - spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
> -
> - ret = readl(solo_dev->reg_base + reg);
> - rmb();
> - pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
> - rmb();
> -
> - spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
> -
> - return ret;
> + return readl(solo_dev->reg_base + reg);
> }
>
> static inline void solo_reg_write(struct solo_dev *solo_dev, int reg,
> u32 data)
> {
> - unsigned long flags;
> - u16 val;
> -
> - spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
> -
> writel(data, solo_dev->reg_base + reg);
> - wmb();
> - pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
> - rmb();
> -
> - spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
> }
>
> static inline void solo_irq_on(struct solo_dev *dev, u32 mask)
> --
> To unsubscribe from this list: send the line "unsubscribe linux-media" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* Re: [PATCH 3/4] meta: use baserunner in oetest
From: Joshua Lock @ 2016-09-15 13:15 UTC (permalink / raw)
To: jwang, openembedded-core
In-Reply-To: <1473729455-32649-3-git-send-email-jing.j.wang@intel.com>
On Tue, 2016-09-13 at 09:17 +0800, jwang wrote:
> From: zjh <junhuix.zhang@intel.com>
>
> enable two features from baserunner:
> 1. loadtest
> 2. read test cases from manifest file
>
> Signed-off-by: zjh <junhuix.zhang@intel.com>
> ---
> meta/lib/oeqa/oetest.py | 24 ++++++++++++++----------
> 1 file changed, 14 insertions(+), 10 deletions(-)
>
> diff --git a/meta/lib/oeqa/oetest.py b/meta/lib/oeqa/oetest.py
> index 4a740fb..9211cec 100644
> --- a/meta/lib/oeqa/oetest.py
> +++ b/meta/lib/oeqa/oetest.py
> @@ -28,6 +28,8 @@ except ImportError:
> pass
> from oeqa.utils.decorators import LogResults, gettag, getResults
> from oeqa.utils import avoid_paths_in_environ
> +from base.baserunner import TestRunnerBase
> +
>
> logger = logging.getLogger("BitBake")
>
> @@ -203,8 +205,10 @@ def custom_verbose(msg, *args, **kwargs):
> logger.info(_buffer_logger.rstrip("\n"), *args,
> **kwargs)
> _buffer_logger = ""
>
> -class TestContext(object):
> +class TestContext(TestRunnerBase):
> + _configure_in_init = True
This is a funny variable, when would it not be True and why? Could we
add a comment here about what the variable is for?
Should it be an argument passed at object construction, as it's denoted
as internal by the _ prefix?
> def __init__(self, d, exported=False):
> + super(TestContext, self).__init__(self)
> self.d = d
>
> self.testsuites = self._get_test_suites()
> @@ -223,6 +227,9 @@ class TestContext(object):
> self.imagefeatures = d.getVar("IMAGE_FEATURES",
> True).split()
> self.distrofeatures = d.getVar("DISTRO_FEATURES",
> True).split()
>
> + if self._configure_in_init:
> + self.configure()
If we don't configure during __init__() when do we do it? Why might we
not do it during __init__() ?
> +
> # get testcase list from specified file
> # if path is a relative path, then relative to build/conf/
> def _read_testlist(self, fpath, builddir):
> @@ -329,9 +336,7 @@ class TestContext(object):
> def loadTests(self):
> setattr(oeTest, "tc", self)
>
> - testloader = unittest.TestLoader()
> - testloader.sortTestMethodsUsing = None
> - suites = [testloader.loadTestsFromName(name) for name in
> self.testslist]
> + suites = self.loadtest(self.testslist)
> suites = filterByTagExp(suites, getattr(self, "tagexp",
> None))
>
> # Determine dependencies between suites by looking for
> @skipUnlessPassed
> @@ -376,9 +381,9 @@ class TestContext(object):
> def cmpfunc(a, b):
> return cmp((a.depth, a.index), (b.depth, b.index))
>
> - suites.sort(key=functools.cmp_to_key(cmpfunc))
> + suites._tests.sort(key=functools.cmp_to_key(cmpfunc))
We appear to be using a non-public instance variable, is there
something else we could be using here to get the list of tests?
>
> - self.suite = testloader.suiteClass(suites)
> + self.suite = suites
>
> return self.suite
>
> @@ -387,11 +392,10 @@ class TestContext(object):
> if hasattr(self, "tagexp") and self.tagexp:
> logger.info("Filter test cases by tags: %s" %
> self.tagexp)
> logger.info("Found %s tests" % self.suite.countTestCases())
> - runner = unittest.TextTestRunner(verbosity=2)
> if 'bb' in sys.modules:
> - runner.stream.write = custom_verbose
> -
> - return runner.run(self.suite)
> + self.runner.stream.write = custom_verbose
> + self.start(self.suite)
> + return self.result()
>
> class RuntimeTestContext(TestContext):
> def __init__(self, d, target, exported=False):
> --
> 2.1.4
>
^ permalink raw reply
* Re: [PATCH 2/4] meta: implement key baserunner features
From: Joshua Lock @ 2016-09-15 13:15 UTC (permalink / raw)
To: jwang, openembedded-core
In-Reply-To: <1473729455-32649-2-git-send-email-jing.j.wang@intel.com>
On Tue, 2016-09-13 at 09:17 +0800, jwang wrote:
> From: zjh <junhuix.zhang@intel.com>
>
> Baserunner contains three features:
> 1. load cases from a manifest file
> 2. load cases from a package such as "oeqa.runtime"
> 3. create runner engine based on pyunit textrunner
I think this and 1/4 should probably be squashed together?
>
> Signed-off-by: zjh <junhuix.zhang@intel.com>
> ---
> meta/lib/base/baserunner.py | 44
> ++++++++++++++++++++++++++++++++++++++------
> 1 file changed, 38 insertions(+), 6 deletions(-)
>
> diff --git a/meta/lib/base/baserunner.py
> b/meta/lib/base/baserunner.py
> index 56b838e..d59872f 100755
> --- a/meta/lib/base/baserunner.py
> +++ b/meta/lib/base/baserunner.py
> @@ -31,30 +31,62 @@ class FakeOptions(object):
> class TestRunnerBase(object):
> '''test runner base '''
> def __init__(self, context=None):
> - self.tclist = []
> + self.testslist = []
> self.runner = None
> self.context = context if context else TestContext()
> + self.test_options = None
> self.test_result = None
> self.run_time = None
>
> + def __del__(self):
> + """
> + Because unittest.TestCase is a class object, it will exist
> as long as the python virtual machine process.
> + So tc can't be released if we don't release them explicitly.
> + """
> + if hasattr(unittest.TestCase, "tc"):
> + delattr(unittest.TestCase, "tc")
> +
> + @staticmethod
> + def get_tc_from_manifest(fname):
> + '''get tc list from manifest format '''
> + with open(fname, "r") as f:
> + tclist = [n.strip() for n in f.readlines() \
> + if n.strip() and not
> n.strip().startswith('#')]
> + return tclist
It might be nice to handle open() failing here? If open() fails we're
trying to return an undefined instance.
>
> def configure(self, options=FakeOptions()):
> '''configure before testing'''
> - pass
> + self.test_options = options
> + self.runner = unittest.TextTestRunner(stream=sys.stderr, \
There's no need for a backslash here, we can rely on Python's implied
continuation.
> + verbosity=2)
>
> def result(self):
> '''output test result '''
> - pass
> + return self.test_result
>
> def loadtest(self, names=None):
> '''load test suite'''
> - pass
> + if names is None:
It's much more idiomatic to write these like:
if not names:
> + names = self.testslist
> + testloader = unittest.TestLoader()
> + tclist = []
> + for name in names:
> + tset = testloader.loadTestsFromName(name)
> + if tset.countTestCases() > 0:
> + tclist.append(tset)
> + elif tset._tests == []:
variable names prefixed with an underscore are, by convention,
internal/private to the object.
Is there a case where countTestCases() might not be > 0 and _tests[] !=
[] ? i.e. can we just use an else here?
> + tclist.append(testloader.discover(name, "[!_]*.py",
> os.path.curdir))
> + return testloader.suiteClass(tclist)
>
> def runtest(self, testsuite):
> '''run test suite'''
> - pass
> + starttime = time.time()
> + self.test_result = self.runner.run(testsuite)
> + self.run_time = time.time() - starttime
>
> def start(self, testsuite):
> '''start testing'''
> - pass
> + setattr(unittest.TestCase, "tc", self.context)
> + self.runtest(testsuite)
> + self.result()
>
> --
> 2.1.4
>
^ permalink raw reply
* Re: [patch 11/32] greybus: camera driver
From: Laurent Pinchart @ 2016-09-15 13:16 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Arnd Bergmann, linux-kernel, Johan Hovold, Rui Miguel Silva,
Sandeep Patil, Matt Porter, John Stultz, Rob Herring,
Viresh Kumar, Alex Elder, David Lin, Bryan O'Donoghue,
Vaibhav Agarwal, Mark Greer
In-Reply-To: <20160915122234.640367870@bubbles.kroah.org>
Hi Greg,
Thank you for the patch.
On Thursday 15 Sep 2016 14:23:51 Greg Kroah-Hartman wrote:
> This driver implements the Greybus camera protocol.
>
> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> ---
> drivers/greybus/camera.c | 1400 ++++++++++++++++++++++++++++++++++++++++
> drivers/greybus/gb-camera.h | 127 +++
> 2 files changed, 1527 insertions(+)
>
> --- /dev/null
> +++ b/drivers/greybus/camera.c
> @@ -0,0 +1,1400 @@
[snip]
> +/* GB format to media code map */
> +static const struct gb_camera_fmt_info gb_fmt_info[] = {
> + {
> + .mbus_code = V4L2_MBUS_FMT_UYVY8_1X16,
> + .gb_format = 0x01,
> + .bpp = 16,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_NV12_1x8,
> + .gb_format = 0x12,
> + .bpp = 12,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_NV21_1x8,
> + .gb_format = 0x13,
> + .bpp = 12,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_YU12_1x8,
> + .gb_format = 0x16,
> + .bpp = 12,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_YV12_1x8,
> + .gb_format = 0x17,
> + .bpp = 12,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_JPEG_1X8,
> + .gb_format = 0x40,
> + .bpp = 0,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_GB_CAM_METADATA_1X8,
> + .gb_format = 0x41,
> + .bpp = 0,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_GB_CAM_DEBUG_DATA_1X8,
> + .gb_format = 0x42,
> + .bpp = 0,
> + },
These two formats will likely not be accepted in their current state in the
media subsystem, I would propose just dropping them.
> + {
> + .mbus_code = V4L2_MBUS_FMT_SBGGR10_1X10,
> + .gb_format = 0x80,
> + .bpp = 10,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_SGBRG10_1X10,
> + .gb_format = 0x81,
> + .bpp = 10,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
> + .gb_format = 0x82,
> + .bpp = 10,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_SRGGB10_1X10,
> + .gb_format = 0x83,
> + .bpp = 10,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_SBGGR12_1X12,
> + .gb_format = 0x84,
> + .bpp = 12,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_SGBRG12_1X12,
> + .gb_format = 0x85,
> + .bpp = 12,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
> + .gb_format = 0x86,
> + .bpp = 12,
> + },
> + {
> + .mbus_code = V4L2_MBUS_FMT_SRGGB12_1X12,
> + .gb_format = 0x87,
> + .bpp = 12,
> + },
> +};
[snip]
--
Regards,
Laurent Pinchart
^ permalink raw reply
* Re: [PATCH 1/4] meta: introduce a small baserunner framework
From: Joshua Lock @ 2016-09-15 13:15 UTC (permalink / raw)
To: jwang, openembedded-core
In-Reply-To: <1473729455-32649-1-git-send-email-jing.j.wang@intel.com>
Hi Jing,
Thanks for your submission.
On Tue, 2016-09-13 at 09:17 +0800, jwang wrote:
> From: zjh <junhuix.zhang@intel.com>
There's no commit message here, which makes this harder to review as I
have to try and work out what it's for and why we want it.
A useful commit message would tell me why we are introducing a
baserunner framework. This may also make a useful comment in the code
itself.
Also, the patch prefix for the series should be "lib/oeqa", i.e
"[PATCH 3/4] lib/oeqa: use baserunner in oetest"
> Signed-off-by: zjh <junhuix.zhang@intel.com>
> ---
> meta/lib/base/baserunner.py | 60
> +++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 60 insertions(+)
> create mode 100755 meta/lib/base/baserunner.py
>
> diff --git a/meta/lib/base/baserunner.py
> b/meta/lib/base/baserunner.py
> new file mode 100755
> index 0000000..56b838e
> --- /dev/null
> +++ b/meta/lib/base/baserunner.py
> @@ -0,0 +1,60 @@
> +#!/usr/bin/env python
We're defaulting to Python3 in OE-Core nowadays, do you really want
Python2 here (which is the default Python on most Linux distros)
> +# Copyright (C) 2013 Intel Corporation
> +#
> +# Released under the MIT license (see COPYING.MIT)
> +
> +# Base unittest module used by testrunner
> +# This provides the common test runner functionalities including
> manifest input,
> +# xunit output, timeout, tag filtering.
> +
> +"""Base testrunner"""
> +
> +from __future__ import absolute_import
> +import os
> +import sys
> +import time
> +import unittest
> +import shutil
> +
> +class TestContext(object):
> + '''test context which inject into testcase'''
> + def __init__(self):
> + self.target = None
> +
> +class FakeOptions(object):
> + '''This class just use for configure's defualt arg.
> + Usually, we use this object in a non comandline
> environment.'''
> + timeout = 0
> + def __getattr__(self, name):
> + return None
What's the purpose of overloading __getattr__() here?
> +
> +class TestRunnerBase(object):
> + '''test runner base '''
This comment isn't very useful, same for other similar comments in this
series.
> + def __init__(self, context=None):
> + self.tclist = []
> + self.runner = None
> + self.context = context if context else TestContext()
This would probably be better as:
self.context = context or TestContext()
or better yet, pass TestContext() as the default param for context,
rather than None?
> + self.test_result = None
> + self.run_time = None
> +
> +
> + def configure(self, options=FakeOptions()):
> + '''configure before testing'''
> + pass
> +
> + def result(self):
> + '''output test result '''
> + pass
> +
> + def loadtest(self, names=None):
> + '''load test suite'''
> + pass
> +
> + def runtest(self, testsuite):
> + '''run test suite'''
> + pass
> +
> + def start(self, testsuite):
> + '''start testing'''
> + pass
> +
> --
> 2.1.4
>
^ permalink raw reply
* [PATCH] dmaengine: DW DMAC: split pdata to hardware properties and platform quirks
From: Eugeniy Paltsev @ 2016-09-15 13:14 UTC (permalink / raw)
To: dmaengine
Cc: linux-kernel, vinod.koul, dan.j.williams, andriy.shevchenko,
vireshk, linux-snps-arc, Eugeniy Paltsev
This patch is to address a proposal by Andy in this thread:
http://www.spinics.net/lists/dmaengine/msg10754.html
Split platform data to actual hardware properties, and platform quirks.
Now we able to use quirks and hardware properties separately from
different sources (pdata, device tree or autoconfig registers)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
---
drivers/dma/dw/core.c | 31 +++++++++++++++-----------
drivers/dma/dw/platform.c | 42 +++++++++++++++++++++---------------
include/linux/platform_data/dma-dw.h | 20 +++++++++++------
3 files changed, 57 insertions(+), 36 deletions(-)
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index c2c0a61..9352735 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1451,10 +1451,25 @@ int dw_dma_probe(struct dw_dma_chip *chip)
dw->regs = chip->regs;
chip->dw = dw;
+ /* Reassign the platform data pointer */
+ pdata = dw->pdata;
pm_runtime_get_sync(chip->dev);
- if (!chip->pdata) {
+ if ((!chip->pdata) ||
+ (chip->pdata && test_bit(QUIRKS_ONLY_USED, &chip->pdata->quirks))) {
+
+ /*
+ * Fill quirks with the default values in case of pdata absence
+ */
+ if (!chip->pdata) {
+ set_bit(QUIRKS_IS_PRIVATE, &pdata->quirks);
+ set_bit(QUIRKS_IS_MEMCPY, &pdata->quirks);
+ set_bit(QUIRKS_IS_NOLLP, &pdata->quirks);
+ } else {
+ pdata->quirks = chip->pdata->quirks;
+ }
+
dw_params = dma_readl(dw, DW_PARAMS);
dev_dbg(chip->dev, "DW_PARAMS: 0x%08x\n", dw_params);
@@ -1464,9 +1479,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
goto err_pdata;
}
- /* Reassign the platform data pointer */
- pdata = dw->pdata;
-
/* Get hardware configuration parameters */
pdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN & 7) + 1;
pdata->nr_masters = (dw_params >> DW_PARAMS_NR_MASTER & 3) + 1;
@@ -1477,8 +1489,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
pdata->block_size = dma_readl(dw, MAX_BLK_SIZE);
/* Fill platform data with the default values */
- pdata->is_private = true;
- pdata->is_memcpy = true;
pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING;
pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
} else if (chip->pdata->nr_channels > DW_DMA_MAX_NR_CHANNELS) {
@@ -1486,9 +1496,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
goto err_pdata;
} else {
memcpy(dw->pdata, chip->pdata, sizeof(*dw->pdata));
-
- /* Reassign the platform data pointer */
- pdata = dw->pdata;
}
dw->chan = devm_kcalloc(chip->dev, pdata->nr_channels, sizeof(*dw->chan),
@@ -1569,7 +1576,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)
(dwc_params >> DWC_PARAMS_MBLK_EN & 0x1) == 0;
} else {
dwc->block_size = pdata->block_size;
- dwc->nollp = pdata->is_nollp;
+ dwc->nollp = test_bit(QUIRKS_IS_NOLLP, &pdata->quirks);
}
}
@@ -1582,9 +1589,9 @@ int dw_dma_probe(struct dw_dma_chip *chip)
/* Set capabilities */
dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
- if (pdata->is_private)
+ if (test_bit(QUIRKS_IS_PRIVATE, &pdata->quirks))
dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
- if (pdata->is_memcpy)
+ if (test_bit(QUIRKS_IS_MEMCPY, &pdata->quirks))
dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
dw->dma.dev = chip->dev;
diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
index 5bda0eb..308b977 100644
--- a/drivers/dma/dw/platform.c
+++ b/drivers/dma/dw/platform.c
@@ -12,6 +12,7 @@
* published by the Free Software Foundation.
*/
+#include <linux/bitops.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/clk.h>
@@ -111,41 +112,48 @@ dw_dma_parse_dt(struct platform_device *pdev)
return NULL;
}
- if (of_property_read_u32(np, "dma-masters", &nr_masters))
- return NULL;
- if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
- return NULL;
-
- if (of_property_read_u32(np, "dma-channels", &nr_channels))
- return NULL;
-
pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return NULL;
+ set_bit(QUIRKS_ONLY_USED, &pdata->quirks);
+
+ if (of_property_read_bool(np, "is-private"))
+ set_bit(QUIRKS_IS_PRIVATE, &pdata->quirks);
+
+ if (of_property_read_bool(np, "is-memcpy"))
+ set_bit(QUIRKS_IS_MEMCPY, &pdata->quirks);
+
+ if (of_property_read_bool(np, "is-nollp"))
+ set_bit(QUIRKS_IS_NOLLP, &pdata->quirks);
+
+ if (of_property_read_u32(np, "dma-masters", &nr_masters))
+ return pdata;
+ if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
+ return pdata;
+
pdata->nr_masters = nr_masters;
- pdata->nr_channels = nr_channels;
- if (of_property_read_bool(np, "is_private"))
- pdata->is_private = true;
+ if (of_property_read_u32(np, "dma-channels", &nr_channels))
+ return pdata;
- if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
+ pdata->nr_channels = nr_channels;
+
+ if (!of_property_read_u32(np, "chan-allocation-order", &tmp))
pdata->chan_allocation_order = (unsigned char)tmp;
- if (!of_property_read_u32(np, "chan_priority", &tmp))
+ if (!of_property_read_u32(np, "chan-priority", &tmp))
pdata->chan_priority = tmp;
- if (!of_property_read_u32(np, "block_size", &tmp))
+ if (!of_property_read_u32(np, "block-size", &tmp))
pdata->block_size = tmp;
if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) {
for (tmp = 0; tmp < nr_masters; tmp++)
pdata->data_width[tmp] = arr[tmp];
- } else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) {
- for (tmp = 0; tmp < nr_masters; tmp++)
- pdata->data_width[tmp] = BIT(arr[tmp] & 0x07);
}
+ clear_bit(QUIRKS_ONLY_USED, &pdata->quirks);
return pdata;
}
#else
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index 5f0e11e..9cd8199 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -37,10 +37,7 @@ struct dw_dma_slave {
/**
* struct dw_dma_platform_data - Controller configuration parameters
* @nr_channels: Number of channels supported by hardware (max 8)
- * @is_private: The device channels should be marked as private and not for
- * by the general purpose DMA channel allocator.
- * @is_memcpy: The device channels do support memory-to-memory transfers.
- * @is_nollp: The device channels does not support multi block transfers.
+ * @quirks: Bit field with platform quirks
* @chan_allocation_order: Allocate channels starting from 0 or 7
* @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
* @block_size: Maximum block size supported by the controller
@@ -50,9 +47,18 @@ struct dw_dma_slave {
*/
struct dw_dma_platform_data {
unsigned int nr_channels;
- bool is_private;
- bool is_memcpy;
- bool is_nollp;
+/* Only use quirks from platform data structure */
+#define QUIRKS_ONLY_USED 0
+/*
+ * The device channels should be marked as private and not for
+ * by the general purpose DMA channel allocator.
+ */
+#define QUIRKS_IS_PRIVATE 1
+/* The device channels do support memory-to-memory transfers. */
+#define QUIRKS_IS_MEMCPY 2
+/* The device channels do not support multi block transfers. */
+#define QUIRKS_IS_NOLLP 3
+ unsigned long quirks;
#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
unsigned char chan_allocation_order;
--
2.5.5
^ permalink raw reply related
* [PATCH] dmaengine: DW DMAC: split pdata to hardware properties and platform quirks
From: Eugeniy Paltsev @ 2016-09-15 13:14 UTC (permalink / raw)
To: linux-snps-arc
This patch is to address a proposal by Andy in this thread:
http://www.spinics.net/lists/dmaengine/msg10754.html
Split platform data to actual hardware properties, and platform quirks.
Now we able to use quirks and hardware properties separately from
different sources (pdata, device tree or autoconfig registers)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
---
drivers/dma/dw/core.c | 31 +++++++++++++++-----------
drivers/dma/dw/platform.c | 42 +++++++++++++++++++++---------------
include/linux/platform_data/dma-dw.h | 20 +++++++++++------
3 files changed, 57 insertions(+), 36 deletions(-)
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index c2c0a61..9352735 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1451,10 +1451,25 @@ int dw_dma_probe(struct dw_dma_chip *chip)
dw->regs = chip->regs;
chip->dw = dw;
+ /* Reassign the platform data pointer */
+ pdata = dw->pdata;
pm_runtime_get_sync(chip->dev);
- if (!chip->pdata) {
+ if ((!chip->pdata) ||
+ (chip->pdata && test_bit(QUIRKS_ONLY_USED, &chip->pdata->quirks))) {
+
+ /*
+ * Fill quirks with the default values in case of pdata absence
+ */
+ if (!chip->pdata) {
+ set_bit(QUIRKS_IS_PRIVATE, &pdata->quirks);
+ set_bit(QUIRKS_IS_MEMCPY, &pdata->quirks);
+ set_bit(QUIRKS_IS_NOLLP, &pdata->quirks);
+ } else {
+ pdata->quirks = chip->pdata->quirks;
+ }
+
dw_params = dma_readl(dw, DW_PARAMS);
dev_dbg(chip->dev, "DW_PARAMS: 0x%08x\n", dw_params);
@@ -1464,9 +1479,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
goto err_pdata;
}
- /* Reassign the platform data pointer */
- pdata = dw->pdata;
-
/* Get hardware configuration parameters */
pdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN & 7) + 1;
pdata->nr_masters = (dw_params >> DW_PARAMS_NR_MASTER & 3) + 1;
@@ -1477,8 +1489,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
pdata->block_size = dma_readl(dw, MAX_BLK_SIZE);
/* Fill platform data with the default values */
- pdata->is_private = true;
- pdata->is_memcpy = true;
pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING;
pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
} else if (chip->pdata->nr_channels > DW_DMA_MAX_NR_CHANNELS) {
@@ -1486,9 +1496,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
goto err_pdata;
} else {
memcpy(dw->pdata, chip->pdata, sizeof(*dw->pdata));
-
- /* Reassign the platform data pointer */
- pdata = dw->pdata;
}
dw->chan = devm_kcalloc(chip->dev, pdata->nr_channels, sizeof(*dw->chan),
@@ -1569,7 +1576,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)
(dwc_params >> DWC_PARAMS_MBLK_EN & 0x1) == 0;
} else {
dwc->block_size = pdata->block_size;
- dwc->nollp = pdata->is_nollp;
+ dwc->nollp = test_bit(QUIRKS_IS_NOLLP, &pdata->quirks);
}
}
@@ -1582,9 +1589,9 @@ int dw_dma_probe(struct dw_dma_chip *chip)
/* Set capabilities */
dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
- if (pdata->is_private)
+ if (test_bit(QUIRKS_IS_PRIVATE, &pdata->quirks))
dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
- if (pdata->is_memcpy)
+ if (test_bit(QUIRKS_IS_MEMCPY, &pdata->quirks))
dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
dw->dma.dev = chip->dev;
diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
index 5bda0eb..308b977 100644
--- a/drivers/dma/dw/platform.c
+++ b/drivers/dma/dw/platform.c
@@ -12,6 +12,7 @@
* published by the Free Software Foundation.
*/
+#include <linux/bitops.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/clk.h>
@@ -111,41 +112,48 @@ dw_dma_parse_dt(struct platform_device *pdev)
return NULL;
}
- if (of_property_read_u32(np, "dma-masters", &nr_masters))
- return NULL;
- if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
- return NULL;
-
- if (of_property_read_u32(np, "dma-channels", &nr_channels))
- return NULL;
-
pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return NULL;
+ set_bit(QUIRKS_ONLY_USED, &pdata->quirks);
+
+ if (of_property_read_bool(np, "is-private"))
+ set_bit(QUIRKS_IS_PRIVATE, &pdata->quirks);
+
+ if (of_property_read_bool(np, "is-memcpy"))
+ set_bit(QUIRKS_IS_MEMCPY, &pdata->quirks);
+
+ if (of_property_read_bool(np, "is-nollp"))
+ set_bit(QUIRKS_IS_NOLLP, &pdata->quirks);
+
+ if (of_property_read_u32(np, "dma-masters", &nr_masters))
+ return pdata;
+ if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
+ return pdata;
+
pdata->nr_masters = nr_masters;
- pdata->nr_channels = nr_channels;
- if (of_property_read_bool(np, "is_private"))
- pdata->is_private = true;
+ if (of_property_read_u32(np, "dma-channels", &nr_channels))
+ return pdata;
- if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
+ pdata->nr_channels = nr_channels;
+
+ if (!of_property_read_u32(np, "chan-allocation-order", &tmp))
pdata->chan_allocation_order = (unsigned char)tmp;
- if (!of_property_read_u32(np, "chan_priority", &tmp))
+ if (!of_property_read_u32(np, "chan-priority", &tmp))
pdata->chan_priority = tmp;
- if (!of_property_read_u32(np, "block_size", &tmp))
+ if (!of_property_read_u32(np, "block-size", &tmp))
pdata->block_size = tmp;
if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) {
for (tmp = 0; tmp < nr_masters; tmp++)
pdata->data_width[tmp] = arr[tmp];
- } else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) {
- for (tmp = 0; tmp < nr_masters; tmp++)
- pdata->data_width[tmp] = BIT(arr[tmp] & 0x07);
}
+ clear_bit(QUIRKS_ONLY_USED, &pdata->quirks);
return pdata;
}
#else
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index 5f0e11e..9cd8199 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -37,10 +37,7 @@ struct dw_dma_slave {
/**
* struct dw_dma_platform_data - Controller configuration parameters
* @nr_channels: Number of channels supported by hardware (max 8)
- * @is_private: The device channels should be marked as private and not for
- * by the general purpose DMA channel allocator.
- * @is_memcpy: The device channels do support memory-to-memory transfers.
- * @is_nollp: The device channels does not support multi block transfers.
+ * @quirks: Bit field with platform quirks
* @chan_allocation_order: Allocate channels starting from 0 or 7
* @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
* @block_size: Maximum block size supported by the controller
@@ -50,9 +47,18 @@ struct dw_dma_slave {
*/
struct dw_dma_platform_data {
unsigned int nr_channels;
- bool is_private;
- bool is_memcpy;
- bool is_nollp;
+/* Only use quirks from platform data structure */
+#define QUIRKS_ONLY_USED 0
+/*
+ * The device channels should be marked as private and not for
+ * by the general purpose DMA channel allocator.
+ */
+#define QUIRKS_IS_PRIVATE 1
+/* The device channels do support memory-to-memory transfers. */
+#define QUIRKS_IS_MEMCPY 2
+/* The device channels do not support multi block transfers. */
+#define QUIRKS_IS_NOLLP 3
+ unsigned long quirks;
#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
unsigned char chan_allocation_order;
--
2.5.5
^ permalink raw reply related
* Re: [PATCH 3/3] efi: Format EFI version prints the way the standard says.
From: Peter Jones @ 2016-09-15 13:13 UTC (permalink / raw)
To: Matt Fleming
Cc: linux-efi-u79uwXL29TY76Z2rM5mHXA, Ard Biesheuvel, Lukas Wunner
In-Reply-To: <20160915091822.GA16797-mF/unelCI9GS6iBeEJttW/XRex20P6io@public.gmane.org>
On Thu, Sep 15, 2016 at 10:18:22AM +0100, Matt Fleming wrote:
> On Wed, 07 Sep, at 10:56:26AM, Peter Jones wrote:
> > We print "EFI v2.xx.yy vendor blahblah" at several places. Make them
> > conform to the standard format.
> >
> > This leaves 2 checkpatch warnings in arch/ia64/kernel/efi.c intact; the
> > old code would have produced them, and they match the nearby code in the
> > functions.
> >
> > Signed-off-by: Peter Jones <pjones-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
> > Reviewed-by: Lukas Wunner <lukas-JFq808J9C/izQB+pC5nmwQ@public.gmane.org>
> > ---
> > arch/ia64/kernel/efi.c | 14 ++++++--------
> > arch/x86/platform/efi/efi.c | 20 ++++++++++++--------
> > drivers/firmware/efi/arm-init.c | 13 ++++++-------
> > drivers/firmware/efi/efi.c | 16 +++++++++++++---
> > include/linux/efi.h | 2 ++
> > 5 files changed, 39 insertions(+), 26 deletions(-)
>
> I'm not sure about this one. Booting with this patch on my test VMs I
> see the old,
>
> efi: EFI v2.40 by EDK II
>
> now reading,
>
> efi: EFI v2.4 by EDK II
>
> Yes, the new string is obviously more correct but gratuitous changes
> to the strings we print on boot have caused trouble in the past. If
> people have scripts or tests that check the EFI version that gets
> printed they'll break.
>
> Are there any additional supporting reasons for this patch?
Really I just prefer to have them say the same thing the spec does - but
your point is certainly valid. Would you be happier with it if I put a
check in that only prints the new way for, say, revisions newer than
2.6, and prints them the older way otherwise?
--
Peter
^ permalink raw reply
* Re: [Qemu-devel] [Xen-devel] [RFC] e1000: Don't save writes to ICS/ICR masked by IMS
From: Denis V. Lunev @ 2016-09-15 12:46 UTC (permalink / raw)
To: Ed Swierk, Denis V. Lunev; +Cc: xen-devel, qemu-devel, Konrad Rzeszutek Wilk
In-Reply-To: <CAO_EM_kOFu7Rvv6Yc6Z7==zeix0KMjdKCe-arqhOm6xPVxMNqA@mail.gmail.com>
On 09/15/2016 03:22 PM, Ed Swierk wrote:
> On Thu, Sep 15, 2016 at 2:15 AM, Denis V. Lunev <den@openvz.org> wrote:
>> On 09/13/2016 11:59 PM, Konrad Rzeszutek Wilk wrote:
>>> On Thu, Sep 01, 2016 at 10:57:48AM -0700, Ed Swierk wrote:
>>>> Windows 8, 10 and Server 2012 guests hang intermittently while booting
>>>> on Xen 4.5.3 with 1 vCPU and 4 e1000 vNICs, shortly after the Windows
>>>> logo appears and the little dots start spinning.
>>>>
>>>> Running strace on qemu shows its main thread doing the following every
>>>> couple of milliseconds:
>>>>
>>>> ppoll([..., {fd=30</dev/xen/evtchn>, events=POLLIN|POLLERR|POLLHUP},
>>>> ...], ...) = 1 ([{fd=30, revents=POLLIN}], ...)
>>>> read(30</dev/xen/evtchn>, "^\0\0\0", 4) = 4
>>>> write(30</dev/xen/evtchn>, "^\0\0\0", 4) = 4
>>>> ioctl(30</dev/xen/evtchn>, IOCTL_EVTCHN_NOTIFY, 0x7f1f9449d310) = 0
>>>> clock_gettime(CLOCK_MONOTONIC, {6937, 449468262}) = 0
>>>> clock_gettime(CLOCK_MONOTONIC, {6937, 449582903}) = 0
>>>> gettimeofday({1472251376, 673434}, NULL) = 0
>>>> clock_gettime(CLOCK_MONOTONIC, {6937, 449856205}) = 0
>>>> gettimeofday({1472251376, 673679}, NULL) = 0
>>>>
>>>> The event channel (identified by '^' or 94 in this example) is always
>>>> the third of the domain's four channels.
>>>>
>>>> Two recent qemu patches (http://git.qemu.org/?p=qemu.git;h=9596ef7c and
>>>> http://git.qemu.org/?p=qemu.git;h=74004e8c) seem to address similar
>>>> issues, but don't help in this case.
>>>>
>>>> The proposed fix from
>>>> https://bugzilla.redhat.com/show_bug.cgi?id=874406#c78 makes the hang
>>>> go away. It's not clear to me why it works, or if it's just papering
>>>> over a bug elsewhere, or if there are any possible side effects.
>>> CC-ing Denis.
>>>
>>>
>>> Is the fix below based on reading the spec or more of instrumenting?
>>>
>>> Thanks.
>> hmm. I have looked in our older code (completely separate
>> from QEMU). It does not have this trick.
>>
>> 2012r2 (as far as I remember) has a bug in the driver
>> when LSC interrupt was raised unexpectedly during driver
>> initialization. The original bug was about TXQE. Can you
>> pls confirm which interrupt causes the storm?
> How can I tell which interrupt is firing? Instrument the QEMU e1000 code?
>
> --Ed
>
connect with gdb to qemu, set break into set_interrupt_cause
and dump value of s->mac_reg[ICS], s->mac_reg[IMS] and s->mac_reg[ICR]
Bits are defined here hw/net/e1000_regs.h
/* Interrupt Cause Read */
#define E1000_ICR_TXDW 0x00000001 /* Transmit desc written back */
#define E1000_ICR_TXQE 0x00000002 /* Transmit Queue empty */
Den
^ permalink raw reply
* Re: [PATCH v3 02/15] eal/soc: add rte_eal_soc_register/unregister logic
From: Jan Viktorin @ 2016-09-15 13:09 UTC (permalink / raw)
To: Hunt, David; +Cc: Shreyansh Jain, dev, hemant.agrawal
In-Reply-To: <84c34eed-b2cb-5cbe-883c-dbbe3741e35f@intel.com>
On Thu, 15 Sep 2016 14:00:25 +0100
"Hunt, David" <david.hunt@intel.com> wrote:
> > new file mode 100644
> > index 0000000..56135ed
> > --- /dev/null
> > +++ b/lib/librte_eal/common/eal_common_soc.c
> > @@ -0,0 +1,56 @@
> > +/*-
> > + * BSD LICENSE
> > + *
> > + * Copyright(c) 2016 RehiveTech. All rights reserved.
> > + * All rights reserved.
>
> Duplicate "All rights reserved"
This is present in many source files in DPDK... I don't know why.
lib/librte_eal/common/eal_common_pci.c
lib/librte_eal/common/eal_common_dev.c
...
Jan
>
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions
> > + * are met:
> > + *
> > + * * Redistributions of source code must retain the above copyright
> > + * notice, this list of conditions and the following disclaimer.
> > + * * Redistributions in binary form must reproduce the above copyright
> > + * notice, this list of conditions and the following disclaimer in
> > + * the documentation and/or other materials provided with the
> > + * distribution.
> > + * * Neither the name of RehiveTech nor the names of its
> > + * contributors may be used to endorse or promote products derived
> > + * from this software without specific prior written permission.
> > + *
^ permalink raw reply
* Re: [PATCH 4/7 v3] sched: propagate load during synchronous attach/detach
From: Dietmar Eggemann @ 2016-09-15 13:11 UTC (permalink / raw)
To: Vincent Guittot, peterz, mingo, linux-kernel, yuyang.du,
Morten.Rasmussen
Cc: linaro-kernel, pjt, bsegall
In-Reply-To: <1473666472-13749-5-git-send-email-vincent.guittot@linaro.org>
On 12/09/16 08:47, Vincent Guittot wrote:
> When a task moves from/to a cfs_rq, we set a flag which is then used to
> propagate the change at parent level (sched_entity and cfs_rq) during
> next update. If the cfs_rq is throttled, the flag will stay pending until
> the cfs_rw is unthrottled.
>
> For propagating the utilization, we copy the utilization of child cfs_rq to
s/child/group ?
> the sched_entity.
>
> For propagating the load, we have to take into account the load of the
> whole task group in order to evaluate the load of the sched_entity.
> Similarly to what was done before the rewrite of PELT, we add a correction
> factor in case the task group's load is less than its share so it will
> contribute the same load of a task of equal weight.
What about cfs_rq->runnable_load_avg?
[...]
> +/* Take into account change of load of a child task group */
> +static inline void
> +update_tg_cfs_load(struct cfs_rq *cfs_rq, struct sched_entity *se)
> +{
> + struct cfs_rq *gcfs_rq = group_cfs_rq(se);
> + long delta, load = gcfs_rq->avg.load_avg;
> +
> + /* If the load of group cfs_rq is null, the load of the
> + * sched_entity will also be null so we can skip the formula
> + */
> + if (load) {
> + long tg_load;
> +
> + /* Get tg's load and ensure tg_load > 0 */
> + tg_load = atomic_long_read(&gcfs_rq->tg->load_avg) + 1;
> +
> + /* Ensure tg_load >= load and updated with current load*/
> + tg_load -= gcfs_rq->tg_load_avg_contrib;
> + tg_load += load;
> +
> + /* scale gcfs_rq's load into tg's shares*/
> + load *= scale_load_down(gcfs_rq->tg->shares);
> + load /= tg_load;
> +
> + /*
> + * we need to compute a correction term in the case that the
> + * task group is consuming <1 cpu so that we would contribute
> + * the same load as a task of equal weight.
Wasn't 'consuming <1' related to 'NICE_0_LOAD' and not
scale_load_down(gcfs_rq->tg->shares) before the rewrite of PELT (v4.2,
__update_group_entity_contrib())?
> + */
> + if (tg_load < scale_load_down(gcfs_rq->tg->shares)) {
> + load *= tg_load;
> + load /= scale_load_down(gcfs_rq->tg->shares);
> + }
> + }
[...]
^ permalink raw reply
* Re: [PATCH 4/7 v3] sched: propagate load during synchronous attach/detach
From: Vincent Guittot @ 2016-09-15 13:11 UTC (permalink / raw)
To: Peter Zijlstra
Cc: Ingo Molnar, linux-kernel, Yuyang Du, Morten Rasmussen,
Linaro Kernel Mailman List, Dietmar Eggemann, Paul Turner,
Benjamin Segall
In-Reply-To: <20160915125905.GQ5008@twins.programming.kicks-ass.net>
On 15 September 2016 at 14:59, Peter Zijlstra <peterz@infradead.org> wrote:
> On Mon, Sep 12, 2016 at 09:47:49AM +0200, Vincent Guittot wrote:
>> + /* If the load of group cfs_rq is null, the load of the
>> + * sched_entity will also be null so we can skip the formula
>> + */
>
> https://lkml.kernel.org/r/CA+55aFyQYJerovMsSoSKS7PessZBr4vNp-3QUUwhqk4A4_jcbg@mail.gmail.com
>
I'm going to fix it right now.
I thought that checkpatch.pl would have raised a warning for this
comment style issue
>
^ permalink raw reply
* Re: alsa-tools FTBFS on armel: gcc-6 narrowing conversions
From: Takashi Sakamoto @ 2016-09-15 13:11 UTC (permalink / raw)
To: Takashi Iwai, Elimar Riesebieter, Jaroslav Kysela; +Cc: alsa-devel
In-Reply-To: <s5hk2edu2w1.wl-tiwai@suse.de>
Hi,
On Sep 15 2016 14:51, Takashi Iwai wrote:
> On Mon, 12 Sep 2016 18:52:18 +0200,
> Elimar Riesebieter wrote:
>>
>> Hi all,
>>
>> in Debian a FTBFS was discovered in building alsa-tools:
>>
>> | arm-linux-gnueabi-g++ -DPACKAGE_NAME=\"hdspmixer\" -DPACKAGE_TARNAME=\"hdspmixer\" -DPACKAGE_VERSION=\"1.11\" -DPACKAGE_STRING=\"hdspmixer\ 1.11\" -DPACKAGE_BUGREPORT=\"\" -DPACKAGE_URL=\"\" -DPACKAGE=\"hdspmixer\" -DVERSION=\"1.11\" -DSTDC_HEADERS=1 -DHAVE_LIBASOUND=1 -I. -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -fdebug-prefix-map=/<<PKGBUILDDIR>>=. -fstack-protector-strong -Wformat -Werror=format-security -I/usr/include/freetype2 -D_THREAD_SAFE -D_REENTRANT -fno-exceptions -MT channelmap.o -MD -MP -MF .deps/channelmap.Tpo -c -o channelmap.o channelmap.cxx
>> | channelmap.cxx:59:1: error: narrowing conversion of '-1' from 'int' to 'char' inside { } [-Wnarrowing]
>> | };
>> | ^
>>
>> More Details can be found at:
>> https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=837590
>>
>> Could this be fixed for next release?
>
> Yes, this was already fixed in git tree.
This issue was fixed by this commit.
gcc6 narrowing error
http://git.alsa-project.org/?p=alsa-tools.git;a=commit;h=70118f5f93a4179a0df61925e64baf873f126be0
However, we have never released new alsa-tools package with this fix.
It's still v1.1.0.
http://alsa-project.org/main/index.php/Download
> Jaroslav
Let us release the new alsa-tools package in the timing of kernel 4.8
release, for each distribution project?
Regards
Takashi Sakamoto
^ permalink raw reply
* RE: [PATCH v3 1/4] tpm/tpm_crb: implement tpm crb idle state
From: Winkler, Tomas @ 2016-09-15 13:09 UTC (permalink / raw)
To: Jarkko Sakkinen
Cc: tpmdd-devel@lists.sourceforge.net, Jason Gunthorpe,
linux-kernel@vger.kernel.org
In-Reply-To: <20160915105347.GB22431@intel.com>
> On Thu, Sep 15, 2016 at 08:23:03AM +0000, Winkler, Tomas wrote:
> > > > > Subject: Re: [PATCH v3 1/4] tpm/tpm_crb: implement tpm crb idle
> > > > > state
> > > > >
> > > > > On Mon, Sep 12, 2016 at 04:04:18PM +0300, Tomas Winkler wrote:
> > > > > > The register TPM_CRB_CTRL_REQ_x contains bits goIdle and
> > > > > > cmdReady for SW to indicate that the device can enter or should exit
> the idle state.
> > > > > >
> > > > > > The legacy ACPI-start (SMI + DMA) based devices do not support
> > > > > > these bits and the idle state management is not exposed to the
> > > > > > host
> > > SW.
> > > > > > Thus, this functionality only is enabled only for a CRB start
> > > > > > (MMIO) based devices.
> > > > > >
> > > > > > Based on Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
> > > > > > oringal
> > > > > > patch:
> > > > > > 'tpm_crb: implement power tpm crb power management'
> > > > > >
> > > > > >
> > > > > > Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
> > > > > > ---
> > > > > > V2: do not export the functions via tpm ops
> > > > > > V3: fix lower case corruption; adjust function documentation
> > > > > >
> > > > > > drivers/char/tpm/tpm_crb.c | 69
> > > > > > ++++++++++++++++++++++++++++++++++++++++++++++
> > > > > > 1 file changed, 69 insertions(+)
> > > > > >
> > > > > > diff --git a/drivers/char/tpm/tpm_crb.c
> > > > > > b/drivers/char/tpm/tpm_crb.c index 6e9d1bca712f..b6923a8b3ff7
> > > > > > 100644
> > > > > > --- a/drivers/char/tpm/tpm_crb.c
> > > > > > +++ b/drivers/char/tpm/tpm_crb.c
> > > > > > @@ -83,6 +83,75 @@ struct crb_priv {
> > > > > > u32 cmd_size;
> > > > > > };
> > > > > >
> > > > > > +/**
> > > > > > + * crb_go_idle - request tpm crb device to go the idle state
> > > > > > + *
> > > > > > + * @dev: crb device
> > > > > > + * @priv: crb private data
> > > > > > + *
> > > > > > + * Write CRB_CTRL_REQ_GO_IDLE to TPM_CRB_CTRL_REQ
> > > > > > + * The device should respond within TIMEOUT_C by clearing the
> bit.
> > > > > > + * Anyhow, we do not wait here as a consequent CMD_READY
> > > > > > +request
> > > > > > + * will be handled correctly even if idle was not completed.
> > > > > > + *
> > > > > > + * The function does nothing for devices with ACPI-start method.
> > > > > > + *
> > > > > > + * Return: 0 always
> > > > > > + */
> > > > > > +static int __maybe_unused crb_go_idle(struct device *dev,
> > > > > > +struct crb_priv *priv) {
> > > > > > + if (priv->flags & CRB_FL_ACPI_START)
> > > > > > + return 0;
> > > > > > +
> > > > > > + iowrite32(CRB_CTRL_REQ_GO_IDLE, &priv->cca->req);
> > > > > > + /* we don't really care when this settles */
> > > > > > +
> > > > > > + return 0;
> > > > > > +}
> > > > > > +
> > > > > > +/**
> > > > > > + * crb_cmd_ready - request tpm crb device to enter ready
> > > > > > +state
> > > > > > + *
> > > > > > + * @dev: crb device
> > > > > > + * @priv: crb private data
> > > > > > + *
> > > > > > + * Write CRB_CTRL_REQ_CMD_READY to TPM_CRB_CTRL_REQ
> > > > > > + * and poll till the device acknowledge it by clearing the bit.
> > > > > > + * The device should respond within TIMEOUT_C.
> > > > > > + *
> > > > > > + * The function does nothing for devices with ACPI-start
> > > > > > +method
> > > > > > + *
> > > > > > + * Return: 0 on success -ETIME on timeout; */ static int
> > > > > > +__maybe_unused crb_cmd_ready(struct device *dev,
> > > > > > + struct crb_priv *priv)
> > > > > > +{
> > > > > > + ktime_t stop, start;
> > > > > > +
> > > > > > + if (priv->flags & CRB_FL_ACPI_START)
> > > > > > + return 0;
> > > > > > +
> > > > > > + iowrite32(CRB_CTRL_REQ_CMD_READY, &priv->cca->req);
> > > > > > +
> > > > > > + start = ktime_get();
> > > > > > + stop = ktime_add(start, ms_to_ktime(TPM2_TIMEOUT_C));
> > > > > > + do {
> > > > > > + if (!(ioread32(&priv->cca->req) &
> > > > > CRB_CTRL_REQ_CMD_READY)) {
> > > > > > + dev_dbg(dev, "cmdReady in %lld usecs\n",
> > > > > > + ktime_to_us(ktime_sub(ktime_get(),
> start)));
> > > > > > + return 0;
> > > > > > + }
> > > > > > + usleep_range(50, 100);
> > > > > > + } while (ktime_before(ktime_get(), stop));
> > > > >
> > > > > Since this is HW specific this is right thing to do and not
> > > > > abuse wait_for_tpm_stat. However, this should be documented to
> > > > > the commit message.
> > > > I will respin just this patch and not the whole series, as the fix
> > > > is only in the
> > > commit message.
> > > > Tomas
> > >
> > > Works for me. I can update pm_runtime_sync(). Then I'm ready to
> > > apply these.
> >
> > What do you mean by pm_runtime_sync()?
>
> Typo. I already commente v2 of the series that pm_runtime_put should be
> used instead of pm_runtime_put_sync.
This is not necessary, it's okay to suspend in asynchronous mode.
Tomas
^ permalink raw reply
* Re: [PATCH 3/7 v3] sched: factorize PELT update
From: Peter Zijlstra @ 2016-09-15 13:09 UTC (permalink / raw)
To: Vincent Guittot
Cc: mingo, linux-kernel, yuyang.du, Morten.Rasmussen, linaro-kernel,
dietmar.eggemann, pjt, bsegall
In-Reply-To: <1473666472-13749-4-git-send-email-vincent.guittot@linaro.org>
On Mon, Sep 12, 2016 at 09:47:48AM +0200, Vincent Guittot wrote:
> @@ -3690,7 +3658,7 @@ entity_tick(struct cfs_rq *cfs_rq, struct sched_entity *curr, int queued)
> /*
> * Ensure that runnable average is periodically updated.
> */
> - update_load_avg(curr, 1);
> + update_load_avg(curr, 1, 0);
> update_cfs_shares(cfs_rq);
>
I would find something like: update_load_avg(curr, UPDATE_TG), eg, make
the second argument a bitflag instead of two arguments, much more
readable.
Do however check that it doesn't generate retarded code if you do that.
^ permalink raw reply
* Re: [PATCH 4/4] PCI: Avoid unnecessary resume on shutdown
From: Lukas Wunner @ 2016-09-15 13:11 UTC (permalink / raw)
To: Rafael J. Wysocki
Cc: linux-pci, linux-pm, linux-acpi, Peter Wu, Andreas Noever
In-Reply-To: <2217882.yevB8EWaHc@vostro.rjw.lan>
On Wed, Sep 14, 2016 at 02:29:52AM +0200, Rafael J. Wysocki wrote:
> On Wednesday, August 31, 2016 08:15:18 AM Lukas Wunner wrote:
> > We currently perform a mandatory runtime resume of all PCI devices on
> > ->shutdown. However it is pointless to wake devices only to immediately
> > power them down afterwards. (Or have the firmware reset them, in case
> > of a reboot.)
> >
> > It seems there are only two cases when a runtime resume is actually
> > necessary: If the driver has declared a ->shutdown callback or if kexec
> > is in progress.
> >
> > Constrain resume of a device to these cases and let it slumber
> > otherwise, thereby conserving energy and speeding up shutdown.
> >
> > Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
> > Signed-off-by: Lukas Wunner <lukas@wunner.de>
> > ---
> > drivers/pci/pci-driver.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
> > index fd4b9c4..09a4e56 100644
> > --- a/drivers/pci/pci-driver.c
> > +++ b/drivers/pci/pci-driver.c
> > @@ -459,6 +459,11 @@ static void pci_device_shutdown(struct device *dev)
> > struct pci_dev *pci_dev = to_pci_dev(dev);
> > struct pci_driver *drv = pci_dev->driver;
> >
> > + /* Fast path for suspended devices */
> > + if (pm_runtime_suspended(dev) && (!drv || !drv->shutdown) &&
> > + !kexec_in_progress)
>
> What happens if runtime suspend or resume of the device happens here?
You're right, good point. How about disabling runtime PM then, like this:
/* Fast path for suspended devices */
if (pm_runtime_status_suspended(dev) && (!drv || !drv->shutdown) &&
!kexec_in_progress) {
pm_runtime_disable(dev);
if (pm_runtime_status_suspended(dev))
return;
pm_runtime_enable(dev);
}
All dependents (children, and in the future, consumers) should already
have been treated at that point, due to the ordering of devices_kset->list.
Thanks!
Lukas
^ permalink raw reply
* [PATCH 5/5] drm/amdgpu: rename all rbo variable to abo
From: Christian König @ 2016-09-15 13:10 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
In-Reply-To: <1473945024-8275-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
From: Christian König <christian.koenig@amd.com>
Just to cleanup some radeon leftovers.
sed -i "s/rbo/abo/g" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/rbo/abo/g" drivers/gpu/drm/amd/amdgpu/*.h
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 42 +++++++++++++--------------
drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 44 ++++++++++++++---------------
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 20 ++++++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 16 +++++------
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24 ++++++++--------
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 8 +++---
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 36 +++++++++++------------
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 36 +++++++++++------------
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 36 +++++++++++------------
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 36 +++++++++++------------
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 12 ++++----
12 files changed, 157 insertions(+), 157 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ed91f08..c30635a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -701,7 +701,7 @@ struct amdgpu_flip_work {
int crtc_id;
uint64_t base;
struct drm_pending_vblank_event *event;
- struct amdgpu_bo *old_rbo;
+ struct amdgpu_bo *old_abo;
struct fence *excl;
unsigned shared_count;
struct fence **shared;
@@ -2436,7 +2436,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data);
int amdgpu_cs_get_ring(struct amdgpu_device *adev, u32 ip_type,
u32 ip_instance, u32 ring,
struct amdgpu_ring **out_ring);
-void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *rbo, u32 domain);
+void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain);
bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);
int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages);
int amdgpu_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t addr,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 93fd761..783e1d8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -154,17 +154,17 @@ static void amdgpu_unpin_work_func(struct work_struct *__work)
int r;
/* unpin of the old buffer */
- r = amdgpu_bo_reserve(work->old_rbo, false);
+ r = amdgpu_bo_reserve(work->old_abo, false);
if (likely(r == 0)) {
- r = amdgpu_bo_unpin(work->old_rbo);
+ r = amdgpu_bo_unpin(work->old_abo);
if (unlikely(r != 0)) {
DRM_ERROR("failed to unpin buffer after flip\n");
}
- amdgpu_bo_unreserve(work->old_rbo);
+ amdgpu_bo_unreserve(work->old_abo);
} else
DRM_ERROR("failed to reserve buffer after flip\n");
- amdgpu_bo_unref(&work->old_rbo);
+ amdgpu_bo_unref(&work->old_abo);
kfree(work->shared);
kfree(work);
}
@@ -181,7 +181,7 @@ int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
struct amdgpu_framebuffer *new_amdgpu_fb;
struct drm_gem_object *obj;
struct amdgpu_flip_work *work;
- struct amdgpu_bo *new_rbo;
+ struct amdgpu_bo *new_abo;
unsigned long flags;
u64 tiling_flags;
u64 base;
@@ -204,28 +204,28 @@ int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
obj = old_amdgpu_fb->obj;
/* take a reference to the old object */
- work->old_rbo = gem_to_amdgpu_bo(obj);
- amdgpu_bo_ref(work->old_rbo);
+ work->old_abo = gem_to_amdgpu_bo(obj);
+ amdgpu_bo_ref(work->old_abo);
new_amdgpu_fb = to_amdgpu_framebuffer(fb);
obj = new_amdgpu_fb->obj;
- new_rbo = gem_to_amdgpu_bo(obj);
+ new_abo = gem_to_amdgpu_bo(obj);
/* pin the new buffer */
- r = amdgpu_bo_reserve(new_rbo, false);
+ r = amdgpu_bo_reserve(new_abo, false);
if (unlikely(r != 0)) {
- DRM_ERROR("failed to reserve new rbo buffer before flip\n");
+ DRM_ERROR("failed to reserve new abo buffer before flip\n");
goto cleanup;
}
- r = amdgpu_bo_pin_restricted(new_rbo, AMDGPU_GEM_DOMAIN_VRAM, 0, 0, &base);
+ r = amdgpu_bo_pin_restricted(new_abo, AMDGPU_GEM_DOMAIN_VRAM, 0, 0, &base);
if (unlikely(r != 0)) {
r = -EINVAL;
- DRM_ERROR("failed to pin new rbo buffer before flip\n");
+ DRM_ERROR("failed to pin new abo buffer before flip\n");
goto unreserve;
}
- r = reservation_object_get_fences_rcu(new_rbo->tbo.resv, &work->excl,
+ r = reservation_object_get_fences_rcu(new_abo->tbo.resv, &work->excl,
&work->shared_count,
&work->shared);
if (unlikely(r != 0)) {
@@ -233,8 +233,8 @@ int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
goto unpin;
}
- amdgpu_bo_get_tiling_flags(new_rbo, &tiling_flags);
- amdgpu_bo_unreserve(new_rbo);
+ amdgpu_bo_get_tiling_flags(new_abo, &tiling_flags);
+ amdgpu_bo_unreserve(new_abo);
work->base = base;
@@ -269,19 +269,19 @@ vblank_cleanup:
drm_vblank_put(crtc->dev, amdgpu_crtc->crtc_id);
pflip_cleanup:
- if (unlikely(amdgpu_bo_reserve(new_rbo, false) != 0)) {
- DRM_ERROR("failed to reserve new rbo in error path\n");
+ if (unlikely(amdgpu_bo_reserve(new_abo, false) != 0)) {
+ DRM_ERROR("failed to reserve new abo in error path\n");
goto cleanup;
}
unpin:
- if (unlikely(amdgpu_bo_unpin(new_rbo) != 0)) {
- DRM_ERROR("failed to unpin new rbo in error path\n");
+ if (unlikely(amdgpu_bo_unpin(new_abo) != 0)) {
+ DRM_ERROR("failed to unpin new abo in error path\n");
}
unreserve:
- amdgpu_bo_unreserve(new_rbo);
+ amdgpu_bo_unreserve(new_abo);
cleanup:
- amdgpu_bo_unref(&work->old_rbo);
+ amdgpu_bo_unref(&work->old_abo);
fence_put(work->excl);
for (i = 0; i < work->shared_count; ++i)
fence_put(work->shared[i]);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 95a4cdd..f491092 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -111,14 +111,14 @@ int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool tile
static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj)
{
- struct amdgpu_bo *rbo = gem_to_amdgpu_bo(gobj);
+ struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj);
int ret;
- ret = amdgpu_bo_reserve(rbo, false);
+ ret = amdgpu_bo_reserve(abo, false);
if (likely(ret == 0)) {
- amdgpu_bo_kunmap(rbo);
- amdgpu_bo_unpin(rbo);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_kunmap(abo);
+ amdgpu_bo_unpin(abo);
+ amdgpu_bo_unreserve(abo);
}
drm_gem_object_unreference_unlocked(gobj);
}
@@ -129,7 +129,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
{
struct amdgpu_device *adev = rfbdev->adev;
struct drm_gem_object *gobj = NULL;
- struct amdgpu_bo *rbo = NULL;
+ struct amdgpu_bo *abo = NULL;
bool fb_tiled = false; /* useful for testing */
u32 tiling_flags = 0;
int ret;
@@ -156,30 +156,30 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
aligned_size);
return -ENOMEM;
}
- rbo = gem_to_amdgpu_bo(gobj);
+ abo = gem_to_amdgpu_bo(gobj);
if (fb_tiled)
tiling_flags = AMDGPU_TILING_SET(ARRAY_MODE, GRPH_ARRAY_2D_TILED_THIN1);
- ret = amdgpu_bo_reserve(rbo, false);
+ ret = amdgpu_bo_reserve(abo, false);
if (unlikely(ret != 0))
goto out_unref;
if (tiling_flags) {
- ret = amdgpu_bo_set_tiling_flags(rbo,
+ ret = amdgpu_bo_set_tiling_flags(abo,
tiling_flags);
if (ret)
dev_err(adev->dev, "FB failed to set tiling flags\n");
}
- ret = amdgpu_bo_pin_restricted(rbo, AMDGPU_GEM_DOMAIN_VRAM, 0, 0, NULL);
+ ret = amdgpu_bo_pin_restricted(abo, AMDGPU_GEM_DOMAIN_VRAM, 0, 0, NULL);
if (ret) {
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unreserve(abo);
goto out_unref;
}
- ret = amdgpu_bo_kmap(rbo, NULL);
- amdgpu_bo_unreserve(rbo);
+ ret = amdgpu_bo_kmap(abo, NULL);
+ amdgpu_bo_unreserve(abo);
if (ret) {
goto out_unref;
}
@@ -201,7 +201,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
struct drm_framebuffer *fb = NULL;
struct drm_mode_fb_cmd2 mode_cmd;
struct drm_gem_object *gobj = NULL;
- struct amdgpu_bo *rbo = NULL;
+ struct amdgpu_bo *abo = NULL;
int ret;
unsigned long tmp;
@@ -220,7 +220,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
return ret;
}
- rbo = gem_to_amdgpu_bo(gobj);
+ abo = gem_to_amdgpu_bo(gobj);
/* okay we have an object now allocate the framebuffer */
info = drm_fb_helper_alloc_fbi(helper);
@@ -243,7 +243,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
/* setup helper */
rfbdev->helper.fb = fb;
- memset_io(rbo->kptr, 0x0, amdgpu_bo_size(rbo));
+ memset_io(abo->kptr, 0x0, amdgpu_bo_size(abo));
strcpy(info->fix.id, "amdgpudrmfb");
@@ -252,11 +252,11 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
info->fbops = &amdgpufb_ops;
- tmp = amdgpu_bo_gpu_offset(rbo) - adev->mc.vram_start;
+ tmp = amdgpu_bo_gpu_offset(abo) - adev->mc.vram_start;
info->fix.smem_start = adev->mc.aper_base + tmp;
- info->fix.smem_len = amdgpu_bo_size(rbo);
- info->screen_base = rbo->kptr;
- info->screen_size = amdgpu_bo_size(rbo);
+ info->fix.smem_len = amdgpu_bo_size(abo);
+ info->screen_base = abo->kptr;
+ info->screen_size = amdgpu_bo_size(abo);
drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
@@ -273,7 +273,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
DRM_INFO("vram apper at 0x%lX\n", (unsigned long)adev->mc.aper_base);
- DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(rbo));
+ DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(abo));
DRM_INFO("fb depth is %d\n", fb->depth);
DRM_INFO(" pitch is %d\n", fb->pitches[0]);
@@ -283,7 +283,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
out_destroy_fbi:
drm_fb_helper_release_fbi(helper);
out_unref:
- if (rbo) {
+ if (abo) {
}
if (fb && ret) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 480ae7e..6ae87e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -120,23 +120,23 @@ void amdgpu_gem_force_release(struct amdgpu_device *adev)
int amdgpu_gem_object_open(struct drm_gem_object *obj,
struct drm_file *file_priv)
{
- struct amdgpu_bo *rbo = gem_to_amdgpu_bo(obj);
- struct amdgpu_device *adev = amdgpu_get_adev(rbo->tbo.bdev);
+ struct amdgpu_bo *abo = gem_to_amdgpu_bo(obj);
+ struct amdgpu_device *adev = amdgpu_get_adev(abo->tbo.bdev);
struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
struct amdgpu_vm *vm = &fpriv->vm;
struct amdgpu_bo_va *bo_va;
int r;
- r = amdgpu_bo_reserve(rbo, false);
+ r = amdgpu_bo_reserve(abo, false);
if (r)
return r;
- bo_va = amdgpu_vm_bo_find(vm, rbo);
+ bo_va = amdgpu_vm_bo_find(vm, abo);
if (!bo_va) {
- bo_va = amdgpu_vm_bo_add(adev, vm, rbo);
+ bo_va = amdgpu_vm_bo_add(adev, vm, abo);
} else {
++bo_va->ref_count;
}
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unreserve(abo);
return 0;
}
@@ -552,7 +552,7 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
struct drm_gem_object *gobj;
struct amdgpu_device *adev = dev->dev_private;
struct amdgpu_fpriv *fpriv = filp->driver_priv;
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
struct amdgpu_bo_va *bo_va;
struct ttm_validate_buffer tv, tv_pd;
struct ww_acquire_ctx ticket;
@@ -592,10 +592,10 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
gobj = drm_gem_object_lookup(filp, args->handle);
if (gobj == NULL)
return -ENOENT;
- rbo = gem_to_amdgpu_bo(gobj);
+ abo = gem_to_amdgpu_bo(gobj);
INIT_LIST_HEAD(&list);
INIT_LIST_HEAD(&duplicates);
- tv.bo = &rbo->tbo;
+ tv.bo = &abo->tbo;
tv.shared = true;
list_add(&tv.head, &list);
@@ -609,7 +609,7 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
return r;
}
- bo_va = amdgpu_vm_bo_find(&fpriv->vm, rbo);
+ bo_va = amdgpu_vm_bo_find(&fpriv->vm, abo);
if (!bo_va) {
ttm_eu_backoff_reservation(&ticket, &list);
drm_gem_object_unreference_unlocked(gobj);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 5cbe803..c57d55d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -211,12 +211,12 @@ static void amdgpu_ttm_placement_init(struct amdgpu_device *adev,
placement->busy_placement = places;
}
-void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *rbo, u32 domain)
+void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
{
- struct amdgpu_device *adev = amdgpu_get_adev(rbo->tbo.bdev);
+ struct amdgpu_device *adev = amdgpu_get_adev(abo->tbo.bdev);
- amdgpu_ttm_placement_init(adev, &rbo->placement, rbo->placements,
- domain, rbo->flags);
+ amdgpu_ttm_placement_init(adev, &abo->placement, abo->placements,
+ domain, abo->flags);
}
static void amdgpu_fill_placement_to_bo(struct amdgpu_bo *bo,
@@ -864,14 +864,14 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
struct ttm_mem_reg *new_mem)
{
struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
struct ttm_mem_reg *old_mem = &bo->mem;
if (!amdgpu_ttm_bo_is_amdgpu_bo(bo))
return;
- rbo = container_of(bo, struct amdgpu_bo, tbo);
- amdgpu_vm_bo_invalidate(adev, rbo);
+ abo = container_of(bo, struct amdgpu_bo, tbo);
+ amdgpu_vm_bo_invalidate(adev, abo);
/* update statistics */
if (!new_mem)
@@ -880,7 +880,7 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
/* move_notify is called before move happens */
amdgpu_update_memory_usage(adev, &bo->mem, new_mem);
- trace_amdgpu_ttm_bo_move(rbo, new_mem->mem_type, old_mem->mem_type);
+ trace_amdgpu_ttm_bo_move(abo, new_mem->mem_type, old_mem->mem_type);
}
int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index d246a1f..6d0ed39f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -186,7 +186,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
struct ttm_placement *placement)
{
struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
static struct ttm_place placements = {
.fpfn = 0,
.lpfn = 0,
@@ -201,45 +201,45 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
placement->num_busy_placement = 1;
return;
}
- rbo = container_of(bo, struct amdgpu_bo, tbo);
+ abo = container_of(bo, struct amdgpu_bo, tbo);
switch (bo->mem.mem_type) {
case TTM_PL_VRAM:
if (adev->mman.buffer_funcs_ring->ready == false) {
- amdgpu_ttm_placement_from_domain(rbo,
+ amdgpu_ttm_placement_from_domain(abo,
AMDGPU_GEM_DOMAIN_CPU);
} else {
- amdgpu_ttm_placement_from_domain(rbo,
+ amdgpu_ttm_placement_from_domain(abo,
AMDGPU_GEM_DOMAIN_GTT);
- for (i = 0; i < rbo->placement.num_placement; ++i) {
- if (!(rbo->placements[i].flags &
+ for (i = 0; i < abo->placement.num_placement; ++i) {
+ if (!(abo->placements[i].flags &
TTM_PL_FLAG_TT))
continue;
- if (rbo->placements[i].lpfn)
+ if (abo->placements[i].lpfn)
continue;
/* set an upper limit to force directly
* allocating address space for the BO.
*/
- rbo->placements[i].lpfn =
+ abo->placements[i].lpfn =
adev->mc.gtt_size >> PAGE_SHIFT;
}
}
break;
case TTM_PL_TT:
default:
- amdgpu_ttm_placement_from_domain(rbo, AMDGPU_GEM_DOMAIN_CPU);
+ amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_CPU);
}
- *placement = rbo->placement;
+ *placement = abo->placement;
}
static int amdgpu_verify_access(struct ttm_buffer_object *bo, struct file *filp)
{
- struct amdgpu_bo *rbo = container_of(bo, struct amdgpu_bo, tbo);
+ struct amdgpu_bo *abo = container_of(bo, struct amdgpu_bo, tbo);
if (amdgpu_ttm_tt_get_usermm(bo->ttm))
return -EPERM;
- return drm_vma_node_verify_access(&rbo->gem_base.vma_node, filp);
+ return drm_vma_node_verify_access(&abo->gem_base.vma_node, filp);
}
static void amdgpu_move_null(struct ttm_buffer_object *bo,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 87bcac3..d67eada 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -351,12 +351,12 @@ void amdgpu_uvd_free_handles(struct amdgpu_device *adev, struct drm_file *filp)
}
}
-static void amdgpu_uvd_force_into_uvd_segment(struct amdgpu_bo *rbo)
+static void amdgpu_uvd_force_into_uvd_segment(struct amdgpu_bo *abo)
{
int i;
- for (i = 0; i < rbo->placement.num_placement; ++i) {
- rbo->placements[i].fpfn = 0 >> PAGE_SHIFT;
- rbo->placements[i].lpfn = (256 * 1024 * 1024) >> PAGE_SHIFT;
+ for (i = 0; i < abo->placement.num_placement; ++i) {
+ abo->placements[i].fpfn = 0 >> PAGE_SHIFT;
+ abo->placements[i].lpfn = (256 * 1024 * 1024) >> PAGE_SHIFT;
}
}
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 2af166e..5af418f 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2102,7 +2102,7 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
struct amdgpu_framebuffer *amdgpu_fb;
struct drm_framebuffer *target_fb;
struct drm_gem_object *obj;
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
uint64_t fb_location, tiling_flags;
uint32_t fb_format, fb_pitch_pixels;
u32 fb_swap = REG_SET_FIELD(0, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, ENDIAN_NONE);
@@ -2129,23 +2129,23 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
* just update base pointers
*/
obj = amdgpu_fb->obj;
- rbo = gem_to_amdgpu_bo(obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r != 0))
return r;
if (atomic) {
- fb_location = amdgpu_bo_gpu_offset(rbo);
+ fb_location = amdgpu_bo_gpu_offset(abo);
} else {
- r = amdgpu_bo_pin(rbo, AMDGPU_GEM_DOMAIN_VRAM, &fb_location);
+ r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, &fb_location);
if (unlikely(r != 0)) {
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unreserve(abo);
return -EINVAL;
}
}
- amdgpu_bo_get_tiling_flags(rbo, &tiling_flags);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_get_tiling_flags(abo, &tiling_flags);
+ amdgpu_bo_unreserve(abo);
pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
@@ -2319,12 +2319,12 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
if (!atomic && fb && fb != crtc->primary->fb) {
amdgpu_fb = to_amdgpu_framebuffer(fb);
- rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(amdgpu_fb->obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r != 0))
return r;
- amdgpu_bo_unpin(rbo);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unpin(abo);
+ amdgpu_bo_unreserve(abo);
}
/* Bytes per pixel may have changed */
@@ -2802,16 +2802,16 @@ static void dce_v10_0_crtc_disable(struct drm_crtc *crtc)
if (crtc->primary->fb) {
int r;
struct amdgpu_framebuffer *amdgpu_fb;
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
amdgpu_fb = to_amdgpu_framebuffer(crtc->primary->fb);
- rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(amdgpu_fb->obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r))
- DRM_ERROR("failed to reserve rbo before unpin\n");
+ DRM_ERROR("failed to reserve abo before unpin\n");
else {
- amdgpu_bo_unpin(rbo);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unpin(abo);
+ amdgpu_bo_unreserve(abo);
}
}
/* disable the GRPH */
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 6747f8f..256de46 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2085,7 +2085,7 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,
struct amdgpu_framebuffer *amdgpu_fb;
struct drm_framebuffer *target_fb;
struct drm_gem_object *obj;
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
uint64_t fb_location, tiling_flags;
uint32_t fb_format, fb_pitch_pixels;
u32 fb_swap = REG_SET_FIELD(0, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, ENDIAN_NONE);
@@ -2112,23 +2112,23 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,
* just update base pointers
*/
obj = amdgpu_fb->obj;
- rbo = gem_to_amdgpu_bo(obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r != 0))
return r;
if (atomic) {
- fb_location = amdgpu_bo_gpu_offset(rbo);
+ fb_location = amdgpu_bo_gpu_offset(abo);
} else {
- r = amdgpu_bo_pin(rbo, AMDGPU_GEM_DOMAIN_VRAM, &fb_location);
+ r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, &fb_location);
if (unlikely(r != 0)) {
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unreserve(abo);
return -EINVAL;
}
}
- amdgpu_bo_get_tiling_flags(rbo, &tiling_flags);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_get_tiling_flags(abo, &tiling_flags);
+ amdgpu_bo_unreserve(abo);
pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
@@ -2302,12 +2302,12 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,
if (!atomic && fb && fb != crtc->primary->fb) {
amdgpu_fb = to_amdgpu_framebuffer(fb);
- rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(amdgpu_fb->obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r != 0))
return r;
- amdgpu_bo_unpin(rbo);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unpin(abo);
+ amdgpu_bo_unreserve(abo);
}
/* Bytes per pixel may have changed */
@@ -2820,16 +2820,16 @@ static void dce_v11_0_crtc_disable(struct drm_crtc *crtc)
if (crtc->primary->fb) {
int r;
struct amdgpu_framebuffer *amdgpu_fb;
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
amdgpu_fb = to_amdgpu_framebuffer(crtc->primary->fb);
- rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(amdgpu_fb->obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r))
- DRM_ERROR("failed to reserve rbo before unpin\n");
+ DRM_ERROR("failed to reserve abo before unpin\n");
else {
- amdgpu_bo_unpin(rbo);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unpin(abo);
+ amdgpu_bo_unreserve(abo);
}
}
/* disable the GRPH */
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 0a807d2..0a1db00 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -1493,7 +1493,7 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,
struct amdgpu_framebuffer *amdgpu_fb;
struct drm_framebuffer *target_fb;
struct drm_gem_object *obj;
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
uint64_t fb_location, tiling_flags;
uint32_t fb_format, fb_pitch_pixels, pipe_config;
u32 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_NONE);
@@ -1520,23 +1520,23 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,
* just update base pointers
*/
obj = amdgpu_fb->obj;
- rbo = gem_to_amdgpu_bo(obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r != 0))
return r;
if (atomic)
- fb_location = amdgpu_bo_gpu_offset(rbo);
+ fb_location = amdgpu_bo_gpu_offset(abo);
else {
- r = amdgpu_bo_pin(rbo, AMDGPU_GEM_DOMAIN_VRAM, &fb_location);
+ r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, &fb_location);
if (unlikely(r != 0)) {
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unreserve(abo);
return -EINVAL;
}
}
- amdgpu_bo_get_tiling_flags(rbo, &tiling_flags);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_get_tiling_flags(abo, &tiling_flags);
+ amdgpu_bo_unreserve(abo);
switch (target_fb->pixel_format) {
case DRM_FORMAT_C8:
@@ -1688,12 +1688,12 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,
if (!atomic && fb && fb != crtc->primary->fb) {
amdgpu_fb = to_amdgpu_framebuffer(fb);
- rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(amdgpu_fb->obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r != 0))
return r;
- amdgpu_bo_unpin(rbo);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unpin(abo);
+ amdgpu_bo_unreserve(abo);
}
/* Bytes per pixel may have changed */
@@ -2139,16 +2139,16 @@ static void dce_v6_0_crtc_disable(struct drm_crtc *crtc)
if (crtc->primary->fb) {
int r;
struct amdgpu_framebuffer *amdgpu_fb;
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
amdgpu_fb = to_amdgpu_framebuffer(crtc->primary->fb);
- rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(amdgpu_fb->obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r))
- DRM_ERROR("failed to reserve rbo before unpin\n");
+ DRM_ERROR("failed to reserve abo before unpin\n");
else {
- amdgpu_bo_unpin(rbo);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unpin(abo);
+ amdgpu_bo_unreserve(abo);
}
}
/* disable the GRPH */
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 06d836f..4d313aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -1990,7 +1990,7 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
struct amdgpu_framebuffer *amdgpu_fb;
struct drm_framebuffer *target_fb;
struct drm_gem_object *obj;
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
uint64_t fb_location, tiling_flags;
uint32_t fb_format, fb_pitch_pixels;
u32 fb_swap = (GRPH_ENDIAN_NONE << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);
@@ -2017,23 +2017,23 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
* just update base pointers
*/
obj = amdgpu_fb->obj;
- rbo = gem_to_amdgpu_bo(obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r != 0))
return r;
if (atomic) {
- fb_location = amdgpu_bo_gpu_offset(rbo);
+ fb_location = amdgpu_bo_gpu_offset(abo);
} else {
- r = amdgpu_bo_pin(rbo, AMDGPU_GEM_DOMAIN_VRAM, &fb_location);
+ r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, &fb_location);
if (unlikely(r != 0)) {
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unreserve(abo);
return -EINVAL;
}
}
- amdgpu_bo_get_tiling_flags(rbo, &tiling_flags);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_get_tiling_flags(abo, &tiling_flags);
+ amdgpu_bo_unreserve(abo);
pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
@@ -2188,12 +2188,12 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
if (!atomic && fb && fb != crtc->primary->fb) {
amdgpu_fb = to_amdgpu_framebuffer(fb);
- rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(amdgpu_fb->obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r != 0))
return r;
- amdgpu_bo_unpin(rbo);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unpin(abo);
+ amdgpu_bo_unreserve(abo);
}
/* Bytes per pixel may have changed */
@@ -2663,16 +2663,16 @@ static void dce_v8_0_crtc_disable(struct drm_crtc *crtc)
if (crtc->primary->fb) {
int r;
struct amdgpu_framebuffer *amdgpu_fb;
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
amdgpu_fb = to_amdgpu_framebuffer(crtc->primary->fb);
- rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(amdgpu_fb->obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r))
- DRM_ERROR("failed to reserve rbo before unpin\n");
+ DRM_ERROR("failed to reserve abo before unpin\n");
else {
- amdgpu_bo_unpin(rbo);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unpin(abo);
+ amdgpu_bo_unreserve(abo);
}
}
/* disable the GRPH */
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 85f14a6..c93e18e 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -227,16 +227,16 @@ static void dce_virtual_crtc_disable(struct drm_crtc *crtc)
if (crtc->primary->fb) {
int r;
struct amdgpu_framebuffer *amdgpu_fb;
- struct amdgpu_bo *rbo;
+ struct amdgpu_bo *abo;
amdgpu_fb = to_amdgpu_framebuffer(crtc->primary->fb);
- rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
- r = amdgpu_bo_reserve(rbo, false);
+ abo = gem_to_amdgpu_bo(amdgpu_fb->obj);
+ r = amdgpu_bo_reserve(abo, false);
if (unlikely(r))
- DRM_ERROR("failed to reserve rbo before unpin\n");
+ DRM_ERROR("failed to reserve abo before unpin\n");
else {
- amdgpu_bo_unpin(rbo);
- amdgpu_bo_unreserve(rbo);
+ amdgpu_bo_unpin(abo);
+ amdgpu_bo_unreserve(abo);
}
}
--
2.5.0
_______________________________________________
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amd-gfx@lists.freedesktop.org
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^ permalink raw reply related
* [PATCH 4/5] drm/amdgpu: remove adev pointer from struct amdgpu_bo
From: Christian König @ 2016-09-15 13:10 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
In-Reply-To: <1473945024-8275-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
From: Christian König <christian.koenig@amd.com>
It's completely pointsless to have two pointers to the
device in the same structur.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 6 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 10 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 4 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c | 4 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 50 ++++++++++++++++--------------
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 17 +++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
9 files changed, 50 insertions(+), 48 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 3b3981d..ed91f08 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -465,7 +465,6 @@ struct amdgpu_bo {
*/
struct list_head va;
/* Constant after initialization */
- struct amdgpu_device *adev;
struct drm_gem_object gem_base;
struct amdgpu_bo *parent;
struct amdgpu_bo *shadow;
@@ -2144,6 +2143,11 @@ struct amdgpu_device {
};
+static inline struct amdgpu_device *amdgpu_get_adev(struct ttm_bo_device *bdev)
+{
+ return container_of(bdev, struct amdgpu_device, mman.bdev);
+}
+
bool amdgpu_device_is_px(struct drm_device *dev);
int amdgpu_device_init(struct amdgpu_device *adev,
struct drm_device *ddev,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 187c366..5beab71 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -355,6 +355,7 @@ static void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev,
static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
struct amdgpu_bo *bo)
{
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
u64 initial_bytes_moved;
uint32_t domain;
int r;
@@ -372,9 +373,9 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
retry:
amdgpu_ttm_placement_from_domain(bo, domain);
- initial_bytes_moved = atomic64_read(&bo->adev->num_bytes_moved);
+ initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
- p->bytes_moved += atomic64_read(&bo->adev->num_bytes_moved) -
+ p->bytes_moved += atomic64_read(&adev->num_bytes_moved) -
initial_bytes_moved;
if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) {
@@ -400,6 +401,7 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
struct amdgpu_bo_list_entry *candidate = p->evictable;
struct amdgpu_bo *bo = candidate->robj;
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
u64 initial_bytes_moved;
uint32_t other;
@@ -420,9 +422,9 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
/* Good we can try to move this BO somewhere else */
amdgpu_ttm_placement_from_domain(bo, other);
- initial_bytes_moved = atomic64_read(&bo->adev->num_bytes_moved);
+ initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
- p->bytes_moved += atomic64_read(&bo->adev->num_bytes_moved) -
+ p->bytes_moved += atomic64_read(&adev->num_bytes_moved) -
initial_bytes_moved;
if (unlikely(r))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 70e294b..480ae7e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -121,7 +121,7 @@ int amdgpu_gem_object_open(struct drm_gem_object *obj,
struct drm_file *file_priv)
{
struct amdgpu_bo *rbo = gem_to_amdgpu_bo(obj);
- struct amdgpu_device *adev = rbo->adev;
+ struct amdgpu_device *adev = amdgpu_get_adev(rbo->tbo.bdev);
struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
struct amdgpu_vm *vm = &fpriv->vm;
struct amdgpu_bo_va *bo_va;
@@ -144,7 +144,7 @@ void amdgpu_gem_object_close(struct drm_gem_object *obj,
struct drm_file *file_priv)
{
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
- struct amdgpu_device *adev = bo->adev;
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
struct amdgpu_vm *vm = &fpriv->vm;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
index 32fa7b7..4731231 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
@@ -285,7 +285,7 @@ free_rmn:
int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
{
unsigned long end = addr + amdgpu_bo_size(bo) - 1;
- struct amdgpu_device *adev = bo->adev;
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
struct amdgpu_mn *rmn;
struct amdgpu_mn_node *node = NULL;
struct list_head bos;
@@ -340,7 +340,7 @@ int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
*/
void amdgpu_mn_unregister(struct amdgpu_bo *bo)
{
- struct amdgpu_device *adev = bo->adev;
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
struct amdgpu_mn *rmn;
struct list_head *head;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 4289c31..5cbe803 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -90,18 +90,19 @@ static void amdgpu_update_memory_usage(struct amdgpu_device *adev,
static void amdgpu_ttm_bo_destroy(struct ttm_buffer_object *tbo)
{
+ struct amdgpu_device *adev = amdgpu_get_adev(tbo->bdev);
struct amdgpu_bo *bo;
bo = container_of(tbo, struct amdgpu_bo, tbo);
- amdgpu_update_memory_usage(bo->adev, &bo->tbo.mem, NULL);
+ amdgpu_update_memory_usage(adev, &bo->tbo.mem, NULL);
drm_gem_object_release(&bo->gem_base);
amdgpu_bo_unref(&bo->parent);
if (!list_empty(&bo->shadow_list)) {
- mutex_lock(&bo->adev->shadow_list_lock);
+ mutex_lock(&adev->shadow_list_lock);
list_del_init(&bo->shadow_list);
- mutex_unlock(&bo->adev->shadow_list_lock);
+ mutex_unlock(&adev->shadow_list_lock);
}
kfree(bo->metadata);
kfree(bo);
@@ -212,8 +213,10 @@ static void amdgpu_ttm_placement_init(struct amdgpu_device *adev,
void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *rbo, u32 domain)
{
- amdgpu_ttm_placement_init(rbo->adev, &rbo->placement,
- rbo->placements, domain, rbo->flags);
+ struct amdgpu_device *adev = amdgpu_get_adev(rbo->tbo.bdev);
+
+ amdgpu_ttm_placement_init(adev, &rbo->placement, rbo->placements,
+ domain, rbo->flags);
}
static void amdgpu_fill_placement_to_bo(struct amdgpu_bo *bo,
@@ -359,7 +362,6 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
kfree(bo);
return r;
}
- bo->adev = adev;
INIT_LIST_HEAD(&bo->shadow_list);
INIT_LIST_HEAD(&bo->va);
bo->prefered_domains = domain & (AMDGPU_GEM_DOMAIN_VRAM |
@@ -624,6 +626,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
u64 min_offset, u64 max_offset,
u64 *gpu_addr)
{
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
int r, i;
unsigned fpfn, lpfn;
@@ -659,12 +662,12 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
if ((bo->placements[i].flags & TTM_PL_FLAG_VRAM) &&
!(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS) &&
(!max_offset || max_offset >
- bo->adev->mc.visible_vram_size)) {
+ adev->mc.visible_vram_size)) {
if (WARN_ON_ONCE(min_offset >
- bo->adev->mc.visible_vram_size))
+ adev->mc.visible_vram_size))
return -EINVAL;
fpfn = min_offset >> PAGE_SHIFT;
- lpfn = bo->adev->mc.visible_vram_size >> PAGE_SHIFT;
+ lpfn = adev->mc.visible_vram_size >> PAGE_SHIFT;
} else {
fpfn = min_offset >> PAGE_SHIFT;
lpfn = max_offset >> PAGE_SHIFT;
@@ -679,12 +682,12 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
if (unlikely(r)) {
- dev_err(bo->adev->dev, "%p pin failed\n", bo);
+ dev_err(adev->dev, "%p pin failed\n", bo);
goto error;
}
r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
if (unlikely(r)) {
- dev_err(bo->adev->dev, "%p bind failed\n", bo);
+ dev_err(adev->dev, "%p bind failed\n", bo);
goto error;
}
@@ -692,11 +695,11 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
if (gpu_addr != NULL)
*gpu_addr = amdgpu_bo_gpu_offset(bo);
if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
- bo->adev->vram_pin_size += amdgpu_bo_size(bo);
+ adev->vram_pin_size += amdgpu_bo_size(bo);
if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
- bo->adev->invisible_pin_size += amdgpu_bo_size(bo);
+ adev->invisible_pin_size += amdgpu_bo_size(bo);
} else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
- bo->adev->gart_pin_size += amdgpu_bo_size(bo);
+ adev->gart_pin_size += amdgpu_bo_size(bo);
}
error:
@@ -710,10 +713,11 @@ int amdgpu_bo_pin(struct amdgpu_bo *bo, u32 domain, u64 *gpu_addr)
int amdgpu_bo_unpin(struct amdgpu_bo *bo)
{
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
int r, i;
if (!bo->pin_count) {
- dev_warn(bo->adev->dev, "%p unpin not necessary\n", bo);
+ dev_warn(adev->dev, "%p unpin not necessary\n", bo);
return 0;
}
bo->pin_count--;
@@ -725,16 +729,16 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
}
r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
if (unlikely(r)) {
- dev_err(bo->adev->dev, "%p validate failed for unpin\n", bo);
+ dev_err(adev->dev, "%p validate failed for unpin\n", bo);
goto error;
}
if (bo->tbo.mem.mem_type == TTM_PL_VRAM) {
- bo->adev->vram_pin_size -= amdgpu_bo_size(bo);
+ adev->vram_pin_size -= amdgpu_bo_size(bo);
if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
- bo->adev->invisible_pin_size -= amdgpu_bo_size(bo);
+ adev->invisible_pin_size -= amdgpu_bo_size(bo);
} else if (bo->tbo.mem.mem_type == TTM_PL_TT) {
- bo->adev->gart_pin_size -= amdgpu_bo_size(bo);
+ adev->gart_pin_size -= amdgpu_bo_size(bo);
}
error:
@@ -859,6 +863,7 @@ int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,
void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
struct ttm_mem_reg *new_mem)
{
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
struct amdgpu_bo *rbo;
struct ttm_mem_reg *old_mem = &bo->mem;
@@ -866,21 +871,21 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
return;
rbo = container_of(bo, struct amdgpu_bo, tbo);
- amdgpu_vm_bo_invalidate(rbo->adev, rbo);
+ amdgpu_vm_bo_invalidate(adev, rbo);
/* update statistics */
if (!new_mem)
return;
/* move_notify is called before move happens */
- amdgpu_update_memory_usage(rbo->adev, &bo->mem, new_mem);
+ amdgpu_update_memory_usage(adev, &bo->mem, new_mem);
trace_amdgpu_ttm_bo_move(rbo, new_mem->mem_type, old_mem->mem_type);
}
int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
{
- struct amdgpu_device *adev;
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
struct amdgpu_bo *abo;
unsigned long offset, size, lpfn;
int i, r;
@@ -889,7 +894,6 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
return 0;
abo = container_of(bo, struct amdgpu_bo, tbo);
- adev = abo->adev;
if (bo->mem.mem_type != TTM_PL_VRAM)
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 8255034..c9b2c01 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -71,12 +71,13 @@ static inline unsigned amdgpu_mem_type_to_domain(u32 mem_type)
*/
static inline int amdgpu_bo_reserve(struct amdgpu_bo *bo, bool no_intr)
{
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
int r;
r = ttm_bo_reserve(&bo->tbo, !no_intr, false, NULL);
if (unlikely(r != 0)) {
if (r != -ERESTARTSYS)
- dev_err(bo->adev->dev, "%p reserve failed\n", bo);
+ dev_err(adev->dev, "%p reserve failed\n", bo);
return r;
}
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 1965209..d246a1f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -51,16 +51,6 @@
static int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
static void amdgpu_ttm_debugfs_fini(struct amdgpu_device *adev);
-static struct amdgpu_device *amdgpu_get_adev(struct ttm_bo_device *bdev)
-{
- struct amdgpu_mman *mman;
- struct amdgpu_device *adev;
-
- mman = container_of(bdev, struct amdgpu_mman, bdev);
- adev = container_of(mman, struct amdgpu_device, mman);
- return adev;
-}
-
/*
* Global memory.
@@ -195,6 +185,7 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
struct ttm_placement *placement)
{
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
struct amdgpu_bo *rbo;
static struct ttm_place placements = {
.fpfn = 0,
@@ -213,7 +204,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
rbo = container_of(bo, struct amdgpu_bo, tbo);
switch (bo->mem.mem_type) {
case TTM_PL_VRAM:
- if (rbo->adev->mman.buffer_funcs_ring->ready == false) {
+ if (adev->mman.buffer_funcs_ring->ready == false) {
amdgpu_ttm_placement_from_domain(rbo,
AMDGPU_GEM_DOMAIN_CPU);
} else {
@@ -231,7 +222,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
* allocating address space for the BO.
*/
rbo->placements[i].lpfn =
- rbo->adev->mc.gtt_size >> PAGE_SHIFT;
+ adev->mc.gtt_size >> PAGE_SHIFT;
}
}
break;
@@ -1384,7 +1375,7 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo, uint32_t src_data,
struct reservation_object *resv,
struct fence **fence)
{
- struct amdgpu_device *adev = bo->adev;
+ struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
struct amdgpu_job *job;
struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index e6842b0..87bcac3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -931,7 +931,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
if (r)
return r;
- if (!bo->adev->uvd.address_64_bit) {
+ if (!ring->adev->uvd.address_64_bit) {
amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
amdgpu_uvd_force_into_uvd_segment(bo);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index d3a2d1f..5dba9f7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1175,7 +1175,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
flags = amdgpu_ttm_tt_pte_flags(adev, bo_va->bo->tbo.ttm, mem);
gtt_flags = (amdgpu_ttm_is_bound(bo_va->bo->tbo.ttm) &&
- adev == bo_va->bo->adev) ? flags : 0;
+ adev == amdgpu_get_adev(bo_va->bo->tbo.bdev)) ? flags : 0;
spin_lock(&vm->status_lock);
if (!list_empty(&bo_va->vm_status))
--
2.5.0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related
* [PATCH 3/5] drm/amdgpu: fix a bunch of coding style issues in amdgpu_gem.c
From: Christian König @ 2016-09-15 13:10 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
In-Reply-To: <1473945024-8275-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
From: Christian König <christian.koenig@amd.com>
No intented functional change.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 88fbed2..70e294b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -58,7 +58,8 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
alignment = PAGE_SIZE;
}
- if (!(initial_domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA))) {
+ if (!(initial_domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS |
+ AMDGPU_GEM_DOMAIN_OA))) {
/* Maximum bo size is the unpinned gtt size since we use the gtt to
* handle vram to system pool migrations.
*/
@@ -116,7 +117,8 @@ void amdgpu_gem_force_release(struct amdgpu_device *adev)
* Call from drm_gem_handle_create which appear in both new and open ioctl
* case.
*/
-int amdgpu_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
+int amdgpu_gem_object_open(struct drm_gem_object *obj,
+ struct drm_file *file_priv)
{
struct amdgpu_bo *rbo = gem_to_amdgpu_bo(obj);
struct amdgpu_device *adev = rbo->adev;
@@ -408,9 +410,11 @@ int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
}
robj = gem_to_amdgpu_bo(gobj);
if (timeout == 0)
- ret = reservation_object_test_signaled_rcu(robj->tbo.resv, true);
+ ret = reservation_object_test_signaled_rcu(robj->tbo.resv,
+ true);
else
- ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, timeout);
+ ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true,
+ true, timeout);
/* ret == 0 means not signaled,
* ret > 0 means signaled
@@ -480,7 +484,8 @@ out:
* vital here, so they are not reported back to userspace.
*/
static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
- struct amdgpu_bo_va *bo_va, uint32_t operation)
+ struct amdgpu_bo_va *bo_va,
+ uint32_t operation)
{
struct ttm_validate_buffer tv, *entry;
struct amdgpu_bo_list_entry vm_pd;
@@ -704,7 +709,8 @@ int amdgpu_mode_dumb_create(struct drm_file *file_priv,
uint32_t handle;
int r;
- args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
+ args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) *
+ ((args->bpp + 1) / 8);
args->size = (u64)args->pitch * args->height;
args->size = ALIGN(args->size, PAGE_SIZE);
--
2.5.0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related
* [PATCH 2/5] drm/amdgpu: fix a bunch of coding style issues in amdgpu_ttm.c
From: Christian König @ 2016-09-15 13:10 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
In-Reply-To: <1473945024-8275-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
From: Christian König <christian.koenig@amd.com>
No intented functional change.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 65 +++++++++++++++++++++------------
1 file changed, 42 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 428ffb6..1965209 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -214,9 +214,11 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
switch (bo->mem.mem_type) {
case TTM_PL_VRAM:
if (rbo->adev->mman.buffer_funcs_ring->ready == false) {
- amdgpu_ttm_placement_from_domain(rbo, AMDGPU_GEM_DOMAIN_CPU);
+ amdgpu_ttm_placement_from_domain(rbo,
+ AMDGPU_GEM_DOMAIN_CPU);
} else {
- amdgpu_ttm_placement_from_domain(rbo, AMDGPU_GEM_DOMAIN_GTT);
+ amdgpu_ttm_placement_from_domain(rbo,
+ AMDGPU_GEM_DOMAIN_GTT);
for (i = 0; i < rbo->placement.num_placement; ++i) {
if (!(rbo->placements[i].flags &
TTM_PL_FLAG_TT))
@@ -524,7 +526,8 @@ memcpy:
return 0;
}
-static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
+static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev,
+ struct ttm_mem_reg *mem)
{
struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
struct amdgpu_device *adev = amdgpu_get_adev(bdev);
@@ -545,7 +548,8 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
case TTM_PL_VRAM:
mem->bus.offset = mem->start << PAGE_SHIFT;
/* check if it's visible */
- if ((mem->bus.offset + mem->bus.size) > adev->mc.visible_vram_size)
+ if ((mem->bus.offset + mem->bus.size) >
+ adev->mc.visible_vram_size)
return -EINVAL;
mem->bus.base = adev->mc.aper_base;
mem->bus.is_iomem = true;
@@ -579,7 +583,8 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
return 0;
}
-static void amdgpu_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
+static void amdgpu_ttm_io_mem_free(struct ttm_bo_device *bdev,
+ struct ttm_mem_reg *mem)
{
}
@@ -791,7 +796,8 @@ int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
bo_mem.mem_type = TTM_PL_TT;
spin_lock(&adev->gtt_list_lock);
list_for_each_entry_safe(gtt, tmp, &adev->gtt_list, list) {
- flags = amdgpu_ttm_tt_pte_flags(gtt->adev, >t->ttm.ttm, &bo_mem);
+ flags = amdgpu_ttm_tt_pte_flags(gtt->adev, >t->ttm.ttm,
+ &bo_mem);
r = amdgpu_gart_bind(adev, gtt->offset, gtt->ttm.ttm.num_pages,
gtt->ttm.ttm.pages, gtt->ttm.dma_address,
flags);
@@ -856,7 +862,8 @@ static struct ttm_tt *amdgpu_ttm_tt_create(struct ttm_bo_device *bdev,
}
gtt->ttm.ttm.func = &amdgpu_backend_func;
gtt->adev = adev;
- if (ttm_dma_tt_init(>t->ttm, bdev, size, page_flags, dummy_read_page)) {
+ if (ttm_dma_tt_init(>t->ttm, bdev, size, page_flags,
+ dummy_read_page)) {
kfree(gtt);
return NULL;
}
@@ -887,7 +894,8 @@ static int amdgpu_ttm_tt_populate(struct ttm_tt *ttm)
if (slave && ttm->sg) {
drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
- gtt->ttm.dma_address, ttm->num_pages);
+ gtt->ttm.dma_address,
+ ttm->num_pages);
ttm->state = tt_unbound;
return 0;
}
@@ -906,13 +914,17 @@ static int amdgpu_ttm_tt_populate(struct ttm_tt *ttm)
}
for (i = 0; i < ttm->num_pages; i++) {
- gtt->ttm.dma_address[i] = pci_map_page(adev->pdev, ttm->pages[i],
+ gtt->ttm.dma_address[i] = pci_map_page(adev->pdev,
+ ttm->pages[i],
0, PAGE_SIZE,
PCI_DMA_BIDIRECTIONAL);
- if (pci_dma_mapping_error(adev->pdev, gtt->ttm.dma_address[i])) {
+ if (pci_dma_mapping_error(adev->pdev,
+ gtt->ttm.dma_address[i])) {
while (i--) {
- pci_unmap_page(adev->pdev, gtt->ttm.dma_address[i],
- PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+ pci_unmap_page(adev->pdev,
+ gtt->ttm.dma_address[i],
+ PAGE_SIZE,
+ PCI_DMA_BIDIRECTIONAL);
gtt->ttm.dma_address[i] = 0;
}
ttm_pool_unpopulate(ttm);
@@ -1195,14 +1207,20 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
(unsigned)(adev->mc.gtt_size / (1024 * 1024)));
adev->gds.mem.total_size = adev->gds.mem.total_size << AMDGPU_GDS_SHIFT;
- adev->gds.mem.gfx_partition_size = adev->gds.mem.gfx_partition_size << AMDGPU_GDS_SHIFT;
- adev->gds.mem.cs_partition_size = adev->gds.mem.cs_partition_size << AMDGPU_GDS_SHIFT;
+ adev->gds.mem.gfx_partition_size =
+ adev->gds.mem.gfx_partition_size << AMDGPU_GDS_SHIFT;
+ adev->gds.mem.cs_partition_size =
+ adev->gds.mem.cs_partition_size << AMDGPU_GDS_SHIFT;
adev->gds.gws.total_size = adev->gds.gws.total_size << AMDGPU_GWS_SHIFT;
- adev->gds.gws.gfx_partition_size = adev->gds.gws.gfx_partition_size << AMDGPU_GWS_SHIFT;
- adev->gds.gws.cs_partition_size = adev->gds.gws.cs_partition_size << AMDGPU_GWS_SHIFT;
+ adev->gds.gws.gfx_partition_size =
+ adev->gds.gws.gfx_partition_size << AMDGPU_GWS_SHIFT;
+ adev->gds.gws.cs_partition_size =
+ adev->gds.gws.cs_partition_size << AMDGPU_GWS_SHIFT;
adev->gds.oa.total_size = adev->gds.oa.total_size << AMDGPU_OA_SHIFT;
- adev->gds.oa.gfx_partition_size = adev->gds.oa.gfx_partition_size << AMDGPU_OA_SHIFT;
- adev->gds.oa.cs_partition_size = adev->gds.oa.cs_partition_size << AMDGPU_OA_SHIFT;
+ adev->gds.oa.gfx_partition_size =
+ adev->gds.oa.gfx_partition_size << AMDGPU_OA_SHIFT;
+ adev->gds.oa.cs_partition_size =
+ adev->gds.oa.cs_partition_size << AMDGPU_OA_SHIFT;
/* GDS Memory */
r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GDS,
adev->gds.mem.total_size >> PAGE_SHIFT);
@@ -1362,10 +1380,9 @@ error_free:
return r;
}
-int amdgpu_fill_buffer(struct amdgpu_bo *bo,
- uint32_t src_data,
- struct reservation_object *resv,
- struct fence **fence)
+int amdgpu_fill_buffer(struct amdgpu_bo *bo, uint32_t src_data,
+ struct reservation_object *resv,
+ struct fence **fence)
{
struct amdgpu_device *adev = bo->adev;
struct amdgpu_job *job;
@@ -1607,5 +1624,7 @@ static void amdgpu_ttm_debugfs_fini(struct amdgpu_device *adev)
u64 amdgpu_ttm_get_gtt_mem_size(struct amdgpu_device *adev)
{
- return ttm_get_kernel_zone_memory_size(adev->mman.mem_global_ref.object);
+ struct ttm_mem_global *glob = adev->mman.mem_global_ref.object;
+
+ return ttm_get_kernel_zone_memory_size(glob);
}
--
2.5.0
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^ permalink raw reply related
* [PATCH 1/5] drm/amdgpu: remove unused member from struct amdgpu_bo
From: Christian König @ 2016-09-15 13:10 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Not used in a while.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 --
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 1 -
2 files changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ee55763..3b3981d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -446,8 +446,6 @@ struct amdgpu_bo_va {
#define AMDGPU_GEM_DOMAIN_MAX 0x3
struct amdgpu_bo {
- /* Protected by gem.mutex */
- struct list_head list;
/* Protected by tbo.reserved */
u32 prefered_domains;
u32 allowed_domains;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index d6e6c93..4289c31 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -360,7 +360,6 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
return r;
}
bo->adev = adev;
- INIT_LIST_HEAD(&bo->list);
INIT_LIST_HEAD(&bo->shadow_list);
INIT_LIST_HEAD(&bo->va);
bo->prefered_domains = domain & (AMDGPU_GEM_DOMAIN_VRAM |
--
2.5.0
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^ permalink raw reply related
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