* Re: [PATCH v5] dt-bindings: rtc: epson,rx6110: Convert to DT Schema
From: Alexandre Belloni @ 2026-06-24 21:15 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, Udaya Kiran Challa
Cc: skhan, me, linux-rtc, devicetree, linux-kernel
In-Reply-To: <20260514173851.25088-1-challauday369@gmail.com>
On Thu, 14 May 2026 23:03:32 +0530, Udaya Kiran Challa wrote:
> Convert the Epson RX6110 Real Time Clock devicetree binding
> from the legacy text format to DT schema.
Applied, thanks!
[1/1] dt-bindings: rtc: epson,rx6110: Convert to DT Schema
https://git.kernel.org/abelloni/c/c7ab7504631d
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH v1] rtc: mpfs: fix counter upload completion condition
From: Alexandre Belloni @ 2026-06-24 21:15 UTC (permalink / raw)
To: linux-riscv, Conor Dooley
Cc: Conor Dooley, stable, Valentina.FernandezAlanis, Daire McNamara,
linux-rtc, linux-kernel
In-Reply-To: <20260513-panhandle-ashy-70c6abf84d59@spud>
On Wed, 13 May 2026 18:55:55 +0100, Conor Dooley wrote:
> The condition that needs to be checked for upload completion is the
> UPLOAD bit in the completion register going low. The original iterations
> of this driver used a do-while and this was converted to a
> read_poll_timeout() during upstreaming without the condition being
> inverted as it should have been.
>
> I suspect that this went unnoticed until now because a) the first read
> was done when the bit was still set, immediately completing the
> read_poll_timeout() and b) because the RTC doesn't hold time when power
> is removed from the SoC reducing its utility (I for one keep it
> disabled). If my first suspicion was true when the driver was
> upstreamed, it's not true any longer though, hence the detection of the
> problem.
>
> [...]
Applied, thanks!
[1/1] rtc: mpfs: fix counter upload completion condition
https://git.kernel.org/abelloni/c/9792ff8afa90
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: (subset) [PATCH 2/2] rtc: isl1208: Balance enable_irq_wake() with disable_irq_wake() on cleanup
From: Alexandre Belloni @ 2026-06-24 21:15 UTC (permalink / raw)
To: John Madieu
Cc: ryan, akpm, m.grzeschik, Denis.Osterland, linux-rtc, linux-kernel,
biju.das.jz, john.madieu
In-Reply-To: <20260425154959.2796261-3-john.madieu.xa@bp.renesas.com>
On Sat, 25 Apr 2026 15:49:59 +0000, John Madieu wrote:
> isl1208_setup_irq() calls enable_irq_wake() after a successful
> IRQ request, but the driver has no remove path that balances it.
> The driver is devm-only, so on unbind devm releases the IRQ -
> but enable_irq_wake() is not undone by IRQ release, so the wake
> count for that IRQ stays incremented.
>
> Each rebind therefore leaks one wake reference; the leak doubles
> for the chip variant that has a separate evdet IRQ, since
> isl1208_setup_irq() is then called twice during probe.
>
> [...]
Applied, thanks!
[2/2] rtc: isl1208: Balance enable_irq_wake() with disable_irq_wake() on cleanup
https://git.kernel.org/abelloni/c/1afe4f19d6ad
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: (subset) [PATCH v2 1/2] rtc: Add rtc_read_next_alarm() to read next expiring timer
From: Alexandre Belloni @ 2026-06-24 21:15 UTC (permalink / raw)
To: Shyam Sundar S K, Mario Limonciello
Cc: Hans de Goede, Ilpo Järvinen, platform-driver-x86,
linux-kernel, linux-rtc, Thomas Gleixner
In-Reply-To: <20260521043714.1022930-2-mario.limonciello@amd.com>
On Wed, 20 May 2026 23:37:13 -0500, Mario Limonciello wrote:
> Add a new function rtc_read_next_alarm() that reads the next expiring
> alarm from the RTC timerqueue. This is different from rtc_read_alarm(),
> which only reads the aie_timer.
>
> The wakealarm sysfs file programs the rtc->aie_timer, whereas the
> alarmtimer suspend routine programs its own timer into the RTC timerqueue.
> Both timers end up in the RTC's timerqueue, and the first expiring timer
> is what gets armed in the hardware.
>
> [...]
Applied, thanks!
[1/2] rtc: Add rtc_read_next_alarm() to read next expiring timer
https://git.kernel.org/abelloni/c/947d7ea6f60b
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH v2 0/5] rtc: renesas-rtca3: Various fixes and improvements
From: Alexandre Belloni @ 2026-06-24 21:16 UTC (permalink / raw)
To: Claudiu Beznea, Geert Uytterhoeven, linux-rtc, Prabhakar
Cc: linux-renesas-soc, linux-kernel, Biju Das, Fabrizio Castro,
Lad Prabhakar
In-Reply-To: <20260602192559.1791344-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
On Tue, 02 Jun 2026 20:25:54 +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Hi all,
>
> This patch series includes various fixes and improvements for the
> Renesas RTCA-3 RTC driver, including:
> - Fixing the polling condition when clearing the PIE bit during alarm
> setup error handling.
> - Checking the result of the RADJ polling during initial setup and
> propagating errors.
> - Correcting an error message related to reset control.
> - Fixing a typo in the documentation for the rtca3_ppb_per_cycle struct.
> - Refactoring year decoding logic into a helper function for better
> readability.
>
> [...]
Applied, thanks!
[1/5] rtc: renesas-rtca3: Fix PIE clear polling condition in alarm setup error path
https://git.kernel.org/abelloni/c/7e342d87aa8e
[2/5] rtc: renesas-rtca3: Check RADJ poll result during initial setup
https://git.kernel.org/abelloni/c/fafb016d0812
[3/5] rtc: renesas-rtca3: Fix incorrect error message for reset assert
https://git.kernel.org/abelloni/c/09939630aad9
[4/5] rtc: renesas-rtca3: Fix typo in rtca3_ppb_per_cycle documentation
https://git.kernel.org/abelloni/c/9fb12656a7a5
[5/5] rtc: renesas-rtca3: Factor out year decoding helper
https://git.kernel.org/abelloni/c/2098bb8ac5f5
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH v3] rtc: ds1307: handle oscillator stop flag for ds1337/ds1339/ds3231
From: Alexandre Belloni @ 2026-06-24 21:16 UTC (permalink / raw)
To: Ronan Dalton
Cc: linux-rtc, linux-kernel, Tyler Hicks, Sasha Levin, Meagan Lloyd,
Rodolfo Giometti, Chris Packham
In-Reply-To: <20260508032518.3696705-2-ronan.dalton@alliedtelesis.co.nz>
On Fri, 08 May 2026 15:24:49 +1200, Ronan Dalton wrote:
> Prior to commit 48458654659c ("rtc: ds1307: remove clear of oscillator
> stop flag (OSF) in probe"), the oscillator stop flag (OSF) bit was
> checked during device probe for the ds1337, ds1339, ds1341, and ds3231
> chips; if it was set, it would be cleared and a warning would be logged
> saying "SET TIME!". Since that commit, the OSF bit is no longer cleared,
> but the warning is still printed.
>
> [...]
Applied, thanks!
[1/1] rtc: ds1307: handle oscillator stop flag for ds1337/ds1339/ds3231
https://git.kernel.org/abelloni/c/a091e1ba3b68
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH] rtc: msc313: fix NULL deref in shared IRQ handler at probe
From: Alexandre Belloni @ 2026-06-24 21:16 UTC (permalink / raw)
To: Stepan Ionichev
Cc: daniel, romain.perier, linux-arm-kernel, linux-rtc, linux-kernel
In-Reply-To: <20260511032703.48262-1-sozdayvek@gmail.com>
On Mon, 11 May 2026 08:27:03 +0500, Stepan Ionichev wrote:
> msc313_rtc_probe() calls devm_request_irq() with IRQF_SHARED and
> &pdev->dev as the cookie, but platform_set_drvdata() is only called
> later after the clock setup. With a shared IRQ line, another device
> on the same line can trigger the handler in that window. The
> handler does dev_get_drvdata() on the cookie, gets NULL, and
> dereferences priv->rtc_base in interrupt context.
>
> [...]
Applied, thanks!
[1/1] rtc: msc313: fix NULL deref in shared IRQ handler at probe
https://git.kernel.org/abelloni/c/a369f48be8de
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH v1] rtc: mpfs: fix counter upload completion condition
From: Alexandre Belloni @ 2026-06-24 21:15 UTC (permalink / raw)
To: linux-riscv, Conor Dooley
Cc: Conor Dooley, stable, Valentina.FernandezAlanis, Daire McNamara,
linux-rtc, linux-kernel
In-Reply-To: <20260513-panhandle-ashy-70c6abf84d59@spud>
On Wed, 13 May 2026 18:55:55 +0100, Conor Dooley wrote:
> The condition that needs to be checked for upload completion is the
> UPLOAD bit in the completion register going low. The original iterations
> of this driver used a do-while and this was converted to a
> read_poll_timeout() during upstreaming without the condition being
> inverted as it should have been.
>
> I suspect that this went unnoticed until now because a) the first read
> was done when the bit was still set, immediately completing the
> read_poll_timeout() and b) because the RTC doesn't hold time when power
> is removed from the SoC reducing its utility (I for one keep it
> disabled). If my first suspicion was true when the driver was
> upstreamed, it's not true any longer though, hence the detection of the
> problem.
>
> [...]
Applied, thanks!
[1/1] rtc: mpfs: fix counter upload completion condition
https://git.kernel.org/abelloni/c/9792ff8afa90
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply
* Re: [PATCH 0/2] rtc: aspeed: Add AST2700 RTC support
From: Alexandre Belloni @ 2026-06-24 21:16 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, Tommy Huang
Cc: linux-rtc, devicetree, linux-kernel, linux-arm-kernel,
linux-aspeed
In-Reply-To: <20260601-ast2700-rtc-v1-0-15d4ca46500a@aspeedtech.com>
On Mon, 01 Jun 2026 17:14:05 +0800, Tommy Huang wrote:
> This patch series adds support for the ASPEED AST2700 RTC define,
> includeing dt-binding in the Document and rtc-aspeed.c
Applied, thanks!
[1/2] dt-bindings: rtc: add ASPEED AST2700 compatible
https://git.kernel.org/abelloni/c/5e7f746bc106
[2/2] rtc: aspeed: add AST2700 compatible
https://git.kernel.org/abelloni/c/3319cfeeb8c4
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH v1 0/3] rtc: Use named initializers for platform_device_id arrays
From: Alexandre Belloni @ 2026-06-24 21:16 UTC (permalink / raw)
To: Uwe Kleine-König (The Capable Hub)
Cc: Benson Leung, Guenter Roeck, linux-rtc, chrome-platform,
linux-kernel, Linus Walleij, linux-arm-kernel, Karel Balej,
Matti Vaittinen, Chanwoo Choi, Krzysztof Kozlowski,
André Draszik, linux-samsung-soc
In-Reply-To: <cover.1779950275.git.u.kleine-koenig@baylibre.com>
On Thu, 28 May 2026 08:48:09 +0200, Uwe Kleine-König (The Capable Hub) wrote:
> this series targets to use named initializers for platform_device_id
> arrays. In general these are better readable for humans and more robust
> to changes in the respective struct definition.
>
> This robustness is needed as I want to do
>
> diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
> --- a/include/linux/mod_devicetable.h
> +++ b/include/linux/mod_devicetable.h
> @@ -610,4 +610,7 @@ struct dmi_system_id {
> struct platform_device_id {
> char name[PLATFORM_NAME_SIZE];
> - kernel_ulong_t driver_data;
> + union {
> + kernel_ulong_t driver_data;
> + const void *driver_data_ptr;
> + };
> };
>
> [...]
Applied, thanks!
[1/3] rtc: Drop unused assignment of platform_device_id driver data
https://git.kernel.org/abelloni/c/ba5dca876b54
[2/3] rtc: ab8500: Simplify driver_data handling
https://git.kernel.org/abelloni/c/6e2f1f0184da
[3/3] rtc: Use named initializers for platform_device_id arrays
https://git.kernel.org/abelloni/c/041ca8884410
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* [RFC PATCH v2] dma-coherent: use KiB in DMA allocation logs
From: Vova Sharaienko @ 2026-06-24 21:16 UTC (permalink / raw)
To: Marek Szyprowski, Robin Murphy
Cc: android-mm, Vova Sharaienko, kernel-team, iommu, linux-kernel
We are proposing to update DMA reserved memory pool allocation log
messages to display sizes in KiB instead of MiB. Using MiB caused
allocations less than 1 MiB to be logged as 0 MiB due to integer
truncation. KiB provides better precision for smaller memory regions
specified in the Device Tree.
This is currently marked as an RFC because we would like feedback on
a KiB unit change.
Signed-off-by: Vova Sharaienko <sharaienko@google.com>
---
v1: https://lore.kernel.org/all/20260624000516.597555-1-sharaienko@google.com/
Addressed feedback from v1: changed %ld to %llu for size in KiB
to avoid truncation for sizes (which can be 64-bit on a 32-bit kernel)
larger than 4 GiB.
kernel/dma/coherent.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/kernel/dma/coherent.c b/kernel/dma/coherent.c
index bcdc0f76d2e8..67f9a88ec4fe 100644
--- a/kernel/dma/coherent.c
+++ b/kernel/dma/coherent.c
@@ -69,8 +69,8 @@ static struct dma_coherent_mem *dma_init_coherent_memory(phys_addr_t phys_addr,
kfree(dma_mem);
out_unmap_membase:
memunmap(mem_base);
- pr_err("Reserved memory: failed to init DMA memory pool at %pa, size %zd MiB\n",
- &phys_addr, size / SZ_1M);
+ pr_err("Reserved memory: failed to init DMA memory pool at %pa, size %zu KiB\n",
+ &phys_addr, size / SZ_1K);
return ERR_PTR(-ENOMEM);
}
@@ -384,8 +384,8 @@ static int __init rmem_dma_setup(unsigned long node, struct reserved_mem *rmem)
}
#endif
- pr_info("Reserved memory: created DMA memory pool at %pa, size %ld MiB\n",
- &rmem->base, (unsigned long)rmem->size / SZ_1M);
+ pr_info("Reserved memory: created DMA memory pool at %pa, size %llu KiB\n",
+ &rmem->base, (unsigned long long)(rmem->size / SZ_1K));
return 0;
}
--
2.55.0.rc0.799.gd6f94ed593-goog
^ permalink raw reply related
* Re: [PATCH] rtc: mv: add suspend/resume support for wakeup
From: Alexandre Belloni @ 2026-06-24 21:17 UTC (permalink / raw)
To: Xue Lei; +Cc: linux-rtc, linux-kernel, xue.lei
In-Reply-To: <20260611023350.1370881-1-Xue.Lei@windriver.com>
On Thu, 11 Jun 2026 10:33:50 +0800, Xue Lei wrote:
> Add PM suspend/resume callbacks to enable/disable IRQ wake for the
> RTC alarm interrupt. This allows the RTC alarm to wake the system
> from STR (e.g. via rtcwake -m mem -s N).
>
> Without this, the RTC IRQ is masked during suspend by the MPIC's
> IRQCHIP_MASK_ON_SUSPEND behavior, preventing alarm-based wakeup.
>
> [...]
Applied, thanks!
[1/1] rtc: mv: add suspend/resume support for wakeup
https://git.kernel.org/abelloni/c/851d961ff248
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH] rtc: interface: fix typos in rtc_handle_legacy_irq() documentation
From: Alexandre Belloni @ 2026-06-24 21:17 UTC (permalink / raw)
To: Yahya Saqban; +Cc: linux-rtc, linux-kernel
In-Reply-To: <20260512210235.343070-1-yahyasaqban@gmail.com>
On Wed, 13 May 2026 00:02:35 +0300, Yahya Saqban wrote:
> Fix spelling of 'occurence' to 'occurrence' and 'of' to 'or' in the
> kernel-doc comment for rtc_handle_legacy_irq().
Applied, thanks!
[1/1] rtc: interface: fix typos in rtc_handle_legacy_irq() documentation
https://git.kernel.org/abelloni/c/4202e4254403
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH V14 0/9] Add Invensense ICM42607
From: Chris Morgan @ 2026-06-24 21:18 UTC (permalink / raw)
To: Chris Morgan
Cc: linux-iio, andy, nuno.sa, dlechner, jic23, jean-baptiste.maneyrol,
linux-rockchip, devicetree, heiko, conor+dt, krzk+dt, robh,
andriy.shevchenko
In-Reply-To: <20260624182350.50467-1-macroalpha82@gmail.com>
On Wed, Jun 24, 2026 at 01:23:39PM -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add support for the ICM42607 IMU. This sensor shares the same
> functionality but a different register layout with the existing
> ICM42600.
>
> This driver should work with the ICM42607 and ICM42607P over both I2C
> and SPI, however only the ICM42607P over I2C could be tested.
>
> Changes Since V1:
> - Instead of creating a new driver, merged with the existing inv_icm42600
> driver. This necessitated adding some code to the existing driver to
> permit using a different register layout for the same functionality.
> - Split changes up a bit more to decrease the size of the individual
> patches. Note that patch 0004 is still pretty hefty; if I need to split
> further I may need to create some temporary stub functions.
> - Used guard() and PM_RUNTIME_ACQUIRE_AUTOSUSPEND() on the new functions
> per Jonathan's recommendations.
>
> Changes Since V2:
> - Went back to using a new driver on advice from Invensense engineer.
> - Further split changes up into smaller chunks of functionality. Note
> still that the largest patch is approximately 900 lines, and that while
> the driver compiles cleanly at each commit it is not able to drive the
> hardware until the commit that adds the Interrupt (as it also adds the
> Makefile).
> - Change the error to a warning when the devicetree binding does not match
> the hardware ID.
> - Dropped the ack on the devicetree bindings, as I am creating a new file
> (for a new driver) instead of modifying the existing one.
>
> Changes Since V3:
> - Numerous small fixes (too many to list here). Thank you to everyone who
> provided feedback.
> - Split power management additions into an additional commit to break
> things up further.
> - Consolidated devicetree documentation in existing
> invensense,icm42600.yaml file.
> - Removed most of the FIELD_PREP from header file to c files to make code
> easier to read.
> - Changed scale values to 2D arrays for Gyro and Accelerometer.
> - Removed IIO_CHAN_INFO_CALIBBIAS attribute.
>
> Changes Since V4:
> - Additional numerous small fixes, thank you again for all the feedback.
> - Dropped power control API and instead run device in low noise mode.
> - Split devicetree bindings into two distinct changes.
> - Reordered adding of enums and structs to main header file so that they
> are only brought in when needed.
> - Stopped using enum for driver data and instead am using pointer to
> device specific driver data.
>
> Changes Since V5:
> - Corrected use of "dev_warn_probe" to just "dev_warn".
> - Fixed some return scenarios which would unconditionally return 0
> when an error was present.
> - Corrected use of max() to min() for bounds checking. max() was
> incorrect.
> - Fixed using "st->conf.accel.odr" in the gyroscope function. It
> should have been "st->conf.gyro.odr" which it now is.
> - Additional small fixes suggested by "sashiko.dev".
> - Added a regmap cache. I used the datasheet to try and determine
> which registers might change without explicit writes.
>
> Changes Since V6:
> - Corrected additional errors identified by sashiko.dev, mostly
> fixing potential deadlocks, missing calls for pm runtime, and
> potential overflow issues.
>
> Changes Since V7:
> - Dropped Wake on Movement patches, since some of the functionality
> was only available for a device on which I cannot test.
> - Dropped support for SPI 3-Wire mode, since it complicated the
> bus setup (and I lack the hardware to test such features anyway).
> - Fixed a few additional bugs identified by sashiko.dev bot.
>
> Changes Since V8:
> - Added back IRQ dropped accidentally when dropping wake on movement
> patches.
> - Dropped "Reviewed-By" tag on patch 2 because of substantial changes
> made to devicetree binding documentation.
> - Additional small fixes as suggested.
>
> Changes Since V9:
> - Removed interrupts (and buffers) from the driver. I previously was
> unable to detect deadlocks because it turns out my IRQ was not even
> wired correctly in my device.
> - Updated devicetree binding commits to make interrupts optional for
> users of the icm42607 driver.
>
> Changes Since V10:
> - Explicitly specified enum values in header file.
> - Removed additional dead code for buffer handling.
> - Cleaned up headers.
> - Added additional locks as requested by sashiko.dev bot.
>
> Changes Since V11:
> - Since driver has shrunk in size considerably, moved i2c bits into
> first code commit. This ensures that the very first commit with code
> can now be compiled. The commit after that adds SPI support as it
> was in the previous versions.
> - Used pahole to optimize inv_icm42607_state. Reordering elements
> reduced size in memory from 384 bytes to 256 bytes.
> - Added a map of all readable registers and all writeable registers
> according to the datasheet.
> - Added back some missing headers pointed out by the maintainers.
> - Added FIELD_PREP in a few more places to make the code more
> obvious on what it's doing.
> - Added a comment to the power management code to note that
> temperature sensor being enabled doesn't matter as the clocks
> are off by default when the gyro and accel channels are off.
> - Removed iio_device_claim_direct() calls since it was no longer
> needed.
> - Fixed shared_by_all attributes for temperature sensor.
> - Additional miscellanous fixes as requested.
>
> Changes Since V12:
> - Removed aligned buffer from inv_icm42607_state struct as we do not
> currently have the need for it.
> - Corrected the order of the odr values in the accel and gyro files
> as the values were out of order (the place in the array corresponds
> to the register value).
> - Stopped setting the clock value depending upon the temp config. The
> datasheet advised to keep using the default value.
> - Corrected logic when changing between states. We only need to pause
> when a sensor changes from off to an on state or when the gyro
> changes from an on state to off.
> - Added missing includes for several files.
>
> Changes Since V13:
> - Refactored inv_icm42607_set_accel_conf() and
> inv_icm42607_set_gyro_conf() into a single function.
> - Refactored inv_icm42607_accel_read_sensor() and
> inv_icm42607_gyro_read_sensor() into a single function.
> - Merged inv_icm42607_set_temp_conf() into initial init function
> since it only really needs to be called once.
> - Saved adding temp sensor for last and updated
> inv_icm42607_temp_read() to either confirm other sensors are already
> enabled or enable the accelerometer so it can get a reading.
> - Updated inv_icm42607_set_pwr_mgmt0() so that it does not update the
> sensor mode and forcibly keep the sensor enabled.
> - Added inv_icm42607_temp_filter_bw enums since it appears to use
> different values than the accel or gyro sensor.
> - Set the temp startup time from 77ms to 77us, as I previously misread
> the datasheet.
> - Additional minor fixes.
>
> Chris Morgan (9):
> dt-bindings: iio: imu: icm42600: Add mount-matrix
> dt-bindings: iio: imu: icm42600: Add icm42607
> iio: imu: inv_icm42607: Add inv_icm42607 Core Driver
> iio: imu: inv_icm42607: Add SPI For icm42607
> iio: imu: inv_icm42607: Add PM support for icm42607
> iio: imu: inv_icm42607: Add Accelerometer for icm42607
> iio: imu: inv_icm42607: Add Gyroscope to icm42607
> iio: imu: inv_icm42607: Add Temp Support in icm42607
> arm64: dts: rockchip: Add icm42607p IMU for RG-DS
>
> .../bindings/iio/imu/invensense,icm42600.yaml | 20 +-
> .../dts/rockchip/rk3568-anbernic-rg-ds.dts | 8 +-
> drivers/iio/imu/Kconfig | 1 +
> drivers/iio/imu/Makefile | 1 +
> drivers/iio/imu/inv_icm42607/Kconfig | 30 +
> drivers/iio/imu/inv_icm42607/Makefile | 13 +
> drivers/iio/imu/inv_icm42607/inv_icm42607.h | 423 ++++++++++++
> .../iio/imu/inv_icm42607/inv_icm42607_accel.c | 317 +++++++++
> .../iio/imu/inv_icm42607/inv_icm42607_core.c | 606 ++++++++++++++++++
> .../iio/imu/inv_icm42607/inv_icm42607_gyro.c | 313 +++++++++
> .../iio/imu/inv_icm42607/inv_icm42607_i2c.c | 98 +++
> .../iio/imu/inv_icm42607/inv_icm42607_spi.c | 108 ++++
> .../iio/imu/inv_icm42607/inv_icm42607_temp.c | 99 +++
> .../iio/imu/inv_icm42607/inv_icm42607_temp.h | 37 ++
> 14 files changed, 2072 insertions(+), 2 deletions(-)
> create mode 100644 drivers/iio/imu/inv_icm42607/Kconfig
> create mode 100644 drivers/iio/imu/inv_icm42607/Makefile
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607.h
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_spi.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_temp.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_temp.h
>
> --
> 2.43.0
>
I got sashiko.dev's review, and agree with everything except 2 points.
1) It asks "Is it appropriate to omit the interrupts property based on
driver behavior rather than hardware wiring?" I would say no, but in
my case the hardware is not wired for an interrupt so it's moot.
2) It asks "Does this code update the software state cache for the
sensor mode?" No, it doesn't. The goal is for the device to stay
powered up for up to 2 seconds until runtime PM turns it off if it
isn't active, but I don't mind something turning around and shutting
the hardware down if it's not in use before then. Anything that needs
to read the specific sensor in question will be holding the mutex so
that there shouldn't be a risk of another thread turning stuff off
while I'm trying to use it, I don't think. What I want to avoid is
calling to turn the hardware on for a one-shot read and then
immediately turning it off once I'm done. I can wait the two seconds
for runtime PM to do it when the alternative is to call the shutdown
routine every single time for one-shot reads and wait for the startup
and in the case of the gyro shutdown times otherwise.
Thoughts?
I can fix the remaining issues it points out and resubmit.
Thank you,
Chris
^ permalink raw reply
* Re: [PATCH V14 0/9] Add Invensense ICM42607
From: Chris Morgan @ 2026-06-24 21:18 UTC (permalink / raw)
To: Chris Morgan
Cc: linux-iio, andy, nuno.sa, dlechner, jic23, jean-baptiste.maneyrol,
linux-rockchip, devicetree, heiko, conor+dt, krzk+dt, robh,
andriy.shevchenko
In-Reply-To: <20260624182350.50467-1-macroalpha82@gmail.com>
On Wed, Jun 24, 2026 at 01:23:39PM -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add support for the ICM42607 IMU. This sensor shares the same
> functionality but a different register layout with the existing
> ICM42600.
>
> This driver should work with the ICM42607 and ICM42607P over both I2C
> and SPI, however only the ICM42607P over I2C could be tested.
>
> Changes Since V1:
> - Instead of creating a new driver, merged with the existing inv_icm42600
> driver. This necessitated adding some code to the existing driver to
> permit using a different register layout for the same functionality.
> - Split changes up a bit more to decrease the size of the individual
> patches. Note that patch 0004 is still pretty hefty; if I need to split
> further I may need to create some temporary stub functions.
> - Used guard() and PM_RUNTIME_ACQUIRE_AUTOSUSPEND() on the new functions
> per Jonathan's recommendations.
>
> Changes Since V2:
> - Went back to using a new driver on advice from Invensense engineer.
> - Further split changes up into smaller chunks of functionality. Note
> still that the largest patch is approximately 900 lines, and that while
> the driver compiles cleanly at each commit it is not able to drive the
> hardware until the commit that adds the Interrupt (as it also adds the
> Makefile).
> - Change the error to a warning when the devicetree binding does not match
> the hardware ID.
> - Dropped the ack on the devicetree bindings, as I am creating a new file
> (for a new driver) instead of modifying the existing one.
>
> Changes Since V3:
> - Numerous small fixes (too many to list here). Thank you to everyone who
> provided feedback.
> - Split power management additions into an additional commit to break
> things up further.
> - Consolidated devicetree documentation in existing
> invensense,icm42600.yaml file.
> - Removed most of the FIELD_PREP from header file to c files to make code
> easier to read.
> - Changed scale values to 2D arrays for Gyro and Accelerometer.
> - Removed IIO_CHAN_INFO_CALIBBIAS attribute.
>
> Changes Since V4:
> - Additional numerous small fixes, thank you again for all the feedback.
> - Dropped power control API and instead run device in low noise mode.
> - Split devicetree bindings into two distinct changes.
> - Reordered adding of enums and structs to main header file so that they
> are only brought in when needed.
> - Stopped using enum for driver data and instead am using pointer to
> device specific driver data.
>
> Changes Since V5:
> - Corrected use of "dev_warn_probe" to just "dev_warn".
> - Fixed some return scenarios which would unconditionally return 0
> when an error was present.
> - Corrected use of max() to min() for bounds checking. max() was
> incorrect.
> - Fixed using "st->conf.accel.odr" in the gyroscope function. It
> should have been "st->conf.gyro.odr" which it now is.
> - Additional small fixes suggested by "sashiko.dev".
> - Added a regmap cache. I used the datasheet to try and determine
> which registers might change without explicit writes.
>
> Changes Since V6:
> - Corrected additional errors identified by sashiko.dev, mostly
> fixing potential deadlocks, missing calls for pm runtime, and
> potential overflow issues.
>
> Changes Since V7:
> - Dropped Wake on Movement patches, since some of the functionality
> was only available for a device on which I cannot test.
> - Dropped support for SPI 3-Wire mode, since it complicated the
> bus setup (and I lack the hardware to test such features anyway).
> - Fixed a few additional bugs identified by sashiko.dev bot.
>
> Changes Since V8:
> - Added back IRQ dropped accidentally when dropping wake on movement
> patches.
> - Dropped "Reviewed-By" tag on patch 2 because of substantial changes
> made to devicetree binding documentation.
> - Additional small fixes as suggested.
>
> Changes Since V9:
> - Removed interrupts (and buffers) from the driver. I previously was
> unable to detect deadlocks because it turns out my IRQ was not even
> wired correctly in my device.
> - Updated devicetree binding commits to make interrupts optional for
> users of the icm42607 driver.
>
> Changes Since V10:
> - Explicitly specified enum values in header file.
> - Removed additional dead code for buffer handling.
> - Cleaned up headers.
> - Added additional locks as requested by sashiko.dev bot.
>
> Changes Since V11:
> - Since driver has shrunk in size considerably, moved i2c bits into
> first code commit. This ensures that the very first commit with code
> can now be compiled. The commit after that adds SPI support as it
> was in the previous versions.
> - Used pahole to optimize inv_icm42607_state. Reordering elements
> reduced size in memory from 384 bytes to 256 bytes.
> - Added a map of all readable registers and all writeable registers
> according to the datasheet.
> - Added back some missing headers pointed out by the maintainers.
> - Added FIELD_PREP in a few more places to make the code more
> obvious on what it's doing.
> - Added a comment to the power management code to note that
> temperature sensor being enabled doesn't matter as the clocks
> are off by default when the gyro and accel channels are off.
> - Removed iio_device_claim_direct() calls since it was no longer
> needed.
> - Fixed shared_by_all attributes for temperature sensor.
> - Additional miscellanous fixes as requested.
>
> Changes Since V12:
> - Removed aligned buffer from inv_icm42607_state struct as we do not
> currently have the need for it.
> - Corrected the order of the odr values in the accel and gyro files
> as the values were out of order (the place in the array corresponds
> to the register value).
> - Stopped setting the clock value depending upon the temp config. The
> datasheet advised to keep using the default value.
> - Corrected logic when changing between states. We only need to pause
> when a sensor changes from off to an on state or when the gyro
> changes from an on state to off.
> - Added missing includes for several files.
>
> Changes Since V13:
> - Refactored inv_icm42607_set_accel_conf() and
> inv_icm42607_set_gyro_conf() into a single function.
> - Refactored inv_icm42607_accel_read_sensor() and
> inv_icm42607_gyro_read_sensor() into a single function.
> - Merged inv_icm42607_set_temp_conf() into initial init function
> since it only really needs to be called once.
> - Saved adding temp sensor for last and updated
> inv_icm42607_temp_read() to either confirm other sensors are already
> enabled or enable the accelerometer so it can get a reading.
> - Updated inv_icm42607_set_pwr_mgmt0() so that it does not update the
> sensor mode and forcibly keep the sensor enabled.
> - Added inv_icm42607_temp_filter_bw enums since it appears to use
> different values than the accel or gyro sensor.
> - Set the temp startup time from 77ms to 77us, as I previously misread
> the datasheet.
> - Additional minor fixes.
>
> Chris Morgan (9):
> dt-bindings: iio: imu: icm42600: Add mount-matrix
> dt-bindings: iio: imu: icm42600: Add icm42607
> iio: imu: inv_icm42607: Add inv_icm42607 Core Driver
> iio: imu: inv_icm42607: Add SPI For icm42607
> iio: imu: inv_icm42607: Add PM support for icm42607
> iio: imu: inv_icm42607: Add Accelerometer for icm42607
> iio: imu: inv_icm42607: Add Gyroscope to icm42607
> iio: imu: inv_icm42607: Add Temp Support in icm42607
> arm64: dts: rockchip: Add icm42607p IMU for RG-DS
>
> .../bindings/iio/imu/invensense,icm42600.yaml | 20 +-
> .../dts/rockchip/rk3568-anbernic-rg-ds.dts | 8 +-
> drivers/iio/imu/Kconfig | 1 +
> drivers/iio/imu/Makefile | 1 +
> drivers/iio/imu/inv_icm42607/Kconfig | 30 +
> drivers/iio/imu/inv_icm42607/Makefile | 13 +
> drivers/iio/imu/inv_icm42607/inv_icm42607.h | 423 ++++++++++++
> .../iio/imu/inv_icm42607/inv_icm42607_accel.c | 317 +++++++++
> .../iio/imu/inv_icm42607/inv_icm42607_core.c | 606 ++++++++++++++++++
> .../iio/imu/inv_icm42607/inv_icm42607_gyro.c | 313 +++++++++
> .../iio/imu/inv_icm42607/inv_icm42607_i2c.c | 98 +++
> .../iio/imu/inv_icm42607/inv_icm42607_spi.c | 108 ++++
> .../iio/imu/inv_icm42607/inv_icm42607_temp.c | 99 +++
> .../iio/imu/inv_icm42607/inv_icm42607_temp.h | 37 ++
> 14 files changed, 2072 insertions(+), 2 deletions(-)
> create mode 100644 drivers/iio/imu/inv_icm42607/Kconfig
> create mode 100644 drivers/iio/imu/inv_icm42607/Makefile
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607.h
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_spi.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_temp.c
> create mode 100644 drivers/iio/imu/inv_icm42607/inv_icm42607_temp.h
>
> --
> 2.43.0
>
I got sashiko.dev's review, and agree with everything except 2 points.
1) It asks "Is it appropriate to omit the interrupts property based on
driver behavior rather than hardware wiring?" I would say no, but in
my case the hardware is not wired for an interrupt so it's moot.
2) It asks "Does this code update the software state cache for the
sensor mode?" No, it doesn't. The goal is for the device to stay
powered up for up to 2 seconds until runtime PM turns it off if it
isn't active, but I don't mind something turning around and shutting
the hardware down if it's not in use before then. Anything that needs
to read the specific sensor in question will be holding the mutex so
that there shouldn't be a risk of another thread turning stuff off
while I'm trying to use it, I don't think. What I want to avoid is
calling to turn the hardware on for a one-shot read and then
immediately turning it off once I'm done. I can wait the two seconds
for runtime PM to do it when the alternative is to call the shutdown
routine every single time for one-shot reads and wait for the startup
and in the case of the gyro shutdown times otherwise.
Thoughts?
I can fix the remaining issues it points out and resubmit.
Thank you,
Chris
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply
* Re: [PATCH v1 3/3] arm64: dts: qcom: x1e78100-t14s: Add thermal zones for keyboard skin and charging sensors
From: sashiko-bot @ 2026-06-24 21:18 UTC (permalink / raw)
To: Daniel Lezcano; +Cc: linux-hwmon, robh, conor+dt, devicetree
In-Reply-To: <20260624210825.264454-4-daniel.lezcano@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The commit message claims the charging thermal zone uses 'multiple passive trip points' to 'progressively throttle the different CPU clusters', but the implementation provides only a single passive trip point that throttles all CPUs simultaneously.
--
commit 165036bedb34a29493f4bd0a7af23dab152aff0c
Author: Daniel Lezcano <daniel.lezcano@oss.qualcomm.com>
arm64: dts: qcom: x1e78100-t14s: Add thermal zones for keyboard skin and charging sensors
Add thermal zone descriptions for the keyboard skin temperature and battery
charging circuitry sensors exposed by the embedded controller.
> - a charging circuitry temperature zone with multiple passive trip
> points and CPU frequency mitigation levels.
>
> The charging thermal zone progressively throttles the different CPU
> clusters as the charging circuitry temperature rises and triggers a hot
> condition at the highest trip point.
[Severity: Medium]
Does the implementation match this commit message description?
The commit message claims there are multiple passive trip points and
progressive throttling across different CPU clusters. Is a chunk of the patch
missing, or should the commit message be updated to reflect the final design
shown below?
> diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi
> --- a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi
[ ... ]
> + ec-charging-thermal {
> + polling-delay = <5000>;
> + polling-delay-passive = <2000>;
> +
> + thermal-sensors = <&ec 3>;
> +
> + trips {
> + psv0: trip-point0 {
> + temperature = <55000>;
> + hysteresis = <0>;
> + type = "passive";
> + };
> +
> + alert0: trip-point1 {
> + temperature = <63000>;
> + hysteresis = <0>;
> + type = "hot";
> + };
> + };
[Severity: Medium]
Only a single passive trip point is defined here in ec-charging-thermal,
which doesn't match the "multiple passive trip points" mentioned in the
commit message.
> +
> + cooling-maps {
> + map0 {
> + trip = <&psv0>;
> + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu8 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu9 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +
> + };
> + };
[Severity: Medium]
Additionally, all 12 CPUs are tied uniformly to this single trip point.
Should this define progressive throttling across different CPU clusters as
described in the commit message?
> +
> + };
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260624210825.264454-1-daniel.lezcano@oss.qualcomm.com?part=3
^ permalink raw reply
* Re: [PATCH 2/2] linux-user/xtensa: save/restore FP registers across signal delivery
From: Helge Deller @ 2026-06-24 21:17 UTC (permalink / raw)
To: Michael Tokarev, Matt Turner, qemu-devel
Cc: Richard Henderson, Laurent Vivier, Pierrick Bouvier, Max Filippov
In-Reply-To: <e17b14a6-575e-4b7f-9a3c-6ace863602d0@tls.msk.ru>
On 6/24/26 00:04, Michael Tokarev wrote:
> On 12.06.2026 17:14, Matt Turner wrote:
>> Add support for saving and restoring f0-f15 across signal delivery.
>> The target_xtensa_xtregs_fp struct carries 32-bit f-regs for cores
>> with XTENSA_OPTION_FP_COPROCESSOR; target_xtensa_xtregs_dfp carries
>> 64-bit f-regs for cores with XTENSA_OPTION_DFP_COPROCESSOR.
>>
>> Lock the xtregs region via lock_user before reading on sigreturn,
>> since sc_xtregs is a user-space pointer that may lie outside the
>> locked sigframe.
>
> Now this is kind of fun.
>
>> @@ -282,7 +360,9 @@ long do_rt_sigreturn(CPUXtensaState *env)
>> target_to_host_sigset(&set, &frame->uc.tuc_sigmask);
>> set_sigmask(&set);
>> - restore_sigcontext(env, frame);
>> + if (!restore_sigcontext(env, frame)) {
>> + goto badframe;
>> + }
>
> There's another patch for linux-user/xtensa which is queued up for
> the stable series:
>
> 54e08dbe8f linux-user/xtensa: fix unlock of uninitialized frame pointer on sigreturn
>
> This patch (fix unlock of frame pointer) removes `goto badframe` from
> this same function. With that patch applied, the compiler complains:
>
> linux-user/xtensa/signal.c: In function ‘do_rt_sigreturn’:
> linux-user/xtensa/signal.c:293:1: error: label ‘badframe’ defined but not used [-Werror=unused-label]
> cc1: all warnings being treated as errors
>
> and the build fails.
>
> But this works on master because of this patch (6858e3a71c save/restore
> FP registers").
>
> So, I should either extend 54e08dbe8f in stable series to remove the
> now-unused label, or include this 6858e3a71c change *too* (with the
> previous 7e859bacea).
>
> Does it hurt to pick 7e859bacea and 6858e3a71c to the stable series?
> This feels like another bugfix too, but a bit more involved. And it
> builds at passes all tests, at least.
I suggest to pull in all patches to keep difference to head minimal.
Helge
^ permalink raw reply
* [PATCHv3 1/4] arm: mach-k3: am62: add &main_uart6 to clock and pwr tree
From: rs @ 2026-06-24 21:19 UTC (permalink / raw)
To: robertcnelson, ayush, Erik.Welsh, anshuld, bb, trini, afd,
xypron.glpk, ilias.apalodimas, sjg
Cc: u-boot
In-Reply-To: <20260624211949.327905-1-rs@ti.com>
From: Bryan Brattlof <bb@ti.com>
The pocketbeagle2 uses the main_uart6 as the debug console. To get debug
console prints at the R5 SPL stage, add the &main_uart6 to the R5 clk
and dev data so we can configure the uart as early as possible during
the bootup of the pocketbeagle2
Signed-off-by: Bryan Brattlof <bb@ti.com>
---
arch/arm/mach-k3/r5/am62x/clk-data.c | 19 +++++++++++++++----
arch/arm/mach-k3/r5/am62x/dev-data.c | 5 +++--
2 files changed, 18 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-k3/r5/am62x/clk-data.c b/arch/arm/mach-k3/r5/am62x/clk-data.c
index d7bfed0e031c..05cced0b313b 100644
--- a/arch/arm/mach-k3/r5/am62x/clk-data.c
+++ b/arch/arm/mach-k3/r5/am62x/clk-data.c
@@ -3,9 +3,9 @@
* AM62X specific clock platform data
*
* This file is auto generated. Please do not hand edit and report any issues
- * to Dave Gerlach <d-gerlach@ti.com>.
+ * to Bryan Brattlof <bb@ti.com>.
*
- * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2020-2025 Texas Instruments Incorporated - https://www.ti.com/
*/
#include <linux/clk-provider.h>
@@ -125,6 +125,11 @@ static const char * const main_usart0_fclk_sel_out0_parents[] = {
"hsdiv4_16fft_main_1_hsdivout1_clk",
};
+static const char * const main_usart6_fclk_sel_out0_parents[] = {
+ "usart_programmable_clock_divider_out6",
+ "hsdiv4_16fft_main_1_hsdivout1_clk",
+};
+
static const struct clk_data clk_list[] = {
CLK_FIXED_RATE("osc_26_mhz", 26000000, 0),
CLK_FIXED_RATE("osc_25_mhz", 25000000, 0),
@@ -210,9 +215,11 @@ static const struct clk_data clk_list[] = {
CLK_MUX("main_gtcclk_sel_out0", main_gtcclk_sel_out0_parents, 8, 0x43008030, 0, 3, 0),
CLK_MUX("main_ospi_ref_clk_sel_out0", main_ospi_ref_clk_sel_out0_parents, 2, 0x108500, 0, 1, 0),
CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x108240, 0, 2, 0, 0, 48000000),
+ CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out6", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x108258, 0, 2, 0, 0, 48000000),
CLK_MUX("wkup_clkout_sel_out0", wkup_clkout_sel_out0_parents, 8, 0x43008020, 0, 3, 0),
CLK_MUX("wkup_clksel_out0", wkup_clksel_out0_parents, 2, 0x43008010, 0, 1, 0),
CLK_MUX("main_usart0_fclk_sel_out0", main_usart0_fclk_sel_out0_parents, 2, 0x108280, 0, 1, 0),
+ CLK_MUX("main_usart6_fclk_sel_out0", main_usart6_fclk_sel_out0_parents, 2, 0x108298, 0, 1, 0),
CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout1_clk", "pllfracf_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040084, 0, 7, 0, 0),
CLK_FIXED_RATE("mshsi2c_wkup_0_porscl", 0, 0),
CLK_DIV("sam62_pll_ctrl_wrap_main_0_chip_div24_clk_clk", "sam62_pll_ctrl_wrap_main_0_sysclkout_clk", 0x41011c, 0, 5, 0, 0),
@@ -336,6 +343,10 @@ static const struct dev_clk soc_dev_clk_data[] = {
DEV_CLK(157, 164, "clk_32k_rc_sel_out0"),
DEV_CLK(157, 165, "gluelogic_rcosc_clkout"),
DEV_CLK(157, 166, "gluelogic_hfosc0_clkout"),
+ DEV_CLK(158, 0, "main_usart6_fclk_sel_out0"),
+ DEV_CLK(158, 1, "usart_programmable_clock_divider_out6"),
+ DEV_CLK(158, 2, "hsdiv4_16fft_main_1_hsdivout1_clk"),
+ DEV_CLK(158, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(161, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(161, 1, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(161, 2, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
@@ -361,7 +372,7 @@ static const struct dev_clk soc_dev_clk_data[] = {
const struct ti_k3_clk_platdata am62x_clk_platdata = {
.clk_list = clk_list,
- .clk_list_cnt = 90,
+ .clk_list_cnt = 92,
.soc_dev_clk_data = soc_dev_clk_data,
- .soc_dev_clk_data_cnt = 137,
+ .soc_dev_clk_data_cnt = 140,
};
diff --git a/arch/arm/mach-k3/r5/am62x/dev-data.c b/arch/arm/mach-k3/r5/am62x/dev-data.c
index 59c95df2a887..ea1e76a8a758 100644
--- a/arch/arm/mach-k3/r5/am62x/dev-data.c
+++ b/arch/arm/mach-k3/r5/am62x/dev-data.c
@@ -3,9 +3,9 @@
* AM62X specific device platform data
*
* This file is auto generated. Please do not hand edit and report any issues
- * to Dave Gerlach <d-gerlach@ti.com>.
+ * to Bryan Brattlof <bb@ti.com>.
*
- * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2020-2025 Texas Instruments Incorporated - https://www.ti.com/
*/
#include "k3-dev.h"
@@ -61,6 +61,7 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(36, &soc_lpsc_list[11]),
PSC_DEV(102, &soc_lpsc_list[11]),
PSC_DEV(146, &soc_lpsc_list[11]),
+ PSC_DEV(158, &soc_lpsc_list[11]),
PSC_DEV(13, &soc_lpsc_list[12]),
PSC_DEV(166, &soc_lpsc_list[13]),
PSC_DEV(135, &soc_lpsc_list[14]),
--
2.54.0
^ permalink raw reply related
* [PATCHv3 0/4] k3-am62-pocketbeagle2: add board and variant support
From: rs @ 2026-06-24 21:19 UTC (permalink / raw)
To: robertcnelson, ayush, Erik.Welsh, anshuld, bb, trini, afd,
xypron.glpk, ilias.apalodimas, sjg
Cc: u-boot
From: Randolph Sapp <rs@ti.com>
Add initial board support for the PocketBeagle 2 from BeagleBoard.org. This is
based on the current official series from Robert Nelson [1] and work from Bryan
Brattlof [2] with some light modifications to protect against certain
configurations changes.
This borrows a lot from Phytec's current DDR fixup logic, as that seems to be
the most complete implementation of a dynamic DDR correction for K3 in tree
currently. Thanks Wadim Egorov and Dominik Haller for setting that up.
Now that the various memory issues have been resolved we can clearly see at
runtime that there's an issue with the current device. One of our reservations
overlaps with the u-boot stack. To get around this we'll need to change the
relocation address to something we know will not collide.
[1] https://github.com/beagleboard/u-boot/tree/v2026.01-am62-pocketbeagle2
[2] https://github.com/bryanbrattlof/beagleboot/tree/b4/pb2i
Bryan Brattlof (1):
arm: mach-k3: am62: add &main_uart6 to clock and pwr tree
Randolph Sapp (3):
k3-am62-pocketbeagle2: add initial board support
k3-am62-pocketbeagle2: add support for 1GB variant
k3-am62-pocketbeagle2: add support for efi capsules
arch/arm/dts/Makefile | 1 +
...> k3-am62-pocketbeagle2-ddr4-1600MTs.dtsi} | 92 ++---
.../arm/dts/k3-am62-pocketbeagle2-u-boot.dtsi | 336 ++++++++++++++++++
arch/arm/dts/k3-am62-r5-pocketbeagle2.dts | 35 ++
arch/arm/mach-k3/am62x/Kconfig | 1 +
arch/arm/mach-k3/r5/am62x/clk-data.c | 19 +-
arch/arm/mach-k3/r5/am62x/dev-data.c | 5 +-
board/beagle/pocketbeagle2/Kconfig | 86 +++++
board/beagle/pocketbeagle2/MAINTAINERS | 10 +
board/beagle/pocketbeagle2/Makefile | 11 +
.../board-cfg.yaml | 0
.../{beagleplay => pocketbeagle2}/pm-cfg.yaml | 0
board/beagle/pocketbeagle2/pocketbeagle2.c | 185 ++++++++++
.../pocketbeagle2/pocketbeagle2.env} | 20 +-
.../beagle/pocketbeagle2/pocketbeagle2_ddr.h | 50 +++
.../pocketbeagle2}/rm-cfg.yaml | 4 +-
.../sec-cfg.yaml | 0
...onfig => am62_pocketbeagle2_a53_defconfig} | 25 +-
...config => am62_pocketbeagle2_r5_defconfig} | 16 +-
doc/board/beagle/am62_pocketbeagle2.rst | 279 +++++++++++++++
doc/board/beagle/index.rst | 1 +
include/configs/pocketbeagle2.h | 39 ++
22 files changed, 1132 insertions(+), 83 deletions(-)
copy arch/arm/dts/{k3-am62x-sk-ddr4-1600MTs.dtsi => k3-am62-pocketbeagle2-ddr4-1600MTs.dtsi} (97%)
create mode 100644 arch/arm/dts/k3-am62-pocketbeagle2-u-boot.dtsi
create mode 100644 arch/arm/dts/k3-am62-r5-pocketbeagle2.dts
create mode 100644 board/beagle/pocketbeagle2/Kconfig
create mode 100644 board/beagle/pocketbeagle2/MAINTAINERS
create mode 100644 board/beagle/pocketbeagle2/Makefile
copy board/beagle/{beagleplay => pocketbeagle2}/board-cfg.yaml (100%)
copy board/beagle/{beagleplay => pocketbeagle2}/pm-cfg.yaml (100%)
create mode 100644 board/beagle/pocketbeagle2/pocketbeagle2.c
copy board/{ti/am62x/am62x.env => beagle/pocketbeagle2/pocketbeagle2.env} (64%)
create mode 100644 board/beagle/pocketbeagle2/pocketbeagle2_ddr.h
copy board/{phytec/phycore_am62x => beagle/pocketbeagle2}/rm-cfg.yaml (99%)
copy board/beagle/{beagleplay => pocketbeagle2}/sec-cfg.yaml (100%)
copy configs/{am62x_beagleplay_a53_defconfig => am62_pocketbeagle2_a53_defconfig} (88%)
copy configs/{am62x_beagleplay_r5_defconfig => am62_pocketbeagle2_r5_defconfig} (86%)
create mode 100644 doc/board/beagle/am62_pocketbeagle2.rst
create mode 100644 include/configs/pocketbeagle2.h
--
2.54.0
^ permalink raw reply
* [PATCHv3 4/4] k3-am62-pocketbeagle2: add support for efi capsules
From: rs @ 2026-06-24 21:19 UTC (permalink / raw)
To: robertcnelson, ayush, Erik.Welsh, anshuld, bb, trini, afd,
xypron.glpk, ilias.apalodimas, sjg
Cc: u-boot
In-Reply-To: <20260624211949.327905-1-rs@ti.com>
From: Randolph Sapp <rs@ti.com>
Add support for EFI capsules for this device. One large caveat is that
the partition holding boot binaries cannot be the ESP partition due to
the following ROM limitations.
- The boot disk must be MBR
- The boot partition must be labeled 0x0c with a boot flag
A separate ESP partition should be provided for EFI capabilities.
Signed-off-by: Randolph Sapp <rs@ti.com>
---
v3:
- Remove unnecessary dfu_alt_info_ram variable
---
.../arm/dts/k3-am62-pocketbeagle2-u-boot.dtsi | 29 +++++++++++++++++++
board/beagle/pocketbeagle2/pocketbeagle2.c | 26 +++++++++++++++++
configs/am62_pocketbeagle2_a53_defconfig | 1 +
include/configs/pocketbeagle2.h | 25 ++++++++++++++++
4 files changed, 81 insertions(+)
diff --git a/arch/arm/dts/k3-am62-pocketbeagle2-u-boot.dtsi b/arch/arm/dts/k3-am62-pocketbeagle2-u-boot.dtsi
index 452161115318..283e26380e48 100644
--- a/arch/arm/dts/k3-am62-pocketbeagle2-u-boot.dtsi
+++ b/arch/arm/dts/k3-am62-pocketbeagle2-u-boot.dtsi
@@ -181,6 +181,17 @@
};
};
};
+
+#include "k3-binman-capsule-r5.dtsi"
+
+// Capsule update GUIDs in string form. See pocketbeagle2.h
+#define POCKETBEAGLE2_TIBOOT3_IMAGE_GUID_STR "F0D53723-106E-5346-8A41-85EB2D07C720"
+
+&capsule_tiboot3 {
+ efi-capsule {
+ image-guid = POCKETBEAGLE2_TIBOOT3_IMAGE_GUID_STR;
+ };
+};
#endif /* CONFIG_TARGET_AM62X_R5_POCKETBEAGLE2 */
#if IS_ENABLED(CONFIG_TARGET_AM62X_A53_POCKETBEAGLE2)
@@ -304,4 +315,22 @@
};
};
};
+
+#include "k3-binman-capsule.dtsi"
+
+// Capsule update GUIDs in string form. See pocketbeagle2.h
+#define POCKETBEAGLE2_SPL_IMAGE_GUID_STR "C73FDEA2-3964-58C8-8A25-E55102172E1D"
+#define POCKETBEAGLE2_UBOOT_IMAGE_GUID_STR "520E1012-DE6C-5992-B43A-95D53D8332F2"
+
+&capsule_tispl {
+ efi-capsule {
+ image-guid = POCKETBEAGLE2_SPL_IMAGE_GUID_STR;
+ };
+};
+
+&capsule_uboot {
+ efi-capsule {
+ image-guid = POCKETBEAGLE2_UBOOT_IMAGE_GUID_STR;
+ };
+};
#endif /* CONFIG_TARGET_AM62X_A53_POCKETBEAGLE2 */
diff --git a/board/beagle/pocketbeagle2/pocketbeagle2.c b/board/beagle/pocketbeagle2/pocketbeagle2.c
index 8463d82ef9d8..b6a136a93c0a 100644
--- a/board/beagle/pocketbeagle2/pocketbeagle2.c
+++ b/board/beagle/pocketbeagle2/pocketbeagle2.c
@@ -7,6 +7,7 @@
* Copyright (C) 2025 Robert Nelson, BeagleBoard.org Foundation
*/
+#include <efi_loader.h>
#include <env.h>
#include <fdt_support.h>
#include <spl.h>
@@ -22,6 +23,31 @@
DECLARE_GLOBAL_DATA_PTR;
+struct efi_fw_image fw_images[] = {
+ {
+ .image_type_id = POCKETBEAGLE2_TIBOOT3_IMAGE_GUID,
+ .fw_name = u"POCKETBEAGLE2_TIBOOT3",
+ .image_index = 1,
+ },
+ {
+ .image_type_id = POCKETBEAGLE2_SPL_IMAGE_GUID,
+ .fw_name = u"POCKETBEAGLE2_SPL",
+ .image_index = 2,
+ },
+ {
+ .image_type_id = POCKETBEAGLE2_UBOOT_IMAGE_GUID,
+ .fw_name = u"POCKETBEAGLE2_UBOOT",
+ .image_index = 3,
+ }
+};
+
+struct efi_capsule_update_info update_info = {
+ .dfu_string = "mmc 1=tiboot3.bin fat 1 1;"
+ "tispl.bin fat 1 1;u-boot.img fat 1 1",
+ .num_images = ARRAY_SIZE(fw_images),
+ .images = fw_images,
+};
+
static int pocketbeagle2_get_ddr_size(void)
{
// check config overrides first
diff --git a/configs/am62_pocketbeagle2_a53_defconfig b/configs/am62_pocketbeagle2_a53_defconfig
index 8964cb3b1955..7428926a8ba6 100644
--- a/configs/am62_pocketbeagle2_a53_defconfig
+++ b/configs/am62_pocketbeagle2_a53_defconfig
@@ -122,3 +122,4 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
CONFIG_LZO=y
#include <configs/am62x_a53_usbdfu.config>
+#include <configs/k3_efi_capsule.config>
diff --git a/include/configs/pocketbeagle2.h b/include/configs/pocketbeagle2.h
index dd6956aa8b90..aed60d325742 100644
--- a/include/configs/pocketbeagle2.h
+++ b/include/configs/pocketbeagle2.h
@@ -8,6 +8,31 @@
#ifndef __CONFIG_POCKETBEAGLE2_H
#define __CONFIG_POCKETBEAGLE2_H
+/**
+ * define POCKETBEAGLE2_TIBOOT3_IMAGE_GUID - firmware GUID for PocketBeagle 2
+ * tiboot3.bin
+ * define POCKETBEAGLE2_SPL_IMAGE_GUID - firmware GUID for PocketBeagle 2 SPL
+ * define POCKETBEAGLE2_UBOOT_IMAGE_GUID - firmware GUID for PocketBeagle 2 UBOOT
+ *
+ * These GUIDs are used in capsules updates to identify the corresponding
+ * firmware object.
+ *
+ * Board developers using this as a starting reference should
+ * define their own GUIDs to ensure that firmware repositories (like
+ * LVFS) do not confuse them.
+ */
+#define POCKETBEAGLE2_TIBOOT3_IMAGE_GUID \
+ EFI_GUID(0xF0D53723, 0x106E, 0x5346, 0x8A, 0x41, 0x85, 0xEB, 0x2D, \
+ 0x07, 0xC7, 0x20)
+
+#define POCKETBEAGLE2_SPL_IMAGE_GUID \
+ EFI_GUID(0xC73FDEA2, 0x3964, 0x58C8, 0x8A, 0x25, 0xE5, 0x51, 0x02, \
+ 0x17, 0x2E, 0x1D)
+
+#define POCKETBEAGLE2_UBOOT_IMAGE_GUID \
+ EFI_GUID(0x520E1012, 0xDE6C, 0x5992, 0xB4, 0x3A, 0x95, 0xD5, 0x3D, \
+ 0x83, 0x32, 0xF2)
+
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
--
2.54.0
^ permalink raw reply related
* [PATCHv3 3/4] k3-am62-pocketbeagle2: add support for 1GB variant
From: rs @ 2026-06-24 21:19 UTC (permalink / raw)
To: robertcnelson, ayush, Erik.Welsh, anshuld, bb, trini, afd,
xypron.glpk, ilias.apalodimas, sjg
Cc: u-boot
In-Reply-To: <20260624211949.327905-1-rs@ti.com>
From: Randolph Sapp <rs@ti.com>
Take Phytec's current DDR fixup functions and utilize them to
dynamically adjust for variants in the pocketbeagle2. There are
currently 3 skews, two of which are both 512MB with the same memory
configuration, and one which is 1GB using the same CWL and CL settings
but a modified density [1].
Based off of Bryan Brattlof's patch [2].
[1] https://mm.digikey.com/Volume0/opasdata/d220001/medias/docus/5411/8G%20Bits%20DDR4%20SDRAM.pdf
[2] https://github.com/bryanbrattlof/beagleboot/commit/fb2f022e27427e990d7a33fd001ffb571e13cfc3
Signed-off-by: Randolph Sapp <rs@ti.com>
---
board/beagle/pocketbeagle2/Kconfig | 26 +++++
board/beagle/pocketbeagle2/Makefile | 2 +
board/beagle/pocketbeagle2/pocketbeagle2.c | 103 +++++++++++++++++-
.../beagle/pocketbeagle2/pocketbeagle2_ddr.h | 50 +++++++++
configs/am62_pocketbeagle2_r5_defconfig | 5 +-
5 files changed, 184 insertions(+), 2 deletions(-)
create mode 100644 board/beagle/pocketbeagle2/pocketbeagle2_ddr.h
diff --git a/board/beagle/pocketbeagle2/Kconfig b/board/beagle/pocketbeagle2/Kconfig
index e957b8e8377e..a361fcebfc1d 100644
--- a/board/beagle/pocketbeagle2/Kconfig
+++ b/board/beagle/pocketbeagle2/Kconfig
@@ -12,6 +12,7 @@ config TARGET_AM62X_A53_POCKETBEAGLE2
select ARM64
select BINMAN
select OF_SYSTEM_SETUP
+ imply TI_I2C_BOARD_DETECT
config TARGET_AM62X_R5_POCKETBEAGLE2
bool "BeagleBoard.org AM62X PocketBeagle 2 running on R5"
@@ -23,6 +24,7 @@ config TARGET_AM62X_R5_POCKETBEAGLE2
select K3_DDRSS
select BINMAN
imply SYS_K3_SPL_ATF
+ imply TI_I2C_BOARD_DETECT
endchoice
@@ -58,3 +60,27 @@ config SPL_LDSCRIPT
source "board/ti/common/Kconfig"
endif
+
+config POCKETBEAGLE2_AM62X_RAM_SIZE_FIX
+ bool "Set the PocketBeagle 2 RAM size instead of detecting it"
+ default false
+ help
+ RAM size is automatically detected through the device revision stored
+ in EEPROM. This overrides the detection logic with a fixed value.
+
+choice
+ prompt "PocketBeagle 2 RAM size"
+ depends on POCKETBEAGLE2_AM62X_RAM_SIZE_FIX
+ default POCKETBEAGLE2_AM62X_RAM_SIZE_512MB
+
+config POCKETBEAGLE2_AM62X_RAM_SIZE_512MB
+ bool "512MB RAM"
+ help
+ Set RAM size fix to 512MB for the PocketBeagle 2.
+
+config POCKETBEAGLE2_AM62X_RAM_SIZE_1GB
+ bool "1GB RAM"
+ help
+ Set RAM size fix to 1GB for the PocketBeagle 2.
+
+endchoice
diff --git a/board/beagle/pocketbeagle2/Makefile b/board/beagle/pocketbeagle2/Makefile
index 3d42c160716e..dd529fe6d75e 100644
--- a/board/beagle/pocketbeagle2/Makefile
+++ b/board/beagle/pocketbeagle2/Makefile
@@ -7,3 +7,5 @@
#
obj-y += pocketbeagle2.o
+obj-${CONFIG_K3_DDRSS} += ../../phytec/common/k3/k3_ddrss_patch.o
+obj-${CONFIG_TI_I2C_BOARD_DETECT} += ../../ti/common/board_detect.o
diff --git a/board/beagle/pocketbeagle2/pocketbeagle2.c b/board/beagle/pocketbeagle2/pocketbeagle2.c
index 291a1c6c3db7..8463d82ef9d8 100644
--- a/board/beagle/pocketbeagle2/pocketbeagle2.c
+++ b/board/beagle/pocketbeagle2/pocketbeagle2.c
@@ -17,17 +17,118 @@
#include <dm/uclass.h>
#include <linux/sizes.h>
+#include "../../ti/common/board_detect.h"
+#include "pocketbeagle2_ddr.h"
+
DECLARE_GLOBAL_DATA_PTR;
+static int pocketbeagle2_get_ddr_size(void)
+{
+ // check config overrides first
+ if (IS_ENABLED(CONFIG_POCKETBEAGLE2_AM62X_RAM_SIZE_FIX)) {
+ if (IS_ENABLED(CONFIG_POCKETBEAGLE2_AM62X_RAM_SIZE_512MB))
+ return EEPROM_RAM_SIZE_512MB;
+ if (IS_ENABLED(CONFIG_POCKETBEAGLE2_AM62X_RAM_SIZE_1GB))
+ return EEPROM_RAM_SIZE_1GB;
+ }
+
+#if IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)
+ // dynamically detect the config if we can
+ if (!do_board_detect_am6()) {
+ struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
+
+ if (strlen(ep->name) > 11 && ep->name[0] == 'P') {
+ /*
+ * POCKETBEAGL2A00 (am6232 512MB)
+ * POCKETBEAGL2A10 (am625 512MB)
+ * POCKETBEAGL2A1I (am625 1GB)
+ */
+ if (!strncmp(&ep->name[11], "2A1I", 4))
+ return EEPROM_RAM_SIZE_1GB;
+ }
+ }
+#endif
+
+ return EEPROM_RAM_SIZE_512MB;
+}
+
int dram_init(void)
{
return fdtdec_setup_mem_size_base();
}
+// logic after this block assumes that there is only 1 DRAM bank currently
+#if CONFIG_NR_DRAM_BANKS != 1
+#error Unsupported number of DRAM banks!
+#endif
+
int dram_init_banksize(void)
{
- return fdtdec_setup_memory_banksize();
+ eeprom_ram_size ram_size;
+
+ memset(gd->bd->bi_dram, 0, sizeof(gd->bd->bi_dram[0]));
+
+ ram_size = pocketbeagle2_get_ddr_size();
+ switch (ram_size) {
+ case EEPROM_RAM_SIZE_1GB:
+ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = SZ_1G;
+ gd->ram_size = SZ_1G;
+ break;
+ case EEPROM_RAM_SIZE_512MB:
+ fallthrough;
+ default:
+ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = SZ_512M;
+ gd->ram_size = SZ_512M;
+ break;
+ }
+
+ return 0;
+}
+
+#if IS_ENABLED(CONFIG_K3_DDRSS)
+static int update_ddrss_timings(void)
+{
+ int ret = 0;
+ eeprom_ram_size ram_size;
+ struct ddrss *ddr_patch = NULL;
+ void *fdt = (void *)gd->fdt_blob;
+
+ ram_size = pocketbeagle2_get_ddr_size();
+ ddr_patch = &pocketbeagle2_ddrss_data[ram_size];
+
+ if (!ddr_patch)
+ return ret;
+
+ ret = fdt_apply_ddrss_timings_patch(fdt, ddr_patch);
+ if (ret) {
+ printf("Failed to apply ddrs timings patch: %d\n", ret);
+ return ret;
+ }
+
+ return ret;
+}
+
+int do_board_detect(void)
+{
+ void *fdt = (void *)gd->fdt_blob;
+ u64 start[] = { gd->bd->bi_dram[0].start };
+ u64 size[] = { gd->bd->bi_dram[0].size };
+ int ret;
+
+ dram_init();
+ dram_init_banksize();
+
+ ret = fdt_fixup_memory_banks(fdt, start, size, 1);
+ if (ret) {
+ printf("Failed to fixup memory banks: %d\n", ret);
+ return ret;
+ }
+
+ return update_ddrss_timings();
}
+#endif /* CONFIG_K3_DDRSS */
/*
* The U-Boot stack can collide with some dt reservations in the 512MB
diff --git a/board/beagle/pocketbeagle2/pocketbeagle2_ddr.h b/board/beagle/pocketbeagle2/pocketbeagle2_ddr.h
new file mode 100644
index 000000000000..c144dbafe059
--- /dev/null
+++ b/board/beagle/pocketbeagle2/pocketbeagle2_ddr.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * DDR override logic for AM625 PocketBeagle 2
+ * https://www.beagleboard.org/boards/pocketbeagle-2
+ *
+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#ifndef __POCKETBEAGLE2_DDR_H
+#define __POCKETBEAGLE2_DDR_H
+
+#include "../../phytec/common/k3/k3_ddrss_patch.h"
+
+typedef enum {
+ EEPROM_RAM_SIZE_512MB = 0,
+ EEPROM_RAM_SIZE_1GB = 1
+} eeprom_ram_size;
+
+struct ddr_reg ddr_1gb_ctl_regs[] = {
+ { 317, 0x00000101 },
+ { 318, 0x1FFF0000 },
+};
+
+struct ddr_reg ddr_1gb_pi_regs[] = {
+ { 77, 0x04010100 },
+};
+
+struct ddrss pocketbeagle2_ddrss_data[] = {
+ // default configuration
+ [EEPROM_RAM_SIZE_512MB] = {
+ .ctl_regs = NULL,
+ .ctl_regs_num = 0,
+ .pi_regs = NULL,
+ .pi_regs_num = 0,
+ .phy_regs = NULL,
+ .phy_regs_num = 0,
+ },
+
+ // industrial configuration
+ [EEPROM_RAM_SIZE_1GB] = {
+ .ctl_regs = &ddr_1gb_ctl_regs[0],
+ .ctl_regs_num = ARRAY_SIZE(ddr_1gb_ctl_regs),
+ .pi_regs = &ddr_1gb_pi_regs[0],
+ .pi_regs_num = ARRAY_SIZE(ddr_1gb_pi_regs),
+ .phy_regs = NULL,
+ .phy_regs_num = 0,
+ },
+};
+
+#endif /* __POCKETBEAGLE2_DDR_H */
diff --git a/configs/am62_pocketbeagle2_r5_defconfig b/configs/am62_pocketbeagle2_r5_defconfig
index 90e577e8ce16..82919d559d5e 100644
--- a/configs/am62_pocketbeagle2_r5_defconfig
+++ b/configs/am62_pocketbeagle2_r5_defconfig
@@ -14,7 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am62-r5-pocketbeagle2"
CONFIG_DM_RESET=y
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
@@ -41,6 +41,7 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_EARLY_BSS=y
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
@@ -72,6 +73,8 @@ CONFIG_SPL_CLK_K3_PLL=y
CONFIG_SPL_CLK_K3=y
CONFIG_TI_SCI_PROTOCOL=y
CONFIG_DA8XX_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_DM_MAILBOX=y
CONFIG_K3_SEC_PROXY=y
CONFIG_SPL_MISC=y
--
2.54.0
^ permalink raw reply related
* [PATCHv3 2/4] k3-am62-pocketbeagle2: add initial board support
From: rs @ 2026-06-24 21:19 UTC (permalink / raw)
To: robertcnelson, ayush, Erik.Welsh, anshuld, bb, trini, afd,
xypron.glpk, ilias.apalodimas, sjg
Cc: u-boot
In-Reply-To: <20260624211949.327905-1-rs@ti.com>
From: Randolph Sapp <rs@ti.com>
Add initial board support for the PocketBeagle 2, based on Robert Nelson
and Bryan Brattlof's work. Unify all debug consoles to main_uart6. Use
DDR config v10.32 from our sysconfig tool [1] for Kingston's memory [2],
(4Gb Desnity with a CL of 11 and CWL of 9). Add support for the
SPL_TEXT_BASE config parameter. Ensure all files have a summary and SPDX
identifier.
Also, use board_get_usable_ram_top() to fixup our relocaddr since
otherwise the u-boot stack reservation will collide with the
wkup_r5fss0_core0_memory_region.
[1] https://dev.ti.com/sysconfig
[2] https://mm.digikey.com/Volume0/opasdata/d220001/medias/docus/6465/D2516AN9EXGXN-TU.pdf
Signed-off-by: Randolph Sapp <rs@ti.com>
---
v3:
- Use board_get_usable_ram_top
---
arch/arm/dts/Makefile | 1 +
...> k3-am62-pocketbeagle2-ddr4-1600MTs.dtsi} | 92 +++---
...dtsi => k3-am62-pocketbeagle2-u-boot.dtsi} | 160 ++++++----
arch/arm/dts/k3-am62-r5-pocketbeagle2.dts | 35 +++
arch/arm/mach-k3/am62x/Kconfig | 1 +
board/beagle/pocketbeagle2/Kconfig | 60 ++++
board/beagle/pocketbeagle2/MAINTAINERS | 10 +
board/beagle/pocketbeagle2/Makefile | 9 +
.../board-cfg.yaml | 0
.../{beagleplay => pocketbeagle2}/pm-cfg.yaml | 0
board/beagle/pocketbeagle2/pocketbeagle2.c | 58 ++++
.../pocketbeagle2/pocketbeagle2.env} | 20 +-
.../pocketbeagle2}/rm-cfg.yaml | 4 +-
.../sec-cfg.yaml | 0
...onfig => am62_pocketbeagle2_a53_defconfig} | 24 +-
...config => am62_pocketbeagle2_r5_defconfig} | 11 +-
doc/board/beagle/am62_pocketbeagle2.rst | 279 ++++++++++++++++++
doc/board/beagle/index.rst | 1 +
.../configs/{beagley_ai.h => pocketbeagle2.h} | 8 +-
19 files changed, 636 insertions(+), 137 deletions(-)
copy arch/arm/dts/{k3-am62x-sk-ddr4-1600MTs.dtsi => k3-am62-pocketbeagle2-ddr4-1600MTs.dtsi} (97%)
copy arch/arm/dts/{k3-am67a-beagley-ai-u-boot.dtsi => k3-am62-pocketbeagle2-u-boot.dtsi} (53%)
create mode 100644 arch/arm/dts/k3-am62-r5-pocketbeagle2.dts
create mode 100644 board/beagle/pocketbeagle2/Kconfig
create mode 100644 board/beagle/pocketbeagle2/MAINTAINERS
create mode 100644 board/beagle/pocketbeagle2/Makefile
copy board/beagle/{beagleplay => pocketbeagle2}/board-cfg.yaml (100%)
copy board/beagle/{beagleplay => pocketbeagle2}/pm-cfg.yaml (100%)
create mode 100644 board/beagle/pocketbeagle2/pocketbeagle2.c
copy board/{ti/am62x/am62x.env => beagle/pocketbeagle2/pocketbeagle2.env} (64%)
copy board/{phytec/phycore_am62x => beagle/pocketbeagle2}/rm-cfg.yaml (99%)
copy board/beagle/{beagleplay => pocketbeagle2}/sec-cfg.yaml (100%)
copy configs/{am62x_beagleplay_a53_defconfig => am62_pocketbeagle2_a53_defconfig} (87%)
copy configs/{am62x_beagleplay_r5_defconfig => am62_pocketbeagle2_r5_defconfig} (89%)
create mode 100644 doc/board/beagle/am62_pocketbeagle2.rst
copy include/configs/{beagley_ai.h => pocketbeagle2.h} (57%)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a29d1807e715..73bfb72b6b42 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1052,6 +1052,7 @@ dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-r5-evm.dtb \
k3-am642-r5-phycore-som-2gb.dtb
dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-r5-sk.dtb \
+ k3-am62-r5-pocketbeagle2.dtb \
k3-am625-r5-beagleplay.dtb \
k3-am625-verdin-r5.dtb \
k3-am625-r5-phycore-som-2gb.dtb
diff --git a/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi b/arch/arm/dts/k3-am62-pocketbeagle2-ddr4-1600MTs.dtsi
similarity index 97%
copy from arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi
copy to arch/arm/dts/k3-am62-pocketbeagle2-ddr4-1600MTs.dtsi
index 4afa68a67394..455a55f2c0d8 100644
--- a/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi
+++ b/arch/arm/dts/k3-am62-pocketbeagle2-ddr4-1600MTs.dtsi
@@ -2,20 +2,22 @@
/*
* This file was generated with the
* AM623/AM625 SysConfig DDR Configuration Tool for AM64x, AM625, AM623, AM62Ax, AM62Px, AM62Dx, AM62Lx v0.10.32
- * Fri Jan 30 2026 13:45:31 GMT+0530 (India Standard Time)
+ * Mon Jan 26 2026 10:31:36 GMT-0600 (Central Standard Time)
* DDR Type: DDR4
* Frequency = 800MHz (1600MTs)
- * Density: 16Gb
+ * Density: 4Gb
* Number of Ranks: 1
*/
+
#define DDRSS_PLL_FHS_CNT 6
#define DDRSS_PLL_FREQUENCY_1 400000000
#define DDRSS_PLL_FREQUENCY_2 400000000
-#define DDRSS_SDRAM_IDX 15
+#define DDRSS_SDRAM_IDX 13
#define DDRSS_REGION_IDX 16
#define DDRSS_TOOL_VERSION "0.10.32"
+
#define DDRSS_CTL_0_DATA 0x00000A00
#define DDRSS_CTL_1_DATA 0x00000000
#define DDRSS_CTL_2_DATA 0x00000000
@@ -54,11 +56,11 @@
#define DDRSS_CTL_35_DATA 0x00000000
#define DDRSS_CTL_36_DATA 0x00000000
#define DDRSS_CTL_37_DATA 0x00000000
-#define DDRSS_CTL_38_DATA 0x0000091C
+#define DDRSS_CTL_38_DATA 0x00000916
#define DDRSS_CTL_39_DATA 0x18181818
-#define DDRSS_CTL_40_DATA 0x0000091C
+#define DDRSS_CTL_40_DATA 0x00000916
#define DDRSS_CTL_41_DATA 0x18181818
-#define DDRSS_CTL_42_DATA 0x0000091C
+#define DDRSS_CTL_42_DATA 0x00000916
#define DDRSS_CTL_43_DATA 0x18181818
#define DDRSS_CTL_44_DATA 0x05050404
#define DDRSS_CTL_45_DATA 0x00002706
@@ -220,22 +222,22 @@
#define DDRSS_CTL_201_DATA 0x00000000
#define DDRSS_CTL_202_DATA 0x00000000
#define DDRSS_CTL_203_DATA 0x00000000
-#define DDRSS_CTL_204_DATA 0x00042400
+#define DDRSS_CTL_204_DATA 0x00041000
#define DDRSS_CTL_205_DATA 0x00000301
#define DDRSS_CTL_206_DATA 0x00000000
-#define DDRSS_CTL_207_DATA 0x00000424
+#define DDRSS_CTL_207_DATA 0x00000410
#define DDRSS_CTL_208_DATA 0x00000301
#define DDRSS_CTL_209_DATA 0x00000000
-#define DDRSS_CTL_210_DATA 0x00000424
+#define DDRSS_CTL_210_DATA 0x00000410
#define DDRSS_CTL_211_DATA 0x00000301
#define DDRSS_CTL_212_DATA 0x00000000
-#define DDRSS_CTL_213_DATA 0x00000424
+#define DDRSS_CTL_213_DATA 0x00000410
#define DDRSS_CTL_214_DATA 0x00000301
#define DDRSS_CTL_215_DATA 0x00000000
-#define DDRSS_CTL_216_DATA 0x00000424
+#define DDRSS_CTL_216_DATA 0x00000410
#define DDRSS_CTL_217_DATA 0x00000301
#define DDRSS_CTL_218_DATA 0x00000000
-#define DDRSS_CTL_219_DATA 0x00000424
+#define DDRSS_CTL_219_DATA 0x00000410
#define DDRSS_CTL_220_DATA 0x00000301
#define DDRSS_CTL_221_DATA 0x00000000
#define DDRSS_CTL_222_DATA 0x00000000
@@ -333,8 +335,8 @@
#define DDRSS_CTL_314_DATA 0x00000000
#define DDRSS_CTL_315_DATA 0x00000100
#define DDRSS_CTL_316_DATA 0x01010000
-#define DDRSS_CTL_317_DATA 0x00000000
-#define DDRSS_CTL_318_DATA 0x3FFF0000
+#define DDRSS_CTL_317_DATA 0x00000202
+#define DDRSS_CTL_318_DATA 0x0FFF0000
#define DDRSS_CTL_319_DATA 0x000FFF00
#define DDRSS_CTL_320_DATA 0xFFFFFFFF
#define DDRSS_CTL_321_DATA 0x00FFFF00
@@ -391,8 +393,8 @@
#define DDRSS_CTL_372_DATA 0x06060806
#define DDRSS_CTL_373_DATA 0x00010101
#define DDRSS_CTL_374_DATA 0x02000000
-#define DDRSS_CTL_375_DATA 0x05020101
-#define DDRSS_CTL_376_DATA 0x00000505
+#define DDRSS_CTL_375_DATA 0x02020101
+#define DDRSS_CTL_376_DATA 0x00000202
#define DDRSS_CTL_377_DATA 0x02020200
#define DDRSS_CTL_378_DATA 0x02020202
#define DDRSS_CTL_379_DATA 0x02020202
@@ -408,7 +410,7 @@
#define DDRSS_CTL_389_DATA 0x00000200
#define DDRSS_CTL_390_DATA 0x0000DB60
#define DDRSS_CTL_391_DATA 0x0001E780
-#define DDRSS_CTL_392_DATA 0x080D0302
+#define DDRSS_CTL_392_DATA 0x050A0302
#define DDRSS_CTL_393_DATA 0x001E0506
#define DDRSS_CTL_394_DATA 0x000030C0
#define DDRSS_CTL_395_DATA 0x00000200
@@ -417,7 +419,7 @@
#define DDRSS_CTL_398_DATA 0x00000200
#define DDRSS_CTL_399_DATA 0x0000DB60
#define DDRSS_CTL_400_DATA 0x0001E780
-#define DDRSS_CTL_401_DATA 0x080D0302
+#define DDRSS_CTL_401_DATA 0x050A0302
#define DDRSS_CTL_402_DATA 0x001E0506
#define DDRSS_CTL_403_DATA 0x000030C0
#define DDRSS_CTL_404_DATA 0x00000200
@@ -426,7 +428,7 @@
#define DDRSS_CTL_407_DATA 0x00000200
#define DDRSS_CTL_408_DATA 0x0000DB60
#define DDRSS_CTL_409_DATA 0x0001E780
-#define DDRSS_CTL_410_DATA 0x080D0302
+#define DDRSS_CTL_410_DATA 0x050A0302
#define DDRSS_CTL_411_DATA 0x00000506
#define DDRSS_CTL_412_DATA 0x00000000
#define DDRSS_CTL_413_DATA 0x0302000A
@@ -516,7 +518,7 @@
#define DDRSS_PI_74_DATA 0x00000000
#define DDRSS_PI_75_DATA 0x00000005
#define DDRSS_PI_76_DATA 0x01000000
-#define DDRSS_PI_77_DATA 0x04000100
+#define DDRSS_PI_77_DATA 0x04020100
#define DDRSS_PI_78_DATA 0x00020000
#define DDRSS_PI_79_DATA 0x00010002
#define DDRSS_PI_80_DATA 0x00000001
@@ -606,14 +608,14 @@
#define DDRSS_PI_164_DATA 0x00007800
#define DDRSS_PI_165_DATA 0x00780078
#define DDRSS_PI_166_DATA 0x00141414
-#define DDRSS_PI_167_DATA 0x00000036
-#define DDRSS_PI_168_DATA 0x00000036
-#define DDRSS_PI_169_DATA 0x00040036
+#define DDRSS_PI_167_DATA 0x00000033
+#define DDRSS_PI_168_DATA 0x00000033
+#define DDRSS_PI_169_DATA 0x00040033
#define DDRSS_PI_170_DATA 0x04000400
#define DDRSS_PI_171_DATA 0xC8000009
-#define DDRSS_PI_172_DATA 0x0000091C
-#define DDRSS_PI_173_DATA 0x00091CC8
-#define DDRSS_PI_174_DATA 0x001CC800
+#define DDRSS_PI_172_DATA 0x00000916
+#define DDRSS_PI_173_DATA 0x000916C8
+#define DDRSS_PI_174_DATA 0x0016C800
#define DDRSS_PI_175_DATA 0x00000118
#define DDRSS_PI_176_DATA 0x00001860
#define DDRSS_PI_177_DATA 0x00000118
@@ -626,14 +628,14 @@
#define DDRSS_PI_184_DATA 0x01080108
#define DDRSS_PI_185_DATA 0x00000108
#define DDRSS_PI_186_DATA 0x00000000
-#define DDRSS_PI_187_DATA 0x05000000
-#define DDRSS_PI_188_DATA 0x01010505
+#define DDRSS_PI_187_DATA 0x02000000
+#define DDRSS_PI_188_DATA 0x01010202
#define DDRSS_PI_189_DATA 0x01010101
#define DDRSS_PI_190_DATA 0x00181818
#define DDRSS_PI_191_DATA 0x00000000
#define DDRSS_PI_192_DATA 0x00000000
-#define DDRSS_PI_193_DATA 0x09000000
-#define DDRSS_PI_194_DATA 0x06060909
+#define DDRSS_PI_193_DATA 0x06000000
+#define DDRSS_PI_194_DATA 0x06060606
#define DDRSS_PI_195_DATA 0x03030306
#define DDRSS_PI_196_DATA 0x00000000
#define DDRSS_PI_197_DATA 0x00000000
@@ -661,15 +663,15 @@
#define DDRSS_PI_219_DATA 0x001600C8
#define DDRSS_PI_220_DATA 0x010100C8
#define DDRSS_PI_221_DATA 0x00001701
-#define DDRSS_PI_222_DATA 0x1F0F0053
-#define DDRSS_PI_223_DATA 0x05000001
-#define DDRSS_PI_224_DATA 0x00170A09
-#define DDRSS_PI_225_DATA 0x1F0F0053
-#define DDRSS_PI_226_DATA 0x05000001
-#define DDRSS_PI_227_DATA 0x00170A09
-#define DDRSS_PI_228_DATA 0x1F0F0053
-#define DDRSS_PI_229_DATA 0x05000001
-#define DDRSS_PI_230_DATA 0x00010A09
+#define DDRSS_PI_222_DATA 0x1F0F0050
+#define DDRSS_PI_223_DATA 0x02000001
+#define DDRSS_PI_224_DATA 0x00170A06
+#define DDRSS_PI_225_DATA 0x1F0F0050
+#define DDRSS_PI_226_DATA 0x02000001
+#define DDRSS_PI_227_DATA 0x00170A06
+#define DDRSS_PI_228_DATA 0x1F0F0050
+#define DDRSS_PI_229_DATA 0x02000001
+#define DDRSS_PI_230_DATA 0x00010A06
#define DDRSS_PI_231_DATA 0x0C0B0700
#define DDRSS_PI_232_DATA 0x000D0605
#define DDRSS_PI_233_DATA 0x0000C570
@@ -736,7 +738,7 @@
#define DDRSS_PI_294_DATA 0x01000000
#define DDRSS_PI_295_DATA 0x00020201
#define DDRSS_PI_296_DATA 0x00000000
-#define DDRSS_PI_297_DATA 0x00000424
+#define DDRSS_PI_297_DATA 0x00000410
#define DDRSS_PI_298_DATA 0x00000301
#define DDRSS_PI_299_DATA 0x00000000
#define DDRSS_PI_300_DATA 0x00000000
@@ -744,7 +746,7 @@
#define DDRSS_PI_302_DATA 0x00001400
#define DDRSS_PI_303_DATA 0x00000493
#define DDRSS_PI_304_DATA 0x00000000
-#define DDRSS_PI_305_DATA 0x00000424
+#define DDRSS_PI_305_DATA 0x00000410
#define DDRSS_PI_306_DATA 0x00000301
#define DDRSS_PI_307_DATA 0x00000000
#define DDRSS_PI_308_DATA 0x00000000
@@ -752,7 +754,7 @@
#define DDRSS_PI_310_DATA 0x00001400
#define DDRSS_PI_311_DATA 0x00000493
#define DDRSS_PI_312_DATA 0x00000000
-#define DDRSS_PI_313_DATA 0x00000424
+#define DDRSS_PI_313_DATA 0x00000410
#define DDRSS_PI_314_DATA 0x00000301
#define DDRSS_PI_315_DATA 0x00000000
#define DDRSS_PI_316_DATA 0x00000000
@@ -760,7 +762,7 @@
#define DDRSS_PI_318_DATA 0x00001400
#define DDRSS_PI_319_DATA 0x00000493
#define DDRSS_PI_320_DATA 0x00000000
-#define DDRSS_PI_321_DATA 0x00000424
+#define DDRSS_PI_321_DATA 0x00000410
#define DDRSS_PI_322_DATA 0x00000301
#define DDRSS_PI_323_DATA 0x00000000
#define DDRSS_PI_324_DATA 0x00000000
@@ -768,7 +770,7 @@
#define DDRSS_PI_326_DATA 0x00001400
#define DDRSS_PI_327_DATA 0x00000493
#define DDRSS_PI_328_DATA 0x00000000
-#define DDRSS_PI_329_DATA 0x00000424
+#define DDRSS_PI_329_DATA 0x00000410
#define DDRSS_PI_330_DATA 0x00000301
#define DDRSS_PI_331_DATA 0x00000000
#define DDRSS_PI_332_DATA 0x00000000
@@ -776,7 +778,7 @@
#define DDRSS_PI_334_DATA 0x00001400
#define DDRSS_PI_335_DATA 0x00000493
#define DDRSS_PI_336_DATA 0x00000000
-#define DDRSS_PI_337_DATA 0x00000424
+#define DDRSS_PI_337_DATA 0x00000410
#define DDRSS_PI_338_DATA 0x00000301
#define DDRSS_PI_339_DATA 0x00000000
#define DDRSS_PI_340_DATA 0x00000000
diff --git a/arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi b/arch/arm/dts/k3-am62-pocketbeagle2-u-boot.dtsi
similarity index 53%
copy from arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi
copy to arch/arm/dts/k3-am62-pocketbeagle2-u-boot.dtsi
index 0e810e7f492d..452161115318 100644
--- a/arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi
+++ b/arch/arm/dts/k3-am62-pocketbeagle2-u-boot.dtsi
@@ -1,20 +1,53 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Common AM67A BeagleY-AI dts file for SPLs
+ * AM625 PocketBeagle 2 dts file for SPLs
+ * https://www.beagleboard.org/boards/pocketbeagle-2
*
- * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
- * Copyright (C) 2024 Robert Nelson, BeagleBoard.org Foundation
+ * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2024-2025 Robert Nelson, BeagleBoard.org Foundation
*/
#include "k3-binman.dtsi"
/ {
- chosen {
- stdout-path = "serial2:115200n8";
- tick-timer = &main_timer0;
+ /* Keep the LEDs on by default to indicate life */
+ leds {
+ led-1 {
+ label = "led-1";
+ default-state = "on";
+ };
+
+ led-2 {
+ label = "led-2";
+ default-state = "on";
+ };
+
+ led-3 {
+ label = "led-3";
+ default-state = "on";
+ };
+
+ led-4 {
+ label = "led-4";
+ default-state = "on";
+ };
};
};
+&main_bcdma {
+ reg = <0x00 0x485c0100 0x00 0x100>,
+ <0x00 0x4c000000 0x00 0x20000>,
+ <0x00 0x4a820000 0x00 0x20000>,
+ <0x00 0x4aa40000 0x00 0x20000>,
+ <0x00 0x4bc00000 0x00 0x100000>,
+ <0x00 0x48600000 0x00 0x8000>,
+ <0x00 0x484a4000 0x00 0x2000>,
+ <0x00 0x484c2000 0x00 0x2000>;
+ reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
+ "cfg", "tchan", "rchan";
+ bootph-all;
+};
+
&main_pktdma {
reg = <0x00 0x485c0000 0x00 0x100>,
<0x00 0x4a800000 0x00 0x20000>,
@@ -24,44 +57,32 @@
<0x00 0x484a0000 0x00 0x4000>,
<0x00 0x484c0000 0x00 0x2000>,
<0x00 0x48430000 0x00 0x4000>;
- reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
- "cfg", "tchan", "rchan", "rflow";
-};
-
-&dmsc {
- bootph-pre-ram;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-pre-ram;
- };
-};
-
-&usbss0 {
- bootph-pre-ram;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg",
+ "tchan", "rchan", "rflow";
+ bootph-all;
};
-&usb0 {
- dr_mode = "peripheral";
- bootph-pre-ram;
+&cpsw3g {
+ status = "disabled";
};
-&usbss1 {
+&cpsw_port1 {
status = "disabled";
};
-&usb1 {
+&cpsw_port2 {
status = "disabled";
};
-&main_gpio1 {
+&main_uart6_pins_default {
bootph-all;
};
-#if IS_ENABLED(CONFIG_TARGET_J722S_R5_BEAGLEY_AI)
+#if IS_ENABLED(CONFIG_TARGET_AM62X_R5_POCKETBEAGLE2)
&binman {
- tiboot3-j722s-hs-evm.bin {
- filename = "tiboot3-j722s-hs-evm.bin";
+ tiboot3-am62x-hs-evm.bin {
+ filename = "tiboot3-am62x-hs-evm.bin";
ti-secure-rom {
content = <&u_boot_spl>, <&ti_fs_enc>, <&combined_tifs_cfg>,
<&combined_dm_cfg>, <&sysfw_inner_cert>;
@@ -78,7 +99,7 @@
load = <CONFIG_SPL_TEXT_BASE>;
load-sysfw = <0x40000>;
load-sysfw-data = <0x67000>;
- load-dm-data = <0x43c7a800>;
+ load-dm-data = <0x43c3a800>;
};
u_boot_spl: u-boot-spl {
@@ -86,8 +107,9 @@
};
ti_fs_enc: ti-fs-enc.bin {
- filename = "ti-sysfw/ti-fs-firmware-j722s-hs-enc.bin";
+ filename = "ti-sysfw/ti-fs-firmware-am62x-hs-enc.bin";
type = "blob-ext";
+ optional;
};
combined_tifs_cfg: combined-tifs-cfg.bin {
@@ -96,8 +118,9 @@
};
sysfw_inner_cert: sysfw-inner-cert {
- filename = "ti-sysfw/ti-fs-firmware-j722s-hs-cert.bin";
+ filename = "ti-sysfw/ti-fs-firmware-am62x-hs-cert.bin";
type = "blob-ext";
+ optional;
};
combined_dm_cfg: combined-dm-cfg.bin {
@@ -108,8 +131,8 @@
};
&binman {
- tiboot3-j722s-hs-fs-evm.bin {
- filename = "tiboot3-j722s-hs-fs-evm.bin";
+ tiboot3-am62x-hs-fs-evm.bin {
+ filename = "tiboot3-am62x-hs-fs-evm.bin";
symlink = "tiboot3.bin";
ti-secure-rom {
@@ -128,7 +151,7 @@
load = <CONFIG_SPL_TEXT_BASE>;
load-sysfw = <0x40000>;
load-sysfw-data = <0x67000>;
- load-dm-data = <0x43c7a800>;
+ load-dm-data = <0x43c3a800>;
};
u_boot_spl_fs: u-boot-spl {
@@ -136,8 +159,9 @@
};
ti_fs_enc_fs: ti-fs-enc.bin {
- filename = "ti-sysfw/ti-fs-firmware-j722s-hs-fs-enc.bin";
+ filename = "ti-sysfw/ti-fs-firmware-am62x-hs-fs-enc.bin";
type = "blob-ext";
+ optional;
};
combined_tifs_cfg_fs: combined-tifs-cfg.bin {
@@ -146,8 +170,9 @@
};
sysfw_inner_cert_fs: sysfw-inner-cert {
- filename = "ti-sysfw/ti-fs-firmware-j722s-hs-fs-cert.bin";
+ filename = "ti-sysfw/ti-fs-firmware-am62x-hs-fs-cert.bin";
type = "blob-ext";
+ optional;
};
combined_dm_cfg_fs: combined-dm-cfg.bin {
@@ -156,12 +181,9 @@
};
};
};
-#endif /* CONFIG_TARGET_J722S_R5_BEAGLEY_AI */
+#endif /* CONFIG_TARGET_AM62X_R5_POCKETBEAGLE2 */
-#if IS_ENABLED(CONFIG_TARGET_J722S_A53_BEAGLEY_AI)
-
-#define SPL_BEAGLEY_AI_DTB "spl/dts/ti/k3-am67a-beagley-ai.dtb"
-#define BEAGLEY_AI_DTB "u-boot.dtb"
+#if IS_ENABLED(CONFIG_TARGET_AM62X_A53_POCKETBEAGLE2)
&binman {
ti-spl {
@@ -169,6 +191,32 @@
fit {
images {
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OP-TEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <CONFIG_K3_OPTEE_LOAD_ADDR>;
+ entry = <CONFIG_K3_OPTEE_LOAD_ADDR>;
+ tee-os {
+ filename = "tee-raw.bin";
+ };
+ };
+
dm {
ti-secure {
content = <&dm>;
@@ -176,34 +224,33 @@
};
dm: ti-dm {
- filename = "ti-dm/j722s/ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ filename = "ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ optional;
};
};
fdt-0 {
- description = "k3-am67a-beagley-ai";
+ description = "k3-am62-pocketbeagle2";
type = "flat_dt";
arch = "arm";
compression = "none";
ti-secure {
- content = <&spl_beagley_ai_dtb>;
+ content = <&spl_pocketbeagle2_dtb>;
keyfile = "custMpk.pem";
};
- spl_beagley_ai_dtb: blob-ext {
- filename = "spl/dts/ti/k3-am67a-beagley-ai.dtb";
+ spl_pocketbeagle2_dtb: blob-ext {
+ filename = "spl/dts/ti/k3-am62-pocketbeagle2.dtb";
};
-
};
-
};
configurations {
default = "conf-0";
conf-0 {
- description = "k3-am67a-beagley-ai";
+ description = "k3-am62-pocketbeagle2";
firmware = "atf";
loadables = "tee", "dm", "spl";
fdt = "fdt-0";
@@ -220,21 +267,21 @@
fit {
images {
uboot {
- description = "U-Boot for BeagleY-AI";
+ description = "U-Boot for PocketBeagle 2";
};
fdt-0 {
- description = "k3-am67a-beagley-ai";
+ description = "k3-am62-pocketbeagle2";
type = "flat_dt";
arch = "arm";
compression = "none";
ti-secure {
- content = <&beagley_ai_dtb>;
+ content = <&pocketbeagle2_dtb>;
keyfile = "custMpk.pem";
};
- beagley_ai_dtb: blob-ext {
+ pocketbeagle2_dtb: blob-ext {
filename = "u-boot.dtb";
};
@@ -248,14 +295,13 @@
default = "conf-0";
conf-0 {
- description = "k3-k3-am67a-beagley-ai";
+ description = "k3-am62-pocketbeagle2";
firmware = "uboot";
loadables = "uboot";
fdt = "fdt-0";
};
-
};
};
};
};
-#endif /* CONFIG_TARGET_J722S_A53_BEAGLEY_AI */
+#endif /* CONFIG_TARGET_AM62X_A53_POCKETBEAGLE2 */
diff --git a/arch/arm/dts/k3-am62-r5-pocketbeagle2.dts b/arch/arm/dts/k3-am62-r5-pocketbeagle2.dts
new file mode 100644
index 000000000000..4489a559287b
--- /dev/null
+++ b/arch/arm/dts/k3-am62-r5-pocketbeagle2.dts
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * AM625 PocketBeagle 2 dts file for R5 SPL
+ * https://www.beagleboard.org/boards/pocketbeagle-2
+ *
+ * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
+ */
+
+#include "k3-am62-pocketbeagle2.dts"
+#include "k3-am62-pocketbeagle2-ddr4-1600MTs.dtsi"
+#include "k3-am62-ddr.dtsi"
+
+#include "k3-am62-pocketbeagle2-u-boot.dtsi"
+#include "k3-am625-r5.dtsi"
+
+/ {
+ aliases {
+ serial1 = &main_uart1;
+ serial2 = &main_uart6;
+ serial3 = &main_uart3;
+ serial4 = &main_uart4;
+ serial5 = &main_uart5;
+ serial6 = &main_uart2;
+ serial7 = &main_uart0;
+ };
+};
+
+&main_pktdma {
+ ti,sci = <&dm_tifs>;
+};
+
+&main_bcdma {
+ ti,sci = <&dm_tifs>;
+};
diff --git a/arch/arm/mach-k3/am62x/Kconfig b/arch/arm/mach-k3/am62x/Kconfig
index f7ad52db7d8d..87470248aa15 100644
--- a/arch/arm/mach-k3/am62x/Kconfig
+++ b/arch/arm/mach-k3/am62x/Kconfig
@@ -69,6 +69,7 @@ config TARGET_VERDIN_AM62_R5
endchoice
source "board/beagle/beagleplay/Kconfig"
+source "board/beagle/pocketbeagle2/Kconfig"
source "board/phytec/phycore_am62x/Kconfig"
source "board/ti/am62x/Kconfig"
source "board/toradex/verdin-am62/Kconfig"
diff --git a/board/beagle/pocketbeagle2/Kconfig b/board/beagle/pocketbeagle2/Kconfig
new file mode 100644
index 000000000000..e957b8e8377e
--- /dev/null
+++ b/board/beagle/pocketbeagle2/Kconfig
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+#
+
+choice
+ prompt "BeagleBoard.org AM62X based PocketBeagle 2 board"
+ optional
+
+config TARGET_AM62X_A53_POCKETBEAGLE2
+ bool "BeagleBoard.org AM62X PocketBeagle 2 running on A53"
+ select ARM64
+ select BINMAN
+ select OF_SYSTEM_SETUP
+
+config TARGET_AM62X_R5_POCKETBEAGLE2
+ bool "BeagleBoard.org AM62X PocketBeagle 2 running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+
+endchoice
+
+if TARGET_AM62X_A53_POCKETBEAGLE2
+
+config SYS_BOARD
+ default "pocketbeagle2"
+
+config SYS_VENDOR
+ default "beagle"
+
+config SYS_CONFIG_NAME
+ default "pocketbeagle2"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_AM62X_R5_POCKETBEAGLE2
+
+config SYS_BOARD
+ default "pocketbeagle2"
+
+config SYS_VENDOR
+ default "beagle"
+
+config SYS_CONFIG_NAME
+ default "pocketbeagle2"
+
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+source "board/ti/common/Kconfig"
+
+endif
diff --git a/board/beagle/pocketbeagle2/MAINTAINERS b/board/beagle/pocketbeagle2/MAINTAINERS
new file mode 100644
index 000000000000..79bdd59af7e7
--- /dev/null
+++ b/board/beagle/pocketbeagle2/MAINTAINERS
@@ -0,0 +1,10 @@
+POCKETBEAGLE2 BOARD
+M: Nishanth Menon <nm@ti.com>
+M: Robert Nelson <robertcnelson@gmail.com>
+M: Tom Rini <trini@konsulko.com>
+S: Maintained
+N: pocketbeagle2
+F: board/beagle/pocketbeagle2/
+F: include/configs/pocketbeagle2.h
+F: configs/am62_pocketbeagle2_a53_defconfig
+F: configs/am62_pocketbeagle2_r5_defconfig
diff --git a/board/beagle/pocketbeagle2/Makefile b/board/beagle/pocketbeagle2/Makefile
new file mode 100644
index 000000000000..3d42c160716e
--- /dev/null
+++ b/board/beagle/pocketbeagle2/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Makefile for AM625 PocketBeagle 2
+# https://www.beagleboard.org/boards/pocketbeagle-2
+#
+# Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+#
+
+obj-y += pocketbeagle2.o
diff --git a/board/beagle/beagleplay/board-cfg.yaml b/board/beagle/pocketbeagle2/board-cfg.yaml
similarity index 100%
copy from board/beagle/beagleplay/board-cfg.yaml
copy to board/beagle/pocketbeagle2/board-cfg.yaml
diff --git a/board/beagle/beagleplay/pm-cfg.yaml b/board/beagle/pocketbeagle2/pm-cfg.yaml
similarity index 100%
copy from board/beagle/beagleplay/pm-cfg.yaml
copy to board/beagle/pocketbeagle2/pm-cfg.yaml
diff --git a/board/beagle/pocketbeagle2/pocketbeagle2.c b/board/beagle/pocketbeagle2/pocketbeagle2.c
new file mode 100644
index 000000000000..291a1c6c3db7
--- /dev/null
+++ b/board/beagle/pocketbeagle2/pocketbeagle2.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Board specific initialization for AM625 PocketBeagle 2
+ * https://www.beagleboard.org/boards/pocketbeagle-2
+ *
+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2025 Robert Nelson, BeagleBoard.org Foundation
+ */
+
+#include <env.h>
+#include <fdt_support.h>
+#include <spl.h>
+
+#include <asm/arch/hardware.h>
+#include <asm/arch/k3-ddr.h>
+#include <asm/io.h>
+#include <dm/uclass.h>
+#include <linux/sizes.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
+
+/*
+ * The U-Boot stack can collide with some dt reservations in the 512MB
+ * configuration. Because of this, we need to relocate to just below our dt
+ * reservations. The magic number below corresponds to the lowest value from
+ * the block of conflicting reservations in the current device tree.
+ */
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
+{
+ if (gd->ram_size == SZ_512M)
+ return 0x9c800000;
+
+ return gd->ram_top;
+}
+
+#if IS_ENABLED(CONFIG_BOARD_LATE_INIT)
+int board_late_init(void)
+{
+ char fdtfile[50];
+
+ snprintf(fdtfile, sizeof(fdtfile), "%s.dtb",
+ CONFIG_DEFAULT_DEVICE_TREE);
+
+ env_set("fdtfile", fdtfile);
+
+ return 0;
+}
+#endif /* CONFIG_BOARD_LATE_INIT */
diff --git a/board/ti/am62x/am62x.env b/board/beagle/pocketbeagle2/pocketbeagle2.env
similarity index 64%
copy from board/ti/am62x/am62x.env
copy to board/beagle/pocketbeagle2/pocketbeagle2.env
index 60b5fd5e6ca7..816f365083e7 100644
--- a/board/ti/am62x/am62x.env
+++ b/board/beagle/pocketbeagle2/pocketbeagle2.env
@@ -10,23 +10,17 @@ rproc_fw_binaries= 0 /lib/firmware/am62-mcu-m4f0_0-fw
name_kern=Image
console=ttyS2,115200n8
-args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000
- ${mtdparts}
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02860000
run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+set_led_state_fail_load= led led-1 off; led led-2 on;
+ led led-3 off; led led-4 on
+set_led_state_start_load=led led-1 on; led led-2 off;
+ led led-3 on; led led-4 off
-boot_targets=mmc1 mmc0 usb pxe dhcp
+boot_targets=mmc1
boot=mmc
mmcdev=1
bootpart=1:2
bootdir=/boot
+bootmeths=script extlinux efi pxe
rd_spec=-
-
-splashfile=ti_logo_414x97_32bpp.bmp.gz
-splashimage=0x80200000
-splashpos=m,m
-splashsource=sf
-
-#if CONFIG_BOOTMETH_ANDROID
-#include <env/ti/android.env>
-adtb_idx=0
-#endif
\ No newline at end of file
diff --git a/board/phytec/phycore_am62x/rm-cfg.yaml b/board/beagle/pocketbeagle2/rm-cfg.yaml
similarity index 99%
copy from board/phytec/phycore_am62x/rm-cfg.yaml
copy to board/beagle/pocketbeagle2/rm-cfg.yaml
index f800fb28a692..26d99b03b800 100644
--- a/board/phytec/phycore_am62x/rm-cfg.yaml
+++ b/board/beagle/pocketbeagle2/rm-cfg.yaml
@@ -525,7 +525,7 @@ rm-cfg:
reserved: 0
-
start_resource: 168
- num_resource: 7
+ num_resource: 8
type: 1802
host_id: 30
reserved: 0
@@ -555,7 +555,7 @@ rm-cfg:
reserved: 0
-
start_resource: 909
- num_resource: 625
+ num_resource: 626
type: 1805
host_id: 128
reserved: 0
diff --git a/board/beagle/beagleplay/sec-cfg.yaml b/board/beagle/pocketbeagle2/sec-cfg.yaml
similarity index 100%
copy from board/beagle/beagleplay/sec-cfg.yaml
copy to board/beagle/pocketbeagle2/sec-cfg.yaml
diff --git a/configs/am62x_beagleplay_a53_defconfig b/configs/am62_pocketbeagle2_a53_defconfig
similarity index 87%
copy from configs/am62x_beagleplay_a53_defconfig
copy to configs/am62_pocketbeagle2_a53_defconfig
index c9bc7cd8d398..8964cb3b1955 100644
--- a/configs/am62x_beagleplay_a53_defconfig
+++ b/configs/am62_pocketbeagle2_a53_defconfig
@@ -6,18 +6,23 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SOC_K3_AM625=y
-CONFIG_TARGET_AM625_A53_BEAGLEPLAY=y
+CONFIG_TARGET_AM62X_A53_POCKETBEAGLE2=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80b80000
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82b00000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am625-beagleplay"
+CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62-pocketbeagle2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
-CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_TEXT_BASE=0x82f80000
+CONFIG_SPL_TEXT_BASE=0x82000000
+CONFIG_SPL_STACK_R_ADDR=0x83f80000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80c80000
+CONFIG_K3_OPTEE_LOAD_ADDR=0x80080000
+CONFIG_SPL_BSS_START_ADDR=0x82c00000
+CONFIG_SPL_HAS_LOAD_FIT_ADDRESS=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x82f80000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x40000
@@ -44,8 +49,6 @@ CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_CMD_BOOTEFI_SELFTEST=y
-CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPIO_READ=y
CONFIG_CMD_I2C=y
@@ -53,6 +56,7 @@ CONFIG_CMD_MMC=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_CACHE=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_UPSTREAM=y
@@ -90,10 +94,6 @@ CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_TI=y
-CONFIG_DM_ETH_PHY=y
-CONFIG_TI_AM65_CPSW_NUSS=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
@@ -120,7 +120,5 @@ CONFIG_SYSRESET_TI_SCI=y
CONFIG_EXT4_WRITE=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
CONFIG_LZO=y
-CONFIG_EFI_SET_TIME=y
-#include <configs/k3_efi_capsule.config>
#include <configs/am62x_a53_usbdfu.config>
diff --git a/configs/am62x_beagleplay_r5_defconfig b/configs/am62_pocketbeagle2_r5_defconfig
similarity index 89%
copy from configs/am62x_beagleplay_r5_defconfig
copy to configs/am62_pocketbeagle2_r5_defconfig
index 08b2c38b80de..90e577e8ce16 100644
--- a/configs/am62x_beagleplay_r5_defconfig
+++ b/configs/am62_pocketbeagle2_r5_defconfig
@@ -3,15 +3,16 @@ CONFIG_ARCH_K3=y
CONFIG_SYS_MALLOC_LEN=0x08000000
CONFIG_SYS_MALLOC_F_LEN=0x9000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SOC_K3_AM625=y
-CONFIG_TARGET_AM625_R5_BEAGLEPLAY=y
+CONFIG_TARGET_AM62X_R5_POCKETBEAGLE2=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0
CONFIG_ENV_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-beagleplay"
+CONFIG_DEFAULT_DEVICE_TREE="k3-am62-r5-pocketbeagle2"
CONFIG_DM_RESET=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
CONFIG_SPL_MMC=y
@@ -34,7 +35,6 @@ CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x3B000
CONFIG_SPL_PAD_TO=0x0
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
-CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
@@ -62,6 +62,8 @@ CONFIG_ENV_RELOC_GD_ENV_ADDR=y
CONFIG_NO_NET=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
@@ -97,3 +99,6 @@ CONFIG_SPL_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_LIB_RATIONAL=y
CONFIG_SPL_LIB_RATIONAL=y
+CONFIG_K3_OPTEE_LOAD_ADDR=0x80080000
+CONFIG_SPL_HAS_LOAD_FIT_ADDRESS=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x82000000
diff --git a/doc/board/beagle/am62_pocketbeagle2.rst b/doc/board/beagle/am62_pocketbeagle2.rst
new file mode 100644
index 000000000000..4ee8aa57e497
--- /dev/null
+++ b/doc/board/beagle/am62_pocketbeagle2.rst
@@ -0,0 +1,279 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Randolph Sapp <rs@ti.com>
+
+AM62 Beagleboard.org PocketBeagle 2
+===================================
+
+Introduction:
+-------------
+
+BeagleBoard.org PocketBeagle 2 is an easy to use, affordable open source
+hardware single board computer based on the Texas Instruments AM625
+SoC.
+
+Further information can be found at:
+
+* Product Page: https://www.beagleboard.org/boards/pocketbeagle-2
+* Hardware documentation: https://openbeagle.org/pocketbeagle/pocketbeagle-2
+
+Boot Flow:
+----------
+Below is the pictorial representation of boot flow:
+
+.. image:: ../ti/img/boot_diagram_am62.svg
+ :alt: Boot flow diagram
+
+On this platform, 'TI Foundational Security' (TIFS) functions as the security
+enclave master while 'Device Manager' (DM), also known as the 'TISCI server' in
+"TI terminology", offers all the essential services. The A53 or M4F (Aux core)
+sends requests to TIFS/DM to accomplish these services, as illustrated in the
+diagram above.
+
+Sources:
+--------
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_boot_sources
+ :end-before: .. k3_rst_include_end_boot_sources
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_boot_firmwares
+ :end-before: .. k3_rst_include_end_tifsstub
+
+Build procedure:
+----------------
+
+#. Setup the environment variables:
+
+ .. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_common_env_vars_desc
+ :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+ .. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_board_env_vars_desc
+ :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+#. Set the variables corresponding to this platform:
+
+ .. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_common_env_vars_defn
+ :end-before: .. k3_rst_include_end_common_env_vars_defn
+
+ .. prompt:: bash $
+
+ export UBOOT_CFG_CORTEXR=am62_pocketbeagle2_r5_defconfig
+ export UBOOT_CFG_CORTEXA=am62_pocketbeagle2_a53_defconfig
+ export TFA_BOARD=lite
+ export TFA_EXTRA_ARGS="PRELOADED_BL33_BASE=0x82000000 BL32_BASE=0x80080000"
+ export OPTEE_PLATFORM=k3-am62x
+ export OPTEE_EXTRA_ARGS="CFG_TZDRAM_START=0x80080000"
+
+ .. include:: ../ti/am62x_sk.rst
+ :start-after: .. am62x_evm_rst_include_start_build_steps
+ :end-before: .. am62x_evm_rst_include_end_build_steps
+
+Target Images
+-------------
+Copy these images to an SD card and boot:
+
+ * :file:`tiboot3.bin` from Cortex-R5 build.
+ * :file:`tispl.bin` and :file:`u-boot.img` from Cortex-A build
+
+Image formats
+-------------
+
+- :file:`tiboot3.bin`
+
+ .. image:: ../ti/img/multi_cert_tiboot3.bin.svg
+ :alt: tiboot3.bin image format
+
+- :file:`tispl.bin`
+
+ .. image:: ../ti/img/tifsstub_dm_tispl.bin.svg
+ :alt: tispl.bin image format
+
+Additional hardware for U-Boot development
+------------------------------------------
+
+* A Serial Console is critical for U-Boot development on the PocketBeagle 2. See
+ `PocketBeagle 2 serial console documentation`__.
+* uSD is the default, and a SD/MMC reader will be needed.
+* (optionally) JTAG is useful when working with very early stages of boot.
+
+.. __: https://docs.beagleboard.org/boards/pocketbeagle-2/03-design-and-specifications.html#serial-debug-port
+
+Default storage options
+-----------------------
+
+There is only one storage media option for the PocketBeagle 2, by default:
+
+* SD/MMC card interface
+
+Flash to uSD card
+-----------------
+
+If you choose to hand format your own bootable uSD card, be
+aware that it can be difficult. The following information
+may be helpful, but remember that it is only sometimes
+reliable, and partition options can cause issues. These
+can potentially help:
+
+* https://git.ti.com/cgit/arago-project/tisdk-setup-scripts/tree/create-sdcard.sh
+* https://elinux.org/Beagleboard:Expanding_File_System_Partition_On_A_microSD
+
+The simplest option is to start with a standard distribution
+image like those in `BeagleBoard.org Distros Page
+<https://www.beagleboard.org/distros>`_ and download a disk image for
+PocketBeagle 2. Pick a 16GB+ uSD card to be on the safer side.
+
+With an SD/MMC Card reader and `Balena Etcher
+<https://etcher.balena.io/>`_, having a functional setup in minutes is
+a trivial matter, and it works on almost all host operating systems.
+
+Updating U-Boot is a matter of copying the :file:`tiboot3.bin`,
+:file:`tispl.bin` and :file:`u-boot.img` to the "BOOT" partition of the uSD
+card. Remember to sync and unmount (or Eject - depending on the Operating
+System) the uSD card prior to physically removing from SD card reader.
+
+Also see following section on switch setting used for booting using
+uSD card.
+
+.. note::
+
+ If you are frequently working with uSD cards, you might find the
+ following useful:
+
+ * `USB-SD-Mux <https://www.linux-automation.com/en/products/usb-sd-mux.html>`_
+ * `SD-Wire <https://wiki.tizen.org/SDWire>`_
+
+LED patterns during boot
+------------------------
+
+.. list-table:: USR LED status indication
+ :widths: 16 16
+ :header-rows: 1
+
+ * - USR LEDs (1234)
+ - Indicates
+
+ * - 0000
+ - Boot failure or R5 image not started up
+
+ * - 1111
+ - A53 SPL/U-boot has started up
+
+ * - 1010
+ - OS boot process has been initiated
+
+ * - 0101
+ - OS boot process failed and drops to U-Boot shell
+
+.. note::
+
+ In the table above, 0 indicates LED switched off and 1 indicates LED
+ switched ON.
+
+.. warning::
+
+ If the "red" power LED is not glowing, the system power supply is not
+ functional. Please refer to the `PocketBeagle 2 documentation
+ <https://docs.beagleboard.org/boards/pocketbeagle-2/>`_ for further
+ information.
+
+A53 SPL DDR Memory Layout
+-------------------------
+
+.. include:: ../ti/am62x_sk.rst
+ :start-after: .. am62x_evm_rst_include_start_ddr_mem_layout
+ :end-before: .. am62x_evm_rst_include_end_ddr_mem_layout
+
+Switch Setting for Boot Mode
+----------------------------
+
+The boot time option is configured via "USR" button on the board. See the
+`PocketBeagle 2 Schematics
+<https://git.beagleboard.org/pocketbeagle/pocketbeagle-2/-/blob/main/pocketbeagle2_sch.pdf>`_
+and the `PocketBeagle 2 documentation on Boot Modes
+<https://docs.beagleboard.org/boards/pocketbeagle-2/03-design-and-specifications.html#boot-modes>`_
+for details.
+
+.. list-table:: Boot Modes
+ :widths: 16 16 16
+ :header-rows: 1
+
+ * - USR Button Status
+ - Primary Boot
+ - Secondary Boot
+
+ * - Not Pressed
+ - uSD
+ - USB Device Firmware Upgrade (DFU) mode
+
+ * - Pressed
+ - uSD
+ - UART
+
+To switch boot modes, hold the "USR" button while powering on the device with a
+USB type C power supply. Release the button when the red power LED lights up.
+
+DFU based boot
+--------------
+
+To boot the board over DFU, ensure there is no SD card inserted with a
+bootloader. After power-on the build artifacts needs to be uploaded one by one
+with a tool like dfu-util.
+
+.. include:: ../ti/am62x_sk.rst
+ :start-after: .. am62x_evm_rst_include_start_dfu_boot
+ :end-before: .. am62x_evm_rst_include_end_dfu_boot
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD <k3_rst_refer_openocd>`: for
+detailed setup and debugging information.
+
+.. warning::
+
+ **OpenOCD support since**: v0.12.0
+
+ If the default package version of OpenOCD in your development
+ environment's distribution needs to be updated, it might be necessary to
+ build OpenOCD from the source.
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_openocd_connect_tag_connect
+ :end-before: .. k3_rst_include_end_openocd_connect_tag_connect
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_openocd_cfg_external_intro
+ :end-before: .. k3_rst_include_end_openocd_cfg_external_intro
+
+For example, with the PocketBeagle 2 (AM62X platform), the
+:file:`openocd_connect.cfg` would look like:
+
+.. code-block:: tcl
+
+ # TUMPA example:
+ # http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User's_Manual
+ source [find interface/ftdi/tumpa.cfg]
+
+ transport select jtag
+
+ # default JTAG configuration has only SRST and no TRST
+ reset_config srst_only srst_push_pull
+
+ # delay after SRST goes inactive
+ adapter srst delay 20
+
+ if { ![info exists SOC] } {
+ # Set the SoC of interest
+ set SOC am625
+ }
+
+ source [find target/ti_k3.cfg]
+
+ ftdi tdo_sample_edge falling
+
+ # Speeds for FT2232H are in multiples of 2, and 32MHz is tops
+ # max speed we seem to achieve is ~20MHz.. so we pick 16MHz
+ adapter speed 16000
diff --git a/doc/board/beagle/index.rst b/doc/board/beagle/index.rst
index e33d39fc677f..8bf099ae7be7 100644
--- a/doc/board/beagle/index.rst
+++ b/doc/board/beagle/index.rst
@@ -10,6 +10,7 @@ ARM based boards
.. toctree::
:maxdepth: 2
+ am62_pocketbeagle2
am62x_beagleplay
am67a_beagley_ai.rst
j721e_beagleboneai64
diff --git a/include/configs/beagley_ai.h b/include/configs/pocketbeagle2.h
similarity index 57%
copy from include/configs/beagley_ai.h
copy to include/configs/pocketbeagle2.h
index a7072a094c58..dd6956aa8b90 100644
--- a/include/configs/beagley_ai.h
+++ b/include/configs/pocketbeagle2.h
@@ -1,14 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Configuration header file for BeagleY-AI
+ * Configuration header file for PocketBeagle 2
*
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
*/
-#ifndef __CONFIG_BEAGLEY_AI_H
-#define __CONFIG_BEAGLEY_AI_H
+#ifndef __CONFIG_POCKETBEAGLE2_H
+#define __CONFIG_POCKETBEAGLE2_H
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
-#endif /* __CONFIG_BEAGLEY_AI_H */
+#endif /* __CONFIG_POCKETBEAGLE2_H */
--
2.54.0
^ permalink raw reply related
* Re: [PATCH v1 2/3] platform: arm64: thinkpad-t14s-ec: Wire EC thermal events to hwmon
From: sashiko-bot @ 2026-06-24 21:21 UTC (permalink / raw)
To: Daniel Lezcano; +Cc: linux-hwmon, robh, conor+dt, devicetree
In-Reply-To: <20260624210825.264454-3-daniel.lezcano@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Missing HWMON_T_ALARM capability prevents sysfs notification from working.
--
commit 1242d377b6327e98b089989a953188982e0ca595
Author: Daniel Lezcano <daniel.lezcano@oss.qualcomm.com>
platform: arm64: thinkpad-t14s-ec: Wire EC thermal events to hwmon
This patch wires up EC thermal zone status change notifications to the hwmon
notification framework. It associates hwmon temperature channels with EC
thermal events and emits hwmon_temp_alarm notifications to userspace.
> diff --git a/drivers/platform/arm64/lenovo-thinkpad-t14s.c b/drivers/platform/arm64/lenovo-thinkpad-t14s.c
> index 142464623f0e8..276bb51da33a3 100644
> --- a/drivers/platform/arm64/lenovo-thinkpad-t14s.c
> +++ b/drivers/platform/arm64/lenovo-thinkpad-t14s.c
[ ... ]
> @@ -493,6 +496,20 @@ static int t14s_input_probe(struct t14s_ec *ec)
> return input_register_device(ec->inputdev);
> }
>
> +static void t14s_ec_hwmon_notify_event(struct t14s_ec *ec, u8 event)
> +{
> + for (int i = 0; i < ec->ec_hwmon.num_sys_thermx; i++) {
> + if (ec->ec_hwmon.sys_thermx[i].event != event)
> + continue;
> +
> + hwmon_notify_event(ec->ec_hwmon.dev, hwmon_temp,
> + hwmon_temp_alarm, i);
> +
> + dev_dbg(ec->dev, "Thermal Zone (%s) Status Change Event\n",
> + ec->ec_hwmon.sys_thermx[i].label);
> + }
> +}
> +
[ ... ]
> @@ -658,6 +671,7 @@ static const struct hwmon_ops t14s_ec_hwmon_ops = {
> };
>
> static const struct hwmon_channel_info *t14s_ec_hwmon_info[] = {
> + HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
> HWMON_CHANNEL_INFO(temp,
> HWMON_T_INPUT | HWMON_T_LABEL,
> HWMON_T_INPUT | HWMON_T_LABEL,
> HWMON_T_INPUT | HWMON_T_LABEL,
> HWMON_T_INPUT | HWMON_T_LABEL,
> HWMON_T_INPUT | HWMON_T_LABEL,
> HWMON_T_INPUT | HWMON_T_LABEL),
[Severity: Medium]
Will the hwmon_temp_alarm notifications successfully reach userspace?
The channel configuration array does not include the HWMON_T_ALARM capability
for any of the temperature channels. Without this, the hwmon core will not
create the corresponding tempX_alarm sysfs attributes.
When t14s_ec_hwmon_notify_event() calls hwmon_notify_event() for
hwmon_temp_alarm, it appears the sysfs notification will fail silently because
the attribute does not exist. The thermal subsystem still receives the event
via hwmon_thermal_notify(), but userspace monitoring tools will not be able to
read or poll the sysfs attributes.
Does HWMON_T_ALARM need to be added to the channel configurations here to make
the sysfs event notification work as described in the commit message?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260624210825.264454-1-daniel.lezcano@oss.qualcomm.com?part=2
^ permalink raw reply
* Re: [PATCH bpf-next v2 07/17] bpf: Track verifier context diagnostic events
From: Eduard Zingerman @ 2026-06-24 21:21 UTC (permalink / raw)
To: Kumar Kartikeya Dwivedi, bpf
Cc: Alexei Starovoitov, Andrii Nakryiko, Daniel Borkmann,
Emil Tsalapatis, kkd, kernel-team
In-Reply-To: <20260619205934.1312876-8-memxor@gmail.com>
On Fri, 2026-06-19 at 22:59 +0200, Kumar Kartikeya Dwivedi wrote:
> Record verifier context transitions in the diagnostic history so later reports
> can anchor causal paths to the critical section that made an operation invalid.
>
> This covers lock, IRQ, RCU, and preempt regions without adding any new
> verifier error reports. Category-specific commits decide where those recorded
> events should be rendered.
>
> Use context depth when selecting scoped history so nested regions anchor at the
> outer active region, and fall back to the earliest retained event when the
> matching entry was pruned.
>
> Signed-off-by: Kumar Kartikeya Dwivedi <memxor@gmail.com>
> ---
Acked-by: Eduard Zingerman <eddyz87@gmail.com>
> kernel/bpf/diagnostics.c | 85 +++++++++++++++++++++++++++++++++++++++-
> kernel/bpf/diagnostics.h | 20 ++++++++++
> kernel/bpf/verifier.c | 35 ++++++++++++++---
> 3 files changed, 133 insertions(+), 7 deletions(-)
>
> diff --git a/kernel/bpf/diagnostics.c b/kernel/bpf/diagnostics.c
> index 58cc7c18cf98..d6a9a2315f54 100644
> --- a/kernel/bpf/diagnostics.c
> +++ b/kernel/bpf/diagnostics.c
> @@ -1041,6 +1041,53 @@ void bpf_diag_record_ref_release(struct bpf_verifier_env *env, u32 insn_idx,
> ref_id);
> }
>
> +void bpf_diag_record_context(struct bpf_verifier_env *env, u32 insn_idx,
> + enum bpf_diag_context_kind ctx_kind, bool enter,
> + u32 depth)
> +{
> + /* Keep leave events so context rendering can stop at a depth-zero exit
> + * and show nested-region depth accurately for the active path.
> + */
> + struct bpf_diag_history_event event = {
> + .insn_idx = insn_idx,
> + .kind = BPF_DIAG_HISTORY_CONTEXT,
> + .ctx.kind = ctx_kind,
> + .ctx.enter = enter,
> + .ctx.depth = depth,
> + };
> +
> + if (ctx_kind == BPF_DIAG_CONTEXT_NONE)
> + return;
Nit: Is the NONE case really necessary?
The constructor is never called with NONE.
> +
> + bpf_diag_append_history(env, &event);
> +}
> +
Nit: maybe drop a comment here:
/* search for the most recent outermost context entry or an exit w/o the context */
> +static int bpf_diag_history_context_start_idx(const struct bpf_diag_log *log,
> + const struct bpf_diag_history_opts *opts)
> +{
> + int i;
> +
> + if (!opts->ctx_depth)
> + return 0;
> +
> + for (i = log->cnt; i > 0; i--) {
> + const struct bpf_diag_history_event *event;
> +
> + event = bpf_diag_history_event(log, i - 1);
> +
> + if (event->kind != BPF_DIAG_HISTORY_CONTEXT ||
> + event->ctx.kind != opts->ctx_kind)
> + continue;
> +
> + if (event->ctx.enter && event->ctx.depth == 1)
> + return i - 1;
> + if (!event->ctx.enter && event->ctx.depth == 0)
> + return 0;
> + }
> +
> + return 0;
> +}
[...]
^ permalink raw reply
* Re: [PATCH v2 2/2] KVM: arm64: nv: Treat S1PTW permission faults specially
From: Oliver Upton @ 2026-06-24 21:22 UTC (permalink / raw)
To: sashiko-reviews; +Cc: kvmarm, Marc Zyngier
In-Reply-To: <20260624203516.E76241F000E9@smtp.kernel.org>
On Wed, Jun 24, 2026 at 08:35:16PM +0000, sashiko-bot@kernel.org wrote:
> > + /*
> > + * S1PTW permission faults do not provide sufficient syndrome information
> > + * to determine if the fault was for read or write permissions. Perform a
> > + * read permission check and an optional write permission check, relying
> > + * on the fact that:
> > + *
> > + * - The table walker at minimum requires read permission
> > + *
> > + * - The L1 hypervisor also needs to deal with the architecture and
> > + * cannot directly infer the failing permission from the fault context
> > + */
> > + if (kvm_vcpu_abt_iss1tw(vcpu)) {
> > + forward_fault = !trans->readable;
> > + if (write_fault)
> > + forward_fault |= !trans->writable;
> > + } else if (kvm_vcpu_trap_is_iabt(vcpu)) {
> > if (vcpu_mode_priv(vcpu))
> > forward_fault = !kvm_s2_trans_exec_el1(vcpu->kvm, trans);
> > else
> > forward_fault = !kvm_s2_trans_exec_el0(vcpu->kvm, trans);
>
> [Severity: High]
> This is a pre-existing issue, but does this logic miss a read-permission
> dependency check for normal instruction aborts?
>
> If an L1 hypervisor maps a page for L2 with Stage-2 PTE AP=00 (no read/write)
> and XN=0 (executable), and L2 attempts to fetch an instruction, the hardware
> generates a Stage-2 Instruction Abort (Permission Fault) because execution
> requires read permission.
This does not match my understanding of stage-2 permissions. S2AP
controls data permissions, whereas the XN field controls instruction
fetches. The pseudocode also supports this view, where execute
permissions are computed separately from S2AP:
AArch64.S2DirectBasePermissions()
"""
S2AccessControls s2perms;
bit w;
constant bit r = permissions.s2ap<0>;
if permissions.s2ap<1> == '1' then
w = '1';
// Descriptors marked with DBM set have the effective value of S2AP[1] set.
// This implies no Permission faults caused by lack of write permissions are
// reported, and the Dirty bit can be set.
elsif permissions.dbm == '1' && walkparams.hd == '1' then
// An update occurs here, conditional to being able to append to HDBSS
if walkparams.hdbss == '1' then
w = if CanAppendToHDBSS() then '1' else '0';
else
w = '1';
else
w = '0';
bit px, ux;
case (permissions.s2xn:permissions.s2xnx) of
when '00' (px,ux) = ('1','1');
when '01' (px,ux) = ('0','1');
when '10' (px,ux) = ('0','0');
when '11' (px,ux) = ('1','0');
x = if accdesc.el == EL0 then ux else px;
s2perms.r = r;
s2perms.w = w;
s2perms.x = x;
s2perms.r_rcw = r;
s2perms.w_rcw = w;
s2perms.r_mmu = r;
s2perms.w_mmu = w;
s2perms.toplevel0 = '0';
s2perms.toplevel1 = '0';
s2perms.overlay = FALSE;
return s2perms;
"""
AArch64.S2CheckPermissions()
"""
elsif accdesc.acctype == AccessType_IFETCH then
if s2perms.overlay && s2perms.ox == '0' then
fault.statuscode = Fault_Permission;
fault.overlay = TRUE;
elsif (memtype == MemType_Device &&
ConstrainUnpredictable(Unpredictable_INSTRDEVICE) == Constraint_FAULT) then
fault.statuscode = Fault_Permission;
// Prevent execution from Non-secure space by Realm state
elsif accdesc.ss == SS_Realm && walkstate.baseaddress.paspace != PAS_Realm then
fault.statuscode = Fault_Permission;
elsif s2perms.x == '0' then
fault.statuscode = Fault_Permission;
"""
Thanks,
Oliver
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.