From: Keir Fraser <keir@xensource.com>
To: Kouya SHIMURA <kouya@jp.fujitsu.com>,
Alex Williamson <alex.williamson@hp.com>
Cc: xen-devel@lists.xensource.com, xen-ia64-devel@lists.xensource.com
Subject: Re: [PATCH 0/3][IA64] Accelerate IDE PIO on HVM/IA64
Date: Tue, 27 Feb 2007 10:56:16 +0000 [thread overview]
Message-ID: <C209BED0.A365%keir@xensource.com> (raw)
In-Reply-To: <200702270850.l1R8oeK3019985@bx604.sky.yk.fujitsu.co.jp>
On 27/2/07 09:34, "Kouya SHIMURA" <kouya@jp.fujitsu.com> wrote:
> The basic idea is to add a buffering mechanism in a hypervisor.
> I know this approach is not sophisticated. But there is no other
> good way in IA64 which has no string instructions like x86's.
>
> This patchset is indispensable to support windows/ia64 on HVM
> since installing windows and crash dumping is terribly slow.
Can you explain how this new code works? As I understand it the problem is
that each PIO instruction decoded by Xen and propagated to qemu only
transfers a single word of data. How does this new buffering mechanism work
around this?
-- Keir
next prev parent reply other threads:[~2007-02-27 10:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-02-27 9:34 [PATCH 0/3][IA64] Accelerate IDE PIO on HVM/IA64 Kouya SHIMURA
2007-02-27 9:34 ` [PATCH 1/3][IA64] Accelerate IDE PIO on HVM/IA64 : qemu Kouya SHIMURA
2007-02-27 9:34 ` [PATCH 2/3][IA64] Accelerate IDE PIO on HVM/IA64 : tools Kouya SHIMURA
2007-02-27 9:34 ` [PATCH 3/3][IA64] Accelerate IDE PIO on HVM/IA64 : ia64 Kouya SHIMURA
2007-02-27 10:56 ` Keir Fraser [this message]
2007-02-27 12:47 ` [PATCH 0/3][IA64] Accelerate IDE PIO on HVM/IA64 Kouya SHIMURA
2007-02-27 16:51 ` Alex Williamson
2007-02-28 4:20 ` [Xen-devel] " Kouya SHIMURA
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