From: Keir Fraser <keir@xen.org>
To: Jan Beulich <JBeulich@novell.com>,
Dietmar Hahn <dietmar.hahn@ts.fujitsu.com>
Cc: xen-devel@lists.xensource.com, Haitao Shan <haitao.shan@intel.com>
Subject: Re: [PATCH] VPMU issue on Nehalem cpus
Date: Mon, 22 Nov 2010 09:28:57 +0000 [thread overview]
Message-ID: <C90FE859.AC00%keir@xen.org> (raw)
In-Reply-To: <4CEA439E020000780002396B@vpn.id2.novell.com>
On 22/11/2010 09:19, "Jan Beulich" <JBeulich@novell.com> wrote:
>>>> + val = msr_content & ((1 << num_gen_pmc) - 1);
>>>
>>> What's the point of masking if the subsequent loop looks at the
>>> bottom so many bits only anyway?
>>
>> Bits 0-31 flag the overflow of the general counters (currently max 4) and
>> 32-63
>> flag the overflow of the fixed counter (currently max 3).
>> Yes the first mask is not necessary, maybe a comment would be better?
>
> Neither is the second mask (below) - the shift is all that's really
> needed. Afaic, a comment doesn't seem necessary, but Keir
> may by of different opinion here.
It's clear from the code that the mask operation is unnecessary. No code
comment required.
-- Keir
prev parent reply other threads:[~2010-11-22 9:28 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-19 10:29 [PATCH] VPMU issue on Nehalem cpus Dietmar Hahn
2010-11-19 11:06 ` Jan Beulich
2010-11-20 14:12 ` Shan, Haitao
2010-11-22 6:36 ` Dietmar Hahn
2010-11-22 7:06 ` Dietmar Hahn
2010-11-22 9:19 ` Jan Beulich
2010-11-22 9:28 ` Keir Fraser [this message]
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