Re: [PATCH] x86/emul: only emulate possibly operand sizes for POPA

[Keir Fraser <keir@xen.org>]

On 08/11/2012 08:34, "Jan Beulich" <JBeulich@suse.com> wrote:

>> I did wonder. The top halves of 64b registers are not used in compatibility
>> mode. Are their contents at all guaranteed to be
>> maintained/updated/preserved in any meaningful way across transitions into
>> and out of compatibility mode? I wasn't aware they were, and in that case
>> the cast and comment are indeed pointless.
> 
> There's no architectural guarantee, but that's how CPUs work.
> The important aspect (from an information leak perspective) is
> that upper halves don't get zeroed explicitly when switching
> between compatibility and 64-bit modes.
> 
> Now we can of course utilize that read_ulong() already does the
> zero extension (but if it didn't, we would leak stack contents here,
> so it may still be worth a comment), to the net effect of

The concern over information leak is fair. Just leave the code line as-is
then with the explicit cast and end-of-line comment.

 K.