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From: "Nicholas Piggin" <npiggin@gmail.com>
To: "Cédric Le Goater" <clg@kaod.org>, qemu-ppc@nongnu.org
Cc: <qemu-devel@nongnu.org>,
	"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>
Subject: Re: [RFC PATCH 2/5] target/ppc: Add initial flags and helpers for SMT support
Date: Fri, 02 Jun 2023 16:54:10 +1000	[thread overview]
Message-ID: <CT1YTR278291.2FJPGF168R0VU@wheely> (raw)
In-Reply-To: <fa528286-13f7-ef7c-0472-8e02d0340c10@kaod.org>

On Wed May 31, 2023 at 5:25 PM AEST, Cédric Le Goater wrote:
> On 5/31/23 03:23, Nicholas Piggin wrote:
> > SMT TCG emulation needs to be able to iterate over siblings in a core,
> > and needs to serialise core access to shared SPRs and state.
> > 
> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> > ---
> >   target/ppc/cpu.h       |  9 +++++++++
> >   target/ppc/cpu_init.c  |  5 +++++
> >   target/ppc/translate.c | 20 ++++++++++++++++++++
> >   3 files changed, 34 insertions(+)
> > 
> > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> > index 1f23b81e90..b594408a8d 100644
> > --- a/target/ppc/cpu.h
> > +++ b/target/ppc/cpu.h
> > @@ -672,6 +672,8 @@ enum {
> >       POWERPC_FLAG_TM       = 0x00100000,
> >       /* Has SCV (ISA 3.00)                                                    */
> >       POWERPC_FLAG_SCV      = 0x00200000,
> > +    /* Has >1 thread per core                                                */
> > +    POWERPC_FLAG_SMT      = 0x00400000,
> >   };
> >   
> >   /*
> > @@ -1266,6 +1268,13 @@ struct CPUArchState {
> >       uint64_t pmu_base_time;
> >   };
> >   
> > +#define _CORE_ID(cs)                                            \
> > +    (POWERPC_CPU(cs)->env.spr_cb[SPR_PIR].default_value & ~(cs->nr_threads - 1))
> > +
> > +#define THREAD_SIBLING_FOREACH(cs, cs_sibling)			\
> > +    CPU_FOREACH(cs_sibling)                                     \
> > +        if (_CORE_ID(cs) == _CORE_ID(cs_sibling))
> > +
>
>
> May be introduce these helpers when needed (and if needed).

Yeah that's a good idea, I tried to structure it so you could see
the main components first, but for a real patch it might indeed be
better add them as needed.

Thanks,
Nick


  reply	other threads:[~2023-06-02  6:54 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-31  1:23 [RFC PATCH 0/5] target/ppc: initial SMT support in TCG Nicholas Piggin
2023-05-31  1:23 ` [RFC PATCH 1/5] target/ppc: gdbstub init spr gdb_id for all CPUs Nicholas Piggin
2023-05-31  5:49   ` Philippe Mathieu-Daudé
2023-06-23  9:26   ` Cédric Le Goater
2023-05-31  1:23 ` [RFC PATCH 2/5] target/ppc: Add initial flags and helpers for SMT support Nicholas Piggin
2023-05-31  7:25   ` Cédric Le Goater
2023-06-02  6:54     ` Nicholas Piggin [this message]
2023-05-31  1:23 ` [RFC PATCH 3/5] target/ppc: Add support for SMT CTRL register Nicholas Piggin
2023-05-31  1:23 ` [RFC PATCH 4/5] target/ppc: Add msgsnd/p and DPDES SMT support Nicholas Piggin
2023-06-01  7:13   ` Cédric Le Goater
2023-06-02  6:56     ` Nicholas Piggin
2023-05-31  1:23 ` [RFC PATCH 5/5] spapr: Allow up to 8 threads SMT configuration Nicholas Piggin
2023-06-01  7:20   ` Cédric Le Goater
2023-06-02  6:59     ` Nicholas Piggin
2023-06-02  7:04       ` Cédric Le Goater
2023-06-05 10:29     ` Nicholas Piggin
2023-06-01  7:56 ` [RFC PATCH 0/5] target/ppc: initial SMT support in TCG Cédric Le Goater
2023-06-02  7:01   ` Nicholas Piggin
2023-06-02  7:21     ` Cédric Le Goater

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